Release Notes for
Digital Semiconductor 2104x/2114x 10/100 mbps Ethernet Controller
SCO Unix LLI Driver - Version 4.2.2
(SUL422T)
13-Mar-98
New Fetures:
============
Version 4.2.2 (changes since 3.3.5)
-----------------------------------
The major version number is now 4 to keep the same number as the newely
introduced driver for UnixWare 7.
- Added support for the newest member of the 21143 adapter family.
- Added support for more SROM chip types including bigger 4Kbit chips.
- Fixed a bug in the MII reset sequence which prevented some adapter designs
from working.
- Fixed a bug sometimes causing a kernel panic when packets are received with
an unknown destination address.
- All needed symbols are now scrambled to have the driver's prefix. This makes
the driver "symbol proof".
- IRQ binding to driver instance now supports APIC chips which have more IRQ
lines available.
- Fixed a bug in TX statistics collection while in full duplex modes.
- Added suport for more motherboards having trouble supporting a few PCI bus
transfere modes.
- Fixed the media type printed by printcfg in cases where autosensing doesn't
finish by the time we call printcfg. The media "Auto" is displayed.
- Added dynamic link state indication for chips and media which support link
state interrupts.
- Code changes are documented in a separate programmers' notes which are part
of the source kit.
History:
========
Last 3.X.X version was 3.3.5.
Known Limitations:
==================
- The driver supports up to 4 controllers simultaneously.
Due to PCI BIOS limitations, the user must be very careful when
configuring multiple PCI boards. The chains are bound in the order
the BIOS finds the adapters on the PCI bus, therefore must make sure
that the chains are set correctly. This is particularly true for boards
with PCI-PCI bridges, where the adapters are on a PCI bus with a bus
number higher than zero and therefore are found by the PCI BIOS after
all the devices on buses with lower numbers.
For example:
In a system with two DC21X4-based PCI boards installed (A and B)
two chains are created:
sco_tcp->d21x0
sco_tcp->d21x1
Assuming the PCI BIOS finds board A before board B, d21x0 will be bound
to board A and d21x1 to board B.
Removing board A, or adding another board C (that will be found by the BIOS
before A or B) will cause a shift in the bindings.
- The driver support only boards that their SROM was programmed in the
format of version 1.0, 3.X or 4.X and the boards that their SROM
was programmed in the classic version (32 bytes of Ethernet address
and checksum) for DS21140 boards only.
- The driver was tested with boards that have National PHY and boards that
have Broadcom PHY.
When setting the connection in boards with Broadcom PHY to 100T4 connection,
the Broadcom PHY losses the first received packet after SW/HW reset.
This cause the ANT tests to fail (the tests get out of sync).
- When testing EB142/3 with National PHY, under IPX test in TP mode
the test fails due to loss of carrier - this is under investigation.
- The driver supports only boards with a single MII PHY.
- The driver doesn't support boards that have both SymScr and MII PHY on the
same board
- In cases of boards with MII PHY, the driver performs the autosense algorithm
on MII PHY media only.
- In cases of boards with DS21142/3 without MII PHY, the driver performs thes
SIA's power-up autosense algorithm and not the SIA's dynamic autosense
algorithm.
- In case of boards with 21143 and SYM Phy, when the driver is in
AUTOSENSE/Nway mode, the Nway Algorithm will not detect 100Mb/sec link
until any Protocol was started (and an Open command issued to driver).
- The DS21143 + QSI 6611 SYM Phy was run in the ANT testing only in Force Media
(TP or 100-TX) not in Nway.
- The Driver supports enabling of Extended PCI commands, (the commands new as
of PCI spec 2.1), for those 2104x/2114x devices which support the commands.
As a default, the driver will enable the maximum possible number of
the three Extended PCI Commands,
Memory Write Invalidate (MWI);
Memory Read Line (MRL);
Memory Read Multiple (MRM);
after verifying that the system implementation (PCI bridge chipset
and BIOS) supports it.
The devices for which the commands will be enabled:
21140A rev >= 21 ,
21143 rev >= 20.
Due to incompatibility problems with certain PCI host bridges
and PCI-to-PCI bridges, the driver currently does not enable
the Memory Write Invalidate (MWI) and Memory Read Line (MRL) commands
simultaneously. The driver will only enable one of the two commands;
by default, MRL will be enabled.
- A few of Award's Multi Processor BIOS versions (3.0x) have a known problem
constructing the MP interrupt routing tables. This problem exists for all
PCI/ISA/EISA adapters with SCO's operating systems, ours included.
Download Driver Pack
After your driver has been downloaded, follow these simple steps to install it.
Expand the archive file (if the download file is in zip or rar format).
If the expanded file has an .exe extension, double click it and follow the installation instructions.
Otherwise, open Device Manager by right-clicking the Start menu and selecting Device Manager.
Find the device and model you want to update in the device list.
Double-click on it to open the Properties dialog box.
From the Properties dialog box, select the Driver tab.
Click the Update Driver button, then follow the instructions.
Very important: You must reboot your system to ensure that any driver updates have taken effect.
For more help, visit our Driver Support section for step-by-step videos on how to install drivers for every file type.