CONTENTS ======== 1 Overview 2 Parameter Description =========================================================================== (1) OVERVIEW ============ Parameters may be modified in the advanced mode using the 'p' command. Changing parameters is also possible by saving, editing, and loading a parameter file. NOTE: Parameters should only be changed if instructed by technical staff! Otherwise tests may fail. *** (2) PARAMETER DESCRIPTION ========================= Name Description Min Max Default ---------------------------------------------------------------------------- VpdTstRoArea Enables a write test on the VPD 0 1 0 Read Only area. The Read Only data will be restored after this test. (0 = skip this test) (1 = do this test) ---------------------------------------------------------------------------- DescPrtAddr Enable printing the descriptor 0 1 0 addresses while initializing the descriptors (0 = disable printing) (1 = enable printing) ---------------------------------------------------------------------------- MonPort This parameter specifies the port 0 1 0 to use for the Receive Monitor test ('N'). (0 = Port A, 1 = Port B) ---------------------------------------------------------------------------- RepPort This parameter specifies the port 0 1 0 to use for the Repeater Mode ('Y'). (0 = Port A, 1 = Port B) ---------------------------------------------------------------------------- RepMode This parameter specifies whether 0 1 0 the echo test 'e' or the loopback 'y' shall send broadcast or multicast packets. (0 = broadcast, 1 = multicast) ---------------------------------------------------------------------------- RepPktSize This parameter specifies the size 64 4096 1500 of the packets used in repeater mode 'Y' and Network Monitor Mode 'N'. ---------------------------------------------------------------------------- RepNumPkt Number of packets to be sent during 100 20000000 500 repeater test. ---------------------------------------------------------------------------- WOLDelay This parameter specifies the time (sec) 1 20 5 the repeater delays WOL packets before sending them back to the station running the PME test. ---------------------------------------------------------------------------- WOLMode This para specifies the Wake On Lan 0 7 3 mode to be tested (or a combination of modes) (1 = AMD Magic Packet) (2 = Pattern Match / Wake-up-Frame) (4 = Wake On Link Change) ---------------------------------------------------------------------------- PMEMode PME mode 0 1 0 ---------------------------------------------------------------------------- MagicPktOffs Magic Packet offset 0 1514 0 ---------------------------------------------------------------------------- DState This parameter specifies the DState in 0 3 3 which the adapter shall be switched to during PME test. (0 = D0 normal mode) (1 = D1) (2 = D2) (3 = D3 adapter is sleeping using only VAUX) ---------------------------------------------------------------------------- ClearExit This parameter specifies whether the 0 1 1 adapter shall be reinitialized when leaving the diagnostic tool. (1 = reinitailize, 0 = don't) ---------------------------------------------------------------------------- MaxChecksumSize Max. packet size for checksum test 4000 20000 4000 ---------------------------------------------------------------------------- MultiPacketChkSum If set multiple packet checksum is 0 1 0 possible. ---------------------------------------------------------------------------- VendelOrder If set there is one packet more to 0 1 0 send. The packet with the hardware computed checksum is the last one to send if "VendelOrder" is set. Otherwise it is the first packet to send. ---------------------------------------------------------------------------- RegisterDefaultValuesCheck If set check register 0 1 0 default/reset value ---------------------------------------------------------------------------- RamNotChecked The given KBytes rambuffer size will 0 30 0 be excluded from the test. ---------------------------------------------------------------------------- TxBlastFrames Number of frames used for tx blast 0 -1 0 test. ---------------------------------------------------------------------------- BreakAfterInit If set break after initialization 0 1 0 (for debug purposes). ---------------------------------------------------------------------------- PCI Bus Data Transfer Rate Test ('M' Test) Parameters Name Description Min Max Default ---------------------------------------------------------------------------- speed_size Determines the packet size for the 'M' 16 65535 65535 test. If the packet size is larger, the performance results may be better. ---------------------------------------------------------------------------- speed_tx_asy Per default the Data Transfer Rate 0 1 0 test is performed with the synchronous queue. Setting this parameter to 1 selects the asynchronous queue. ---------------------------------------------------------------------------- speed_data64 If this parameter is disabled the 'M' 0 1 1 test is performed with 32 bit data cycles. Disabling this parameter while the adapter is plugged into a 64 bit slot will decrease the performance results. (Doesn't have any effect for PCI Express devices) ---------------------------------------------------------------------------- speed_credit Number of packets that may be owned by 1 9 8 the adapter for rx/tx queue. Increasing this counter may increase the performance results. ---------------------------------------------------------------------------- speed_sec Determines the amount of time 1 65335 1 (in seconds) to perform a test step with the same configuration. ---------------------------------------------------------------------------- speed_cls Cache Line Size overwrite parameter. 0 128 0 If this parameter is unequal zero the 'M' test will be performed for the specified cache line size only. ---------------------------------------------------------------------------- speed_sig_tst Performs a single 'M' test with the 0 4 0 specified cache line size (specified in speed_cls). This para is only effective if 'speed_cls' is specified with a value unequal zero. 0 - disable speed single test 1 - do speed test once with aligned addresses 2 - do speed test once with misaligned addresses 3 - do speed test twice with aligned addresses 4 - do speed test twice with misaligned addresses ---------------------------------------------------------------------------- speed_mwi_st This parameter describes the memory 0 1 0 write and invalidate state to be used if a cache line size is specified in 'speed_cls'. This parameter has no effect if 'speed_cls' is zero. 0 - MWI disabled 1 - MWI enabled ---------------------------------------------------------------------------- speed_malign Address alignment offset for 0 7 0 misaligned fragments during the 'M' test. 0 - disable alignment overwrite 1 - misaligned fragments starts with an address of 0x...1 or 0x...9 (this is the default misalignment value) 2..7 - misalinged fragments starts with the specified address offset ---------------------------------------------------------------------------- speed_lat_time Specifies the Latency Timer value 0 128 0 during the 'M' test. This parameter has no effect for PCI express devices. 0 - disable latency timer overwrite 1..255 - configure latency timer value ---------------------------------------------------------------------------- Fragment Transfer Check ('f' Test) Parameters Name Description Min Max Default ---------------------------------------------------------------------------- AsicMaxFrags Max. number of fragments concatenated 2 10 2 for the fragment test 'f'. Note: If this parameter is increased the test duration will grow exponential. ---------------------------------------------------------------------------- AsicMinFrags Min. number of fragments concatenated 2 4 2 for the fragment test 'f'. AsicMinFrags should always be smaller or equal then AsicMaxFrags. ---------------------------------------------------------------------------- AsicPort Test port for fragment transfer test 0 1 0 This test cannot be performed on both ports at the same time. 0 - perform 'f' test on port A (default value) 1 - perform 'f' test on port B ---------------------------------------------------------------------------- AsicRwb Fragment Read/Write buffers modes 1 3 3 1 - fragmented buffers when transmitting 2 - fragmented buffers when receiving 3 - perform mode 1 first, then mode 2 ---------------------------------------------------------------------------- AsicSpecial Build the fragment lists with fragment 0 1 0 lengths 'AsicSpLen1' and 'AsicSpLen2'. Alternate both length if 'AsicSpecial' is 1. ---------------------------------------------------------------------------- AsicSpLen1 If para 'AsicSpecial' is enabled 1 8000 796 all fragments with an even number will be build with 'AsicSpLen1' ---------------------------------------------------------------------------- AsicSpLen2 If para 'AsicSpecial' is enabled 1 8000 4096 all fragments with an odd number will be build with 'AsicSpLen2' ---------------------------------------------------------------------------- Loopback Tests ('y' and 'j' Test) Parameters Name Description Min Max Default ---------------------------------------------------------------------------- LoopMode Perform the loopback test only for the 0 6 0 selected loopback mode. 0 - all modes (default) 1 - ASIC Loopback 2 - MAC Loopback 3 - PHY/SERDES Loopback 4 - Wrap Plug Loopback 5 - Port to Port Loopback 6 - External Repeater Loopback ---------------------------------------------------------------------------- LoopPort Perform the loopback test for the 0 2 0 selected port only. 0 - Port A only 1 - Port B only 2 - Port A, Port B and then all ports together 3 - only all ports together ---------------------------------------------------------------------------- LoopSec Number of seconds to perform the 1 65535 2 loopback test. ---------------------------------------------------------------------------- LoopDescCnt Number of descriptors/listelements 5 50 20 used for a Tx queue during the loopback test. The number of descriptors for the Rx queue is two times 'LoopDescCnt'. The number of list elements for the Rx queue is equal to 'LoopDescCnt'. ---------------------------------------------------------------------------- LoopDualTx If this flag is set to '1' both Tx 0 1 1 queues will send into 1 Rx queue. ---------------------------------------------------------------------------- LoopTxSize1 This para specifies the packet size 16 8000 1514 of the first port under test. This parameter is not used during the jumbo frame ('j') test. ---------------------------------------------------------------------------- LoopTxSize2 This para specifies the packet size 16 8000 500 of the second port under test. It is ignored as long as only one port is tested or the port to port loopback is enabled. This parameter is also ignored during the jumbo frame ('j') test. ---------------------------------------------------------------------------- LoopCredit Number of packets that may be owned by 1 13 6 the adapter at the same time for each descriptor ring. This parameter is not used during the jumbo frame ('j') test. ---------------------------------------------------------------------------- LoopSkipFCheck Skip the frame check means, don't check 0 1 1 the RFSW and skip any memory compare checks. This option should be enabled if a Port to Port loopback test should be performed over a switch or hub. ---------------------------------------------------------------------------- JumboTxSize This parameter specifies the frame 16 10000 8299 size used during the jumbo frame test. ---------------------------------------------------------------------------- JumboXmFlush Enable Receive FIFO flushing on 0 1 0 Genesis / XMAC only (0 = disable flushing) (1 = enable flushing) ---------------------------------------------------------------------------- Common Parameters that may be shared by several tests. Modifying this parameters will change the configuration of the following tests o Loopback Test 'y' o Network Monitor 'N' Name Description Min Max Default ---------------------------------------------------------------------------- QSizePARx Receive Queue Size Port A 0 128 32 QSizePBRx Receive Queue Size Port B This parameters describes the size of the receive queues for port A and B in units of 8 kB. This means defining QSizePARx = 2 will configure a receive queue of 16 kB for port A. The test will not be performed if the sum of all QSizexxx parameters exceeds the memory size of the adapter. ---------------------------------------------------------------------------- QSizePAAx Async Transmit Queue Size Port A 0 128 16 QSizePASx Sync. Transmit Queue Size Port A QSizePBAx Async Transmit Queue Size Port B QSizePBSx Sync. Transmit Queue Size Port B This parameters describes the size of the transmit queues for port A and B in units of 8 kB. This means defining QSizePAAx = 1 will configure a async transmit queue of 8 kB for port A. The test will not performed if the sum of all QSizexxx parameters exceeds the memory size of the adapter. ---------------------------------------------------------------------------- mem_patt Memory pattern usage. Every test which 0 5 0 is transmitting or receiving frames or fragments will setup it's data packets with a memory pattern specified by this parameter. 0 - random filled 1 - byte counting data (00010203 04050607 ...) 2 - word counting pattern with negative numbers too (0000FFFF 0001FFFE ...) 3 - highest power consumption pattern (00000000 FFFFFFFF ...) 4 - special pattern to generate TCP checksum error (FFFFFFFF 00000000 ...) 5 - special pattern to generate TCP checksum error (FFFFFFFF 0000FFFF ...) ---------------------------------------------------------------------------- LinkAutoNeg Use auto-negotiation when creating the 0 1 1 link? (0 = False, 1 = True) ---------------------------------------------------------------------------- LinkSpeed Configure Link Speed. This parameter 0 3 0 is ignored for fiber adapters and adapters which do not support multiple speeds. 0 - AUTO 1 - 10 Mbps 2 - 100 Mbps 3 - 1000 Mbps ---------------------------------------------------------------------------- LinkFlowMode Configure Flow Control. This parameter 0 3 3 is ignored, if 'LinkAutoNeg' is disabled. 0 - disable flow control 1 - local station may send pause frames 2 - both stations may send pause frames (symmetric) 3 - both stations may send pause frames or just the remote station may send pause frames. ---------------------------------------------------------------------------- LinkMode Configure Duplex Mode (Half or Full) 0 5 4 0 - half duplex (no auto-negotiation) 1 - full duplex (no auto-negotiation) 2 - auto-half duplex (with auto-negotiation) 3 - auto-full duplex (with auto-negotiation) 4 - auto-both (full or half duplex, with auto-negotiation) 5 - auto-sense (with auto-negotiation) ---------------------------------------------------------------------------- LinkMSConfig 1000Base-T Master/Slave Configuration 0 2 0 This parameter is ignored, if 'LinkAutoNeg' is disabled. In this case the adapter is configured as slave manually. 0 - Use Master/Slave resolution protocol. The preferred state is slave. 1 - Manually configured as master 2 - Manually configured as slave ---------------------------------------------------------------------------- WaitAfterUp Time in seconds to wait after the link 0 20 1 has been established. ---------------------------------------------------------------------------- ASIC and XMAC Configuration Parameters Modifying this parameters will change the configuration of the following tests o Loopback Test 'y' o Jumbo Frame Test 'j' CAUTION: Modifying this parameters may cause the concerning tests to fail. Name Description Min Max Default ---------------------------------------------------------------------------- MacArbTxTo MAC Arbiter Transmit Timeout 0 255 0 If this parameter is specified unequal zero, the default MAC Arbiter Timeout for both ports will be overridden by the specified value. ---------------------------------------------------------------------------- MacArbRxTo MAC Arbiter Receive Timeout 0 255 0 If this parameter is specified unequal zero, the default MAC Arbiter Timeout for both ports will be overridden by the specified value. ---------------------------------------------------------------------------- MacColThres MAC Collision Threshold 0 7 4 For FE: Number of TX clocks to count from the beginning of packet before a collision will be counted as a late collision (for FE mode only). The number is in 32 cycles multiples (16 bytes transmit time) For GIG mode: the number is fixed to 512 bytes. ---------------------------------------------------------------------------- MacJamLen MAC JAM length 0 3 3 0 = ~12K bit-times for FE = ~24K bit-times for GIG 1 = ~24K bit-times for FE = ~48K bit-times for GIG 2 = ~32K bit-times foe FE = ~64K bit-times for GIG 3 = ~48K bit-times for FE = ~96K bit-times for GIG ---------------------------------------------------------------------------- MacJamIpgVal MAC JAM IPG 2 31 11 For FE: The JAM IPG varies between 8 bit- times to 124. The step is 4 bit-times. 2 - 8 bit-times 3 - 12 bit-times ... ... 30 - 120 bit-times 31 - 124 bit-times For GIG: 2 - 32 bit-times 3 - 48 bit-times (default mode) 4 - 64 bit-times 5 - 80 bit times 6 - 96 bit-times 7 - 112 bit-times ---------------------------------------------------------------------------- MacJamIpgData MAC JAM IPG to DATA 2 31 28 For FE: The value may vary between 8 bit- times to 124. The step is 4 bit-times. 2 - 8 bit-times 3 - 12 bit-times ... ... 30 - 120 bit-times 31 - 124 bit-times For GIG: 2 - 32 bit-times 3 - 48 bit-times 4 - 64 bit-times(default value) 5 - 80 bit times 6 - 96 bit-times 7 - 112 bit-times ---------------------------------------------------------------------------- MacBackOffLim MAC Backoff Limit 0 15 4 ---------------------------------------------------------------------------- MacDataBlinder MAC Data Blinder 0 31 4 FE only !!! The number of bit times the port does not sense the wire before transmission. ---------------------------------------------------------------------------- MacIpgData MAC IPG Data 6 31 30 For FE: The value may vary between 24 bit- times to 124. The step is 4 bit-times. 6 - 24 bit-times 7 - 28 bit-times 8 - 32 bit-times ... ... 30 - 120 bit-times 31 - 124 bit-times For GIG: 6 - 96 bit-times 7 - 112 bit-times ---------------------------------------------------------------------------- MacLimit4 MAC Limit4 0 1 0 The number of consecutive packet collisions that will occur before the collision counter is reset. 0 - The port resets its collision counter after 16 consecutive retransmit trials and restarts the Back off algorithm. 1 - The port will reset its collision counter and restart the Back off algorithm after 4 consecutive transmit trials. ---------------------------------------------------------------------------- RiRxWrTo RAM Interf. Receive Write Timeout Value 0 255 0 (overrides timer 0 and timer 6) RiAxWrTo RAM Interf. Async Tx Write Timeout Val 0 255 0 (overrides timer 1 and timer 7) RiSxWrTo RAM Interf. Sync Tx Write Timeout Value 0 255 0 (overrides timer 2 and timer 8) RiRxRdTo RAM Interf. Receive Read Timeout Value 0 255 0 (overrides timer 3 and timer 9) RiAxRdTo RAM Interf. Async Tx Read Timeout Value 0 255 0 (overrides timer 4 and timer 10) RiSxRdTo RAM Interf. Sync Tx Read Timeout Value 0 255 0 (overrides timer 5 and timer 11) ---------------------------------------------------------------------------- QuRxWatMark Queue Receive Watermark 0 2047 0 If this parameter is specified unequal zero, the default BMU receive watermark will be overridden for both ports. ---------------------------------------------------------------------------- QuTxWatMark Queue Transmit Watermark 0 2047 0 If this parameter is specified unequal zero, the default BMU transmit watermark will be overridden for the used transmit port of both ports. ---------------------------------------------------------------------------- RxMffCtrl Receive MAC FIFO Control Register Val 0 16383 0 If this parameter is specified unequal zero, the default receive MAC FIFO control word will be overridden for both ports. Parameter bit description: Bit 13: Enable Ready Patch Bit 12: Disable Ready Patch Bit 11: Enable Timing Patch Bit 10: Disable Timing Patch Bit 9: Enable AlmostFull Signaling Bit 8: Disab. AlmostFull Signaling Bit 7: Enable Pause Signaling Bit 6: Disab. Pause Signaling Bit 5: Enable Frame Flushing Bit 4: Disab. Frame Flushing Bit 3: Enable Timestamp Generation Bit 2: Disab. Timestamp Generation Bit 1: Clear IRQ No Timestamp Bit 0: Clear IRQ No Status (Per default the SW enables the timingpatch. All other features are disabled) ---------------------------------------------------------------------------- TxMffCtrl Transmit MAC FIFO Control Register Val 0 16383 0 If this parameter is specified unequal zero, the default transmit MAC FIFO control word will be overridden for both ports. Bit 13: Enable Packet Recovery Bit 12: Disable Packet Recovery Bit 11: Enable Timing Patch Bit 10: Disable Timing Patch Bit 9: Enable AlmostFull Signaling Bit 8: Disab. AlmostFull Signaling Bit 7: Enable Wait for Empty Bit 6: Disab. Wait for Empty Bit 5: Enable Frame Flushing Bit 4: Disab. Frame Flushing Bit 3: Enable Loopback Bit 2: Disable Loopback Bit 1: Clear XMAC Reset Bit 0: Set XMAC Reset (Per default the SW enables ) ( o Packet Recovery, ) ( o Timing Patch, ) ( o Frame Flushing, and ) ( o clear XMAC reset. ) ---------------------------------------------------------------------------- XmRxThres XMAC Receive Threshold 0 1023 0 If this parameter is specified unequal to zero the XMACs Receive Threshold will be overridden with the configured value. This will be done for all used ports. ---------------------------------------------------------------------------- XmTxThres XMAC Transmit Threshold 0 1023 0 If this parameter is specified unequal to zero the XMACs Transmit Threshold will be overridden with the configured value This will be done for all used ports. ---------------------------------------------------------------------------- RamRxUpThres Receive RAM Buffer Upper Threshold 0 262143 0 in units of 8 bytes. If this parameter is specified unequal zero, it's value overrides the Receive RAM Buffer Upper Threshold. If the receive queue is filled up to this threshold 'signal pause' to the related XMAC is asserted. ---------------------------------------------------------------------------- RamRxLoThres Receive RAM Buffer Lower Threshold 0 262143 0 in units of 8 bytes. If this parameter is specified unequal zero, it's value overrides the Receive RAM Buffer Lower Threshold. Signal Pause on the related XMAC is deasserted, if the number of bytes if falling below this threshold. ---------------------------------------------------------------------------- RamRxS&FOn Receive RAM Buffer Store & Forward On 0 1 0 Per default Store & Forward is disabled on the receive side. Setting this parameter to 1 enables S&F. ---------------------------------------------------------------------------- RamTxS&FOff Transmit RAM Buffer Store & Fwd Off 0 1 0 Per default Store & Forward is enabled on the transmit side. Setting this parameter to 1 disables S&F. ---------------------------------------------------------------------------- xxi_par_test_no Perform a specific Parity Test. 0 6 0 A parity error is generated on the PCI bus if 'xxi_par_test_no' matches the test numbers described below. CAUTION: Enabling this tests MAY cause system to stop for any further action after performing the test. The following tests will not performed if 'xxi_par_test_no' is unequal zero. FORCE DATAPERR MASTER READ FORCE DATAPERR TARGET WRITE FORCE ADDRPERR TARGET ACCESS FORCE DATAPERR MASTER READ 64 Parameter Value Description: (0) disabled, skip the tests (1) FORCE DATAPERR TARGET READ (2) FORCE DATAPERR MASTER WRITE (3) FORCE ADDRPERR MASTER ACCESS (4) FORCE DATAPERR MASTER WRITE 64 (5) FORCE ADDRPERR MASTER ACCESS 64 (6) FORCE ADDRPERR MASTER 2nd ACCESS 64 Comments: (4..6): The adapter must be plugged into a 64 bit slot to perform this tests. (5..6): A real dual address cycle is needed to do this tests. But this test can only work if memory above 4 GB is present. If this is the case the descriptors should be initialized there. The first master access is the access where the BMU tries to read the next descriptor. ---------------------------------------------------------------------------- Link Test Parameters ('n' test) Name Description Min Max Default ---------------------------------------------------------------------------- LinkSecs How long is the link test done. 1 65535 10 ---------------------------------------------------------------------------- LinkTest Specifies the number of a single 0 40 0 link test which should be performed. (0 = all tests) (>0 = selected test #) 1..20 Auto-negotiation On/Off, Pause- and Duplex Modes 20..29 Master/Slave Configuration 30..39 Remote Fault bits ---------------------------------------------------------------------------- LinkPort This parameter specifies the port 0 1 0 to use during the link test ('n'). (0 = Port A, 1 = Port B) ---------------------------------------------------------------------------- CSumStart Specifies the start value for checksum 0 65535 0 calculation ---------------------------------------------------------------------------- CSumLen Specifies the field length for checksum 0 1514 0 calculation ---------------------------------------------------------------------------- WavePort This parameter specifies the port 0 1 0 to use during the waveform test ('W'). (0 = Port A, 1 = Port B) ---------------------------------------------------------------------------- SubTest Specifies the number of a single test 0 0 0xffffffff out of a group which should be performed. (0 = all tests) (>0 = selected test #) ---------------------------------------------------------------------------- ErrTol Error tollerance. 0 0 100 Rate of allowed errors. 1% allows 5 lost frames of 500 to pass test (for echo test 'e') ---------------------------------------------------------------------------- LoopCnt Number of loops for 'L' command -1 0 -1 ---------------------------------------------------------------------------- Factor Factor for insert Broadcast frames 0 0 0xffffffff in sequense of sent frames in special frames test ---------------------------------------------------------------------------- *** *** End of File ***Download Driver Pack
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