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*
* Intel(R) RAID Option ROM Integration Test Suite README
*
* This document makes references to products developed by Intel(R). There are
* some restrictions on how these products may be used, and what information may
* be disclosed to others. Please read the Disclaimer section at the bottom of
* this document, and contact your Intel field representative if you would like
* more information.
*
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* Intel is making no claims of usability, efficacy or warranty. The INTEL(R)
* SOFTWARE LICENSE AGREEMENT contained herein completely defines the license and
* use of this software.
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* CONTENTS OF THIS DOCUMENT
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This document contains the following sections:
1. Overview
2. System Requirements
3. Executing the Test
4. Explanation of Tests Run by RAIDCPLY
5. Disclaimer
5. Intel(R) Software License
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* 1. OVERVIEW
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The Intel(R) Rapid Storage Technology is designed to provide functionality for
the Intel(R) SATA RAID Controller. This tool will report settings of the platfom
to evaluate its compliance with the Intel(R) Rapid Storage Technology product.
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* 2. SYSTEM REQUIREMENTS
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1. The system must contain the following Intel(R) products:
* Intel(R) Pentium(R) 4 Processor, Core(TM) Processor
* Intel(R) ICH7R, ICH7MR, ICH8R, ICH8M-E, ICH9R, ICH9M-E, ICH10R,
ESB2 I/O Controller Hub, 5 Series Chipset, 3400 Series Chipset,
Desktop/Workstations/Server Express Chipset SATA RAID Controller,
Mobile Express Chipset SATA RAID Controller
2. Dos Environment
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* 3. Executing the Test
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1. Enable the RAID Option ROM from system BIOS.
2. Make sure there is one SATA hard drive attached to at least two SATA
ports controlled by the Intel(R) I/O Controller Hub.
3. There is no need to create any RAID volumes in order to execute this test.
4. From a DOS prompt, enter the following
c:\RAIDcply.exe
You may have the utility redirect the results to a text file by using the
following command:
c:\RAIDcply > test1.txt
--- IMPORTANT ---
Always reboot the computer before running RAIDcply. Never run RAIDcply
a second time without rebooting. RAIDcply's tests for register locking
will generate false positives on the second run because RAIDcply.exe will
lock the register itself the first time the program is executed.
-----------------
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* 4. Explanation of Tests Run by RAIDCPLY
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1. Intel(R) ICH SATA RAID Controller Presence Tests
1.1 Intel(R) Chipset Detected
Checks for the Intel(R) Vendor ID in the MCH and ICH.
Dev00:F0:Reg00h[15:00] = 0x8086
Dev31:F0:Reg00h[15:00] = 0x8086
Severity: HIGH
1.2 RAID Controller DevID at D31:F2
Checks for the proper Deveice ID for the Intel(R) RAID Controller.
Dev31:F2:Reg02h[15:00] = 0x2822 (for example this is ICH9R DevID)
Severity: HIGH
1.3 RAID Controller Name
Reports the name of I/O Controller.
Severity: Status Only
1.4 RAID SubClass Code (0x04) at D31:F2
Checks for the proper SubClass Code for the Intel(R) RAID Controller.
Dev31:F2:Reg0Ah[07:00] = 0x04
Severity: HIGH
1.5 Chipset Revision
Checks the hardware revision of the ICH part.
Dev31:F2:Reg08h[07:00]
Severity: Status Only
1.6 AIE Bit is Clear(0) at Dev32 Funct2
Checks if the alternate ID enable bit is clear.
Dev31:F2:Reg9Ch[07]
Severity: HIGH
1.7 Raid Platform ID
Reports the actual RAID Platform ID (if available). This is the Device ID
that would be exposed if the AIE bit is set.
Severity: Status Only
2. PnP Installation Tests
2.1 $PnP Anchor String Present in 0xF000 Segment
Searches for the "$PnP" string in the PnP header, as defined in the
Plug and Play Bios Specification. The RAID Option ROM requires PnP
support to function.
Severity: HIGH
2.2 PnP Header Checksum Valid
Calculates an 8-bit checksum over the PnP Header to make sure the
reported checksum is correct.
Severity: HIGH
3. BBS Enabled BIOS Tests
3.1 PCI BIOS Present (INT 1A, Func 0xB101)
Checks for successful return from the call to Int 1Ah, Func 0xB101.
Severity: HIGH
***Tests 3.2 and 3.3 are shown only if test 3.1 was successful***
3.2 PCI BIOS Version
Displays the major version, located in the BH register, and the
minor version, located in the BL register, after a successful return
from the INT 1A, Func 0xB101 call.
Severity: Status Only
3.3 PCI BIOS Version Supports OROM PCI Version
Verifies the major version returned from test 3.2 is equal or greater than the PCI
Version specified in the OROM Header.
Severity: HIGH
4. AHCI Register Settings Tests
4.1 HBA Port Multiplier Support Status
Checks that the PMS bit in the HBA Capabilities Register is clear. Port
multipliers are supported on ICH9.
ABAR+00h[17] = 0
Severity: Status Only
4.2 N/A. Test deprecated.
4.3 HBA Supports Command List Override
Reports the status of the CAP.SCLO bit to determine if the platform
supports Command List Override.
ABAR+00h[28]
Severity: HIGH
4.4 HBA Supports Interlock Switch
Reports the status of the CAP.SIS bit to determine if the platform
supports interlock switches.
ABAR+00h[28]
Severity: Status Only
4.5 HBA Capabilities Register Locked
Checks that the all the RWO bits in the HBA Capabilities Register have
been written to by the BIOS. If BIOS wishes to use the default value,
it must write that value to lock the register. The entire register must
be written at once.
ABAR+00h[30,28:26,23:20,17,14,13]
Severity: MEDIUM
4.6 AHCI Enable Bit Set Status
Reports on the status of the AE bit in the Global HBA Control Register.
Setting this bit disables the Legacy and Native interfaces on
the SATA controller and enables AHCI. Enabling AHCI is necessary on ESB2
and ICH8R systems.
ABAR+04h[31] = 1 or 0
Severity: Status Only
4.7 Port Implemented Bit Set for Port x
Reports the status of the Port Implemented bit for each port. Only
ports that have been implemented can be used.
ABAR+0Ch[03:00]
Severity: Status Only
4.8 PI Bit Matches PE Bit for Port x
Makes sure the Port Implemented and Port Enabled bits match for each
port.
Dev31:F2:Reg92h[03:00], ABAR+0Ch[03:00]
Severity: Status Only
4.9 Aggressive Link Power Management on Port x
Reports status of ALPE bit in AHCI device command register.
ABAR+118h[26], ABAR+198h[26], ABAR+218h[26], ABAR+298h[26]
Severity: Status Only
4.10 Hot Plug Support on Port x
Reports status of HPCP bit in AHCI device command register.
ABAR+118h[18], ABAR+198h[18], ABAR+218h[18], ABAR+298h[18]
Severity: Status Only
4.11 Interlock Switch Attached to Port x
Reports status of ISP bit in AHCI device command register. Bit is
always listed as N/A when the SIS bit in the capabilities register is
clear.
ABAR+118h[19], ABAR+198h[19], ABAR+218h[19], ABAR+298h[19]
Severity: Status Only
4.12 ALPE and HPCP Cannot Both be Set on Port x
Checks that one or both of the ALPE and HPCP bits are clear. They
cannot both be set at the same time.
ABAR+118h[26,18], ABAR+198h[26,18], ABAR+218h[26,18], ABAR+298h[26,18]
Severity: MEDIUM
4.13 ISP Requires HPCP on Port x
A port cannot support an interlock switch if the HBA does
not support Hot Plug. This is only tested if test 4.2 reports "Enabled"
ABAR+118h[19,18], ABAR+198h[19,18], ABAR+218h[19,18], ABAR+298h[19,18]
Severity: MEDIUM
4.14 Port x Command Register Locked
Checks that all RWO bits in the AHCI device command register have been
written to by the BIOS. If BIOS wishes to use the default value, it
must write that value to lock the bits.
ABAR+118h[19,18], ABAR+198h[19,18], ABAR+218h[19,18], ABAR+298h[19,18]
Severity: MEDIUM
4.15 Port x Command Register Esp Bit Set
Checks the value of the Esp bit in the Port x Command Register.
If the bit is set, it means the port is set as an external,
if the bit is clear, it means the port is internal.
Severity: Status Only
4.16 CAP.SIS and PxCMD.ISP Agreement
Checks that the value in CAP.SIS and the ISP bit in each port's command
register are compatible. Test fails when: (1) CAP.SIS bit is set but
ISP bit not set in any PxCMD register, or (2) CAP.SIS bit is clear but
ISP bit is set in one or more PxCMD registers.
ABAR+00h[28],
ABAR+118h[19], ABAR+198h[19], ABAR+218h[19], ABAR+298h[19]
Severity: MEDIUM
4.17 Software Feature Mask Bit
Checks bit index 6 of the Vendor Capabilities Register
Abar+A0h. If set, then the Software Feature Mask Bits
at offset C8h will be interpreted by the OROM to
perform BIOS controlled Feature SKUing. If set, a table
will be displayed too. The first column, OCF, stands for Original
Compiled Features of the OROM and indicates what features
were compiled for the OROM. The 2nd column, BCFS, stands for BIOS
Controlled Feature Set and indicates what features were enabled or
disabled by the BIOS. An "X" indicates compiled/enabled, a "-' indicates
not compiled/disabled.
Severity: Status Only
5. Chipset RAID Controller Settings Tests
5.1 RAID I/O Space Enabled
Checks that the IOSE bit in the RAID controller is enabled.
Dev31:F2:Reg04h[00] = 1
Severity: HIGH
5.2 RAID Memory Space Enabled
Checks that the MSE bit in the RAID controller is enabled.
Dev31:F2:Reg04h[01] = 1
Severity: HIGH
5.3 RAID Programming Interface Set to 0
This test is only run on ICH7 Rev0 hardware.
Checks that the Programming Interface is set to 0. This must be written
to 0 BEFORE the SubClass code is locked to RAID Mode. Failing this test
will cause WHQL failures.
Dev31:F2:Reg09h[07:00] = 0x00
Severity: MEDIUM
5.4 RAID Programming Interface Locked
This test is only run on ICH6 Rev0 hardware.
Checks that the Programming Interface has been locked to 0. This value
becomes Read Only once the SubClass code is locked. Failing this test
will cause WHQL failures.
Dev31:F2:Reg09h[07:00] locked to 0x00
Severity: MEDIUM
5.5 Primary Command BAR Programmed
Checks that the PCMDBA BAR in the RAID controller has been programmed.
The RAID controller is operated through the Native IDE interface until
the OS driver is able to take control.
Dev31:F2:Reg10h[15:03] is non 0
Severity: HIGH
5.6 Primary Control BAR Programmed
Checks that the PCTLBA BAR in the RAID controller has been programmed.
The RAID controller is operated through the Native IDE interface until
the OS driver is able to take control.
Dev31:F2:Reg14h[15:02] is non 0
Severity: HIGH
5.7 Secondary Command BAR Programmed
Checks that the SCMDBA BAR in the RAID controller has been programmed.
The RAID controller is operated through the Native IDE interface until
the OS driver is able to take control.
Dev31:F2:Reg18h[15:03] is non 0
Severity: HIGH
5.8 Secondary Control BAR Programmed
Checks that the SCTLBA BAR in the RAID controller has been programmed.
The RAID controller is operated through the Native IDE interface until
the OS driver is able to take control.
Dev31:F2:Reg1Ch[15:02] is non 0
Severity: HIGH
5.9 Legacy Bus Master BAR Programmed
Checks that the LBAR in the RAID controller has been programmed.
Dev31:F2:Reg20h[15:04] is non 0
Severity: HIGH
5.10 AHCI BAR Programmed
Checks that the ABAR in the RAID controller has been programmed. The
RAID controller is operated through the AHCI interface once the OS
driver takes control.
Dev31:F2:Reg24h[31:10] is non 0
Severity: HIGH
5.11 MAP Bits Set to Non-Combined (00b)
Checks that the Port Mapping Register in the RAID controller has its
Map Value set to 00b. The RAID controller must NOT be set to Combined
Mode for proper RAID operation.
Dev31:F2:Reg90h[01:00] = 0
Severity: HIGH
5.12 SATA Mode Select Set to RAID (10b)
Checks if SATA Mode Select (SMS) bits in the MAP register are set
properly (10b).
Severity: HIGH
5.13 Port x Enable Bit Set
Checks that the PCS register in the RAID controller has its PxE bit set
to 1. Only ports that have been enabled can be used. Test 5.15 and
tests 5.7 - 5.12 will only be run on ports that have this bit set.
Dev31:F2:Reg92h[03:00]
Severity: Status Only
5.14 SATA Device Present on Port #
Checks that the Port Status Register has a device present and looks at the
port signature to determine what type of device is present.
Severity: Status Only
5.15 At least 2 SATA HDDs found
Checks that there are at least 2 SATA HDDs connected to the system.
Severity: MEDIUM
5.16 Number of SATA HDDs found matches user reported number
Checks if the number of SATA HDDs present matches the number of connected HDDS
reported by the user.
Severity: HIGH
5.17 Primary IO Decode Enabled
Checks that the Primary Timing register in the RAID controller has its
Decode Enable bit set to 1. If this test fails, commands sent to SATA
ports mapped to the Primary Channel will not be decoded.
Dev31:F2:Reg40h[15] = 1
Severity: HIGH
5.18 Secondary IO Decode Enabled
Checks that the Secondary Timing register in the RAID controller has
its Decode Enable bit set to 1. If this test fails, commands sent to
SATA ports mapped to the Secondary Channel will not be decoded.
Dev31:F2:Reg42h[15] = 1
Severity: HIGH
5.19 Primary Timing Register Programmed
Checks that the various timing bits in the Primary Timing register in
the RAID controller have been configured. These bits have no effect on
hardware when in RAID mode but must be set for software compatibility.
Dev31:F2:Reg40h[14:00] is non 0
Severity: LOW
5.20 Secondary Timing Register Programmed
Checks that the various timing bits in the Secondary Timing register in
the RAID controller have been configured. These bits have no effect on
hardware when in RAID mode but must be set for software compatibility.
Dev31:F2:Reg42h[14:00] is non 0
Severity: LOW
6. Intel(R) RAID Option ROM Tests
6.1 Option ROM Found in BIOS Compatibility Segments
Searches segments 0xC000 through 0xF000 to see if the Intel(R) RAID
Option ROM is present.
Severity: HIGH
6.2 Option ROM Build Matches Chipset
Checks if the OROM header chipset DID matches the chipset physical
device ID.
Severity: HIGH
6.3 Option ROM Checksum Valid
Calculates an 8-bit checksum over the Option ROM to make sure the
reported checksum is correct.
Severity: HIGH
6.4 Main Memory Size < 639kB
Checks that the Option ROM has consumed the portion of conventional
memory that it needs.
Severity: HIGH
6.5 Option ROM Caching
Checks that the Option ROM is being cached at the run time.
Severity: Medium
7. System BIOS Tests
7.1 BIOS Does Not Export HDD's on RAID Controller
Checks to make sure that system BIOS did not export (by adding a BCV
entry and incrementing the 40:75 drive count) any of the hard drives
that are controlled by the Option ROM. Failing this test can result in
user data corruption.
Severity: HIGH
7.2 BIOS Updating INT 15h E820 Memory Map
Checks that the E820 Memory Map is consistent with the EBDA pointer
located at 40:0E. When the RAID Option ROM loads, it claims a portion
of memory immediately below EBDA. It also updates the EBDA pointer at
40:0E. It is expected that BIOS detect this change after the RAID
Option ROM exits and update the memory map to show that this memory is
now reserved. Failing this test has the potential to cause software
compatibility issues.
Severity: LOW
7.3 BIOS Reporting Correct Base Memory Size in 40:13
Checks that the conventional memory size reported at 40:13 is
consistent with the EBDA pointer located at 40:0E. When the RAID Option
ROM loads, it claims a portion of memory immediately below EBDA. It
also updates the EBDA pointer at 40:0E. It is expected that BIOS detect
this change after the RAID Option ROM exits and update the available
memory size at 40:13. Failing this test has the potential to cause
software compatibility issues.
Severity: HIGH
7.4 BIOS Compliant with ITM RAID Int13h Funct26h Support
Performs an int13h funct26h call on a hard disk or volume located at DOS disk
ID 0x81 if the OROM is Intel Turbo Memory Capable. Failing this test indicates
that the BIOS is not preserving the EDX and AH register set by the RAID OROM after handling
the int13h funct26h call.
Severity: Status Only
8. Interrupt Settings Tests
8.1 RAID Controller IRQ
Reports the IRQ number assigned to the RAID Controller.
Severity: Status Only
8.2 Clear Spurious Interrupts on RAID Controller
Makes sure interrupts on the SATA Controller are always handled.
Failing this test can result in Blue Screen crashes in Windows.
Severity: HIGH
8.3 Performance Enhancement Semaphore at 40:8E
Makes sure BIOS puts a non-zero value at 40:8E to signal that an
interrupt occurred on the RAID Controller. Implementing this semaphore
is optional but doing so can result in a 10%-30% performance
enhancement.
Severity: Status Only
9. NVM Register Settings Tests
9.1 NVMHCI capability in CAP2 register
Reports whether the NVM firmware is correctly operating.
Severity: Status Only
9.2 NVMHCI Version
Displays the NVMHCI version the firmware is supporting.
Severity: Status Only
9.3 NVMHCI Ports Implemented
Confirms the number of NVM ports exposed by the firmware. There
should only be a single NVMHCI port.
Severity: Medium
9.4 NVMHCI Port Signature
Confirms the port signature for the NVM device is correct. If this
is not right, the OROM will not recognize the NVM port/device
and NVM caching will not available.
Severity: HIGH
9.5 NVM Present on Port
Indicates if there is physically an NVM device present on the
expected port. This could also indicate that the NVM device has
not been configured for NVMHCI usage.
Severity: Status Only
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