Hi_miniD.txt Driver File Contents (20050131225153328_ZSS115_frusdr_Fhiv01bd.zip)

//****************************************************************************
//                          Samsung Electronics
//     Copyright (c) 2004 Samsung Electronics Co., All Rights Reserved
//****************************************************************************
//  TITLE:   Hi_miniD.txt                       
//  DATE CREATED:  2004/08/27
//  DESCRIPTION:  mBMC initialization file for SS130.
//
//****************************************************************************
//  REVISION HISTORY:
//  Rev 0.D		Changed CMOS clear PEF table and removed FRB3 feature.
//  Rev 0.C		Changed lookup table for binding CPU temp.
//  Rev 0.B		Changed LED conversion map for blinking
//  Rev 0.A		Changed LED Control table and PEF table
//  Rev 0.9		Changed Heceta access method
//  Rev 0.8		Changed Product name
//  Rev 0.7		Changed mBMC configuration for register 09h, 0Ah, 38h
//				Updated LM93 INIT table with thermal propile
//              Modified sensor access table for fans
//				Enabled FRB3 feature
//  Rev 0.6		Updated PEF table and SIT for Fab2
//				Changed Sesnor Number and removed unused sensors
//				Updated PEF table
//  Rev 0.5		Updated PEF table and SIT for Fab1
//				Changed Sesnor Number and removed unused sensors
//				Updated PEF table
//  Rev 0.4     Updated fab2 changes
//  Rev 0.3		Fixed Sensor access table error and PEF table error
//  Rev 0.2		Updated EPS 0.5 changes
//  Rev 0.1  	Initial revision.
//
//****************************************************************************
// ================================
//	mBMC configuration
// ================================
// Flash control, IPMI Master Write-Read access enable.
c 84 18 52 11 00 00 3A 00 00 4E 53 43 00 00 00 00 00 00 00 00 00 00 00 00 00
//SET NIC LOM slave address To mBMC.
c 84 18 52 11 00 00 01 00 86
//Setup Identification LED color GREEN 1 Hz, Fault LED color RED 1 Hz
c 84 18 52 11 00 00 04 00 51
//SMBus alert isolation is disabled
c 84 18 52 11 00 00 05 00 80
//Configur DEIO01 --output level 1, CMOS clear
c 84 18 52 11 00 00 06 00 A2
c 84 18 52 11 00 00 07 00 00
//FRB Halt
c 84 18 52 11 00 00 08 00 0C
//Start-up delay is 1sec
c 84 18 52 11 00 00 09 00 0A
//Sensor Polling Delay is 2sec		
c 84 18 52 11 00 00 0A 00 14
//LED color conversion control, enable LED2 blinking and solid color conversion
c 84 18 52 11 00 00 16 00 30
//solid color conversion, map Off to LEDC2 active and reversely		
c 84 18 52 11 00 00 19 00 B5
//blinking color conversion, map Off to LEDC2 active and reversely		
c 84 18 52 11 00 00 1A 00 B5
//DEIO Polarity	SecureMode signal is active high (DEIO6)	
c 84 18 52 11 00 00 1E 00 20
//FRB WD Timer enbale (00->8C)
c 84 18 52 11 00 00 20 00 00
//FRB WD Timer value
c 84 18 52 11 00 00 21 00 A0
//TRIS/ENBL config
c 84 18 52 11 00 00 22 00 BA
//IANA ID 
//c 84 18 52 11 00 00 23 00 00
//IANA ID
//c 84 18 52 11 00 00 24 00 00
//NMI signal is low level, Chassis always power-off after AC resume
c 84 18 52 11 00 00 26 00 00
//Chassis Intrusion Sensor Number is 0Ah
c 84 18 52 11 00 00 27 00 00
//FRU Inventory Size is F8h
c 84 18 52 11 00 00 38 00 F8
// Enable PEF and Change LED default,oppisite color priority, blinking  is 5, solid is 4.
c 84 18 52 11 00 00 3B 00 08
//Enable PEF configuration and Change LED default color priority, blinking  is 3, solid is 2
c 84 18 52 11 00 00 3C 00 C2
//allow MD5 and none access to O and A privilege level
c 84 30 01 00 02 00 15 15 15 00

// ================================
// 	Sensor Access Table	
// ================================
//Chassis Intrusion: 8-bit. SIO address is 6Ch. LDN 04, Register 0Ch.
c 84 18 52 11 00 00 00 02 0A 12 7C 00 00 04 0C 6C
//CPU1 12V: 8-bit. LM93 address is 2E.Register 56h.
c 84 18 52 11 00 00 08 02 10 02 04 00 00 56 00 2E
//CPU2 12V: 8-bit. LM93 address is 2E.Register 57h.
c 84 18 52 11 00 00 10 02 11 02 04 00 00 57 00 2E
//BB +1.5V: 8-bit. LM93 address is 2E.Register 5Ah.
c 84 18 52 11 00 00 18 02 12 02 04 00 00 5A 00 2E
//BB +1.8V: 8-bit. LM93 address is 2E.Register 61h.
c 84 18 52 11 00 00 20 02 13 02 04 00 00 61 00 2E
//BB +3.3V: 8-bit. LM93 address is 2E.Register 5Eh.
c 84 18 52 11 00 00 28 02 14 02 04 00 00 5E 00 2E
//BB +5V: 8-bit. LM93 address is 2E.Register 5Fh.
c 84 18 52 11 00 00 30 02 15 02 04 00 00 5F 00 2E
//BB +12V: 8-bit. LM93 address is 2E.Register 58h.
c 84 18 52 11 00 00 38 02 16 02 04 00 00 58 00 2E
//BB -12V: 8-bit. LM93 address is 2E.Register 64h.
c 84 18 52 11 00 00 40 02 17 02 04 00 00 64 00 2E
//FSB Vtt: 8-bit. LM93 address is 2E. Register 59h.
c 84 18 52 11 00 00 48 02 18 02 04 00 00 59 00 2E
//SCSI Core: 8-bit. LM93 address is 2E. Register 60h.
c 84 18 52 11 00 00 50 02 19 02 04 00 00 60 00 2E
//Proc1 VCCP: 8-bit. LM93 address is 2E.Register 5Ch.	
c 84 18 52 11 00 00 58 02 1A 02 04 00 00 5C 00 2E
//Proc2 VCCP: 8-bit. LM93 address is 2E.Register 5Dh.	
c 84 18 52 11 00 00 60 02 1B 02 04 00 00 5D 00 2E
//Tach Fan 1A: 16-bit. SIO address is 6Ch. LDN 09, FCB offset 0f, Bank 00h, Register 13h. 
c 84 18 52 11 00 00 68 02 20 52 BC 0F 00 09 12 6C
//Tach Fan 1B: 16-bit. SIO address is 6Ch.LDN 09, FCB offset 0f, Bank 02h, Register 12h.
c 84 18 52 11 00 00 70 02 21 52 BC 0F 02 09 12 6C
//Tach Fan 2A: 16-bit.SIO address is 6Ch. LDN 09, FCB offset 0f, Bank 03h, Register 12h. 
c 84 18 52 11 00 00 78 02 22 52 BC 0F 03 09 12 6C
//Tach Fan 2B: 16-bit. SIO address is 6Ch. LDN 09, FCB offset 0f, Bank 04h, Register 12h. 
c 84 18 52 11 00 00 80 02 23 52 BC 0F 04 09 12 6C
//Tach Fan 3A: 16-bit. SIO address is 6Ch.LDN 09, FCB offset 0f, Bank 06h,Register 12h.
c 84 18 52 11 00 00 88 02 24 52 BC 0F 06 09 12 6C
//Tach Fan 3B: 16-bit. SIO address is 6Ch.LDN 09, FCB offset 0f, Bank 07h, Register 12h.
c 84 18 52 11 00 00 90 02 25 52 BC 0F 07 09 12 6C
//Tach Fan 4A: 16-bit.LM93 address is 2E.Register 6Eh. 
c 84 18 52 11 00 00 98 02 26 52 A4 00 00 6E 00 2E
//Tach Fan 4B: 16-bit. LM93 address is 2E.Register 70h. 
c 84 18 52 11 00 00 A0 02 27 52 A4 00 00 70 00 2E
//Tach Fan 5A: 16-bit.LM93 address is 2E.Register 72h. 
c 84 18 52 11 00 00 A8 02 28 52 A4 00 00 72 00 2E
//Tach Fan 5B: 16-bit. LM93 address is 2E.Register 74h. 
c 84 18 52 11 00 00 B0 02 29 52 A4 00 00 74 00 2E
//Heceta Temp: 8-bit. LM93 address is 2E.Register 52h.
c 84 18 52 11 00 00 B8 02 30 02 44 00 00 52 00 2E
//FP Temp: 8-bit. FP address is 4Dh,  Read Temp from 00h.
c 84 18 52 11 00 00 C0 02 31 02 44 00 00 00 00 4D
//Proc 1 temp: 8-bit. LM93 address is 2E.Register 50h.
c 84 18 52 11 00 00 C8 02 40 02 04 00 00 50 00 2E
//Proc 2 temp: 8-bit. LM93 address is 2E.Register 51h.
c 84 18 52 11 00 00 D0 02 41 02 04 00 00 51 00 2E
//Proc 1 Throttle: 8-bit. LM93 address is 2E.Register 67h
c 84 18 52 11 00 00 D8 02 42 02 04 00 00 67 00 2E
//Proc 2 Throttle: 8-bit. LM93 address is 2Eh.Register 69h.
c 84 18 52 11 00 00 E0 02 43 02 04 00 00 69 00 2E
//Proc 1 IERR: 1-bit. LM93 address is 2E.Register 6Bh.
c 84 18 52 11 00 00 E8 02 50 62 24 00 00 6B 00 2E
//Proc 2 IERR: 1-bit. LM93 address is 2E.Register 6Bh.
c 84 18 52 11 00 00 F0 02 51 72 24 00 00 6B 00 2E
//Proc 1 Thermal trip: 1-bit. LM93 address is 2E.Register 6Bh.
c 84 18 52 11 00 00 F8 02 52 32 24 00 00 6B 00 2E
//Proc 2 Thermal trip: 1-bit. LM93 address is 2E.Register 6Bh.
c 84 18 52 11 00 00 00 03 53 42 24 00 00 6B 00 2E
//CPU config Error: 1-bit. mBMC DEIO 2 .
c 84 18 52 11 00 00 08 03 58 12 40 00 00 00 00 A1
//Diagnostic interrupt Button: 1-bit. mBMC DEIO 8.
c 84 18 52 11 00 00 10 03 60 02 00 00 00 00 00 A7
//chassis Identify Button: 1-bit. mBMC DEIO 7.
c 84 18 52 11 00 00 18 03 61 12 40 00 00 00 00 A6
//Last entry
c 84 18 52 11 00 00 20 03 00 00 00 00 00 00 00 00

// ================================
//	Disable Sensor Interface
// ================================
c 84 18 52 11 00 00 03 00 04

// ============================
//	Sensor Init. Table
// ============================
// FP Amb. Temp Sensor init. (LM75)
c 84 18 52 11 00 00 00 01 02 4D 01 00 00
// Heceta Configuration (LM93)
// Zone4 High Limit Register.
c 84 18 52 11 00 00 05 01 02 2E 7F 7F 00
// Fan Boost Temp register, Zone1/2 (88/88)
c 84 18 52 11 00 00 0A 01 02 2E 80 58 00
c 84 18 52 11 00 00 0F 01 02 2E 81 58 00
// Fan Boost Temp register, Zone 3/4 (65/40)
c 84 18 52 11 00 00 14 01 02 2E 82 41 00
c 84 18 52 11 00 00 19 01 02 2E 83 28 00
// Ramp Up register VRD_HOT Ramp 200ms
c 84 18 52 11 00 00 1E 01 02 2E BF 04 00
// Zone 3/4 Fan Boost Hysteresis, 2h/2h
c 84 18 52 11 00 00 23 01 02 2E C1 22 00
// Zone 1/2 Spike smoothing, 3sec
c 84 18 52 11 00 00 28 01 02 2E C2 BB 00
// Zone 1/2 MinPWM and Hysteresis, 0%
c 84 18 52 11 00 00 2D 01 02 2E C3 01 00
// Zone 3/4 MinPWM and Hysteresis, 0%
c 84 18 52 11 00 00 32 01 02 2E C4 01 00
// PWM1 is bound to zone1 and 4 (FP temp and CPU1)
c 84 18 52 11 00 00 37 01 02 2E C8 09 00
// Spin-up, 1000ms & 85% duty cycle
c 84 18 52 11 00 00 3C 01 02 2E CA AA 00
// PWM2 bound to zone 4 (FP temp)
c 84 18 52 11 00 00 41 01 02 2E CC 08 00
// PWM2 Spin-up, 1000ms & 85% duty cycle
c 84 18 52 11 00 00 46 01 02 2E CE AA 00
// Zone 1 base temperature (83)
c 84 18 52 11 00 00 4B 01 02 2E D0 53 00
// Zone 4 base temperature (35)
c 84 18 52 11 00 00 50 01 02 2E D3 23 00
// Look up table (12 Entries)
c 84 18 52 11 00 00 55 01 02 2E D4 52 00
c 84 18 52 11 00 00 5A 01 02 2E D5 02 00
c 84 18 52 11 00 00 5F 01 02 2E D6 02 00
c 84 18 52 11 00 00 64 01 02 2E D7 02 00
c 84 18 52 11 00 00 69 01 02 2E D8 00 00
c 84 18 52 11 00 00 6E 01 02 2E D9 00 00
c 84 18 52 11 00 00 73 01 02 2E DA 00 00
c 84 18 52 11 00 00 78 01 02 2E DB 00 00
c 84 18 52 11 00 00 7D 01 02 2E DC 00 00
c 84 18 52 11 00 00 82 01 02 2E DD 00 00
c 84 18 52 11 00 00 87 01 02 2E DE 55 00
c 84 18 52 11 00 00 8C 01 02 2E DF 11 00
//   1-index:E3, data:81---bit0=1, enable LM93
c 84 18 52 11 00 00 91 01 02 2E E3 01 00
// Last entry
c 84 18 52 11 00 00 96 01 80 FF 00 00 00

// ============================
//	Sensor Bridge Table (01D0)
// ============================
//   1-Source:2d, Destination:5c, index=53h
c 84 18 52 11 00 00 D0 01 01 31 2E 53 00 00
// Last entry
c 84 18 52 11 00 00 D6 01 80 00 00 00 00 00

// ===============================
//	Disable PEF filtering
// ===============================
c 84 10 12 01 00

// ===============================
//	Update PEF entries
// ===============================
//               01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20
// Analog Sensor Assertion of Non-critical, Blinking Amber
c 84 10 12 06 01 c0 10 01 10 20 FF FF FF 01 81 00 00 FF 00 00 FF 00 00 FF 00
c 84 10 12 60 01 00 01 00 00 00 00 00 00 00 00 00 00
// Analog Sensor Assertion of critical, solid amber
c 84 10 12 06 02 c0 10 01 20 20 FF FF FF 01 04 02 00 FF 00 00 FF 00 00 FF 00
c 84 10 12 60 02 00 09 00 00 00 00 00 00 00 00 00 00
// Analog Sensor deAssertion of all, Solid green
c 84 10 12 06 03 c0 10 01 04 20 FF FF FF 81 85 02 00 FF 00 00 FF 00 00 FF 00
c 84 10 12 60 03 00 04 00 00 00 00 00 00 00 00 00 00
// Proc 1/2 IERR Assertion, Solid amber
c 84 10 12 06 04 c0 10 01 20 20 FF 07 FF 6F 01 00 00 FF 00 00 FF 00 00 FF 00
c 84 10 12 60 04 00 09 00 00 00 00 00 00 00 00 00 00
// Proc 1/2 Thermal Trip Assertion, Solid amber
c 84 10 12 06 05 C0 12 01 20 20 FF 07 FF 6F 02 00 00 FF 00 00 FF 00 00 FF 00
c 84 10 12 60 05 00 09 00 00 00 00 00 00 00 00 00 00
// Digital Sensor Deassert of all, Solid green
c 84 10 12 06 06 C0 10 01 04 20 FF FF FF EF FF FF 00 FF 00 00 FF 00 00 FF 00
c 84 10 12 60 06 00 04 00 00 00 00 00 00 00 00 00 00
// Watchdog Expired. Blinking Green
c 84 10 12 06 07 C0 10 01 08 20 FF 23 FF 6F 0F 00 00 FF 00 00 FF 00 00 FF 00
c 84 10 12 60 07 00 02 00 00 00 00 00 00 00 00 00 00
// Proc 1/2 Thermal Control assertion, Blinking green
c 84 10 12 06 08 C0 10 01 08 20 FF 01 FF 01 80 02 00 FF 00 00 FF 00 00 FF 00
c 84 10 12 60 08 00 02 00 00 00 00 00 00 00 00 00 00
// Proc 1/2 Thermal Control deassertion, Solid green
c 84 10 12 06 09 C0 10 01 08 20 FF 01 FF 81 80 02 00 FF 00 00 FF 00 00 FF 00
c 84 10 12 60 09 00 04 00 00 00 00 00 00 00 00 00 00
// FP NMI Button, Solid amber
c 84 10 12 06 0A C0 30 01 20 20 FF 13 FF 6F 01 00 00 FF 00 00 FF 00 00 FF 00
c 84 10 12 60 0A 00 09 00 00 00 00 00 00 00 00 00 00
// FP ID Button, Solid Blue Toggle
c 84 10 12 06 0B C0 10 01 10 FF FF 14 61 03 02 00 00 FF 00 00 FF 00 00 FF 00
c 84 10 12 60 0B 00 80 00 00 00 00 00 00 00 00 00 00
// OS Load POST Code, Solid green
c 84 10 12 06 0C C0 10 01 02 03 FF 12 FF 6F 02 00 00 FF 00 00 FF 00 00 FF 00
c 84 10 12 60 0C 00 00 00 00 00 00 00 00 00 00 00 00
// CMOS Clear, DEIO1 Assert
c 84 10 12 06 0D C0 18 01 02 20 00 14 04 03 02 00 FF 00 FF FF 00 FF FF 00 FF
c 84 10 12 60 0D 04 00 00 00 80 A0 00 00 00 00 00 00
// Chassis Intrusion, LAN Alert
c 84 10 12 06 1A C0 01 01 02 20 FF 05 FF 6F 01 00 00 FF 00 00 FF 00 00 FF 00
// POST Code Error, LAN Alert
c 84 10 12 06 1B C0 01 01 02 FF FF 0F FF 6F FF FF 00 FF 00 00 FF 00 00 FF 00
// Voltage Failure, LAN Alert
c 84 10 12 06 1C C0 01 01 10 20 FF 02 FF 01 85 02 00 FF 00 00 FF 00 00 FF 00
// Fan Failure, LAN Alert
c 84 10 12 06 1D C0 01 01 10 20 FF 04 FF 01 81 00 00 FF 00 00 FF 00 00 FF 00
// Temperature Failure, LAN Alert
c 84 10 12 06 1E C0 01 01 10 20 FF 01 FF 01 81 00 00 FF 00 00 FF 00 00 FF 00

// ============================
//	Enable PEF filtering
// ============================
//  Parameter #1 to enable PEF, event message, PEF startup delay, 
//  and Alert Startup delay (Default 0x0F)
c 84 10 12 01 01

// ============================
//	Enable Sensor Interface
// ============================
//   Enable Sensor interface
c 84 18 52 11 00 00 03 00 0C

//   *********************************************
//   *     Finished mBMC Flash Initialization    *
//   *********************************************
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