hp StorageWorks enterprise virtual array Event Text Description File
© Copyright 2001-2004 Hewlett-Packard Company
WARNING: Modification of this file may cause
Enterprise Storage Management Software
to improperly translate event information
Model number string: HSV110
Software version number string: 3110
Baselevel build string: SR0025
Structure Format: Endian Little
COUPLED CRASH CONTROL CODES:
Coupled Crash Control Code: 0
Other HSV110 controller should not perform a coupled crash.
Coupled Crash Control Code: 1
Other HSV110 controller should perform a coupled crash.
DUMP/RESTART CONTROL CODES:
Dump/Restart Control Code: 0
Perform crash dump then restart.
Dump/Restart Control Code: 1
Do not perform crash dump, just restart.
Dump/Restart Control Code: 2
Perform crash dump and do not restart.
Dump/Restart Control Code: 3
Do not perform crash dump and do not restart.
SEVERITY LEVEL CODES:
Severity Level Code: 0
Normal -- informational in nature.
Severity Level Code: 1
Critical -- failure or failure imminent.
Severity Level Code: 2
Warning -- not failed but attention recommended or required.
Severity Level Code: 3
Undetermined -- more information needed to determine severity.
CORRECTIVE ACTION CODES:
Corrective Action Code: 0
No action necessary.
Corrective Action Code: 1
An unrecoverable hardware detected fault occurred or an unrecoverable software inconsistency was detected, proceed with HSV110 controller support avenues.
Corrective Action Code: 3
Follow the recommended corrective action described in the lter.termination_event.u.code.cac field of this event's detailed information. The cause of the controller termination associated with this controller event can only be determined by obtaining the detailed information of the associated termination event. To obtain that information follow Corrective Action [[06]].
Corrective Action Code: 4
Follow the recommended corrective action described in the recursing termination event. Perform these steps to obtain that termination event's information:
<UL>
<LI>View the termination events of the HSV110 controller identified in the u.data.ltei.lter.terminating_ctrlr field of this termination event's detailed information. NOTE: If that controller is not currently operating, the event of interest will not be available for viewing.
<LI>Locate the termination event that occurred closest to the date and time contained in the u.data.ltei.lter.termination_time field of this termination event's detailed information and obtain that termination event's detailed information. NOTE: The termination event of interest will contain values in the u.data.ltei.lter.termination_event.termination_location, u.data.ltei.lter.termination_event.u.code.value and u.data.ltei.lter.termination_event.params.param[0 through 28] fields that are identical to the values contained in the u.data.ltei.lter.termination_event.params.param[0], u.data.ltei.lter.termination_event.params.param[1] and u.data.ltei.lter.termination_event.params.param[2 through 30] fields of this termination event.
</UL>
Corrective Action Code: 5
Follow the recommended corrective action described in the termination event reported by the other controller that caused this termination event to occur. Perform these steps to obtain that termination event's information:
<UL>
<LI>View the termination events of the other HSV110 controller (i.e., the controller NOT identified in the u.data.ltei.lter.terminating_ctrlr field of this termination event's detailed information). NOTE: If that controller is not currently operating, the event of interest will not be available for viewing.
<LI>Locate the termination event that occurred closest to the date and time contained in the u.data.ltei.lter.termination_time field of this termination event's detailed information and obtain that termination event's detailed information. NOTE: The termination event of interest will contain values in the u.data.ltei.lter.termination_event.termination_location and u.data.ltei.lter.termination_event.u.code.value fields that are identical to the values contained in the u.data.ltei.lter.termination_event.params.param[0] and u.data.ltei.lter.termination_event.params.param[1] fields of this termination event.
</UL>
Corrective Action Code: 6
Perform these steps to obtain the termination information associated with this controller event:
<UL>
<LI>View the termination events of the HSV110 controller identified in the lter.terminating_ctrlr field of this event's detailed information. NOTE: If that controller is not currently operating, the event of interest will not be available for viewing.
<LI>Locate the termination event that occurred closest to the date and time contained in the lter.termination_time field of this event's detailed information and obtain that termination event's detailed information. NOTE: The termination event of interest will contain values in the u.data.ltei.lter.sw_version, u.data.ltei.lter.baselevel_id, u.data.ltei.lter.ctrlr_model_id, u.data.ltei.lter.terminating_ctrlr, and u.data.ltei.lter.termination_time fields that are identical to the values contained in the lter.sw_version, lter.baselevel_id, lter.ctrlr_model_id, lter.terminating_ctrlr, and lter.termination_time fields of this controller event.
</UL>
Corrective Action Code: 8
A significant hardware detected fault occurred or a significant software inconsistency was detected. Accumulate information to report to HSV110 controller engineering.
Corrective Action Code: 9
Determine power loss cause and take appropriate action to ensure power is restored and maintained.
Corrective Action Code: a
A portion of low memory is purposely set to produce an uncorrectable memory error in order to detect low memory access violations made by the HSV110 controller's software (e.g., access to memory address zero through an uninitialized pointer, etc.). Unfortunately, there is no method available for immediately distinguishing a low memory access violation from an uncorrectable memory error that occurs elsewhere in memory. However, the memory diagnostics that are executed following controller restart will immediately terminate HSV110 controller operation if any portion of memory is found defective. In that case perform corrective action [[20]]. If defective memory is not found during HSV110 controller restart and this termination event is again reported, the most likely cause is a software induced low memory access violation. In that case perform corrective action [[01]].
Corrective Action Code: 20
Replace the HSV110 controller Field Replaceable Unit (FRU). Note that the FRU must be a single power supply type if the value of the flags.spsctrlr field contained in this event's detailed information is equal to 1 (TRUE).
Corrective Action Code: 22
Replace the "1" Battery Assembly Field Replaceable Unit (FRU)--i.e., the battery assembly closest to the cache battery door hinge. CAUTION: The information described in corrective action [[38]] must be understood before attempting a cache battery replacement.
Corrective Action Code: 23
Replace the "2" Battery Assembly Field Replaceable Unit (FRU)--i.e., the battery assembly farthest from the cache battery door hinge. CAUTION: The information described in corrective action [[38]] must be understood before attempting a cache battery replacement.
Corrective Action Code: 24
Replace the "1" Blower Assembly Field Replaceable Unit (FRU)-- i.e., the blower farthest from the blower door hinge.
Corrective Action Code: 25
Replace the "2" Blower Assembly Field Replaceable Unit (FRU)-- i.e., the blower closest to the blower door hinge.
Corrective Action Code: 26
Replace the "1" Blower/Power Supply Assembly Field Replaceable Unit (FRU)-- i.e., the blower/power supply closest to the cache battery door hinge.
Corrective Action Code: 27
Replace the "2" Blower/Power Supply Assembly Field Replaceable Unit (FRU)-- i.e., the blower/power supply farthest from the cache battery door hinge.
Corrective Action Code: 28
Reinstall the "1" Battery Assembly Field Replaceable Unit (FRU)--i.e., the battery assembly closest to the cache battery door hinge.
Corrective Action Code: 29
Reinstall the "2" Battery Assembly Field Replaceable Unit (FRU)--i.e., the battery assembly farthest from the cache battery door hinge.
Corrective Action Code: 2a
Reinstall the "1" Blower Assembly Field Replaceable Unit (FRU)-- i.e., the blower farthest from the blower door hinge.
Corrective Action Code: 2b
Reinstall the "2" Blower Assembly Field Replaceable Unit (FRU)-- i.e., the blower closest to the blower door hinge.
Corrective Action Code: 2c
Reinstall the "1" Blower/Power Supply Assembly Field Replaceable Unit (FRU)-- i.e., the blower/power supply closest to the cache battery door hinge, or restore AC power.
Corrective Action Code: 2d
Reinstall the "2" Blower/Power Supply Assembly Field Replaceable Unit (FRU)-- i.e., the blower/power supply farthest from the cache battery door hinge, or restore AC power.
Corrective Action Code: 2e
Reduce the ambient temperature in the vicinity of the indicated HSV110 controller.
Corrective Action Code: 2f
Ensure that both batteries in the indicated HSV110 controller are installed and functioning normally. A cache battery failure will be indicated by the red battery status LED located on the OCP display. If that LED is on, open the battery compartment door and check for the amber status LED in the lower right corner of each battery assembly. If the amber status LED is ONLY on in the battery assembly closest to the battery compartment door hinge, perform corrective action [[22]]. If the amber status LED is ONLY on in the battery assembly farthest from the cache battery door hinge, perform corrective action [[23]]. If the amber status LED is on in BOTH battery assemblies, perform [[22]] and [[23]] simultaneously.
Corrective Action Code: 30
GBIC SFF Serial ID Data check code failure. Corrective action: Try re-seating the GBIC, if failure persists, replace the GBIC, lastly perform corrective action [[20]].
Corrective Action Code: 31
Battery Assembly IIC operation failure. Corrective action: If this error is only reported on one of a pair of battery assemblies--i.e. the Address of error parameter is always 0000000A hexadecimal, perform corrective action [[22]], otherwise, perform corrective action [[20]].
Corrective Action Code: 32
Battery Assembly IIC operation failure. Corrective action: If this error is only reported on one of a pair of battery assemblies--i.e. the Address of error parameter is always 0000000B hexadecimal, perform corrective action [[23]], otherwise, perform corrective action [[20]].
Corrective Action Code: 33
Battery Assemblies may have been deeply discharged. Corrective action: If this error is seen after the HSV110 controller was power cycled AND the batteries are likely to be in an excessively discharged state--i.e. discharged by a powered off controller for longer than 96 hours, replacing both Battery Assemblies can fix this error condition. Otherwise, perform corrective action [[20]].
Corrective Action Code: 36
The temperature on the HSV110 controller has become critical. Proceed with corrective action [[2e]] and restart the controller.
Corrective Action Code: 37
The temperature on the HSV110 controller could not be accurately determined possibly due to faulty operation of a temperature sensor or the temperature acquisition communication path. If the problem persists, perform Corrective Action [[20]].
Corrective Action Code: 38
Before performing cache battery replacement the following must be understood:
<UL>
<LI>CAUTION: Never remove batteries from the controller while it is powered down. Replace a cache battery only when the controller power is on.
<LI>CAUTION: If the amber status LED is on in both battery assemblies, both batteries must be removed before installing either of the new batteries. If one of the batteries is replaced while the other failed battery is still in the enclosure, the original failure may be propagated to the newly installed battery. To ensure there is no propagated failure, wait a minimum of 15 seconds after the removal of both batteries before inserting the new batteries.
<LI>CAUTION: Never install a battery that was previously failed by any controller.
<LI>NOTE: When installing a cache battery, the amber status LED will initially be on. The LED may remain on for up to two minutes, after which time it will turn off.
<LI>NOTE: It will take several hours for the EVA controller to recognize a new battery as fully charged. If a pair of batteries has been replaced, this period will be noticeably longer.
</UL>
Corrective Action Code: 39
If this event is an isolated occurrence, then no further action is necessary. If this event occurs more than once in a three month period, perform Corrective Action [[20]].
Corrective Action Code: 40
Replace the indicated physical disk drive.
Corrective Action Code: 41
Reinstall the indicated physical disk drive or install a drive blank.
Corrective Action Code: 42
Perform these steps in an attempt to clear the error:
<UL>
<LI>Remove and reinstall the indicated physical disk drive.
<LI>Observe the drive's status LEDs to ensure that the drive is operational.
<LI>Observe the Drive Enclosure Environmental Monitoring Unit alphanumeric display to ensure the error no longer exists.
</UL>If the error persists, perform Corrective Action [[40]].
Corrective Action Code: 43
Perform these steps in an attempt to clear the error:
<UL>
<LI>Remove and reinstall the indicated physical disk drive into the leftmost empty bay, preferably in a different Drive Enclosure.
<LI>If the error persists, perform Corrective Action [[89]].
<LI>If the error still persists, perform Corrective Action [[40]].
</UL>
Corrective Action Code: 46
Numerous failures have occurred while attempting to communicate with a particular Physical Disk Drive on a particular Fibre Channel port. The HSV110 controller will attempt to use an alternate Fibre Channel port to communicate with that Physical Disk Drive. If communication fails on the alternate Fibre Channel port, that Physical Disk Drive will be rendered inoperable. This is a preemptive action warning, no immediate action is necessary.
Corrective Action Code: 47
Dropped frames are potential indications of an impending Fibre Channel port or physical disk drive failure when they occur excessively. If frame drop becomes excessive, the indicated Fibre Channel port or the indicated physical disk drive will be placed in the inoperative state. This is a preemptive action warning, no immediate action is necessary.
Corrective Action Code: 48
Unexpected work from a physical disk drive is an indication of an impending drive failure. If unexpected work becomes excessive, the indicated physical disk drive will be placed in the inoperative state. This is a preemptive action warning, no immediate action is necessary.
Corrective Action Code: 49
Bad ALPAs are indications of an impending physical disk drive failure. If the number of bad ALPAs becomes excessive, the indicated physical disk drive will be placed in the inoperative state. This is a preemptive action warning, no immediate action is necessary.
Corrective Action Code: 4a
Unable to communicate through a Fibre Channel link to a Fibre Channel port. This may be caused by a missing Fibre connection to an HSV110 controller Host Port or Drive Enclosure, faulty GBIC, faulty Drive Enclosure, faulty Fibre Channel Cable, faulty Drive Enclosure I/O module, or faulty Fibre Channel Switch. This is a preemptive action warning, no immediate action is necessary.
Corrective Action Code: 4c
This event is probably a symptom of another problem. Check for failed Fibre Channel ports and multiple instances of this event. Also check for patterns, such as multiple occurrences of this event pertaining to physical disk drives on the same rack or loop. If this is an isolated occurrence of this event, ungroup the indicated physical disk drive and remove it from the system.
Corrective Action Code: 4d
Load the latest physical disk drive firmware superfile for the physical disk drive type listed in the event's pid field. If no such superfile exists, the physical disk drive is unsupported, and should be ungrouped and removed. Using a superfile that updates the controller approved firmware table may be sufficient to correct the problem.
Corrective Action Code: 4e
This event is probably a symptom of another problem. Check for failed Fibre Channel ports and multiple instances of this event. Also check for patterns, such as multiple occurrences of this event pertaining to physical disk drives on the same rack or loop.
Corrective Action Code: 4f
Remove the indicated physical disk drive and install a drive blank.
Corrective Action Code: 50
Delete the indicated inoperative Snapshot Logical Disk.
Corrective Action Code: 51
Evaluate previously reported Physical Device, Device Enclosure, and Logical Disk events to determine root cause and corrective action.
Corrective Action Code: 5f
Unable to communicate to the destination controllers, or through a specific path to the destination. Check to see if the destination controllers have malfunctioned, and perform the repair actions indicated in event reports found for the destination controllers. In addition, check for a malfunction that may have occurred in the Fibre Channel fabric between the sites.
Corrective Action Code: 60
Unable to communicate to the indicated source virtual disk, because the virtual disk or another member in the Data Replication Group malfunctioned. Perform the repair actions indicated in event reports found for that source virtual disk or another virtual disk member in that Data Replication Group.
Corrective Action Code: 61
Unable to communicate to the indicated destination virtual disk on the remote Storage System because the virtual disk malfunctioned. Perform the repair actions indicated in event reports found for that destination virtual disk on the remote Storage System.
Corrective Action Code: 62
The Data Replication Log for the specified Data Replication Group has insufficient space to grow the log. A copy resynchronization will be started when data replication can resume. Evaluate whether sufficient disk storage has been made available for the log to grow in capacity. If necessary, add new volumes to the Disk Group.
Corrective Action Code: 63
The Data Replication Source Site and the Data Replication Destination Site cannot communicate because the software versions are incompatible. Communication will automatically continue when both sites are at compatible software levels.
Corrective Action Code: 64
Check the Data Replication Destination Site for problems with physical disk drives or fibre channel loops. The Data Replication Destination Site may also be temporarily experiencing higher than usual levels of disk related activity.
Corrective Action Code: 65
Check the Data Replication Destination Site for slow or no response for this Data Replication Group. If this is not the case then restart the Data Replication Destination Site controllers. Then restart the Data Replication Source Site controllers.
Corrective Action Code: 66
Check both the Data Replication Source Site and the Data Replication Destination Site for slow or no response for this Data Replication Group. If this is not the case then restart the Data Replication Source Site controllers. IF you have already taken this action and are receiving this event for a second time then restart the Data Replication Destination Site controllers instead.
Corrective Action Code: 67
Check link speed and quality between the Data Replication Source Site controllers and the Data Replication Destination Site controllers.
Corrective Action Code: 80
Perform these steps in an attempt to clear the error:
<UL>
<LI>Remove and reinstall the indicated drive enclosure power supply.
<LI>Observe the power supply/blower status LED to ensure that the power supply is operational.
<LI>Observe the Drive Enclosure Environmental Monitoring Unit alphanumeric display to ensure that the error no longer exists.
</UL>If the error persists, immediately (within 7 minutes) perform Corrective Action [[81]]. If that action cannot be performed immediately, perform Corrective Action [[85]] immediately.
Corrective Action Code: 81
Replace the indicated drive enclosure power supply. Hewlett-Packard recommends not removing a defective drive enclosure power supply until a replacement drive enclosure power supply is available.
Corrective Action Code: 82
Perform these steps in an attempt to clear the error:
<UL>
<LI>Remove and reinstall the indicated drive enclosure blower.
<LI>Observe the power supply/blower status LED to ensure that the blower is operational.
<LI>Observe the Drive Enclosure Environmental Monitoring Unit alphanumeric display to ensure that the error no longer exists.
</UL>If the error persists, perform Corrective Action [[83]].
Corrective Action Code: 83
Replace the indicated drive enclosure blower. CAUTION: Removing a blower automatically closes flaps over the power supply blower opening. However, the air flow within the enclosure changes and can cause an over temperature condition. Hewlett-Packard recommends not removing a defective blower until a replacement blower is available.
Corrective Action Code: 84
Immediately replace one of the missing drive enclosure blowers. The other blower should be replaced as soon as possible. If a blower is not available for immediate replacement, perform Corrective Action [[85]] immediately.
Corrective Action Code: 85
If the problem cannot be corrected, the Enterprise Virtual Array should be shut down to:
<UL>
<LI>Flush data from the controllers.
<LI>Shut down the drive enclosures.
<LI>Shut down the controllers.
</UL>CAUTION: This is a drastic measure that will stop all Enterprise Virtual Array operations. Hewlett-Packard recommends using this procedure only when necessary to protect a drive enclosure from overheating or to clear drive enclosure errors that cannot otherwise be cleared.
Corrective Action Code: 86
If the indicated drive enclosure element's temperature sensor is high, follow these steps to correct the over temperature condition:
<UL>
<LI>Ensure that all elements are properly installed to maintain proper air flow.
<LI>Ensure that nothing is obstructing the air flow at either the front of the enclosure or the rear of the blower.
<LI>Ensure that both blowers are operating properly (the LEDs are on) and neither blower is operating at high speed. If a blower appears to be defective, perform Corrective Action [[83]].
<LI>Verify that the ambient temperature is within the range +10C to +35C (+50F to +95F). Adjust as necessary.
</UL>If the indicated drive enclosure element's temperature sensor is low, follow this step to correct the below temperature condition:
<UL>
<LI>Verify that the ambient temperature is within the range +10C to +35C (+50F to +95F). Adjust as necessary.
</UL>After performing the actions described above observe the Drive Enclosure Environmental Monitoring Unit alphanumeric display to ensure that the error no longer exists.
Corrective Action Code: 87
Immediately perform Corrective Action [[86]]. If the problem persists after performing those actions, perform Corrective Action [[85]] immediately.
Corrective Action Code: 88
Reset the indicated Drive Enclosure Environmental Monitoring Unit using the following procedure:
<UL>
<LI>Firmly grasp the Drive Enclosure Environmental Monitoring Unit mounting handle and pull the Drive Enclosure Environmental Monitoring Unit partially out of the enclosure. <P> IMPORTANT: You do not need to remove the Drive Enclosure Environmental Monitoring Unit from the enclosure, nor to disconnect the cables. You must avoid putting any strain on the cables or connectors.
<LI>Wait 30 seconds, and then push the Drive Enclosure Environmental Monitoring Unit in and fully seat the element in the backplane. The Drive Enclosure Environmental Monitoring Unit should display any enclosure condition report within two minutes.
<LI>Observe the Drive Enclosure Environmental Monitoring Unit alphanumeric display to ensure that the error no longer exists.
</UL>If the problem persists, perform Corrective Action [[89]].
Corrective Action Code: 89
Replace the indicated Drive Enclosure Environmental Monitoring Unit.
Corrective Action Code: 8a
The Drive Enclosure Environmental Monitoring Unit attempts to automatically correct this type of error. If the problem persists after one minute has elapsed, perform Corrective Action [[89]].
Corrective Action Code: 8b
Perform these steps in an attempt to clear the error:
<UL>
<LI>Perform Corrective Action [[88]] with the exception of performing Corrective Action [[89]] if the problem persists.
<LI>If resetting the Drive Enclosure Environmental Monitoring Unit did not correct the problem, perform Corrective Action [[8d]] to initialize the drive enclosure.
</UL>If the problem still persists, then perform Corrective Action [[89]].
Corrective Action Code: 8c
The Drive Enclosure Environmental Monitoring Unit attempts to automatically correct this type of error. If the problem persists after one minute has elapsed, perform Corrective Action [[8b]].
Corrective Action Code: 8d
Initialize the indicated drive enclosure by:
<UL>
<LI>Disconnecting the AC power cords from both power supplies. CAUTION: This is a dramatic measure that will result in data being unavailable until power is reapplied.
<LI>Reconnecting the AC power cords to both power supplies.
</UL>
Corrective Action Code: 8e
This error may be caused by a defective drive enclosure address bus cable, an incorrectly connected cable, or a defective enclosure address bus junction box. Perform these steps in an attempt to clear the error:
<UL>
<LI>Remove and reconnect the cable between the address bus junction box and the Drive Enclosure Environmental Monitoring Unit.
<LI>Observe the Drive Enclosure Environmental Monitoring Unit to ensure the error is corrected.
<LI>If the problem is not corrected, remove and reinstall the bottom and top terminators, and all the junction box-to-junction box cables.
<LI>Observe the Drive Enclosure Environmental Monitoring Unit to ensure the error is corrected.
<LI>If the problem is not corrected, perform Corrective Action [[88]].
</UL>
Corrective Action Code: 8f
Perform these steps in an attempt to clear the error:
<UL>
<LI>If one of the drive enclosure power supplies has remained powered on, replace the power supply that remains on.
<LI>If both power supplies remain on, check Drive Enclosure Environmental Monitoring Unit communications with all drive enclosure components.
<LI>If the Drive Enclosure Environmental Monitoring Unit is unable to communicate, individually replace drive enclosure power supplies, I/O modules, and the Drive Enclosure Environmental Monitoring Unit until the problem is resolved.
<LI>If component replacement does not resolve the problem, replace the drive enclosure.
</UL>
Corrective Action Code: 90
Perform these steps in an attempt to clear the error:
<UL>
<LI>Check if one of the HSV110 controllers has suffered a power failure. If so, perform Corrective Action [[09]].
<LI>Check all the transceivers and cables to ensure they are properly connected. Reseat any that are not properly connected.
<LI>Observe the Drive Enclosure Environmental Monitoring Unit to ensure the error is corrected.
<LI>If the problem is not corrected, check all the transceivers on the loop to ensure that they are drive enclosure I/O module compatible. Replace any transceivers that are found to be incompatible.
<LI>Observe the Drive Enclosure Environmental Monitoring Unit to ensure the error is corrected.
<LI>If the problem is not corrected, replace the input cable connected to the indicated transceiver.
<LI>Observe the Drive Enclosure Environmental Monitoring Unit to ensure the error is corrected.
<LI>If the problem is not corrected, replace both transceivers attached to the cable that is connected to the indicated transceiver.
</UL>
Corrective Action Code: 91
Replace the indicated drive enclosure.
Corrective Action Code: 92
The Drive Enclosure Environmental Monitoring Unit attempts to automatically correct this type of error. If the problem persists after one minute has elapsed, perform Corrective Action [[91]].
Corrective Action Code: 93
Replace the indicated drive enclosure I/O module.
Corrective Action Code: 94
The Drive Enclosure Environmental Monitoring Unit attempts to automatically correct this type of error. If the problem persists after one minute has elapsed, perform Corrective Action [[93]].
Corrective Action Code: 95
Reset the indicated device enclosure I/O module using the following procedure:
<UL>
<LI>Remove the I/O module.
<LI>Reinsert the I/O module.
<LI>Observe the Drive Enclosure Environmental Monitoring Unit alphanumeric display to ensure that the error no longer exists.
</UL>If the problem persists, perform Corrective Action [[93]].
Corrective Action Code: 96
The Drive Enclosure Environmental Monitoring Unit has requested new Drive Enclosure Environmental Monitoring Unit code. The code could not be found. Upgrade with the latest revision of the Drive Enclosure Environmental Monitoring Unit code update.
Corrective Action Code: 97
Ensure all HSV110 controllers are connected to the enclosure address bus. If all controllers are connected, then replace the Y-cable and restart the controllers.
Corrective Action Code: 98
Reduce the number of drive enclosures.
Corrective Action Code: 99
Ensure that each drive enclosure I/O module is connected to the correct Fibre Channel port.
Corrective Action Code: 9a
Ensure A/C input to the rack PDU is intact, otherwise perform [[81]].
Corrective Action Code: 9b
If the element is not redetected within 10 minutes, the indicated Drive Enclosure Environmental Monitoring Unit may need to be replaced. The problem may be caused by the controller not being able to communicate with the drives in this enclosure for reasons that are unrelated to the Drive Enclosure Environmental Monitoring Unit.
Corrective Action Code: 9c
Ungroup and replace the physical disk drive. If this does not correct the problem, replace the Drive Enclosure Environmental Monitoring Unit and power cycle the physical disk drive. If the problem is persistent, replace Device Enclosure.
Corrective Action Code: b4
Add new volumes to the Disk Group or increase the Disk Group occupancy alarm level threshold.
Corrective Action Code: b5
Add new volumes to the Disk Group or delete unwanted logical disks from Disk Group.
Corrective Action Code: b9
Evaluate previously reported events associated with this HSV110 controller to determine root cause and corrective action.
Corrective Action Code: ba
Check to see if this HSV110 controller has suffered a power failure. If so, perform Corrective Action [[09]]. Otherwise, perform Corrective Action [[b9]].
Corrective Action Code: bf
Evaluate previously reported Device or Device Enclosure events that related to the Physical Disk Drive that is associated with this Volume to determine root cause and corrective action.
Corrective Action Code: c3
Evaluate previously reported Device, Device Enclosure, and Host events to determine root cause and corrective action. If the problem persists, follow Corrective Action [[20]].
Corrective Action Code: c4
Load the latest physical disk drive firmware superfile for the physical disk drive type listed in the event's pid field. If no such superfile exists, the physical disk drive is unsupported, and should be ungrouped and removed. Using a superfile that updates the controller approved firmware table may be sufficient to correct the problem.
Corrective Action Code: c5
Check enclosure address bus cable connections between Drive Enclosure Environmental Monitoring Unit and nodes. If cabling is not the problem, the node or Drive Enclosure Environmental Monitoring Unit may need to be replaced.
SOFTWARE COMPONENT ID CODES:
Software Component ID Code: 1
Executive Services
Software Component ID Code: 2
Cache Management Component
Software Component ID Code: 3
Storage System State Services
Software Component ID Code: 4
Fault Manager
Software Component ID Code: 6
Fibre Channel Services
Software Component ID Code: 7
Container Services
Software Component ID Code: 8
Raid Services
Software Component ID Code: 9
Storage System Management Interface
Software Component ID Code: b
System Services (DFP, XMFC, etc. processing)
Software Component ID Code: c
Data Replication Manager Component
Software Component ID Code: d
Disk Enclosure Environmental Monitoring Unit Services
Software Component ID Code: 42
Host Port
Software Component ID Code: 80
Metadata Utilities
Software Component ID Code: 83
Diagnostic Operations Generator
Software Component ID Code: 84
Diagnostic Runtime Services (Scrubbing, UPS, temp/battery/voltage monitoring, etc.)
EVENT CODES:
Event Code: 1 2 0 d
Severity: Normal -- informational in nature. A time change occurred.
Event Code: 3 0 20 a
Severity: Critical -- failure or failure imminent. The HSV110 controller identified in the node_name field has failed in communicating with the Cabinet (Rack) Bus Interface Controller. The dimm_size field contains the size, in megabytes, of the HSV110 controller's DIMM memory.
Event Code: 3 1 40 b
Severity: Critical -- failure or failure imminent. The physical disk drive identified by the device field has been rendered inoperable.
<UL>
<LI>If the flags.quorum_disk flag is nonzero, the physical disk drive is the Storage System Quorum disk identified in the quorum_sequence field.
<LI>If the flags.inq_state flag is nonzero, the content of the inq_data and capacity fields is valid.
<LI>If the rss_flags.member_abnormal flag is nonzero, the content of the member_state field is valid.
</UL>The rack_num field will not be valid until a future release. <P> The reason_code field contains a code giving the reason the physical disk drive has been rendered inoperable:
<UL>
<LI>0x001 = CS IO failure
<LI>0x002 = Scrubber IO failure
<LI>0x003 = Attempt to set CBIT on normal drive
<LI>0x004 = Attempt to set CBIT on merging drive
<LI>0x100 = The Target Discovery Service Descriptor retry count has been exceeded
<LI>0x101 = Inoperable for Bad Block Replacement
<LI>0x102 = The soft error count has been exceeded
<LI>0x103 = The number of exchange timeouts permitted was exceeded
<LI>0x104 = Communication with drive has failed an excessive number of times
<LI>0x105 = The number of retries has been exceeded
<LI>0x106 = Medium/Hardware Errors encountered on this physical disk drive
<LI>0x107 = The number of Directed LIP's has surpassed the threshold
<LI>0x200 = Smart event from a physical disk drive not in Storage System
<LI>0x201 = Smart event from a physical disk drive not a Volume
<LI>0x202 = Smart event from a physical disk drive not a RSS
<LI>0x203 = Failure predicted from physical disk drive
<LI>0x204 = Can't read from physical disk drive from the poll
<LI>0x205 = Failure predicted from physical disk drive while deleting Disk Group
<LI>0x206 = physical disk drive forced inoperative from maintenance command for temporary POID
<LI>0x207 = physical disk drive forced inoperative from maintenance command for POID
<LI>0x208 = Bad block recovery failed or can't read FPAB
<LI>0x209 = Failure to remove volume from Storage System
<LI>0x20A = Failure to update metadata
</UL>
Event Code: 3 2 4f b
Severity: Warning -- not failed but attention recommended or required. A physical disk drive will not be used because the maximum number of physical disk drives already exist in the current Storage System. The affected physical disk drive is identified in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The location of the physical disk drive is contained in the rack_num, dencl_num, and bay fields. Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the reason_code, flags, rss_flags, inq_data, quorum_sequence, capacity, and member_state fields is undefined.
Event Code: 3 3 0 a
Severity: Normal -- informational in nature. A HSV110 controller has begun booting. That controller is identified in the node_name field. Note that in this case the content of the scell_tag field is undefined.
Event Code: 3 4 0 a
Severity: Normal -- informational in nature. The HSV110 controller identified in the node_name field has finished the process of bringing the Storage System, identified in the scell_tag field, online.
Event Code: 3 5 0 a
Severity: Normal -- informational in nature. The HSV110 controller identified in the node_name field has been joined into the Storage System.
Event Code: 3 6 0 a
Severity: Normal -- informational in nature. The HSV110 controller identified in the node_name field has been ousted from the Storage System identified in the scell_tag field.
Event Code: 3 7 0 a
Severity: Normal -- informational in nature. The HSV110 controller identified in the node_name field is now the Storage System, identified in the scell_tag field, master.
Event Code: 3 8 0 a
Severity: Normal -- informational in nature. The HSV110 controller identified in the node_name field has been brought into the Storage System identified in the scell_tag field.
Event Code: 3 9 0 18
Severity: Normal -- informational in nature. The Redundant Storage Set identified in the source_rss field has started migrating members to the Redundant Storage Set identified in the target_rss field.
Event Code: 3 a 0 18
Severity: Normal -- informational in nature. The Redundant Storage Set identified in the source_rss field has finished migrating members to the Redundant Storage Set identified in the target_rss field.
Event Code: 3 b 4f b
Severity: Warning -- not failed but attention recommended or required. A physical disk drive has failed during Storage System realization.
Event Code: 3 d 0 1e
Severity: Normal -- informational in nature. Process with work during CSM reset:
Event Code: 4 0 3 0
Severity: Undetermined -- more information needed to determine severity. HSV110 controller operation was terminated due to an unrecoverable event detected by either software or hardware or due to an action initiated via the Storage System Management Interface.
Event Code: 4 1 3 0
Severity: Undetermined -- more information needed to determine severity. An HSV110 controller has sent a last gasp message prior to terminating operation. The terminated HSV110 controller is identified in the lter.terminating_ctrlr field. The lter.termination_event.u.value field contains the termination cause (i.e., termination code). The lter.termination_event.termination_location field contains the termination location. The lter.termination_time field contains the termination date and time. The lter.seq field contains the index of the HSV110 controller's Last Termination Event Array element assigned to the termination event. The lter.sw_version, lter.baselevel_id, and lter.ctrlr_model_id fields identify the software level and controller model information. The lter.uptime field contains a value that represents the number of seconds the HSV110 controller has executed functional code since its first power up. Note that the reporting_ctrlr header field identifies the HSV110 controller that received the last gasp message. All other header fields reflect information supplied by the terminating controller.
Event Code: 4 2 1 1
Severity: Critical -- failure or failure imminent. A machine check occurred while a termination event was being processed. The post-termination operation being performed at the time the event occurred can be derived from the lter.reuea_index field. Note: The lteihd and lter fields may not describe the event that caused the HSV110 controller to terminate operation depending on how far termination processing got before the machine check occurred.
Event Code: 4 3 1 2
Severity: Critical -- failure or failure imminent. An unexpected event occurred while a termination event was being processed. The value contained in the uei.type field describes the event as follows:
<UL>
<LI>0 = Unrecognized Unexpected Event code.
<LI>1 = Power failure before initialization could complete.
<LI>2 = Recursive termination before initialization could complete.
<LI>3 = Terminated during the first part post-termination preparation.
<LI>4 = Terminated during the load of the G3 Glue registers.
<LI>5 = Terminated during the second part post-termination preparation.
<LI>6 = Terminated during event report block load.
<LI>7 = Terminated during initialization of all hardware components and software data structures in preparation for restart.
<LI>8 = Terminated during execution of an unrecognized post-termination operation (premature).
<LI>9 = Power failure during execution of a post-termination operation.
<LI>A = No good entries found in Termination Event Array. (Note that this condition is expected following the first boot of a newly manufactured HSV110 controller. In that case this event can be safely ignored; no action is necessary.)
<LI>B = The EDC of one or more Termination Event Array entries is bad.
<LI>C = Termination Event Array entry control block revision is different.
<LI>D = Termination Event Array entry information block revision is different.
<LI>E = Termination Event Array entry up time value is greater than the system's up time value.
<LI>F = Termination Event Array entry up time value is less than the previous entry's up time value.
<LI>10= Termination Event Array entry sequence number value is less than the previous entry's sequence number value.
<LI>11= Detected an unrecognized dump/restart control code.
<LI>12= Failed to terminate the entity dump loop.
<LI>13= Unexpected dump entity size.
<LI>14= Unexpected Event Log Packet processing stage code.
<LI>15= Number of Termination Parameters supplied not equal to maximum allowed as required.
</UL><P> The post-termination operation being performed at the time the unexpected event occurred is contained in the uei.pto field. Note: The lteihd and lter fields may not describe the event that caused the HSV110 controller to terminate operation depending on how far termination processing got before the unexpected event occurred.
Event Code: 4 4 0 3
Severity: Normal -- informational in nature. The Storage System Event Log validation completed successfully. The content of the cinfo.scelcbi.status field, the cinfo.scelcbi structure, and the minfo.scelmi structure show the validated state of the Storage System Event Log. The meaning of the status value contained in the cinfo.scelcbi.status field is as follows:
<UL>
<LI>0 = No problems found.
</UL><P> Note: The content of the ainfo fields, cinfo.sctelcbi structure, and minfo.sctelmi structure is undefined.
Event Code: 4 5 0 3
Severity: Normal -- informational in nature. The Storage System Event Log validation failed. The content of the cinfo.scelcbi.status field, the cinfo.scelcbi structure, and the minfo.scelmi structure show the state of the Storage System Event Log at the time of the failure. The content and state of the Storage System Event Log have been initialized to their initial operational settings. The meaning of the status value contained in the cinfo.scelcbi.status field is as follows:
<UL>
<LI>1 = Cookie value is not as expected.
<LI>2 = Event data overflows the buffer.
<LI>3 = Event data size is not a multiple of 4 bytes, is less than the minimum, or is greater than the maximum.
<LI>4 = Event Information Packet type is greater than the maximum.
<LI>5 = Event information size is not a multiple of 4 bytes, is less than the minimum, is greater than the maximum, doesn't match the Event Information Packet type size, or when combined with the entry header size doesn't equal the entry size.
<LI>6 = Event code is zero.
<LI>7 = Event is out of sequence.
<LI>8 = Dead space area at the end of a partially packed buffer contains a nonzero value.
<LI>9 = An event data block containing a nonzero value was found after end of event data was detected.
<LI>A = Sequence number reset flag not set as expected.
<LI>B = The event log contains no entries.
<LI>C = Event data block read failed during maintenance verification.
<LI>D = Event data block read failed during maintenance completion.
<LI>E = Event data block erase failed during maintenance completion.
<LI>F = Control block read failed during maintenance verification.
<LI>17= The event log was destroyed and prepared for re-initialization.
</UL><P> Note: The content of the ainfo fields, cinfo.sctelcbi structure, and minfo.sctelmi structure is undefined.
Event Code: 4 6 8 3
Severity: Normal -- informational in nature. Local event reports were lost due to an insufficient supply of Event Log Packets on this HSV110 controller. The ainfo.events_not_reported field shows the number of event reports lost. Note: The content of the ainfo.quiesce_type field, ainfo.remote_event field cinfo.sctelcbi structure, and minfo.sctelmi structure is undefined.
Event Code: 4 7 8 3
Severity: Normal -- informational in nature. Remote event reports were lost due to an insufficient supply of Event Log Packets on this HSV110 controller. The ainfo.events_not_reported field shows the number of event reports lost. Note: The content of the ainfo.quiesce_type field, ainfo.remote_event field cinfo.sctelcbi structure, and minfo.sctelmi structure is undefined.
Event Code: 4 8 0 3
Severity: Normal -- informational in nature. The Storage System Termination Event Log has become inaccessible. The content of the cinfo.sctelcbi.status field, the cinfo.sctelcbi structure, and the minfo.sctelmi structure show the current state of the Storage System Termination Event Log. The meaning of the status value contained in the cinfo.sctelcbi.status field is as follows:
<UL>
<LI>F = Control block read failed during maintenance verification.
<LI>10= Control block write failed during maintenance verification.
<LI>11= Event data block write failed during maintenance update.
<LI>12= Control block write failed during maintenance completion.
<LI>13= Storage System Termination Event Log related send was unsuccessful or the master found that the Storage System Termination Event Log is inaccessible.
<LI>16= Event data block read failed during retrieval request.
</UL><P> Note: The content of the ainfo fields, cinfo.scelcbi structure, and minfo.scelmi structure is undefined.
Event Code: 4 9 0 3
Severity: Normal -- informational in nature. The Storage System Termination Event Log validation completed successfully. The content of the cinfo.sctelcbi.status field, the cinfo.sctelcbi structure, and the minfo.sctelmi structure show the validated state of the Storage System Termination Event Log. The meaning of the status value contained in the cinfo.sctelcbi.status field is as follows:
<UL>
<LI>0 = No problems found.
</UL><P> Note: The content of the ainfo fields, cinfo.scelcbi structure, and minfo.scelmi structure is undefined.
Event Code: 4 a 0 3
Severity: Normal -- informational in nature. The Storage System Termination Event Log validation failed. The content of the cinfo.sctelcbi.status field, the cinfo.sctelcbi structure, and the minfo.sctelmi structure show the state of the Storage System Termination Event Log at the time of the failure. The meaning of the status value contained in the cinfo.sctelcbi.status field is as follows:
<UL>
<LI>F = Control block read failed during maintenance verification.
<LI>10= Control block write failed during maintenance verification.
<LI>11= Event data block write failed during maintenance update.
<LI>12= Control block write failed during maintenance completion.
<LI>13= Storage System Termination Event Log related send was unsuccessful or the master found that the Storage System Termination Event Log is inaccessible.
<LI>16= Event data block read failed during retrieval request.
<LI>17= The log was destroyed and prepared for re-initialization.
</UL><P> Note: The content of the ainfo fields, cinfo.scelcbi structure, and minfo.scelmi structure is undefined.
Event Code: 4 b 0 3
Severity: Normal -- informational in nature. The Storage System Termination Event Log has been updated with the termination event information obtained from the HSV110 controller that is not the Storage System Master. The content of the cinfo.sctelcbi.status field, the cinfo.sctelcbi structure, and the minfo.sctelmi structure show the updated state of the Storage System Termination Event Log. The meaning of the status value contained in the cinfo.sctelcbi.status field is as follows:
<UL>
<LI>0 = No problems found.
</UL><P> Note: The content of the ainfo fields, cinfo.scelcbi structure, and minfo.scelmi structure is undefined.
Event Code: 4 c 8 3
Severity: Normal -- informational in nature. The Fault Manager on the Storage System Master received an invalid Event Information Packet from the remote Fault Manager. The header information from the invalid Event Information Packet is contained in the ainfo.remote_event field. Note: The content of the ainfo.quiesce_type field, ainfo.events_not_reported field, cinfo.scelcbi structure, cinfo.sctelcbi structure, minfo.scelmi structure, and minfo.sctelmi structure is undefined.
Event Code: 4 d 0 3
Severity: Normal -- informational in nature. The Fault Manager operation was made quiescent. If the ainfo.quiesce_type field is equal to 0, the operation was performed on both HSV110 controllers. If the ainfo.quiesce_type field is equal to 1, the operation was performed only on the HSV110 controller that is not the Storage System Master. Note: The content of the ainfo.events_not_reported field, cinfo.scelcbi structure, cinfo.sctelcbi structure, minfo.scelmi structure, and minfo.sctelmi structure is undefined.
Event Code: 4 e 3 0
Severity: Undetermined -- more information needed to determine severity. An HSV110 controller sent a last gasp message prior to terminating operation with an indication that the HSV110 controller identified in the lter.terminating_ctrlr field should also terminate operation.
Event Code: 4 f 0 3
Severity: Normal -- informational in nature. This HSV110 controller sent its termination event information to the HSV110 controller that is the Storage System Master. The content of the cinfo.sctelcbi.status field, the cinfo.sctelcbi structure, and the minfo.sctelmi structure show the updated state of the Storage System Termination Event Log. The meaning of the status value contained in the cinfo.sctelcbi.status field is as follows:
<UL>
<LI>0 = No problems found.
</UL><P> Note: The content of the ainfo fields, cinfo.scelcbi structure, and minfo.scelmi structure is undefined.
Event Code: 4 10 8 3
Severity: Normal -- informational in nature. Event reports were lost due to an insufficient supply of ISR Event Log Packets on the HSV110 controller that is the Storage System Master. The ainfo.events_not_reported field shows the number of event reports lost. Note: The content of the ainfo.quiesce_type field, ainfo.remote_event field cinfo.sctelcbi structure, and minfo.sctelmi structure is undefined.
Event Code: 4 11 8 3
Severity: Normal -- informational in nature. Event reports were lost due to an insufficient supply of ISR Event Log Packets on the HSV110 controller that is not the Storage System Master. The ainfo.events_not_reported field shows the number of event reports lost. Note: The content of the ainfo.quiesce_type field, ainfo.remote_event field cinfo.sctelcbi structure, and minfo.sctelmi structure is undefined.
Event Code: 4 12 0 3
Severity: Normal -- informational in nature. The last event reporting interval has changed or last event reporting has been enabled or disabled. If minfo.lerinfo.reporting_interval field is not zero, the value is the last event reporting interval (quarter-hour per tick). Otherwise, last event reporting has been disabled. Note: The content of the minfo.lerinfo.sequence_number field, minfo.lerinfo.report_time field, minfo.lerinfo.header.u.value field, ainfo.events_not_reported field, ainfo.quiesce_type field, ainfo.remote_event field, cinfo.scelcbi structure, cinfo.sctelcbi structure, cinfo.stats30 structure, and minfo.sctelmi structure is undefined.
Event Code: 4 13 0 3
Severity: Normal -- informational in nature. Storage System event reporting is still active. The minfo.lerinfo.reporting_interval field shows the last event reporting interval (quarter-hour per tick). The cinfo.stats30 structure fields show the last 30 seconds activity summary for the primary HSV110 controller. The minfo.lerinfo.sequence_number field shows the sequence number assigned to the last event reported. The minfo.lerinfo.report_time field shows the time the last event was reported. The minfo.lerinfo.header.u.value field shows the event code of the last event reported. Note: The content of the ainfo.events_not_reported field, ainfo.quiesce_type field, ainfo.remote_event field, cinfo.scelcbi structure, cinfo.sctelcbi structure, and minfo.sctelmi structure is undefined.
Event Code: 4 1a 3 0
Severity: Undetermined -- more information needed to determine severity. An error condition was encountered while this HSV110 controller's Last Termination Event information was being processed.
Event Code: 6 0 0 9
Severity: Normal -- informational in nature. A physical disk drive has reported that it has exceeded its failure prediction threshold. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The Fibre Channel Exchange Descriptor class is contained in the fed_class field. The command issued to the physical disk drive is contained in the cmd field. The sense data obtained from the physical disk drive as a result of the failure prediction threshold exceeded error is contained in the error field. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 1 4a 8
Severity: Warning -- not failed but attention recommended or required. A Fibre Channel port on the HSV110 controller has failed to respond. The identity of the affected Fibre Channel port is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number of the affected Fibre Channel port is contained in the port field. The peb array contains the port event block information. The peq_frz_prod_index field contains the index to the port event block in use when the Tachyon chip entered the frozen state. The peq_prod_index field contains the index to the next port event block. The peq_cons_index field contains the index to the next port event block to be acted upon. The failure_cause field contains the internal routing value as follows:
<UL>
<LI>1 - Excessive exchange timeouts on loop
<LI>2 - Excessive link errors on loop
<LI>3 - Exhausted Link Down retries on loop with signal
<LI>4 - Exhausted Link Down retries on loop with loss of signal
<LI>5 - Excessive link inits on loop without completing device discovery
</UL>
Event Code: 6 2 0 9
Severity: Normal -- informational in nature. A physical disk drive has reported a check condition error. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The Fibre Channel Exchange Descriptor class is contained in the fed_class field. The command issued to the physical disk drive is contained in the cmd field. The sense data obtained from the physical disk drive as a result of the check condition error is contained in the error field. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 3 47 13
Severity: Warning -- not failed but attention recommended or required. An exchange sent to a physical disk drive or another HSV110 controller via the mirror port or a Fibre Channel port has timed out. The identity of the intended recipient is contained in the device field. The Fibre Channel port over which the frame was sent is identified in the cerp_id field. The HSV110 controller internal Fibre Channel port number over which the frame was sent is contained in the port field. The arbitrated loop physical address of the intended recipient is contained in the al_pa field. The missing_port and missing_cerp_id fields are unused. The location of the intended recipient is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The number of timeouts detected is contained in the num_times field. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 4 48 12
Severity: Warning -- not failed but attention recommended or required. Work was unexpectedly sent to this HSV110 controller by a physical disk drive or another HSV110 controller. This HSV110 controller did not originate the work. The identity of the sender is contained in the device field. The Fibre Channel port over which the unexpected work was received is identified in the cerp_id field. The HSV110 controller internal Fibre Channel port number over which the unexpected work was received is contained in the port field. The arbitrated loop physical address of the sender is contained in the al_pa field. The location of the sender is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The hdr_cdb field contains the command descriptor block and Fibre Channel header information associated with the unexpected work.
Event Code: 6 5 49 9
Severity: Warning -- not failed but attention recommended or required. Work has been sent to a physical disk drive or another HSV110 controller via the mirror port but it did not respond. The identity of the intended target is contained in the device field. The Fibre Channel port over which the work was sent is identified in the cerp_id field. The HSV110 controller internal Fibre Channel port over which the work was sent is contained in the port field. The arbitrated loop physical address of the intended target is contained in the al_pa field. The location of the intended target is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The Fibre Channel Exchange Descriptor class is contained in the fed_class field. The command issued to the intended target is contained in the cmd field. Note that in this case the content of the error field is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 7 47 9
Severity: Warning -- not failed but attention recommended or required. A Target Discovery Service Descriptor exchange sent to a physical disk drive has timed out. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The Fibre Channel Exchange Descriptor class is contained in the fed_class field. The command issued to the physical disk drive is contained in the cmd field. Note that in this case the content of the error field is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 8 0 7
Severity: Normal -- informational in nature. An excessive number of link errors were detected on a HSV110 controller's Fibre Channel port. The identity of the affected Fibre Channel port is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number of the affected Fibre Channel port is contained in the port field. This is an informational event triggered by the occurrence of an excessive number of Tachyon chip link status errors detected within a particular link status error type. The number of occurrences of each link status error type is contained in a separate type-specific field (e.g., loss_of_signal, bad_rx_char, etc.). The HSV110 controller checks each of its Fibre Channel port's for excessive link status errors periodically.
Event Code: 6 9 0 13
Severity: Normal -- informational in nature. A physical disk drive has reported numerous failure prediction threshold exceeded errors. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The missing_port and missing_cerp_id fields are unused. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The Fibre Channel Exchange Descriptor class is contained in the fed_class field. The num_times field is the number of failure prediction threshold exceeded errors reported by the physical disk drive in the previous minute. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 a 0 13
Severity: Normal -- informational in nature. A physical disk drive has reported numerous check condition errors. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The missing_port and missing_cerp_id fields are unused. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The Fibre Channel Exchange Descriptor class is contained in the fed_class field. The num_times field is the number of check condition errors reported by the physical disk drive in the previous minute. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 b 47 9
Severity: Warning -- not failed but attention recommended or required. A non-data exchange sent to a physical disk drive has timed out. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The Fibre Channel Exchange Descriptor class is contained in the fed_class field. The command issued to the physical disk drive is contained in the cmd field. Note that in this case the content of the error field is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 c 0 13
Severity: Normal -- informational in nature. A loop switch has been detected on a Fibre Channel port. The identity of the Fibre Channel port is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number is contained in the port field. Note that in this case the content of the device, al_pa, rack_num, dencl_num, bay, fed_class and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The missing_port and missing_cerp_id fields are unused. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 d 0 13
Severity: Normal -- informational in nature. The location of a physical disk drive previously reported as unknown is now known. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The missing_port and missing_cerp_id fields are unused. The location of the physical disk drive is contained in the rack_num, dencl_num, and bay fields. Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of fed_class, al_pa and num_times fields are undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 e 96 13
Severity: Critical -- failure or failure imminent. A Drive Enclosure Environmental Monitoring Unit requested a code update but the code update could not be found, so the update was not performed. The identity of the device enclosure where the affected Drive Enclosure Environmental Monitoring Unit is located is contained in the device field. The Fibre Channel port used to communicate with the Drive Enclosure Environmental Monitoring Unit is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the Drive Enclosure Environmental Monitoring Unit is contained in the port field. The missing_port and missing_cerp_id fields are unused. The location of the Drive Enclosure Environmental Monitoring Unit is contained in the rack_num and dencl_num fields. Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the al_pa, bay, fed_class and num_times field is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 f 40 13
Severity: Critical -- failure or failure imminent. The Drive Enclosure Environmental Monitoring Unit is able to communicate with a physical disk drive but this HSV110 controller is unable to communicate with that physical disk drive on the Fibre Channel bus. The identity of the device enclosure where the affected Drive Enclosure Environmental Monitoring Unit is located is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The missing_port and missing_cerp_id fields are unused. The location of the physical disk drive is contained in the rack_num, dencl_num, and bay fields. Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the al_pa, fed_class and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 10 9b 13
Severity: Undetermined -- more information needed to determine severity. An HSV110 controller is unable to communicate with this Drive Enclosure Environmental Monitoring Unit. The Drive Enclosure Environmental Monitoring Unit located in the drive enclosure identified in the device field has stopped communicating with the HSV110 controller. The Fibre Channel port used to communicate with the Drive Enclosure Environmental Monitoring Unit is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the Drive Enclosure Environmental Monitoring Unit is contained in the port field. The missing_port and missing_cerp_id fields are unused. The location of the Drive Enclosure Environmental Monitoring Unit is contained in the rack_num and dencl_num fields. Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the bay, al_pa, fed_class and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 12 0 8
Severity: Normal -- informational in nature. The retry count for a task assigned to a Drive Enclosure Environmental Monitoring Unit has been exhausted. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The peb array contains the task list that was intended to be sent to the Drive Enclosure Environmental Monitoring Unit. The peq_frz_prod_index field contains the task that was being retried. The peq_prod_index field contains the drive enclosure where the physical disk drive used to communicate with the Drive Enclosure Environmental Monitoring Unit is located. The peq_cons_index field identifies the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) used to communicate with the physical disk drive that was used to communicate with the Drive Enclosure Environmental Monitoring Unit. The failure_cause field contains the bay where the physical disk drive used to communicate with the Drive Enclosure Environmental Monitoring Unit.
Event Code: 6 13 0 13
Severity: Normal -- informational in nature. A Drive Enclosure Environmental Monitoring Unit is able to communicate with this HSV110 controller. The identity of the drive enclosure where the Drive Enclosure Environmental Monitoring Unit is located is contained in the device field. The Fibre Channel port used to communicate with the Drive Enclosure Environmental Monitoring Unit is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the Drive Enclosure Environmental Monitoring Unit is contained in the port field. The missing_port and missing_cerp_id fields are unused. The location of the Drive Enclosure Environmental Monitoring Unit is contained in the rack_num and dencl_num fields. Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the bay, fed_class and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 14 98 13
Severity: Critical -- failure or failure imminent. There are too many drive enclosures attached to a Fibre Channel port. The Fibre Channel port with too many drive enclosures attached to the HSV110 controller is contained in the cerp_id field. Note that in this case the content of the bay, fed_class, rack_num, dencl_num and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The missing_port and missing_cerp_id fields are unused. The location of the identified in the cerp_id field. The device, missing_port and missing_cerp_id fields are unused. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 15 99 13
Severity: Critical -- failure or failure imminent. The cable connected to the I/O module is attached to the wrong Fibre Channel port. The Fibre Channel port incorrectly attached to the HSV110 controller is contained in the cerp_id field. Note that in this case the content of the device, missing_port, missing_cerp_id, bay, fed_class, rack_num, dencl_num and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 16 97 13
Severity: Critical -- failure or failure imminent. An HSV110 controller does not have an address on the enclosure address bus. The HSV110 controller location cannot be identified. Note that in this case the content of the missing_port, missing_cerp_id, bay, fed_class, rack_num, dencl_num, al_pa, device, cerp_id, port, enclosures array and num_times fields is undefined.
Event Code: 6 18 0 13
Severity: Normal -- informational in nature. A Drive Enclosure Environmental Monitoring Unit has begun updating its code. Do not power down this drive enclosure until the code update has completed. The identity of the drive enclosure where the Drive Enclosure Environmental Monitoring Unit is located is contained in the device field. The Fibre Channel port used to communicate with the Drive Enclosure Environmental Monitoring Unit is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the Drive Enclosure Environmental Monitoring Unit is contained in the port field. The missing_port and missing_cerp_id fields are unused. The location of the Drive Enclosure Environmental Monitoring Unit is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case. In addition, the device field may contain all zeroes.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. Note also that the content of the fed_class, al_pa, and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 19 0 13
Severity: Normal -- informational in nature. A Drive Enclosure Environmental Monitoring Unit has completed updating its code. It is now safe to power down this drive enclosure. The identity of the drive enclosure where the Drive Enclosure Environmental Monitoring Unit is located is contained in the device field. The Fibre Channel port used to communicate with the Drive Enclosure Environmental Monitoring Unit is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the Drive Enclosure Environmental Monitoring Unit is contained in the port field. The missing_port and missing_cerp_id fields are unused. The location of the Drive Enclosure Environmental Monitoring Unit is contained in the rack_num and dencl_num fields. Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the fed_class, al_pa, and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 1a 0 9
Severity: Normal -- informational in nature. A physical disk drive has exceeded its soft error threshold. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the fed_class, cdb, and sense_data fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 1b 0 13
Severity: Normal -- informational in nature. An HSV110 controller now has an address on the enclosure address bus. The HSV110 controller location has been identified. The location of the HSV110 controller is contained in the rack_num and dencl_num fields. Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the bay, fed_class, al_pa, cerp_id, port, and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The missing_port and missing_cerp_id fields are unused. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 1c 47 9
Severity: Warning -- not failed but attention recommended or required. An outbound frame targeted to a physical disk drive has timed out. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The Fibre Channel Exchange Descriptor class is contained in the fed_class field. The command issued to the physical disk drive is contained in the cmd field. Note that in this case the content of the error field is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 1d 47 9
Severity: Warning -- not failed but attention recommended or required. A Fibre Channel exchange to a physical disk drive has completed but is missing data. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The Fibre Channel Exchange Descriptor class is contained in the fed_class field. The command issued to the physical disk drive is contained in the cmd field. Note that in this case the content of the error field is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 1e 4c 13
Severity: Critical -- failure or failure imminent. An HSV110 controller has detected only one port of a Fibre Channel device. This Fibre Channel device has entered the Single Port on Fibre state which should be corrected as soon as possible. The identity of the Fibre Channel device is contained in the device field. The Fibre Channel port still able to communicate with the Fibre Channel device is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number able to communicate with the Fibre Channel device is contained in the port field. The Fibre Channel port unable to communicate with the Fibre Channel device is contained in the missing_cerp_id field. The HSV110 controller internal Fibre Channel port number unable to communicate with the Fibre Channel device is contained in the missing_port field. The arbitrated loop physical address of the Fibre Channel device is contained in the al_pa field. The location of the Fibre Channel device is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the fed_class, and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 1f 0 13
Severity: Normal -- informational in nature. A previously reported Fibre Channel device with only one port has been corrected and redundancy has been restored. The device is no longer in the Single Port on Fibre state. The identity of the Fibre Channel device is contained in the device field. The Fibre Channel port used to communicate with the Fibre Channel device is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the Fibre Channel device is contained in the port field. The missing_port and missing_cerp_id fields are unused. The arbitrated loop physical address of the Fibre Channel device is contained in the al_pa field. The location of the Fibre Channel device is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the fed_class, and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 20 40 13
Severity: Critical -- failure or failure imminent. An unsupported Fibre Channel device has been detected. The drive has been failed to prevent possible data corruption or system instability. The identity of the Fibre Channel device is contained in the device field. The Fibre Channel port used to communicate with the Fibre Channel device is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the Fibre Channel device is contained in the port field. The arbitrated loop physical address of the Fibre Channel device is contained in the al_pa field. The missing_port and missing_cerp_id fields are unused. The location of the Fibre Channel device is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the fed_class and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 21 0 13
Severity: Normal -- informational in nature. A Fibre Channel device with the incorrect block size has been detected. The identity of the Fibre Channel device is contained in the device field. The Fibre Channel port used to communicate with the Fibre Channel device is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the Fibre Channel device is contained in the port field. The arbitrated loop physical address of the Fibre Channel device is contained in the al_pa field. The missing_port and missing_cerp_id fields are unused. The location of the Fibre Channel device is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the fed_class and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 23 0 13
Severity: Normal -- informational in nature. An HSV110 controller is about to retry a failed port. The Fibre Channel port that is about to be retried is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number about to be retried is contained in the port field. Note that in this case the content of the bay, rack_num, fed_class, al_pa, dencl_num, device, and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The missing_port and missing_cerp_id fields are unused. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 24 0 13
Severity: Normal -- informational in nature. An HSV110 controller has successfully retried a failed port. The Fibre Channel port that has been restarted is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number that has been restarted is contained in the port field. Note that in this case the content of the bay, rack_num, fed_class, al_pa, dencl_num, device, and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The missing_port and missing_cerp_id fields are unused. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 25 43 13
Severity: Critical -- failure or failure imminent. A Drive Enclosure Environmental Monitoring Unit has failed to assign a hard address to a physical disk drive on the loop. The device field contains the identity of the drive enclosure where the Drive Enclosure Environmental Monitoring Unit is located. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The al_pa field contains the expected AL_PA, and the num_times field contains the actual AL_PA. The missing_port and missing_cerp_id fields are unused. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. Note that in this case the content of the fed_class is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 26 89 13
Severity: Critical -- failure or failure imminent. A Drive Enclosure Environmental Monitoring Unit has failed to assign an address to a physical disk drive on the loop. This has occurred because another physical disk drive has already obtained this AL_PA. The device field contains the identity of the drive enclosure where the Drive Enclosure Environmental Monitoring Unit is located. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The al_pa field contains the AL_PA that was stolen. The missing_port and missing_cerp_id fields are unused. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the fed_class and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 27 1 13
Severity: Critical -- failure or failure imminent. A Drive Enclosure Environmental Monitoring Unit has failed to assign address(s) to a physical disk drive on the loop. Soft addressing was detected for this enclosure. The device field contains the identity of the drive enclosure where the Drive Enclosure Environmental Monitoring Unit is located. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The missing_port and missing_cerp_id fields are unused. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the fed_class, al_pa, and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 28 0 8
Severity: Normal -- informational in nature. The retry count for an OB task assigned to a Drive Enclosure Environmental Monitoring Unit has been exhausted. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The peb array contains the task list that was intended to be sent to the Drive Enclosure Environmental Monitoring Unit. The peq_frz_prod_index field contains the task that was being retried. The peq_prod_index field contains the drive enclosure where the physical disk drive used to communicate with the Drive Enclosure Environmental Monitoring Unit is located. The peq_cons_index field identifies the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) used to communicate with the physical disk drive that was used to communicate with the Drive Enclosure Environmental Monitoring Unit. The failure_cause field contains the bay where the physical disk drive used to communicate with the Drive Enclosure Environmental Monitoring Unit.
Event Code: 6 29 0 9
Severity: Normal -- informational in nature. The HSV110 controller has sent a Basic Link Service command Abort Sequence Frame. The original work is described in this event. The identity of the intended target is contained in the device field. The Fibre Channel port over which the work was sent is identified in the cerp_id field. The HSV110 controller internal Fibre Channel port over which the work was sent is contained in the port field. The arbitrated loop physical address of the intended target is contained in the al_pa field. The location of the intended target is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The Fibre Channel Exchange Descriptor class is contained in the fed_class field. The command issued to the intended target is contained in the cmd field. Note that in this case the content of the error field is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 2a 0 9
Severity: Normal -- informational in nature. The HSV110 controller has sent an Extended Link Service command Reinstate Recovery Qualifier. The original work is described in this event. The identity of the intended target is contained in the device field. The Fibre Channel port over which the work was sent is identified in the cerp_id field. The HSV110 controller internal Fibre Channel port over which the work was sent is contained in the port field. The arbitrated loop physical address of the intended target is contained in the al_pa field. The location of the intended target is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The Fibre Channel Exchange Descriptor class is contained in the fed_class field. The command issued to the intended target is contained in the cmd field. Note that in this case the content of the error field is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 2b 40 4
Severity: Critical -- failure or failure imminent. A physical disk drive was bypassed rendering it unusable. The physical disk drive is unusable because a Drive Enclosure Environmental Monitoring Unit bypassed a drive bay or the physical disk drive left itself bypassed. The physical disk drive is not available to the HSV110 controllers and will not be displayed by the HSV element manager GUI. The physical disk drive fault led will be lit to indicate that it is unusable. The Fibre Channel port over which this condition was detected is identified in the cerp_id field. The HSV110 controller internal Fibre Channel port over which this condition was detected is contained in the port field. The al_pa field is invalid. The location of the physical disk drive is as indicated by the content of the rack_num, dencl_num, and bay fields. Note that the content of the rack_num field will not be valid until a future release. The bypass_reason field is used to indicate how the physical disk drive was bypassed:
<UL>
<LI>1 = The physical disk drive left itself bypassed
<LI>2 = The Drive Enclosure Environmental Monitoring Unit bypassed the drive bay
</UL>The Drive Enclosure Environmental Monitoring Unit is identified in the device field. Additionally, the content of the pid, rev, and enclosures array fields is undefined in this case.
Event Code: 6 2c 0 12
Severity: Normal -- informational in nature. One or more media defects were detected on a physical disk drive. The affected physical disk drive is identified in the device field. The Fibre Channel port over which the media defect(s) was detected is identified in the cerp_id field. The HSV110 controller internal Fibre Channel port number over which the media defect(s) was detected is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The Logical Block Address of each media defect is contained in a separate entry of the hdr_cdb array. Only nonzero values in the hdr_cdb array entries are valid. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release.
Event Code: 6 2d 0 12
Severity: Normal -- informational in nature. An HSV110 controller issued a directed LIP to an arbitrated loop physical address. The Fibre Channel port over which the directed LIP was issued is identified in the cerp_id field. The HSV110 controller internal Fibre Channel port number over which the directed LIP was issued is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The hdr_cdb[0] contains the LIP type, and hdr_cdb[1] contains the calling instruction address.
Event Code: 6 2e 0 12
Severity: Normal -- informational in nature. An HSV110 controller has detected Loop Receiver Failures. The Fibre Channel port over which the Loop Receiver Failures were detected is identified in the cerp_id field. The HSV110 controller internal Fibre Channel port number over which the Loop Receiver Failures were detected is contained in the port field. The counts and the AL_PAs of the Loop Receiver Failures are contained in a separate entry of the hdr_cdb array. Only nonzero values in the hdr_cdb array entries are valid. The affected HSV110 controller is identified in the device field. Note that in this case the content of the al_pa, dencl_num, bay, and rack_num fields are undefined.
Event Code: 6 30 4e 13
Severity: Critical -- failure or failure imminent. A HSV110 controller has detected only one port of all Fibre Channel devices in an enclosure. These Fibre Channel devices have entered the Single Port on Fibre state which should be corrected as soon as possible. The identity of the Fibre Channel device enclosure is contained in the device field. The Fibre Channel port still able to communicate with the Fibre Channel device is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number able to communicate with the Fibre Channel device is contained in the port field. The Fibre Channel port unable to communicate with the Fibre Channel device is contained in the missing_cerp_id field. The HSV110 controller internal Fibre Channel port number unable to communicate with the Fibre Channel device is contained in the missing_port field. The bay field invalid. The location of the Fibre Channel enclosure is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the fed_class, and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 31 0 13
Severity: Normal -- informational in nature. A previously reported Fibre Channel device enclosure with only one port has been corrected and redundancy has been restored. The devices in the enclosure are no longer in the Single Port on Fibre state. The identity of the Fibre Channel device enclosure is contained in the device field. The Fibre Channel port used to communicate with the Fibre Channel device enclosure is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the Fibre Channel device is contained in the port field. The al_pa, bay, missing_port, and missing_cerp_id fields are invalid. The location of the Fibre Channel device is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the content of the fed_class, and num_times fields is undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 32 4e 13
Severity: Critical -- failure or failure imminent. A HSV110 controller has detected only one port of all Fibre Channel devices on a loop. These Fibre Channel devices have entered the Single Port on Fibre state which should be corrected as soon as possible. The device, al_pa, dencl_num, and bay fields are all invalid. The Fibre Channel port still able to communicate with the Fibre Channel device is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number able to communicate with the Fibre Channel device is contained in the port field. The Fibre Channel port unable to communicate with the Fibre Channel device is contained in the missing_cerp_id field. The HSV110 controller internal Fibre Channel port number unable to communicate with the Fibre Channel device is contained in the missing_port field.
Event Code: 6 33 0 13
Severity: Normal -- informational in nature. A previously reported Fibre Channel loop with only one port has been corrected and redundancy has been restored. The devices on the loop are no longer in the Single Port on Fibre state. The device, al_pa, dencl_num, bay, missing_port, and missing_cerp_id fields are invalid. The Fibre Channel port used to communicate with the Fibre Channel devices is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the Fibre Channel devices is contained in the port field.
Event Code: 6 34 0 13
Severity: Normal -- informational in nature. A HSV110 controller has been told to enable a device port, and that device port was not disabled during boot diagnostics. The Fibre Channel port that was enabled is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number enabled is contained in the port field. Note that in this case the contents of the bay, rack_num, fed_class, al_pa, dencl_num, device, enclosure array, and num_times fields are undefined. The missing_port and missing_cerp_id fields are unused.
Event Code: 6 35 4d 4
Severity: Critical -- failure or failure imminent. An unrecognized Fibre Channel physical disk drive firmware revision has been detected by the physical disk drive firmware load process. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The bypass_reason field is invalid. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num, al_pa and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The pid field contains the SCSI Inquiry Product Identification obtained from the physical disk drive. The rev field contains the current firmware revision obtained from the physical disk drive. The new_rev field contains the latest firmware version known to the controller, or blanks if the isn't a known version. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 36 4d 4
Severity: Critical -- failure or failure imminent. An unsupported Fibre Channel physical disk drive firmware revision has been detected by the physical disk drive firmware load process. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The bypass_reason field is invalid. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num, al_pa and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The pid field contains the SCSI Inquiry Product Identification obtained from the physical disk drive. The rev field contains the current firmware revision obtained from the physical disk drive. The new_rev field contains the latest firmware version known to the controller, or blanks if the isn't a known version. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 37 c4 4
Severity: Normal -- informational in nature. A Fibre Channel physical disk drive firmware revision has been detected by the physical disk drive firmware load process that is later than the latest known supported revision. If the location information is 0, it indicates the type of drive, not a specific drive. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The bypass_reason field is invalid. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num, al_pa and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The pid field contains the SCSI Inquiry Product Identification obtained from the physical disk drive. The rev field contains the current firmware revision obtained from the physical disk drive. The new_rev field contains the latest firmware version known to the controller, or blanks if the isn't a known version. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 38 c4 4
Severity: Normal -- informational in nature. A Fibre Channel physical disk drive firmware revision has been detected by the physical disk drive firmware load process that has a newer supported revision available. If the location information is 0, it indicates the type of drive, not a specific drive. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The bypass_reason field is invalid. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num, al_pa and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The pid field contains the SCSI Inquiry Product Identification obtained from the physical disk drive. The rev field contains the current firmware revision obtained from the physical disk drive. The new_rev field contains the latest firmware version known to the controller, or blanks if the isn't a known version. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 39 40 8
Severity: Critical -- failure or failure imminent. The HSV110 controller bypassed a device bay in an attempt to restore loop operability. Replace this drive only if the Loop Recovery algorithm did not abort.
Event Code: 6 3a 0 8
Severity: Normal -- informational in nature. The HSV110 controller is attempting to recover devices on the indicated ports.
Event Code: 6 3b 0 8
Severity: Normal -- informational in nature. The HSV110 controller has finished error recovery attempts on the indicated ports.
Event Code: 6 3c 0 8
Severity: Normal -- informational in nature. The HSV110 controller been requested to unbypass device bays on the indicated port. Loop recovery incomplete.
Event Code: 6 3d 9b 9
Severity: Undetermined -- more information needed to determine severity. The HSV110 controller has detected an enclosure on the enclosure address bus that does not have a Fibre Channel connection. All fields except port, dencl_num and rack are invalid.
Event Code: 6 3e c5 13
Severity: Critical -- failure or failure imminent. The HSV110 controller has detected an enclosure on the Fibre Channel but is unable to communicate with the Drive Enclosure Environmental Monitoring Unit on the enclosure address bus or the Drive Enclosure Environmental Monitoring Unit is reporting an invalid enclosure number. All fields except device, port and rack are invalid.
Event Code: 6 3f 9c 13
Severity: Warning -- not failed but attention recommended or required. A physical disk drive is using an improper protocol to attempt communication with an Drive Enclosure Environmental Monitoring Unit. The physical disk drive identified in the device field has stopped communicating with the HSV110 controller. The Fibre Channel port used to communicate with the Drive Enclosure Environmental Monitoring Unit is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the Drive Enclosure Environmental Monitoring Unit is contained in the port field. The missing_port and missing_cerp_id fields are unused. The location of the physical disk drive is contained in the rack_num, bay, and dencl_num fields. Note that the content of the rack_num field will not be valid until a future release. Note also that in this case the contents of the fed_class and num_times fields are undefined. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 40 4d 4
Severity: Critical -- failure or failure imminent. A Fibre Channel physical disk drive that has new capabilities has been detected. The physical disk drive has properties that may or may not be compatible with this release of Enterprise Virtual Array firmware. The drive will be prevented from being used until the Approved Drive Firmware table has been updated to allow it. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The bypass_reason field is invalid. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num, al_pa and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The pid field contains the SCSI Inquiry Product Identification obtained from the physical disk drive. The rev field contains the current firmware revision obtained from the physical disk drive. The new_rev field contains the latest firmware version known to the controller, or blanks if the isn't a known version. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 6 41 0 17
Severity: Normal -- informational in nature. The device loop configuration has changed on a HSV110 controller's Fibre Channel port. This informational event contains a page of the newly genereated fibre channel loop map. Devices are listed in loop order using their ALPAs.
Event Code: 6 42 0 9
Severity: Normal -- informational in nature. A user command has been sent to a physical disk drive.
Event Code: 6 44 0 8
Severity: Normal -- informational in nature. An HSV110 controller is evaluating the next drive enclosure in the Loop Recovery Process.
Event Code: 6 46 0 8
Severity: Normal -- informational in nature. An HSV110 controller has determined the CAB bus is not usable at this time. A loop recovery operation will not be intitated.
Event Code: 6 48 0 8
Severity: Normal -- informational in nature. An HSV110 controller experienced the failure of an EMU unbypass operation during loop recovery. User should evaluate any bypassed drives that were not identified as loop disrupters during the recovery for possible re-introduction into the system.
Event Code: 6 49 0 8
Severity: Normal -- informational in nature. The HSV110 controller is attempting to recover devices in the indicated enclosure.
Event Code: 6 4a 0 8
Severity: Normal -- informational in nature. The HSV110 controller has finished error recovery attempts in the indicated enclosure.
Event Code: 6 4c 0 4
Severity: Normal -- informational in nature. Device Fibre Channel physical disk drive was placed on the Drive Suspect List (DSL) Look at events around this one to help determine what has happened. Note that the content of the rack_num field will not be valid until a future release
Event Code: 6 4e 0 9
Severity: Normal -- informational in nature. A physical disk drive has reported a non-zero RSP_CODE. in response to an I/O. This is not interesting by itself, as the I/O will be retried if retries remain and are allowed for the particular type of I/O.
Event Code: 7 0 b5 15
Severity: Warning -- not failed but attention recommended or required. Allocation of a Virtual Disk has stalled due to insufficient space in the Disk Group caused by the failure or pulling of a physical disk drive. The tag1 field contains the identity of the Virtual Disk. The tag2 field contains the identity of the Disk Group. The values that may be found in the state field are as follows:
<UL>
<LI>0 = Attempting to retry the allocation
<LI>1 = Awaiting a leveling event (a drive needs to be inserted)
</UL>
Event Code: 7 1 b5 15
Severity: Warning -- not failed but attention recommended or required. Expansion of a Virtual Disk has stalled due to insufficient space in the Disk Group caused by the failure or pulling of a physical disk drive. The tag1 field contains the identity of the Virtual Disk. The tag2 field contains the identity of the Disk Group. The values that may be found in the state field are as follows:
<UL>
<LI>0 = Attempting to retry the expansion
<LI>1 = Awaiting a leveling event (a drive needs to be inserted)
</UL>
Event Code: 7 2 0 15
Severity: Normal -- informational in nature. Leveling of capacity in a Disk Group has started. The identity of the Disk Group is contained in the tag1 field.
Event Code: 7 3 0 15
Severity: Normal -- informational in nature. Leveling of capacity in a Disk Group has finished. The identity of the Disk Group is contained in the tag1 field.
Event Code: 7 4 0 15
Severity: Normal -- informational in nature. A member management operation has started due to the appearance or disappearance of a physical disk drive. If available, the tag1 field contains the identity of the Volume. The tag2 field contains the identity of the physical disk drive. The values that may be found in the state field are as follows:
<UL>
<LI>2 = Reconstructing
<LI>4 = Migrating
<LI>6 = Reverting
</UL>
Event Code: 7 5 0 15
Severity: Normal -- informational in nature. A member management operation has finished. If available, the tag1 field contains the identity of the Volume. The tag2 field contains the identity of the physical disk drive. The values that may be found in the state field are as follows:
<UL>
<LI>2 = Reconstructing
<LI>4 = Migrating
<LI>6 = Reverting
</UL>The status field contains one of the following values:
<UL>
<LI>1 = PSEGS NONE ( Reconstruction of data was successful )
<LI>2 = PSEGS RAID0 ( Could not reconstruct RAID0 data )
<LI>4 = PSEGS RAID5 ( Could not reconstruct RAID5 data )
<LI>8 = PSEGS RAID1 ( Could not reconstruct RAID1 data )
</UL>
Event Code: 7 6 0 15
Severity: Normal -- informational in nature. A Disk Group has started changing its internal structure due to the appearance or disappearance of a Volume. The identity of the Disk Group is contained in the tag1 field. The values that may be found in the state field are as follows:
<UL>
<LI>4 = Merge began
<LI>8 = Split began
</UL>
Event Code: 7 7 0 15
Severity: Normal -- informational in nature. A Disk Group has finished changing its internal structure due to the appearance or disappearance of a volume. The identity of the Disk Group is contained in the tag1 field. The values that may be found in the state field are as follows:
<UL>
<LI>4 = Merge completed
<LI>8 = Split completed
</UL>
Event Code: 7 8 0 15
Severity: Normal -- informational in nature. Deallocation of a Virtual Disk has failed after three attempts due to unknown circumstances. This will more than likely be caused by failing physical drives. The deletion will be restarted when a resync/reboot occurs. The tag1 field contains the identity of the Virtual Disk. The tag2 field contains the identity of the Disk Group. The status field contains the returned status from the delete operation.
Event Code: 7 9 b5 15
Severity: Warning -- not failed but attention recommended or required. A member management operation has stalled due to insufficient space in the Disk Group. If available, the tag1 field contains the identity of the Volume. The tag2 field contains the identity of the physical disk drive.
Event Code: 7 a 0 15
Severity: Normal -- informational in nature. A stalled member management operation is being restarted. If available, the tag1 field contains the identity of the Volume. The tag2 field contains the identity of the physical disk drive.
Event Code: 7 b 0 15
Severity: Normal -- informational in nature. Unexpected metadata utility event. If available, the tag1 field contains the identity of the Volume, and tag2 field contains the identity of the Logical Disk.
Event Code: 7 c 1 15
Severity: Critical -- failure or failure imminent. Metadata inconsistency.
Event Code: 9 1 0 5
Severity: Normal -- informational in nature. The state of the Physical Disk Drive identified in the handle field has transitioned to the NORMAL state. The value.ul1 field contains the new state: 1 (NORMAL). The value.ul2 field contains the old state. The state values that may be in the value.ul2 field are as follows:
<UL>
<LI>2 = Degraded
<LI>3 = Failed
<LI>4 = Not present
<LI>5 = Single Port on Fibre
</UL>The enclosure number, bay number, and rack number where the Physical Disk Drive is located are contained in the attribute.value.u32[0], attribute.value.u32[1], attribute.value.u32[2] fields, respectively. The attribute.type field contains value 1. The rack number in the attribute.value.u32[2] field will not contain a valid value until a future release.
Event Code: 9 2 0 5
Severity: Normal -- informational in nature. The state of a Volume has changed. The identity of the affected Volume is contained in the handle field. If the attribute.type field contains the value 1:
<UL>
<LI>The add_handle field contains the identity of the Physical Disk Drive that is associated with that Volume.
<LI>The enclosure number, bay number, and rack number where the associated Physical Disk Drive is located are contained in the attribute.value.u32[0], attribute.value.u32[1], and attribute.value.u32[2] fields, respectively.
<LI>The internal identification of that Volume's Redundant Storage Set is contained in the attribute.value.u32[3] field.
</UL>Otherwise, the content of the add_handle, attribute.value.u32[0], attribute.value.u32[1], attribute.value.u32[2], and attribute.value.u32[3] fields is undefined. The value.ul1 field contains the new state. The value.ul2 field contains the old state. The state values that may be found in the value.ul1 and value.ul2 fields are as follows:
<UL>
<LI>1 = Normal - Volume is present and operating normally
<LI>2 = Migrating - Data from this volume is being moved to other storage in this Disk Group
<LI>3 = Missing - Volume is inaccessible
<LI>4 = Reconstructing - Volume is inaccessible; redundant data is being regenerated and moved to other storage in this Disk Group
<LI>5 = Completing - This previously inaccessible volume has become accessible; data migration is being completed
<LI>6 = Reverting - This previously inaccessible volume has become accessible; data is being regenerated
<LI>7 = Failed - Volume is not being used in the Disk Group; disk errors are preventing normal usage
</UL>
Event Code: 9 3 0 5
Severity: Normal -- informational in nature. The state of the internal Logical Disk associated with the Virtual Disk identified in the handle field has changed. The value.ul1 field contains the new state. The value.ul2 field contains the old state. The state values that may be found in the value.ul1 and value.ul2 fields are as follows:
<UL>
<LI>1 = Normal
<LI>2 = Replacement delay in progress
<LI>3 = Redundancy lost, restore in progress
<LI>4 = Redundancy lost, restore stalled
<LI>5 = Failed
<LI>6 = Creation in progress
<LI>7 = Snapshot is inoperative due to lack of snapshot space
<LI>8 = Deletion in progress
<LI>9 = Capacity change in progress
<LI>10 = Inoperative due to data lost
<LI>11 = Capacity reservation in progress
<LI>12 = Capacity unreservation in progress
</UL>
Event Code: 9 4 0 5
Severity: Normal -- informational in nature. The state of the HSV110 controller identified in the handle field has transitioned to the NORMAL state. The value.ul1 field contains the new state: 1 (NORMAL). The value.ul2 field contains the old state: 3 (FAILED).
Event Code: 9 5 0 5
Severity: Normal -- informational in nature. The state of a battery assembly within the HSV110 controller identified in the handle field has changed. The value.ul1 field contains the new state. The value.ul2 field contains the old state. The state values that may be found in the value.ul1 and value.ul2 fields are as follows:
<UL>
<LI>1 = Battery System Hold-up Time is greater than 96 hours
<LI>3 = Battery System Hold-up Time is greater than 0 and less than 96 hours
<LI>5 = Battery System Hold-up Time is zero hours
</UL>
Event Code: 9 6 bf 5
Severity: Undetermined -- more information needed to determine severity. A Volume has transitioned to the MISSING state. The affected Volume is identified in the handle field. If the attribute.type field contains the value 1:
<UL>
<LI>The add_handle field contains the identity of the Physical Disk Drive that is associated with that Volume.
<LI>The enclosure number, bay number, and rack number where the associated Physical Disk Drive is located are contained in the attribute.value.u32[0], attribute.value.u32[1], and attribute.value.u32[2] fields, respectively.
<LI>The internal identification of that Volume's Redundant Storage Set is contained in the attribute.value.u32[3] field.
</UL>Otherwise, the content of the add_handle, attribute.value.u32[0], attribute.value.u32[1], attribute.value.u32[2], and attribute.value.u32[3] fields is undefined. The value.ul1 field contains the new state. The value.ul2 field contains the old state. The state values that may be found in the value.ul1 and value.ul2 fields are as follows:
<UL>
<LI>1 = Normal - Volume is present and operating normally
<LI>2 = Migrating - Data from this volume is being moved to other storage in this Disk Group
<LI>4 = Reconstructing - Volume is inaccessible; redundant data is being regenerated and moved to other storage in this Disk Group
<LI>5 = Completing - This previously inaccessible volume has become accessible; data migration is being completed
<LI>6 = Reverting - This previously inaccessible volume has become accessible; data is being regenerated
<LI>7 = Failed - Volume is not being used in the Disk Group; disk errors are preventing normal usage
</UL>
Event Code: 9 7 0 5
Severity: Normal -- informational in nature. The state of the Fibre Channel port identified in the attribute.value.str field and located on the rear panel of the HSV110 controller identified in the handle field has transitioned to the NORMAL state. The attribute.type field contains the value 4. The value.ul1 field contains the new state: 1 (NORMAL). The value.ul2 field contains the old state: 2 (FAILED). <P> Note that the HSV110 controller's internal identity of the affected Fibre Channel port is contained in the secondary_id field.
Event Code: 9 8 b4 5
Severity: Warning -- not failed but attention recommended or required. The Occupancy Alarm Level threshold has been reached for the Disk Group identified in the handle field.
Event Code: 9 9 0 5
Severity: Normal -- informational in nature. The Resource Availability state of a Volume has transitioned to the SUFFICIENT state. The affected Volume is identified in the handle field. If the attribute.type field contains the value 1:
<UL>
<LI>The add_handle field contains the identity of the Physical Disk Drive that is associated with that Volume.
<LI>The enclosure number, bay number, and rack number where the associated Physical Disk Drive is located are contained in the attribute.value.u32[0], attribute.value.u32[1], and attribute.value.u32[2] fields, respectively.
<LI>The internal identification of that Volume's Redundant Storage Set is contained in the attribute.value.u32[3] field.
</UL>Otherwise, the content of the add_handle, attribute.value.u32[0], attribute.value.u32[1], attribute.value.u32[2], and attribute.value.u32[3] fields is undefined. The value.ul1 field contains the new state: 0 (SUFFICIENT). The value.ul2 field contains the old state: 1 (INSUFFICIENT).
Event Code: 9 a 0 5
Severity: Normal -- informational in nature. The Data Availability state of the internal Logical Disk associated with the Virtual Disk identified in the handle field has transitioned to the NORMAL state. The value.ul1 field contains the new state: 0 (NORMAL). The value.ul2 field contains the old state: 1 (DATA LOST).
Event Code: 9 c 0 5
Severity: Normal -- informational in nature. The Snapclone Logical Disk identified in the handle field has completed the unsharing operation. The secondary_id field contains the noid of the associated successor internal Logical Disk.
Event Code: 9 d 0 5
Severity: Normal -- informational in nature. The state of the Quorum Disk flag of a Volume has changed. The affected Volume is identified in the handle field. The value.ul1 field contains the new state of the Quorum Disk flag. The value.ul2 field contains the old state of the Quorum Disk flag. The state values that may be found in the value.ul1 and value.ul2 fields are as follows:
<UL>
<LI>0 = Not quorum disk
<LI>1 = Quorum disk
</UL>
Event Code: 9 e 36 5
Severity: Critical -- failure or failure imminent. The temperature trip point for a temperature sensor located within an HSV110 controller has been reached. The HSV110 controller is identified in the handle field. The value.ul1 field contains the current temperature reading from I2C sensor 1 in degrees celsius while the value.ul2 field contains the adjusted reading from I2C sensor 2. The set temperature trip point is contained in the secondary_id field.
Event Code: 9 f 2e 5
Severity: Warning -- not failed but attention recommended or required. The temperature within the HSV110 controller identified in the handle field is approaching its trip point. The value.ul1 field contains the current temperature reading from I2C sensor 1 in degrees celsius while the value.ul2 field contains the adjusted reading from I2C sensor 2. The secondary_id field contains the set temperature trip point in Celsius.
Event Code: 9 11 0 5
Severity: Normal -- informational in nature. The Blower Present flag for the "1" blower assembly located within the HSV110 controller identified in the handle field has transitioned from the NOT PRESENT to PRESENT state indicating that the blower has been reinstalled. The secondary_id field contains the "1" blower assembly internal identifier value: 1. The value.ul1 field contains the new state of the Blower Present flag: 1 (PRESENT). The value.ul2 field contains the old state of the Blower Present flag: 0 (NOT PRESENT).
Event Code: 9 12 24 5
Severity: Critical -- failure or failure imminent. The "1" blower located within the HSV110 controller identified in the handle field is running slower than the lowest acceptable speed. The secondary_id field contains the "1" blower assembly internal identifier value: 1. The value.ul1 field contains the current speed of the "1" blower. The value.ul2 field contains the lowest acceptable speed for the "1" blower.
Event Code: 9 13 20 5
Severity: Critical -- failure or failure imminent. One of the voltage sensors located within the HSV110 controller identified in the handle field has reported a voltage that is out of range. The value.ul1 field contains the out of range voltage value. The secondary_id field contains the specific voltage threshold value (i.e., 12V, 5V, 3.3V, 2.5V or 2V). Note that the voltages are expressed in millivolts--e.g.,12.5V is expressed as 12500. The add_data[0] field contains the size, in megabytes, of the HSV110 controller's DIMM memory.
Event Code: 9 14 bf 5
Severity: Undetermined -- more information needed to determine severity. The state of a Volume has transitioned to the FAILED state. The affected Volume is identified in the handle field. If the attribute.type field contains the value 1:
<UL>
<LI>The add_handle field contains the identity of the Physical Disk Drive that is associated with that Volume.
<LI>The enclosure number, bay number, and rack number where the associated Physical Disk Drive is located are contained in the attribute.value.u32[0], attribute.value.u32[1], and attribute.value.u32[2] fields, respectively.
<LI>The internal identification of that Volume's Redundant Storage Set is contained in the attribute.value.u32[3] field.
</UL>Otherwise, the content of the add_handle, attribute.value.u32[0], attribute.value.u32[1], attribute.value.u32[2], and attribute.value.u32[3] fields is undefined. The value.ul1 field contains the new state: 7 (FAILED). The value.ul2 field contains the old state. The state values that may be found in the value.ul2 fields are as follows:
<UL>
<LI>1 = Normal - Volume is present and operating normally
<LI>2 = Migrating - Data from this volume is being moved to other storage in this Disk Group
<LI>3 = Missing - Volume is inaccessible
<LI>4 = Reconstructing - Volume is inaccessible; redundant data is being regenerated and moved to other storage in this Disk Group
<LI>5 = Completing - This previously inaccessible volume has become accessible; data migration is being completed
<LI>6 = Reverting - This previously inaccessible volume has become accessible; data is being regenerated
</UL>
Event Code: 9 15 b9 5
Severity: Undetermined -- more information needed to determine severity. An HSV110 controller has failed. The state of the HSV110 controller identified in the handle field has transitioned to the FAILED state. The value.ul1 field contains the new state: 3 (FAILED). The value.ul2 field contains the old state: 1 (NORMAL).
Event Code: 9 16 0 5
Severity: Normal -- informational in nature. The temperature within the HSV110 controller identified in the handle field has returned to its normal operating range. The value.ul1 field contains the current temperature reading in celsius from I2C sensor 1, while the value.ul2 field contains the adjusted reading from I2C sensor 2.
Event Code: 9 17 28 5
Severity: Critical -- failure or failure imminent. An HSV110 controller's battery assembly has been removed. The Battery Present flag for battery assembly "1" located within the HSV110 controller identified in the handle field has changed from PRESENT to NOT PRESENT indicating that the battery assembly was removed. The secondary_id field contains the battery assembly "1" internal identifier value: 1. The value.ul1 field contains the new state of the Battery Present flag: 0 (NOT PRESENT). The value.ul2 field contains the old state of the Battery Present flag: 1 (PRESENT).
Event Code: 9 18 0 5
Severity: Normal -- informational in nature. The Battery In Use flag for battery assembly "1" located within the HSV110 controller identified in the handle field has transitioned from the NOT IN USE to IN USE state indicating that the battery assembly is functioning properly. The secondary_id field contains the battery assembly "1" internal identifier value: 1. The value.ul1 field contains the new state of the Battery In Use flag: 1 (IN USE). The value.ul2 field contains the old state of the Battery In Use flag: 0 (NOT IN USE).
Event Code: 9 19 0 5
Severity: Normal -- informational in nature. One of the voltage sensors located within the HSV110 controller identified in the handle field has reported a voltage that indicates that a voltage that was previously out of range has returned to the normal range. The value.ul1 field contains the normal range voltage value. The secondary_id field contains the voltage threshold value (i.e., 12V, 5V, 3.3V, 2.5V or 2V). Note that the voltages are expressed in thousands--e.g., 12.5V is expressed as 12500.
Event Code: 9 1a 20 5
Severity: Critical -- failure or failure imminent. The battery assembly voltage regulator located within the HSV110 controller identified in the handle field is offline. The add_data[0] field contains the size, in megabytes, of the HSV110 controller's DIMM memory.
Event Code: 9 1b 0 5
Severity: Normal -- informational in nature. The state of the Disk Group identified in the handle field has transitioned to the NORMAL state. The value.ul1 field contains the new Disk Group state: 1 (NORMAL). The value.ul2 field contains the old Disk Group state. The state values that may be found in the value.ul2 field are as follows:
<UL>
<LI>2 = Disk Group with no redundancy is inoperative
<LI>3 = Disk Group with parity redundancy is inoperative
<LI>4 = Disk Group with mirrored redundancy is inoperative
<LI>5 = Disk Group with no redundancy is inoperative, marked for re-use
<LI>6 = Disk Group with parity redundancy is inoperative, marked for re-use
<LI>7 = Disk Group with mirrored redundancy is inoperative, marked for re-use
</UL>
Event Code: 9 1c 0 5
Severity: Normal -- informational in nature. The Occupancy Alarm Level for the Disk Group identified in the handle field has returned to the normal range.
Event Code: 9 1d 22 5
Severity: Critical -- failure or failure imminent. An HSV110 controller's battery assembly has malfunctioned. The Battery In Use flag for battery assembly "1" located within the HSV110 controller identified in the handle field has transitioned from the IN USE to NOT IN USE state indicating that the battery assembly has malfunctioned. The secondary_id field contains the battery assembly "1" internal identifier value: 1. The value.ul1 field contains the new state of the Battery In Use flag: 0 (NOT IN USE). The value.ul2 field contains the old state of the Battery In Use flag: 1 (IN USE).
Event Code: 9 1e 0 5
Severity: Normal -- informational in nature. The Battery Present flag for battery assembly "1" located within the HSV110 controller identified in the handle field has changed from NOT PRESENT to PRESENT indicating that the battery assembly was reinstalled. The secondary_id field contains the battery assembly "1" internal identifier value: 1. The value.ul1 field contains the new state of the Battery Present flag: 1 (PRESENT). The value.ul2 field contains the old state of the Battery Present flag: 0 (NOT PRESENT).
Event Code: 9 1f 29 5
Severity: Critical -- failure or failure imminent. An HSV110 controller's battery assembly has been removed. The Battery Present flag for battery assembly "2" located within the HSV110 controller identified in the handle field has changed from PRESENT to NOT PRESENT indicating that the battery assembly was removed. The secondary_id field contains the battery assembly "2" internal identifier value: 2. The value.ul1 field contains the new state of the Battery Present flag: 0 (NOT PRESENT). The value.ul2 field contains the old state of the Battery Present flag: 1 (PRESENT).
Event Code: 9 20 0 5
Severity: Normal -- informational in nature. The Battery Present flag for battery assembly "2" located within the HSV110 controller identified in the handle field has changed from NOT PRESENT to PRESENT indicating that the battery assembly was reinstalled. The secondary_id field contains the battery assembly "2" internal identifier value: 2. The value.ul1 field contains the new state of the Battery Present flag: 1 (PRESENT). The value.ul2 field contains the old state of the Battery Present flag: 0 (NOT PRESENT).
Event Code: 9 21 0 5
Severity: Normal -- informational in nature. The Battery In Use flag for battery assembly "2" located within the HSV110 controller identified in the handle field has transitioned from the NOT IN USE to IN USE state indicating that the battery assembly is functioning properly. The secondary_id field contains the battery assembly "2" internal identifier value: 2. The value.ul1 field contains the new state of the Battery In Use flag: 1 (IN USE). The value.ul2 field contains the old state of the Battery In Use flag: 0 (NOT IN USE).
Event Code: 9 22 23 5
Severity: Critical -- failure or failure imminent. An HSV110 controller's battery assembly has malfunctioned. The Battery In Use flag for battery assembly "2" located within the HSV110 controller identified in the handle field has transitioned from the IN USE to NOT IN USE state indicating that the battery assembly has malfunctioned. The secondary_id field contains the battery assembly "2" internal identifier value: 2. The value.ul1 field contains the new state of the Battery In Use flag: 0 (NOT IN USE). The value.ul2 field contains the old state of the Battery In Use flag: 1 (IN USE).
Event Code: 9 23 2b 5
Severity: Critical -- failure or failure imminent. The Blower Present flag for the "2" blower assembly located within the HSV110 controller identified in the handle field has transitioned from the PRESENT to NOT PRESENT state indicating that the blower has been removed. The secondary_id field contains the "2" blower assembly internal identifier value: 2. The value.ul1 field contains the new state of the Blower Present flag: 0 (NOT PRESENT). The value.ul2 field contains the old state of the Blower Present flag: 1 (PRESENT).
Event Code: 9 24 0 5
Severity: Normal -- informational in nature. The Blower Present flag for the "2" blower assembly located within the HSV110 controller identified in the handle field has transitioned from the NOT PRESENT to PRESENT state indicating that the blower has been reinstalled. The secondary_id field contains the "2" blower assembly internal identifier value: 2. The value.ul1 field contains the new state of the Blower Present flag: 1 (PRESENT). The value.ul2 field contains the old state of the Blower Present flag: 0 (NOT PRESENT).
Event Code: 9 25 25 5
Severity: Critical -- failure or failure imminent. The "2" blower located within the HSV110 controller identified in the handle field is running slower than the lowest acceptable speed. The secondary_id field contains the "2" blower assembly internal identifier value: 2. The value.ul1 field contains the current speed of the "2" blower. The value.ul2 field contains the lowest acceptable speed for the "2" blower.
Event Code: 9 26 2c 5
Severity: Critical -- failure or failure imminent. An HSV110 controller's "1" blower/power supply assembly has been removed or AC power has been removed from the power supply. The HSV110 controller is identified in the handle field. The secondary_id field contains the "1" blower/power supply assembly internal identifier value: 1. The value.ul1 field contains the new state of the Blower/Power Supply Present flag: 0 (NOT PRESENT). The value.ul2 field contains the old state of the Blower/Power Supply Present flag: 1 (PRESENT).
Event Code: 9 27 0 5
Severity: Normal -- informational in nature. An HSV110 controller's "1" blower/power supply assembly has been reinstalled or AC power has been restored to the power supply. The HSV110 controller is identified in the handle field. The secondary_id field contains the "1" blower/power supply assembly internal identifier value: 1. The value.ul1 field contains the new state of the Blower/Power Supply Present flag: 1 (PRESENT). The value.ul2 field contains the old state of the Blower/Power Supply Present flag: 0 (NOT PRESENT).
Event Code: 9 28 2d 5
Severity: Critical -- failure or failure imminent. An HSV110 controller's "2" blower/power supply assembly has been removed or AC power has been removed from the power supply. The HSV110 controller is identified in the handle field. The secondary_id field contains the "2" blower/power supply assembly internal identifier value: 2. The value.ul1 field contains the new state of the Blower/Power Supply Present flag: 0 (NOT PRESENT). The value.ul2 field contains the old state of the Blower/Power Supply Present flag: 1 (PRESENT).
Event Code: 9 29 0 5
Severity: Normal -- informational in nature. An HSV110 controller's "2" blower/power supply assembly has been reinstalled or AC power has been restored to the power supply. The HSV110 controller is identified in the handle field. The secondary_id field contains the "2" blower/power supply assembly internal identifier value: 2. The value.ul1 field contains the new state of the Blower/Power Supply Present flag: 1 (PRESENT). The value.ul2 field contains the old state of the Blower/Power Supply Present flag: 0 (NOT PRESENT).
Event Code: 9 2a 26 5
Severity: Critical -- failure or failure imminent. The "1" blower/power supply located within the HSV110 controller identified in the handle field is running slower than the lowest acceptable speed. The secondary_id field contains the "1" blower/power supply assembly internal identifier value: 1. The value.ul1 field contains the current speed of the "1" blower/power supply. The value.ul2 field contains the lowest acceptable speed for the "1" blower/power supply.
Event Code: 9 2b 27 5
Severity: Critical -- failure or failure imminent. The "2" blower/power supply located within the HSV110 controller identified in the handle field is running slower than the lowest acceptable speed. The secondary_id field contains the "2" blower/power supply assembly internal identifier value: 2. The value.ul1 field contains the current speed of the "2" blower/power supply. The value.ul2 field contains the lowest acceptable speed for the "2" blower/power supply.
Event Code: 9 2c 2f 5
Severity: Warning -- not failed but attention recommended or required. The state of a battery assembly within the HSV110 controller identified in the handle field has transitioned to the Battery System Hold-up Time is zero hours state. The value.ul1 field contains the new state 5: (Battery System Hold-up Time is zero hours). The value.ul2 field contains the old state. The state values that may be found in the value.ul2 field are as follows:
<UL>
<LI>1 = Battery System Hold-up Time is greater than 96 hours
<LI>3 = Battery System Hold-up Time is greater than 0 and less than 96 hours
<LI>5 = Battery System Hold-up Time is zero hours
</UL>
Event Code: 9 2d bf 5
Severity: Undetermined -- more information needed to determine severity. The Resource Availability state of a Volume has transitioned to the INSUFFICIENT state. The affected Volume is identified in the handle field. If the attribute.type field contains the value 1:
<UL>
<LI>The add_handle field contains the identity of the Physical Disk Drive that is associated with that Volume.
<LI>The enclosure number, bay number, and rack number where the associated Physical Disk Drive is located are contained in the attribute.value.u32[0], attribute.value.u32[1], and attribute.value.u32[2] fields, respectively.
<LI>The internal identification of that Volume's Redundant Storage Set is contained in the attribute.value.u32[3] field.
</UL>Otherwise, the content of the add_handle, attribute.value.u32[0], attribute.value.u32[1], attribute.value.u32[2], and attribute.value.u32[3] fields is undefined. The value.ul1 field contains the new state: 1 (INSUFFICIENT). The value.ul2 field contains the old state: 0 (SUFFICIENT).
Event Code: 9 2e 0 5
Severity: Normal -- informational in nature. The HSV110 controller identified in the handle field rejected a login attempt. The value.ul1 field contains SCMI function code. The handle under attribute.value.obj is for World Wide Name of the host adapter that originated the rejected login attempt. The secondary_id field contains the reason for the rejection as follows:
<UL>
<LI>50 = The host is already logged in
<LI>101 = Maximum number of logins is exceeded
<LI>102 = Invalid cookie was sent
<LI>106 = The password is not set on the HSV110 controller
</UL>
Event Code: 9 2f 0 5
Severity: Normal -- informational in nature. The HSV110 controller identified in the handle field processed a Storage System Management Interface command with the result of non-success return code. The value.ul1 field contains internal the command type. The value.ul2 field contains the internal return code. The attribute.value.obj field contains the internal target and internal version of the command.
Event Code: 9 30 0 5
Severity: Normal -- informational in nature. The HSV110 controller identified in the handle field has updated the physical disk drive map for the loop pair identified in the secondary_id field. The value.ul1 field contains the new internal map generation number. The value.ul2 field contains the old internal map generation number.
Event Code: 9 31 42 5
Severity: Critical -- failure or failure imminent. The state of the Physical Disk Drive identified in the handle field has transitioned to the DEGRADED state. The value.ul1 field contains the new state: 2 (DEGRADED). The value.ul2 field contains the old state. The state values that may be in the value.ul2 field are as follows:
<UL>
<LI>1 = Normal
<LI>3 = Failed
<LI>4 = Not present
<LI>5 = Single Port on Fibre
</UL>The enclosure number, bay number, and rack number where the Physical Disk Drive is located are contained in the attribute.value.u32[0], attribute.value.u32[1], attribute.value.u32[2] fields, respectively. The attribute.type field contains value 1. The rack number in the attribute.value.u32[2] field will not contain a valid value until a future release.
Event Code: 9 32 40 5
Severity: Critical -- failure or failure imminent. The state of the Physical Disk Drive identified in the handle field has transitioned to the FAILED state. The value.ul1 field contains the new state: 3 (FAILED). The value.ul2 field contains the old state. The state values that may be in the value.ul2 field are as follows:
<UL>
<LI>1 = Normal
<LI>2 = Degraded
<LI>4 = Not present
<LI>5 = Single Port on Fibre
</UL>The enclosure number, bay number, and rack number where the Physical Disk Drive is located are contained in the attribute.value.u32[0], attribute.value.u32[1], attribute.value.u32[2] fields, respectively. The attribute.type field contains value 1. The rack number in the attribute.value.u32[2] field will not contain a valid value until a future release.
Event Code: 9 33 0 e
Severity: Normal -- informational in nature. The Derived Unit identified in the handle field was created. The add_handle field contains the identity of the Storage System Virtual Disk that is associated with that Derived Unit. The attribute.value.obj field contains the identity of the Virtual Disk associated with that Derived Unit.
Event Code: 9 34 0 e
Severity: Normal -- informational in nature. The internal Logical Disk associated with the Virtual Disk identified in the handle field was created. The add_handle field contains the identity of the Disk Group where this internal Logical Disk was created. The attribute.value.u64[0] field contains the size (in blocks) of the internal Logical Disk. The attribute.value.u32[2] field contains the redundancy type of the internal Logical Disk. The attribute.type field contains the value 5. The values that may be found in the attribute.value.u32[2] field are as follows:
<UL>
<LI>1 = Vraid0
<LI>2 = Vraid1
<LI>3 = Vraid5
</UL>
Event Code: 9 35 0 e
Severity: Normal -- informational in nature. The Disk Group identified in the handle field was created. The attribute.value.u32[0] field contains the number of physical disk drives within the Disk Group. The attribute.type field contains the value 1.
Event Code: 9 36 0 e
Severity: Normal -- informational in nature. The Physical Disk Drive identified in the handle field was discovered. The enclosure, bay and rack where the Physical Disk Drive is located are contained in the attribute.value.u32[0], attribute.value.u32[1] and attribute.value.u32[2] fields, respectively. The attribute.type field contains the value 1.
Event Code: 9 37 0 e
Severity: Normal -- informational in nature. The Presented Unit identified in the handle field was created. The add_handle field contains the identity of the Storage System Virtual Disk that is associated with the Presented Unit. This Presented Unit is associated with the Virtual Disk identified in the attribute.value.obj.handle field. The add_handle2 field contains the associated Storage System Host path, and add_data[0] and add_data[1] contains the host LUN number.
Event Code: 9 38 0 e
Severity: Normal -- informational in nature. The Storage System Host path identified in the handle field was created.
Event Code: 9 39 0 e
Severity: Normal -- informational in nature. The Storage System Virtual Disk identified in the handle field was created.
Event Code: 9 3a 0 e
Severity: Normal -- informational in nature. A Volume was created. The Volume is identified in the handle field. The add_handle field contains the identity of the Physical Disk Drive that is associated with that Volume. The enclosure number, bay number, and rack number where the associated Physical Disk Drive is located are contained in the attribute.value.u32[0], attribute.value.u32[1], and attribute.value.u32[2] fields, respectively. The attribute.value.u32[3] field contains the internal identification of that Volume's Redundant Storage Set. The attribute.type field contains the value of 1.
Event Code: 9 3b 0 e
Severity: Normal -- informational in nature. The Derived Unit identified in the handle field was deleted. The add_handle field contains the identity of the Storage System Virtual Disk that was associated with the Derived Unit. This Derived Unit is associated with the Virtual Disk identified in the attribute.value.obj.handle field.
Event Code: 9 3c 0 e
Severity: Normal -- informational in nature. The internal Logical Disk associated with the Virtual Disk identified in the handle field was deleted.
Event Code: 9 3d 0 e
Severity: Normal -- informational in nature. The Disk Group identified in the handle field was deleted.
Event Code: 9 3e 42 e
Severity: Critical -- failure or failure imminent. The Physical Disk Drive identified in the handle field has disappeared. The enclosure, bay and rack where the Physical Disk Drive is located are contained in the attribute.value.u32[0], attribute.value.u32[1] and attribute.value.u32[2] fields, respectively. The attribute.type field contains the value 1.
Event Code: 9 3f 0 e
Severity: Normal -- informational in nature. The Presented Unit identified in the handle field was deleted. The add_handle field contains the identity of the Storage System Virtual Disk that was associated with the Presented Unit. This Presented Unit is associated with the Virtual Disk identified in the attribute.value.obj.handle field.
Event Code: 9 40 0 e
Severity: Normal -- informational in nature. The Storage System Host path identified in the handle field was deleted.
Event Code: 9 41 0 e
Severity: Normal -- informational in nature. The Storage System Virtual Disk identified in the handle field was deleted. The Storage System Virtual Disk is associated with the Virtual Disk identified in the add_handle field.
Event Code: 9 43 0 e
Severity: Normal -- informational in nature. The HSV110 controller identified in the handle field has joined the Storage System. If the handle field is zero, the HSV110 controller identity could not be obtained due to an unexpected state transition.
Event Code: 9 44 ba e
Severity: Undetermined -- more information needed to determine severity. An HSV110 controller has left the Storage System. The HSV110 controller is identified in the handle field. If the handle field is zero, the HSV110 controller identity could not be obtained due to an unexpected state transition.
Event Code: 9 45 0 e
Severity: Normal -- informational in nature. A Storage System has been deleted by an HSV110 controller. The Storage System is identified in the handle field. The HSV110 controller is identified in the add_handle field. If the handle field or add_handle field is zero, the corresponding identity could not be obtained due to an unexpected state transition.
Event Code: 9 46 0 e
Severity: Normal -- informational in nature. The Data Replication Group identified in the handle field was created.
Event Code: 9 47 0 e
Severity: Normal -- informational in nature. The Data Replication Group identified in the handle field was deleted.
Event Code: 9 48 0 e
Severity: Normal -- informational in nature. The internal Logical Disk associated with the Snapshot Virtual Disk identified in the handle field was created. The add_handle field contains the identity of the Disk Group where this internal Logical Disk was created. The attribute.value.u64[0] field contains the size (in blocks) of the reserved capacity of the internal Logical Disk. The attribute.value.u32[2] field contains the redundancy type of the internal Logical Disk. The attribute.value.u32[3] field contains the noid of the associated successor internal Logical Disk. The attribute.type field contains the value 6. The values that may be found in the attribute.value.u32[2] field are as follows:
<UL>
<LI>1 = Vraid0
<LI>2 = Vraid1
<LI>3 = Vraid5
</UL>
Event Code: 9 49 0 e
Severity: Normal -- informational in nature. The internal Logical Disk associated with the Copy of the Virtual Disk identified in the handle field was created. The add_handle field contains the identity of the Disk Group where this internal Logical Disk was created. The attribute.value.u64[0] field contains the size (in blocks) of the reserved capacity of the target Virtual Disk. The attribute.value.u32[2] field contains the redundancy type of the internal Logical Disk. The attribute.value.u32[3] field contains the noid of the associated successor internal Logical Disk. The attribute.type field contains the value 6. The values that may be found in the attribute.value.u32[2] field are as follows:
<UL>
<LI>1 = Vraid0
<LI>2 = Vraid1
<LI>3 = Vraid5
</UL>
Event Code: 9 65 0 f
Severity: Normal -- informational in nature. The Host Operating System mode of the Storage System Host identified in the handle field has changed. The old_attr.type and new_attr.type fields contain the value 1. The old_attr.value.u32[0] field contains the old Host Operating System mode. The new_attr.value.u32[0] field contains the new Host Operating System mode. The values that may be found in the old_attr.value.u32[0] and new_attr.value.u32[0] fields are as follows:
<UL>
<LI>0 = Unknown
<LI>1 = User defined
<LI>2 = Unused
<LI>3 = WINNT with SecurePath
<LI>4 = VMS
<LI>5 = TRU64 UNIX
<LI>6 = Sun UNIX
<LI>7 = NetWare
<LI>8 = HP
<LI>9 = IBM
<LI>10 = LINUX
<LI>11 = SCO UNIX
</UL>
Event Code: 9 66 0 f
Severity: Normal -- informational in nature. Time was set on the Storage System identified in the handle field.
Event Code: 9 67 0 f
Severity: Normal -- informational in nature. The LUN of the Presented Unit identified in the handle field has changed. The old_attr.type field and the new_attr.type fields contain the value 1. The old_attr.value.u32[0..1] fields contain the value of the old LUN. The new_attr.value.u32[0..1] fields contain the value of the new LUN. The secondary_id field contains the noid portion of the handle for the Storage System Virtual Disk associated with the Presented Unit. This Presented Unit is associated with the Virtual Disk identified in the add_handle field.
Event Code: 9 68 0 f
Severity: Normal -- informational in nature. The Device Addition Policy of the Storage System identified in the handle field has changed. The old_attr.type field and the new_attr.type fields contain the value 1. The old_attr.value.u32[0] field contains the old Device Addition Policy. The new_attr.value.u32[0] field contains the new Device Addition Policy. The policy values that may be found in the old_attr.value.u32[0] and new_attr.value.u32[0] fields are as follows:
<UL>
<LI>1 = Manual policy
<LI>2 = Automatic policy
</UL>
Event Code: 9 69 0 f
Severity: Normal -- informational in nature. The Quiescent state of the Storage System Virtual Disk identified in the handle field has changed. The old_attr.type field and the new_attr.type fields contain the value 1. The old_attr.value.u32[0] field contains the old Quiescent state. The new_attr.value.u32[0] field contains the new Quiescent state. The state values that may be found in the old_attr.value.u32[0] and new_attr.value.u32[0] fields are as follows:
<UL>
<LI>0 = Not quiescent
<LI>1 = Quiescent
</UL>This Storage System Virtual Disk is associated with the Virtual Disk identified in the add_handle field.
Event Code: 9 6a 0 f
Severity: Normal -- informational in nature. The Enabled/Disabled state of the Storage System Virtual Disk identified in the handle field has changed. The old_attr.type field and the new_attr.type fields contain the value 1. The old_attr.value.u32[0] field contains the old Enabled/Disabled state. The new_attr.value.u32[0] field contains the new Enabled/Disabled state. The state values that may be found in the old_attr.value.u32[0] and new_attr.value.u32[0] fields are as follows:
<UL>
<LI>1 = Disabled
<LI>2 = Enabled
</UL>This Storage System Virtual Disk is associated with the Virtual Disk identified in the add_handle field.
Event Code: 9 6b 0 f
Severity: Normal -- informational in nature. The Cache Policy of the Storage System Virtual Disk identified in the handle field has changed. <P> The old_attr.type field and the new_attr.type fields contain the value 1. The old_attr.value.u32[0] field contains the old Write Cache Policy. The new_attr.value.u32[0] field contains the new Write Cache Policy. The policy values that may be found in the old_attr.value.u32[0] and new_attr.value.u32[0] fields are as follows:
<UL>
<LI>1 = Writethrough
<LI>2 = Writeback
</UL><P> The old_attr.value.u32[1] field contains the old Read Cache Policy. The new_attr.value.u32[1] field contains the new Read Cache Policy. The policy values that may be found in the old_attr.value.u32[1] and new_attr.value.u32[1] fields are as follows:
<UL>
<LI>1 = Read cache on
<LI>2 = Read cache off
</UL><P> The old_attr.value.u32[2] field contains the old Cache Mirroring Policy. The new_attr.value.u32[2] field contains the new Cache Mirroring Policy. The policy values that may be found in the old_attr.value.u32[2] and new_attr.value.u32[2] fields are as follows:
<UL>
<LI>1 = Mirror
<LI>2 = No mirror
</UL>This Storage System Virtual Disk is associated with the Virtual Disk identified in the add_handle field.
Event Code: 9 6c 0 f
Severity: Normal -- informational in nature. The Usage state of a Volume changed. The affected Volume is identified in the handle field. The old_attr.value.u32[0] field contains the old Usage state. The new_attr.value.u32[0] field contains the new Usage state. The Usage state values that may be found in the old_attr.value.u32[0] and new_attr.value.u32[0] fields are as follows:
<UL>
<LI>1 = Disk Group
<LI>2 = Reserved
<LI>4 - 20 = temporary usage reserved for drive code load
</UL>This Volume is associated with the Disk Group identified in the add_handle field, if either the old Usage state or the new Usage state is 1. The secondary_id field contains the internal identification of that Volume's Redundant Storage Set.
Event Code: 9 6d 0 f
Severity: Normal -- informational in nature. The Disk Failure Protection Level of the Disk Group identified in the handle field has changed. The old_attr.type and new_attr.type fields contain the value 1. The old_attr.value.u32[0] field contains the old number of physical disk drives available for use. The new_attr.value.u32[0] field contains the new number of physical disk drives available for use.
Event Code: 9 6e 0 f
Severity: Normal -- informational in nature. The Write Protected state of the Derived Unit identified in the handle field has changed. This Derived Unit is associated with the Virtual Disk identified in the add_handle field. The secondary_id field contains the noid portion of the handle for the Storage System Virtual Disk associated with the Derived Unit. The old_attr.type field and the new_attr.type fields contain the value 1. The old_attr.value.u32[0] field contains the old Write Protected state. The new_attr.value.u32[0] field contains the new Write Protected state. The Write Protected state values that may be found in the old_attr.value.u32[0] and new_attr.value.u32[0] fields are as follows:
<UL>
<LI>0 = Write protect off
<LI>1 = Write protect on
</UL>This Derived Unit is associated with the Virtual Disk identified in the add_handle field.
Event Code: 9 70 46 f
Severity: Warning -- not failed but attention recommended or required. The Physical Disk Drive identified in the handle field has experienced numerous communication failures on a particular Fibre Channel port identified in the new_attr.value.str field. The old_attr.value.u32[0] field contains the internal port ID. The enclosure number, bay number, and rack number where the Physical Disk Drive is located are contained in the old_attr.value.u32[1], old_attr.value.u32[2], old_attr.value.u32[3] fields, respectively. The old_attr.type field contains value 1. The new_attr.value.str field contains the cerp_id of the Fibre Channel port. The new_attr.type field contains value 4.
Event Code: 9 71 0 f
Severity: Normal -- informational in nature. The HSV110 controller identified in the handle field received a request to shutdown. <P> The old_attr.type field and field contain the value 1. The old_attr.value.u32[0] field indicates the type of restart that was requested as follows:
<UL>
<LI>0 = None -- no restart
<LI>1 = Regular -- full restart, host system connectivity is lost until the controller returns to normal operation
<LI>2 = Fast -- resynchronization, restart of the controller in a manner that has little or no impact on host system connectivity
</UL><P> The old_attr.value.u32[1] field indicates whether the other HSV110 controller of the pair was requested to remain operational or to also shutdown as follows:
<UL>
<LI>0 = Remain operational
<LI>1 = Coupled shutdown
</UL><P> The old_attr.value.u32[2] field indicates whether the HSV110 controller was requested to remain in the power on state or power itself off as follows:
<UL>
<LI>0 = Remain in the power on state
<LI>1 = Power itself off
</UL><P> The old_attr.value.u32[3] field value indicates whether the Physical Disk Drive enclosure(s) was requested to remain in the power on state or to be powered off as follows:
<UL>
<LI>0 = Remain in the power on state
<LI>1 = Powered off
</UL><P> The old_attr.value.u32[4] field value indicates whether the battery assemblies located within the HSV110 controller were requested to be enabled or disabled as follows:
<UL>
<LI>0 = Enabled
<LI>1 = Disabled
</UL><P> The old_attr.value.u32[5] field contains the number of seconds the shutdown operation was requested to be delayed.
Event Code: 9 72 0 f
Severity: Normal -- informational in nature. The HSV110 controller identified in the handle field has completed its shutdown preparations. <P> The old_attr.type field contain the value 1. The old_attr.value.u32[0] field value indicates the result of the HSV110 controller Cache Memory shutdown operation as follows:
<UL>
<LI>1 = Success
<LI>2 = Failure
<LI>3 = Not applicable
</UL><P> The old_attr.value.u32[1] field contains the internal Storage System Management Interface cache shutdown status code. <P> The old_attr.value.u32[2] field value indicates the result of the Physical Disk Drive enclosure(s) power off operation as follows:
<UL>
<LI>1 = Success
<LI>2 = Failure
<LI>3 = Not applicable
</UL><P> The old_attr.value.u32[3] field contains the internal Storage System Management Interface Physical Disk Drive enclosure(s) power off status code. <P> The old_attr.value.u32[4] field value indicates the result of the battery assemblies disable operation as follows:
<UL>
<LI>1 = Success
<LI>2 = Failure
<LI>3 = Not applicable
</UL><P> The old_attr.value.u32[5] field value indicates the battery assemblies disable operation failure mode as follows:
<UL>
<LI>0 = No failure indicated.
<LI>1 = Failed only on the HSV110 controller identified in the handle field.
<LI>2 = Failed only on the other HSV110 controller of the pair.
<LI>3 = Failed on both HSV110 controllers.
</UL>
Event Code: 9 73 0 f
Severity: Normal -- informational in nature. The Failsafe state of the Data Replication Group identified in the handle field has changed. The old_attr.value.u32[0] field contains the old Failsafe state. The new_attr.value.u32[0] field contains the new Failsafe state. The Failsafe state values that may be found in the old_attr.value.u32[0] and new_attr.value.u32[0] fields are as follows:
<UL>
<LI>1 = Failsafe Disabled
<LI>2 = Failsafe Enabled
</UL>
Event Code: 9 74 0 f
Severity: Normal -- informational in nature. The Mode of the Data Replication Group identified in the handle field has changed. The old_attr.value.u32[0] field contains the old Mode. The new_attr.value.u32[0] field contains the new Mode. The Mode values that may be found in the old_attr.value.u32[0] and new_attr.value.u32[0] fields are as follows:
<UL>
<LI>0 = Normal Active Source
<LI>1 = Normal Active Destination
<LI>2 = Active/Active (Master)
<LI>3 = Active/Active (Non-Master)
</UL>
Event Code: 9 75 0 f
Severity: Normal -- informational in nature. The Operational state of a Data Replication Group has changed to Synchronous or Asynchronous. The old_attr.value.u32[0] field contains the old Operation state. The new_attr.value.u32[0] field contains the new Operation state. The Operation state values that may be found in the old_attr.value.u32[0] and new_attr.value.u32[0] fields are as follows:
<UL>
<LI>1 = Synchronous
<LI>2 = Asynchronous
</UL>
Event Code: 9 76 0 f
Severity: Normal -- informational in nature. The Read Only attribute of the Data Replication Group identified in the handle field has changed. The old_attr.value.u32[0] field contains the old Read Only attribute. The new_attr.value.u32[0] field contains the new Read Only attribute. The Read Only attribute values that may be found in the old_attr.value.u32[0] and new_attr.value.u32[0] fields are as follows:
<UL>
<LI>0 = Data Replication Destination Storage System Virtual Disk disabled for read access.
<LI>1 = Data Replication Destination Storage System Virtual Disk enabled for read access.
</UL>
Event Code: 9 77 0 f
Severity: Normal -- informational in nature. A Data Replication Group failover has occurred. The handle field contains the identity of the Data Replication Group. The old_attr.value.u32[0] field contains the old Role. The new_attr.value.u32[0] field contains the new Role.
<UL>
<LI>0 = Normal Active Source
<LI>1 = Normal Active Destination
<LI>2 = Active/Active (Master)
<LI>3 = Active/Active (Non-Master)
</UL>
Event Code: 9 78 0 f
Severity: Normal -- informational in nature. A Data Replication Group has been suspended or resumed. The handle field contains the identity of the Data Replication Group. The old_attr.value.u32[0] field contains the old Suspend state. The new_attr.value.u32[0] field contains the new Suspend state. The Suspend state values that may be found in the old_attr.value.u32[0] and new_attr.value.u32[0] fields are as follows:
<UL>
<LI>1 = Connection between the Data Replication Source and Data Replication Destination is active.
<LI>2 = Connection between the Data Replication Source and Data Replication Destination is inactive.
</UL>
Event Code: 9 79 0 f
Severity: Normal -- informational in nature. A Storage System Virtual Disk was added to a Data Replication Group. The Storage System Virtual Disk is identified in the add_handle field. The Data Replication Group is identified in the handle field.
Event Code: 9 7a 0 f
Severity: Normal -- informational in nature. A Storage System Virtual Disk was removed from a Data Replication Group. The Storage System Virtual Disk is identified in the add_handle field. The Data Replication Group is identified in the handle field.
Event Code: 9 7b 0 f
Severity: Normal -- informational in nature. The flags of a physical disk drive have changed because of a maintenance mode change.
Event Code: 9 c8 51 5
Severity: Undetermined -- more information needed to determine severity. The Data Availability state of the internal Logical Disk associated with the Virtual Disk identified in the handle field has transitioned to the DATA LOST state. The value.ul1 field contains the new state: 1 (DATA LOST). The value.ul2 field contains the old state: 0 (NORMAL).
Event Code: 9 c9 51 5
Severity: Undetermined -- more information needed to determine severity. The state of the Disk Group identified in the handle field has transitioned to an INOPERATIVE state. The value.ul1 field contains the new Disk Group state. The value.ul2 field contains the old Disk Group state. The state values that may be found in the value.ul1 and value.ul2 fields are as follows:
<UL>
<LI>1 = Normal
<LI>2 = Disk Group with no redundancy is inoperative
<LI>3 = Disk Group with parity redundancy is inoperative
<LI>4 = Disk Group with mirrored redundancy is inoperative
<LI>5 = Disk Group with no redundancy is inoperative, marked for re-use
<LI>6 = Disk Group with parity redundancy is inoperative, marked for re-use
<LI>7 = Disk Group with mirrored redundancy is inoperative, marked for re-use
</UL>
Event Code: 9 ca 51 5
Severity: Undetermined -- more information needed to determine severity. The state of the internal Logical Disk associated with the Virtual Disk identified in the handle field has transitioned to the FAILED state. The value.ul1 field contains the new state: 5 (FAILED). The value.ul2 field contains the old state. The state values that may be found in the value.ul2 field are as follows:
<UL>
<LI>1 = Normal
<LI>2 = Replacement delay in progress
<LI>3 = Redundancy lost, restore in progress
<LI>4 = Redundancy lost, restore stalled
<LI>6 = Creation in progress
<LI>7 = Snapshot is inoperative due to lack of snapshot space
<LI>8 = Deletion in progress
<LI>9 = Capacity change in progress
<LI>10 = Inoperative due to data lost
<LI>11 = Capacity reservation in progress
<LI>12 = Capacity unreservation in progress
</UL>
Event Code: 9 cb 50 5
Severity: Critical -- failure or failure imminent. The state of the internal Logical Disk associated with the Virtual Disk identified in the handle field has transitioned to the SNAPSHOT OVERCOMMIT state. The value.ul1 field contains the new state: 7 (SNAPSHOT OVERCOMMIT). The value.ul2 field contains the old state. The state values that may be found in the value.ul2 field are as follows:
<UL>
<LI>1 = Normal
<LI>2 = Replacement delay in progress
<LI>3 = Redundancy lost, restore in progress
<LI>4 = Redundancy lost, restore stalled
<LI>5 = Failed
<LI>6 = Creation in progress
<LI>8 = Deletion in progress
<LI>9 = Capacity change in progress
<LI>10 = Inoperative due to device data lost
<LI>11 = Capacity reservation in progress
<LI>12 = Capacity unreservation in progress
</UL>
Event Code: 9 cc 51 5
Severity: Undetermined -- more information needed to determine severity. The state of the internal Logical Disk associated with the Virtual Disk identified in the handle field has transitioned to the DEVICE DATA LOST state. The value.ul1 field contains the new state: 10 (DEVICE DATA LOST). The value.ul2 field contains the old state. The state values that may be found in the value.ul2 field are as follows:
<UL>
<LI>1 = Normal
<LI>2 = Replacement delay in progress
<LI>3 = Redundancy lost restore, in progress
<LI>4 = Redundancy lost restore, stalled
<LI>5 = Failed
<LI>6 = Creation in progress
<LI>7 = Snapshot is inoperative due to lack of snapshot space
<LI>8 = Deletion in progress
<LI>9 = Capacity change in progress
<LI>11 = Capacity reservation in progress
<LI>12 = Capacity unreservation in progress
</UL>
Event Code: 9 cd c3 5
Severity: Undetermined -- more information needed to determine severity. The state of the Fibre Channel port identified in the attribute.value.str field and located on the rear panel of the HSV110 controller identified in the handle field has transitioned to the FAILED state. The attribute.type field contains the value 4. The value.ul1 field contains the new state: 2 (FAILED). The value.ul2 field contains the old state: 1 (NORMAL). <P> Note that the HSV110 controller's internal identity of the affected Fibre Channel port is contained in the secondary_id field. The add_data[0] field contains the size, in megabytes, of the HSV110 controller's DIMM memory.
Event Code: 9 ce 0 5
Severity: Normal -- informational in nature. The state of the Disk Group identified in the handle field has transitioned to an INOPERATIVE MARKED state. The value.ul1 field contains the new Disk Group state. The value.ul2 field contains the old Disk Group state. The state values that may be found in the value.ul1 and value.ul2 fields are as follows:
<UL>
<LI>1 = Normal
<LI>2 = Disk Group with no redundancy is inoperative
<LI>3 = Disk Group with parity redundancy is inoperative
<LI>4 = Disk Group with mirrored redundancy is inoperative
<LI>5 = Disk Group with no redundancy is inoperative, marked for re-use
<LI>6 = Disk Group with parity redundancy is inoperative, marked for re-use
<LI>7 = Disk Group with mirrored redundancy is inoperative, marked for re-use
</UL>
Event Code: 9 cf 41 5
Severity: Warning -- not failed but attention recommended or required. The state of the Physical Disk Drive identified in the handle field has transitioned to the NOT PRESENT state. The value.ul1 field contains the new state: 4 (NOT PRESENT). The value.ul2 field contains the old state. The state values that may be in the value.ul2 field are as follows:
<UL>
<LI>1 = Normal
<LI>2 = Degraded
<LI>3 = Failed
<LI>5 = Single Port on Fibre
</UL>The enclosure number, bay number, and rack number where the Physical Disk Drive is located are contained in the attribute.value.u32[0], attribute.value.u32[1], attribute.value.u32[2] fields, respectively. The attribute.type field contains value 1. The rack number in the attribute.value.u32[2] field will not contain a valid value until a future release.
Event Code: 9 d0 0 5
Severity: Normal -- informational in nature. The HSV110 controller identified in the handle field no longer needs attention.
Event Code: 9 d1 b9 5
Severity: Undetermined -- more information needed to determine severity. The HSV110 controller identified in the handle field needs attention.
Event Code: 9 d2 2a 5
Severity: Critical -- failure or failure imminent. The Blower Present flag for the "1" blower assembly located within the HSV110 controller identified in the handle field has transitioned from the PRESENT to NOT PRESENT state indicating that the blower has been removed. The secondary_id field contains the "1" blower assembly internal identifier value: 1. The value.ul1 field contains the new state of the Blower Present flag: 0 (NOT PRESENT). The value.ul2 field contains the old state of the Blower Present flag: 1 (PRESENT).
Event Code: 9 d3 51 5
Severity: Undetermined -- more information needed to determine severity. At least one Virtual Disk associated with the Data Replication Group identified in the handle field has transitioned to the INOPERATIVE state. The remaining Virtual Disks associated with this Data Replication Group have been forced INOPERATIVE. The value.ul1 field contains the new Data Replication Group member state: 2 (INOPERATIVE). The value.ul2 field contains the old Data Replication Group member state: 1 (OPERATIVE).
Event Code: 9 d4 0 5
Severity: Normal -- informational in nature. All the Virtual Disks associated with the Data Replication Group identified in the handle field have transitioned to the OPERATIVE state. The value.ul1 field contains the new Data Replication Group member state: 1 (OPERATIVE). The value.ul2 field contains the old Data Replication Group member state: 2 (INOPERATIVE).
Event Code: 9 d5 0 5
Severity: Normal -- informational in nature. The state of the Physical Disk Drive identified in the handle field has transitioned to the Single Port on Fibre state. The value.ul1 field contains the new state: 5 (SINGLE PORT ON FIBRE). The value.ul2 field contains the old state. The state values that may be in the value.ul2 field are as follows:
<UL>
<LI>1 = Normal
<LI>2 = Degraded
<LI>3 = Failed
<LI>4 = Not Present
</UL>The enclosure number, bay number, and rack number where the Physical Disk Drive is located are contained in the attribute.value.u32[0], attribute.value.u32[1], attribute.value.u32[2] fields, respectively. The attribute.type field contains value 1. The rack number in the attribute.value.u32[2] field will not contain a valid value until a future release.
Event Code: 9 d6 37 5
Severity: Warning -- not failed but attention recommended or required. An HSV110 controller has been powered off because the temperature sensors do not agree and the system temperature can not be accurately determined. The value.ul1 field contains the current temperature reported in celsius from I2C sensor 1, while the value.ul2 field contains the reading from I2C sensor 2.
Event Code: 9 d7 37 5
Severity: Warning -- not failed but attention recommended or required. An HSV110 controller has been powered off because the temperature sensors can not be accessed and the system temperature can not be accurately determined. The value.ul1 field contains the status from the attempted I2C access.
Event Code: 9 da 0 5
Severity: Normal -- informational in nature. An HSV110 controller's blower "1" is running at normal speed.
Event Code: 9 db 0 5
Severity: Normal -- informational in nature. An HSV110 controller's blower "2" is running at normal speed.
Event Code: b 0 0 10
Severity: Normal -- informational in nature. The HSV110 controller identified by the node_name field has begun a resynchronization operation (i.e., a restart of the controllers in a manner that has little or no impact on host system connectivity). The information.pc field contains the program counter of resynchronization operation initiator. The information.flags field contains reboot flags value. The information.code field contains the resynchronization operation event code value.
Event Code: b 1 b5 15
Severity: Warning -- not failed but attention recommended or required. A migrate method drive codeload has stalled due to insufficient space in the Disk Group. The tag1 field contains the identity of the Volume. The tag2 field contains the identity of the physical disk drive.
Event Code: b 2 0 4
Severity: Normal -- informational in nature. A Fibre Channel physical disk drive firmware version has been loaded into memory in preparation for codeload. The pid field contains the SCSI model number of the drive family, and rev contains the target revision. All other fields are not valid.
Event Code: b 3 0 4
Severity: Normal -- informational in nature. A Fibre Channel physical disk drive firmware version has been removed from memory. The pid field contains the SCSI model number of the drive family, and rev contains the target revision. All other fields are not valid.
Event Code: b 4 0 4
Severity: Normal -- informational in nature. A Fibre Channel physical disk drive firmware codeload begun. The identity of the physical disk drive is contained in the device field. The Fibre Channel port used to communicate with the physical disk drive is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number used to communicate with the physical disk drive is contained in the port field. The arbitrated loop physical address of the physical disk drive is contained in the al_pa field. The bypass_reason field is invalid. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num, al_pa and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The pid field contains the SCSI Inquiry Product Identification obtained from the physical disk drive. The rev field contains the current firmware revision obtained from the physical disk drive. The new_rev field contains the firmware revision being loaded. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: b 5 0 4
Severity: Normal -- informational in nature. A Fibre Channel physical disk drive firmware codeload has finished. The identity of the physical disk drive is contained in the device field. The location of the physical disk drive is determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num, dencl_num, and bay fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num, al_pa and bay fields is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num, dencl_num, and bay fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate. The identity contained in the device field should be used to confirm the last known location values.
</UL>Note that the content of the rack_num field will not be valid until a future release. The pid field contains the SCSI Inquiry Product Identification obtained from the physical disk drive. The rev field contains the current firmware revision obtained from the physical disk drive. The new_rev field contains the firmware revision being loaded. The enclosures array shows the drive enclosures available on the Fibre Channel port identified in the cerp_id field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: c 3 0 c
Severity: Normal -- informational in nature. The specified Data Replication Group has transitioned to the Merging state, because the alternate Storage System or Destination Virtual Disk is now accessible or resumed. The following fields are not valid: status, blocks, vda.
Event Code: c 4 5f c
Severity: Critical -- failure or failure imminent. A Data Replication Group has entered the Failsafe Locked state because the Data Replication Destination Site is inaccessible. The following fields are not valid: status, blocks, vda, port, cerp_id, side.
Event Code: c 5 60 c
Severity: Critical -- failure or failure imminent. A Data Replication Group has entered the Failsafe Locked state due to an inoperative source. The following fields are not valid: status, blocks, vda, port, cerp_id, side.
Event Code: c 6 60 c
Severity: Critical -- failure or failure imminent. A Full Copy was terminated prior to completion. An unrecoverable read error occurred on the specified Source Virtual Disk during the Full Copy.
Event Code: c 7 5f c
Severity: Critical -- failure or failure imminent. A Full Copy terminated prior to completion. A remote copy error occurred due to an inaccessible alternate Storage System. The Full Copy will continue when the Data Replication Destination is restored.
Event Code: c 8 61 c
Severity: Critical -- failure or failure imminent. A Full Copy terminated prior to completion. A remote copy error occurred due to an inaccessible Destination Virtual Disk. The Full Copy will continue when the Data Replication Destination is restored.
Event Code: c 9 62 c
Severity: Warning -- not failed but attention recommended or required. A Data Replication Log has been reset due to insufficient Disk Group capacity. The Data Replication Destination has been marked for a Full Copy. The following fields are not valid: status, blocks, vda, port, cerp_id, side.
Event Code: c a 0 c
Severity: Normal -- informational in nature. A Data Replication Log has been reset due to a Data Replication Group failover. The following fields are not valid: status, blocks, vda.
Event Code: c c 0 c
Severity: Normal -- informational in nature. A Destination Data Replication Group has successfully completed a Merge. The following fields are not valid: status, blocks, vda.
Event Code: c f 0 c
Severity: Normal -- informational in nature. A Data Replication Group is no longer in a Failsafe Locked state. The following fields are not valid: status, blocks, vda, port, cerp_id, side.
Event Code: c 10 0 c
Severity: Normal -- informational in nature. A Destination Data Replication Group has been marked for a Full Copy. The following fields are not valid: status, blocks, vda.
Event Code: c 11 0 c
Severity: Normal -- informational in nature. A Storage System has discovered that a Data Replication Group failover has taken place. This Virtual Disk is transitioning from a Data Replication Source role to a Data Replication Destination role. The following fields are not valid: status, blocks, vda.
Event Code: c 15 5f c
Severity: Critical -- failure or failure imminent. The Data Replication Path between this Site and the Alternate Site has closed, possibly due to a connection failure between the specified host port and the Alternate Site. The following fields are not valid: group_name_uuid, group_uuid, source_scvd_uuid, status, block, vda.
Event Code: c 16 0 16
Severity: Normal -- informational in nature. An HSV110 controller has sent a time report message to this HSV110 controller.
Event Code: c 17 63 c
Severity: Critical -- failure or failure imminent. The Data Replication Manager communications protocol version between the Data Replication Source <REFERNECE>(DRM_SITE) and a Data Replication Destination <REFERNECE>(DRM_SITE) is mismatched.
Event Code: c 18 64 c
Severity: Critical -- failure or failure imminent. Conditions on the Data Replication Destination Site are preventing acceptable replication throughput. Initiating temporary logging on the affected Data Replication Group that is failsafe mode disabled.
Event Code: c 1a 0 c
Severity: Normal -- informational in nature. The specified Destination Virtual Disk has successfully completed a Full Copy. The following fields are not valid: status, blocks, vda.
Event Code: c 1b 5f c
Severity: Critical -- failure or failure imminent. A Data Replication Group has transitioned to the Logging state because the alternate Storage System is not accessible.
Event Code: c 1c 61 c
Severity: Critical -- failure or failure imminent. The specified Source Data Replication Group has transitioned to the Logging state because the Destination Virtual Disk is not accessible. The following fields are not valid: status, blocks, vda, port, cerp_id, side.
Event Code: c 1d 0 c
Severity: Normal -- informational in nature. A software problem was found in the group log. A Full Copy of the affected Data Replication Group will be initiated.
Event Code: c 1e 5f c
Severity: Critical -- failure or failure imminent. The members of the specified Source Data Replication Group have not been presented to the host because the remote Storage System is not accessible. Suspend Source Data Replication Group to override this behavior, which will present the members.
Event Code: c 1f 0 c
Severity: Normal -- informational in nature. The members of the specified Source Data Replication Group have been presented to the host because the remote Storage System is now accessible, or source group is now suspended.
Event Code: c 20 65 c
Severity: Critical -- failure or failure imminent. Conditions on the Data Replication Destination Site are preventing replication processing. The specified Source Data Replication Group will remain in the Logging or the Failsafe Locked state until corrective action is performed.
Event Code: c 21 66 c
Severity: Critical -- failure or failure imminent. Conditions on the Data Replication Source Site are preventing replication processing. The specified Source Data Replication Group will remain in the Logging or the Failsafe Locked state until corrective action is performed.
Event Code: c 22 0 c
Severity: Normal -- informational in nature. The Data Replication Path between this Site and the Alternate Site has been opened.
Event Code: c 23 67 c
Severity: Warning -- not failed but attention recommended or required. Conditions on the inter site link are preventing acceptable replication throughput: Initiating temporary logging on the affected Data Replication Group that is failsafe mode disabled.
Event Code: c 56 0 c
Severity: Normal -- informational in nature. The DRM Forced Logging Timeout value has been changed.
Event Code: c 57 0 c
Severity: Normal -- informational in nature. The DRM Forced Logging Timeout value has been reset to the default value.
Event Code: d 0 1 11
Severity: Critical -- failure or failure imminent. An unrecognized event was reported by a Drive Enclosure Environmental Monitoring Unit. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. The event was reported by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The content of the alarm_error_code field could not be translated into a known event. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 1 40 11
Severity: Critical -- failure or failure imminent. A physical disk drive was detected that is not Fibre Channel compatible or cannot operate at the link rate established by the drive enclosure I/O modules. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. This problem was detected during spin up of the physical disk drive installed in the drive enclosure bay identified in the alarm_error_code.field.en field. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 2 41 11
Severity: Warning -- not failed but attention recommended or required. A physical disk drive is improperly installed or missing. This could affect the drive enclosure air flow and cause an over temperature condition. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The affected drive enclosure bay is identified in the alarm_error_code.field.en field. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 3 41 11
Severity: Warning -- not failed but attention recommended or required. A physical disk drive was removed while software-activated drive locking was enabled on a drive enclosure that does not support drive locking. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The affected drive enclosure bay is identified in the alarm_error_code.field.en field. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 4 42 11
Severity: Critical -- failure or failure imminent. A physical disk drive that is capable of operating at the loop link rate established by the drive enclosure I/O module was found to be running at a different rate. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The affected physical disk drive is installed in the drive enclosure bay identified in the alarm_error_code.field.en field. The Fibre Channel loop on which the problem was detected is identified by the content of the alarm_error_code.field.ec field as follows:
<UL>
<LI>4 = loop A
<LI>5 = loop B
</UL><P> The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 33 9 11
Severity: Warning -- not failed but attention recommended or required. The AC input to a drive enclosure power supply has been lost. Note that the remaining power supply has become a single point of failure. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The location of the affected power supply (1 or 2) is identified in the alarm_error_code.field.en field. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 34 80 11
Severity: Critical -- failure or failure imminent. A drive enclosure power supply is improperly installed or missing. This could affect the drive enclosure air flow and cause an over temperature condition. The operational power supply will automatically shut down after a short period of time, thereby disabling the drive enclosure. This condition remains active until either the problem is corrected, or the operational power supply shuts down, whichever occurs first. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The location of the affected power supply (1 or 2) is identified in the alarm_error_code.field.en field. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 35 9a 11
Severity: Critical -- failure or failure imminent. A drive enclosure power supply component has failed. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The location of the affected power supply (1 or 2) is identified in the alarm_error_code.field.en field. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 47 83 11
Severity: Critical -- failure or failure imminent. A drive enclosure blower is not operating properly. This could affect the drive enclosure air flow and cause an over temperature condition. A single blower operating at high speed can provide sufficient air flow to cool an enclosure and the elements for up to 100 hours. However, operating an enclosure at temperatures approaching an overheating threshold can damage elements and may reduce the mean time before failure of a specific element. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The location of the affected blower (1 or 2) is identified in the alarm_error_code.field.en field. The cause of the improper operation is described by the content of the alarm_error_code.field.ec field as follows:
<UL>
<LI>1 = The blower is operating at a speed that is outside of the Drive Enclosure Environmental Monitoring Unit specified range, possibly because of a bearing problem.
<LI>2 = The blower is operating at a speed that is significantly outside of the Drive Enclosure Environmental Monitoring Unit specified range, possibly because of a bearing problem.
<LI>3 = The blower has stopped. NOTE: The other blower (if operational) now operates at high speed and is a single point of failure. A single blower operating at high speed can provide sufficient air flow to cool an enclosure and the elements for up to 100 hours. However, operating an enclosure at temperatures approaching an overheating threshold can damage elements and may reduce the MTBF of a specific element. Hewlett-Packard therefore recommends immediate replacement of the defective blower.
<LI>4 = The power supply reported an internal blower error.
</UL><P> The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 4b 82 11
Severity: Critical -- failure or failure imminent. A drive enclosure blower is improperly installed or missing. This affects the drive enclosure air flow and can cause an over temperature condition. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The location of the affected blower (1 or 2) is identified in the alarm_error_code.field.en field. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 4c 84 11
Severity: Critical -- failure or failure imminent. Both drive enclosure blowers are missing. This severely affects the drive enclosure air flow and can cause an over temperature condition. The operational power supply(s) will automatically shut down after a short period of time, thereby disabling the drive enclosure. This condition remains active until either the problem is corrected, or the operational power supply(s) shut down, whichever occurs first. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. Note that this event is preceded by a "drive enclosure blower is improperly installed or missing" event that identifies the location of the first missing blower. The location of the second missing blower (1 or 2) is identified in the alarm_error_code.field.en field of this event. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 5b 86 11
Severity: Warning -- not failed but attention recommended or required. A drive enclosure temperature sensor out of range condition has been reported by one of the drive enclosure elements. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The location of the temperature sensor (1 through 11) is identified in the alarm_error_code.field.en field as follows:
<UL>
<LI>1 = Power Supply 1 Exhaust
<LI>2 = Power Supply 2 Exhaust
<LI>3 = Drive Enclosure Environmental Monitoring Unit
<LI>4 = Drive Bay 1
<LI>5 = Drive Bay 2
<LI>6 = Drive Bay 3
<LI>7 = Drive Bay 4
<LI>8 = Drive Bay 5
<LI>9 = Drive Bay 6
<LI>A = Drive Bay 7
<LI>B = Drive Bay 8
<LI>C = Drive Bay 9
<LI>D = Drive Bay 10
<LI>E = Drive Bay 11
<LI>F = Drive Bay 12
<LI>10 = Drive Bay 13
<LI>11 = Drive Bay 14
</UL><P> The temperature sensor out of range condition is described by the content of the alarm_error_code.field.ec field as follows:
<UL>
<LI>1 = The element temperature is approaching, but has not reached, the high temperature CRITICAL threshold. Continued operation under these conditions may result in a CRITICAL condition and may reduce an element's MTBF.
<LI>2 = The element temperature is above the high temperature CRITICAL threshold. Continued operation under these conditions may result in element failure.
<LI>3 = The element temperature is approaching, but has not reached, the low temperature CRITICAL threshold. Continued operation under these conditions may result in a CRITICAL condition and may reduce an element's MTBF.
<LI>4 = The element temperature has reached the low temperature CRITICAL threshold. Continued operation under these conditions may result in element failure.
</UL><P> The actual temperature threshold values can be found in the HSV element manager GUI. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 5f 87 11
Severity: Critical -- failure or failure imminent. The average temperature of two of the three temperature sensor groups (i.e., Drive Enclosure Environmental Monitoring Unit, Disk Drives, and Power Supplies) exceeds the CRITICAL level. The operational power supply(s) will automatically shut down after a short period of time, thereby disabling the drive enclosure. This condition remains active until either the problem is corrected, or the operational power supply(s) shut down, whichever occurs first. Refer to the HSV element manager GUI for the temperature threshold values. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. Note that in this case the content of the alarm_error_code.field.en field is undefined. <P> The actual temperature threshold values can be found in the HSV element manager GUI. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 6f 88 11
Severity: Warning -- not failed but attention recommended or required. An internal Drive Enclosure Environmental Monitoring Unit error has occurred. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The alarm_error_code.field.en field contains the value 1 signifying that the Drive Enclosure Environmental Monitoring Unit is the affected element. The cause of the improper operation is described by the content of the alarm_error_code.field.ec field as follows:
<UL>
<LI>1 = An internal Drive Enclosure Environmental Monitoring Unit clock error has occurred.
<LI>2 = The Inter-IC (I2C) bus is not processing data and the Drive Enclosure Environmental Monitoring Unit is unable to monitor or report the status of the elements or enclosures.
<LI>5 = A Backplane NVRAM error has occurred.
</UL><P> The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 71 0 11
Severity: Normal -- informational in nature. An internal Drive Enclosure Environmental Monitoring Unit error has occurred. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The alarm_error_code.field.en field contains the value 1 signifying that the Drive Enclosure Environmental Monitoring Unit is the affected element. The cause of the improper operation is described by the content of the alarm_error_code.field.ec field as follows:
<UL>
<LI>3 = A drive enclosure power supply was shut down.
<LI>16 = The Drive Enclosure Environmental Monitoring Unit ESI data has been corrupted.
</UL><P> The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 72 8a 11
Severity: Warning -- not failed but attention recommended or required. A Drive Enclosure Environmental Monitoring Unit is unable to collect data for the SCSI-3 Enclosure Services (SES) page. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The alarm_error_code.field.en field contains the value 1 signifying that the Drive Enclosure Environmental Monitoring Unit is the affected element. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 7e 8c 11
Severity: Warning -- not failed but attention recommended or required. Invalid data was read from a Drive Enclosure Environmental Monitoring Unit NVRAM. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The alarm_error_code.field.en field contains the value 1 signifying that the Drive Enclosure Environmental Monitoring Unit is the affected element. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 7f 8b 11
Severity: Warning -- not failed but attention recommended or required. An internal Drive Enclosure Environmental Monitoring Unit error has occurred. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The alarm_error_code.field.en field contains the value 1 signifying that the Drive Enclosure Environmental Monitoring Unit is the affected element. The cause of the improper operation is described by the content of the alarm_error_code.field.ec field as follows:
<UL>
<LI>11 = The Drive Enclosure Environmental Monitoring Unit cannot write data to the NVRAM.
<LI>12 = The Drive Enclosure Environmental Monitoring Unit cannot read data from the NVRAM.
<LI>13 = The Field Programmable Gate Array (FPGA) that controls the ESI bus failed to load information required for Drive Enclosure Environmental Monitoring Unit operation.
</UL><P> The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 82 8e 11
Severity: Warning -- not failed but attention recommended or required. A drive enclosure's address is incorrect or the enclosure has no address. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The alarm_error_code.field.en field contains the value 1 signifying that the Drive Enclosure Environmental Monitoring Unit is the affected element. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 83 89 11
Severity: Critical -- failure or failure imminent. A Drive Enclosure Environmental Monitoring Unit has experienced a hardware failure. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The alarm_error_code.field.en field contains the value 1 signifying that the Drive Enclosure Environmental Monitoring Unit is the affected element. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release. The cause of the improper operation is described by the content of the alarm_error_code.field.ec field as follows:
<UL>
<LI>15 = Drive Enclosure Environmental Monitoring Unit hardware failure DP.
<LI>18 = Drive Enclosure Environmental Monitoring Unit hardware failed BT.
<LI>19 = Drive Enclosure Environmental Monitoring Unit ESI driver failure.
</UL>
Event Code: d 85 8f 11
Severity: Warning -- not failed but attention recommended or required. A drive enclosure power supply failed to respond to a shut down command. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The alarm_error_code.field.en field contains the value 1 signifying that the Drive Enclosure Environmental Monitoring Unit is the affected element. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d 8d 90 11
Severity: Critical -- failure or failure imminent. A drive enclosure transceiver error has been detected. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The location of the transceiver (1 through 4) is identified in the alarm_error_code.field.en field as follows:
<UL>
<LI>1 = Transceiver 01
<LI>2 = Transceiver 02
<LI>3 = Transceiver 03
<LI>4 = Transceiver 04
</UL><P> The transceiver error condition is described by the content of the alarm_error_code.field.ec field as follows:
<UL>
<LI>1 = The transceivers on this link are not the same type or they are incompatible with the drive enclosure I/O module. This error prevents the controller from establishing a link with the enclosure drives and eliminates the enclosure dual-loop capability.
<LI>2 = The transceiver can no longer detect a data signal. This error prevents the controller from transferring data on a loop and eliminates the enclosure dual-loop capability.
<LI>3 = The system has detected an FC-AL bus fault involving a transceiver. This error prevents the controller from transferring data on a loop and eliminates the enclosure dual-loop capability.
<LI>4 = The transceiver that was previously in this location has been removed.
<LI>5 = The transceiver in the specified location has detected invalid Fibre Channel characters.
</UL><P> The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d a1 81 11
Severity: Critical -- failure or failure imminent. A drive enclosure power supply voltage sensor out of range condition has been reported. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The location of the voltage sensor (1 through 4) is identified in the alarm_error_code.field.en field as follows:
<UL>
<LI>1 = Power Supply 1 +5 VDC
<LI>2 = Power Supply 1 +12 VDC
<LI>3 = Power Supply 2 +5 VDC
<LI>4 = Power Supply 2 +12 VDC
</UL><P> The voltage sensor out of range condition is described by the content of the alarm_error_code.field.ec field as follows:
<UL>
<LI>1 = The element voltage is approaching, but has not reached, the high voltage CRITICAL threshold. Continued operation under these conditions may result in a CRITICAL condition.
<LI>2 = The element voltage is above the high voltage CRITICAL threshold.
<LI>3 = The element voltage is approaching, but has not reached, the low voltage CRITICAL threshold. Continued operation under these conditions may result in a CRITICAL condition.
<LI>4 = The element voltage has reached the low voltage CRITICAL threshold.
</UL><P> The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d b5 81 11
Severity: Critical -- failure or failure imminent. A drive enclosure power supply current sensor out of range condition has been reported. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The location of the current sensor (1 through 4) is identified in the alarm_error_code.field.en field as follows:
<UL>
<LI>1 = Power Supply 1 +5 VDC
<LI>2 = Power Supply 1 +12 VDC
<LI>3 = Power Supply 2 +5 VDC
<LI>4 = Power Supply 2 +12 VDC
</UL><P> The current sensor out of range condition is described by the content of the alarm_error_code.field.ec field as follows:
<UL>
<LI>1 = The element current is approaching, but has not reached, the high current CRITICAL threshold. Continued operation under these conditions may result in a CRITICAL condition.
<LI>2 = The element current is above the high current CRITICAL threshold.
</UL><P> The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d d8 92 11
Severity: Warning -- not failed but attention recommended or required. A drive enclosure backplane invalid NVRAM read error has occurred. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit.This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The alarm_error_code.field.en field contains the value 1 signifying that the drive enclosure is the affected element. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d d9 91 11
Severity: Critical -- failure or failure imminent. A drive enclosure backplane error has occurred. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The alarm_error_code.field.en field contains the value 1 signifying that the drive enclosure is the affected element. The cause of the improper operation is described by the content of the alarm_error_code.field.ec field as follows:
<UL>
<LI>11 = Unable to write data to the NVRAM. This problem prevents communication between elements in the enclosure.
<LI>12 = Unable to read data from the NVRAM. This problem prevents communication between elements in the enclosure.
<LI>13 = NVRAM has not been initialized properly. This is a manufacturing error.
</UL><P> The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d dd 93 11
Severity: Critical -- failure or failure imminent. A drive enclosure I/O module error has occurred. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The location of the I/O module (A (01) and B (02)) is identified in the alarm_error_code.field.en field. The cause of the improper operation is described by the content of the alarm_error_code.field.ec field as follows:
<UL>
<LI>1 = The I/O module's Fibre Channel link speed is not supported by the backplane. This error prevents the controller from establishing a link with enclosure drives and eliminates the enclosure dual-loop capability.
<LI>11 = Unable to write data to the I/O module NVRAM.
<LI>12 = Unable to read data from the I/O module NVRAM.
<LI>13 = The I/O module that was in this location has been removed.
</UL><P> The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d de 95 11
Severity: Warning -- not failed but attention recommended or required. A drive enclosure I/O module is unable to communicate with the Drive Enclosure Environmental Monitoring Unit. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit. This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The location of the I/O module (A (01) and B (02)) is identified in the alarm_error_code.field.en field. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d ec 94 11
Severity: Warning -- not failed but attention recommended or required. A drive enclosure I/O module invalid NVRAM read error has occurred. The handle field contains the WWN of the drive enclosure containing the Drive Enclosure Environmental Monitoring Unit.This problem was detected by the Drive Enclosure Environmental Monitoring Unit located in the drive enclosure determined by the content of the dencl_num field as follows:
<UL>
<LI>If dencl_num is less than 99, the location is as indicated by the content of the rack_num and dencl_num fields.
<LI>If dencl_num is equal to 99, the location is unknown. Note that the content of the rack_num field is undefined in this case.
<LI>If dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the rack_num and dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the rack_num field will not be valid until a future release. The location of the I/O module (A (01) or B (02)) is identified in the alarm_error_code.field.en field. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: d f0 0 11
Severity: Normal -- informational in nature. The status has changed on one or more of the drive enclosures. This informational event is generated for the HSV element manager GUI and contains no user information. The content of the handle, alarm_error_code field, dencl_num, and rack_num fields have no meaning for this event. The enclosures array shows the drive enclosures available on the Fibre Channel loop pair (0 = Loop A, 1 = Loop B) identified in the loop field. The location of an available drive enclosure is determined by the content of the enclosures.dencl_num field as follows:
<UL>
<LI>If enclosures.dencl_num is less than 99, the location is as indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields.
<LI>If enclosures.dencl_num is equal to 99, the enclosures array entry is not used. Note that the content of the enclosures.rack_num field is undefined in this case.
<LI>If enclosures.dencl_num is greater than 99, the HSV110 controller does not have proof of the current location but the last known location is indicated by the content of the enclosures.rack_num and enclosures.dencl_num fields. Subtract 100 from the content of those fields to determine the actual last known location. If there have been no configuration changes, the last known location values will be accurate.
</UL>Note that the content of the enclosures.rack_num field will not be valid until a future release.
Event Code: 42 0 0 8
Severity: Normal -- informational in nature. Indicated Host Fibre Channel port transitioned to link down.
Event Code: 42 1 0 8
Severity: Normal -- informational in nature. Indicated Host Fibre Channel port transitioned to link failed.
Event Code: 42 3 0 7
Severity: Normal -- informational in nature. An excessive number of link errors were detected on a HSV110 controller's Fibre Channel port. The identity of the affected Fibre Channel port is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number of the affected Fibre Channel port is contained in the port field. This is an informational event triggered by the occurrence of an excessive number of Tachyon chip link status errors detected within a particular link status error type. The number of occurrences of each link status error type is contained in a separate type-specific field (e.g., loss_of_signal, bad_rx_char, etc.). The HSV110 controller checks each of its Fibre Channel port's for excessive link status errors periodically.
Event Code: 42 4 4a 8
Severity: Warning -- not failed but attention recommended or required. A Fibre Channel port on the HSV110 controller has failed to respond. The identity of the affected Fibre Channel port is contained in the cerp_id field. The HSV110 controller internal Fibre Channel port number of the affected Fibre Channel port is contained in the port field. The peb array contains the port event block information. The peq_frz_prod_index field contains the index to the port event block in use when the Tachyon chip entered the frozen state. The peq_prod_index field contains the index to the next port event block. The peq_cons_index field contains the index to the next port event block to be acted upon.
Event Code: 42 5 0 8
Severity: Normal -- informational in nature. Indicated Host Fibre Channel port transitioned to link wedged.
Event Code: 42 6 0 1b
Severity: Normal -- informational in nature. Indicated Virtual Disk has transitioned to Stalled Too Long.
Event Code: 83 0 20 14
Severity: Critical -- failure or failure imminent. A failure was detected during the execution of this HSV110 controller's on-board diagnostics. The dimm_size field contains the size, in megabytes, of the HSV110 controller's DIMM memory.
Event Code: 83 1 30 14
Severity: Warning -- not failed but attention recommended or required. A GBIC SFF Serial ID Data check code failure was detected during the execution of this HSV110 controller's on-board diagnostics. The dimm_size field contains the size, in megabytes, of the HSV110 controller's DIMM memory.
Event Code: 83 2 22 14
Severity: Critical -- failure or failure imminent. A failure of battery assembly "1" was detected during the execution of this HSV110 controller's on-board diagnostics.
Event Code: 83 3 23 14
Severity: Critical -- failure or failure imminent. A failure of battery assembly "2" was detected during the execution of this HSV110 controller's on-board diagnostics.
Event Code: 83 4 31 14
Severity: Critical -- failure or failure imminent. A communication failure of battery assembly "1" was detected during the execution of this HSV110 controller's on-board diagnostics. The dimm_size field contains the size, in megabytes, of the HSV110 controller's DIMM memory.
Event Code: 83 5 32 14
Severity: Critical -- failure or failure imminent. A communication failure of battery assembly "2" was detected during the execution of this HSV110 controller's on-board diagnostics. The dimm_size field contains the size, in megabytes, of the HSV110 controller's DIMM memory.
Event Code: 83 6 33 14
Severity: Critical -- failure or failure imminent. A soft cache memory ECC error or indication of low battery voltage was detected during the execution of this HSV110 controller's on-board diagnostics. The dimm_size field contains the size, in megabytes, of the HSV110 controller's DIMM memory.
TERMINATION CODES:
Termination Code: 1 0 1 2
Severity: Critical -- failure or failure imminent. Unknown interrupt occurred.
<UL>
<LI>TP[0] contains the Clear Interrupt Mask value.
<LI>TP[1] contains the Interrupt Bit Number value.
</UL>
Termination Code: 1 1 1 1f
Severity: Critical -- failure or failure imminent. Unknown fault type reported by EXEC.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the FAIL_xxx/cfm value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 2 1 1f
Severity: Critical -- failure or failure imminent. DLQ entry not properly linked.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 3 1 1f
Severity: Critical -- failure or failure imminent. Timer not expired as expected.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 4 1 1f
Severity: Critical -- failure or failure imminent. Structure not a timer as expected.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 5 1 1f
Severity: Critical -- failure or failure imminent. DLQ entry doubly linked.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 6 1 1f
Severity: Critical -- failure or failure imminent. DLQ head not properly linked.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 7 1 1f
Severity: Critical -- failure or failure imminent. SQ entry doubly linked.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 8 1 1f
Severity: Critical -- failure or failure imminent. Structure not a BQUE as expected.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 9 1 1f
Severity: Critical -- failure or failure imminent. Structure not a SEM as expected.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 a 1 1f
Severity: Critical -- failure or failure imminent. Function not yet implemented.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 b 1 1f
Severity: Critical -- failure or failure imminent. ILF invocation not from SC.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 c 1 1f
Severity: Critical -- failure or failure imminent. Too many performance log instances.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 d 1 1f
Severity: Critical -- failure or failure imminent. Undefined performance log call.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 e 1 1f
Severity: Critical -- failure or failure imminent. Structure not AQUE as expected.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 f 1 1f
Severity: Critical -- failure or failure imminent. Waiter queue not empty as expected.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 10 1 1f
Severity: Critical -- failure or failure imminent. Structure not GATE as expected.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 11 1 1f
Severity: Critical -- failure or failure imminent. Receiver queue not empty as expected.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 12 1 1f
Severity: Critical -- failure or failure imminent. BQUE has unexpected items.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 13 1 1f
Severity: Critical -- failure or failure imminent. Structure not ASEM as expected.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 14 1 1f
Severity: Critical -- failure or failure imminent. Unknown system trap routine.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 15 1 1f
Severity: Critical -- failure or failure imminent. Active DMA list is empty.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 16 1 1f
Severity: Critical -- failure or failure imminent. CDB address not as expected.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 17 1 1f
Severity: Critical -- failure or failure imminent. Attempt to allocate a buffer that is already in use.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 18 1 1f
Severity: Critical -- failure or failure imminent. Attempt to free a buffer that is already free.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 19 1 1f
Severity: Critical -- failure or failure imminent. Interrupts unexpectedly disabled.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 1a 1 1f
Severity: Critical -- failure or failure imminent. Page zero corrupted.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 1b 1 1f
Severity: Critical -- failure or failure imminent. DCBZ not cache line aligned.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 1 1c 1 40
Severity: Critical -- failure or failure imminent. Console requested crash with dump (not coupled).
Termination Code: 1 1d 1 c0
Severity: Critical -- failure or failure imminent. Console requested crash with dump (coupled).
Termination Code: 1 1e 1 20
Severity: Critical -- failure or failure imminent. Console requested restart without dump (not coupled).
Termination Code: 1 1f 1 a0
Severity: Critical -- failure or failure imminent. Console requested restart without dump (coupled).
Termination Code: 1 20 1 20
Severity: Critical -- failure or failure imminent. Too many precision timers (GPTs) requested.
Termination Code: 1 21 1 20
Severity: Critical -- failure or failure imminent. Invalid precisions timer (GPT) state.
Termination Code: 1 40 1 0
Severity: Critical -- failure or failure imminent. Expiration queue not BQUE.
Termination Code: 1 5a 1 0
Severity: Critical -- failure or failure imminent. exc_do_preempt_high called with empty subprocess queue
Termination Code: 2 0 1 0
Severity: Critical -- failure or failure imminent. Initialization failed due to insufficient memory.
Termination Code: 2 1 1 0
Severity: Critical -- failure or failure imminent. CACHE$GET_DATA called with bad get data.
Termination Code: 2 2 1 0
Severity: Critical -- failure or failure imminent. Cannot allocate BQ.
Termination Code: 2 3 1 0
Severity: Critical -- failure or failure imminent. Duplicate dirty data found in Buffer Metadata Array.
Termination Code: 2 4 1 0
Severity: Critical -- failure or failure imminent. Invalid Primary Mirror Operation state.
Termination Code: 2 5 1 0
Severity: Critical -- failure or failure imminent. Invalid Unit Cache state.
Termination Code: 2 7 1 0
Severity: Critical -- failure or failure imminent. Mirror data structure inconsistency.
Termination Code: 2 8 1 0
Severity: Critical -- failure or failure imminent. Mirror UUID Changed.
Termination Code: 2 9 1 0
Severity: Critical -- failure or failure imminent. Invalid call to CACHE$LOCK_META.
Termination Code: 2 a 1 0
Severity: Critical -- failure or failure imminent. Cannot align parity and user data.
Termination Code: 2 b 1 0
Severity: Critical -- failure or failure imminent. Invalid Pullover Memory Operation state.
Termination Code: 2 c 1 0
Severity: Critical -- failure or failure imminent. Invalid Group Cache Operation state.
Termination Code: 2 d 1 0
Severity: Critical -- failure or failure imminent. Process NV Data NCA corrupted.
Termination Code: 2 e 1 0
Severity: Critical -- failure or failure imminent. Process NV Data Freeing Diag Buffer.
Termination Code: 2 f 1 0
Severity: Critical -- failure or failure imminent. Improper MWB Recovery data sent.
Termination Code: 2 10 1 0
Severity: Critical -- failure or failure imminent. Mnode & MFC NCAE Difference.
Termination Code: 2 11 1 0
Severity: Critical -- failure or failure imminent. Improper MWBF Recovery data sent.
Termination Code: 2 12 1 0
Severity: Critical -- failure or failure imminent. WRITE HOLE COLLISION IN RS_CRITICAL.c
Termination Code: 2 15 1 0
Severity: Critical -- failure or failure imminent. Unable to obtain free cache nodes.
Termination Code: 2 16 1 0
Severity: Critical -- failure or failure imminent. Unable to obtain free volatile cache buffers.
Termination Code: 3 1 1 4
Severity: Critical -- failure or failure imminent. Logic inconsistency detected; one HSV110 controller is suspect.
<UL>
<LI>TP[0] contains the PC of the termination call.
<LI>TP[1] contains first PC-specific parameter.
<LI>TP[2] contains second PC-specific parameter.
<LI>TP[3] contains third PC-specific parameter.
</UL>
Termination Code: 3 2 1 84
Severity: Critical -- failure or failure imminent. Logic inconsistency detected; both HSV110 controllers are suspect.
<UL>
<LI>TP[0] contains the PC of the termination call.
<LI>TP[1] contains first PC-specific parameter.
<LI>TP[2] contains second PC-specific parameter.
<LI>TP[3] contains third PC-specific parameter.
</UL>
Termination Code: 3 3 1 2
Severity: Critical -- failure or failure imminent. Invalid value in switch statement.
<UL>
<LI>TP[0] contains the PC of the termination call.
<LI>TP[1] contains the switch value.
</UL>
Termination Code: 3 4 1 2
Severity: Critical -- failure or failure imminent. Minimum number of quorum disks no longer accessible. Backend hardware failure, backend configuration problems, or HSV110 controller hardware failure are all possible causes.
<UL>
<LI>TP[0] contains the PC of the termination call.
<LI>TP[1] contains the QS block address where access failed.
</UL>
Termination Code: 3 5 1 a4
Severity: Critical -- failure or failure imminent. An error was encountered while attempting to recover a prior, unrelated error, making it impossible to recover either.
<UL>
<LI>TP[0] contains the PC of the termination call.
<LI>TP[1] contains first PC-specific parameter.
<LI>TP[2] contains second PC-specific parameter.
<LI>TP[3] contains third PC-specific parameter.
</UL>
Termination Code: 3 6 1 84
Severity: Critical -- failure or failure imminent. An error for which no recovery is possible occurred. Attempting subsystem reboot.
<UL>
<LI>TP[0] contains the PC of the termination call.
<LI>TP[1] contains first PC-specific parameter.
<LI>TP[2] contains second PC-specific parameter.
<LI>TP[3] contains third PC-specific parameter.
</UL>
Termination Code: 3 7 1 84
Severity: Critical -- failure or failure imminent. A situation for which code does not yet exist occurred. Attempting subsystem reboot.
<UL>
<LI>TP[0] contains the PC of the termination call.
<LI>TP[1] contains first PC-specific parameter.
<LI>TP[2] contains second PC-specific parameter.
<LI>TP[3] contains third PC-specific parameter.
</UL>
Termination Code: 3 a 1 2
Severity: Critical -- failure or failure imminent. Index out of bounds in scsscsdb_get_scsdb_ds call.
<UL>
<LI>TP[0] contains the area_offset value.
<LI>TP[1] contains the ds_index value.
</UL>
Termination Code: 3 b 1 1
Severity: Critical -- failure or failure imminent. Area offset unknown in scsscsdb_get_scsdb_ds call.
<UL>
<LI>TP[0] contains the area_offset value.
</UL>
Termination Code: 3 c 1 0
Severity: Critical -- failure or failure imminent. All SCSDB cache pages in use.
Termination Code: 3 d 1 1
Severity: Critical -- failure or failure imminent. scsscsdb_free_scsdb_page cache inconsistency.
<UL>
<LI>TP[0] contains the cache page index.
</UL>
Termination Code: 3 e 1 2
Severity: Critical -- failure or failure imminent. Caller believes cache page is dirty and in use, but cache does not.
<UL>
<LI>TP[0] contains the cache page index.
<LI>TP[1] contains the page offset value.
</UL>
Termination Code: 3 f 1 1
Severity: Critical -- failure or failure imminent. Call to commit SCSDB while cache page dirty or in use.
<UL>
<LI>TP[0] contains the cache page index.
</UL>
Termination Code: 3 10 1 2
Severity: Critical -- failure or failure imminent. Index out of bounds in scscvmdb_get_cvmdb_ds call.
<UL>
<LI>TP[0] contains the area_offset value.
<LI>TP[1] contains the ds_index value.
</UL>
Termination Code: 3 11 1 1
Severity: Critical -- failure or failure imminent. Area offset unknown in scscvmdb_get_cvmdb_ds call.
<UL>
<LI>TP[0] contains the area_offset value.
</UL>
Termination Code: 3 12 1 0
Severity: Critical -- failure or failure imminent. All CVMDB cache pages in use.
Termination Code: 3 13 1 1
Severity: Critical -- failure or failure imminent. scscvmdb_free_cvmdb_page cache inconsistency.
<UL>
<LI>TP[0] contains the cache page index.
</UL>
Termination Code: 3 14 1 2
Severity: Critical -- failure or failure imminent. Caller believes cache page is dirty and in use, but cache does not.
<UL>
<LI>TP[0] contains the cache page index.
<LI>TP[1] contains the page offset value.
</UL>
Termination Code: 3 15 1 1
Severity: Critical -- failure or failure imminent. Call to commit CVMDB while cache page dirty or in use.
<UL>
<LI>TP[0] contains the cache page index.
</UL>
Termination Code: 3 16 1 0
Severity: Critical -- failure or failure imminent. Unable to allocate login maps.
Termination Code: 3 1f 1 0
Severity: Critical -- failure or failure imminent. Unable to allocate tdsd pool.
Termination Code: 3 2a 0 20
Severity: Normal -- informational in nature. Both HSV110 controllers registered as Storage System Master. Reboot this HSV110 controller.
Termination Code: 3 3c 1 6
Severity: Critical -- failure or failure imminent. Invalid port login state in remote port object
<UL>
<LI>TP[0] contains the invocation instance number.
<LI>TP[1] contains the port login state.
<LI>TP[2] contains the local port.
<LI>TP[3] contains the port id value.
<LI>TP[4] contains the port name (low).
<LI>TP[5] contains the port name (high).
</UL>
Termination Code: 3 3d 1 5
Severity: Critical -- failure or failure imminent. Remote port logged_in timer expired in inappropriate login state.
<UL>
<LI>TP[0] contains the port login state.
<LI>TP[1] contains the local port.
<LI>TP[2] contains the port id value.
<LI>TP[3] contains the port name (low).
<LI>TP[4] contains port name (high).
</UL>
Termination Code: 3 50 0 20
Severity: Normal -- informational in nature. Crash forced by maintenance invoke CRASH or SCS_DEBUG command.
Termination Code: 3 51 1 41
Severity: Critical -- failure or failure imminent. Crash forced by other HSV110 controller.
<UL>
<LI>TP[0] contains the reason code for the kill.
</UL>
Termination Code: 3 52 1 40
Severity: Critical -- failure or failure imminent. This controller killed other controller and CPLD_CRASH_ALWAYS set.
Termination Code: 3 64 0 20
Severity: Normal -- informational in nature. This HSV110 controller was requested to terminate operation and then restart.
Termination Code: 3 65 0 60
Severity: Normal -- informational in nature. This HSV110 controller was requested to terminate operation and then not restart.
Termination Code: 3 66 0 60
Severity: Normal -- informational in nature. This HSV110 controller was requested to terminate operation and then power off.
Termination Code: 3 67 0 0
Severity: Normal -- informational in nature. This HSV110 controller was requested to terminate operation, perform a crash dump and then restart.
Termination Code: 3 68 0 40
Severity: Normal -- informational in nature. This HSV110 controller was requested to terminate operation, perform a crash dump and then not restart.
Termination Code: 3 69 0 80
Severity: Normal -- informational in nature. This HSV110 controller was requested to terminate operation, perform a crash dump and then restart. In addition, prior to doing so this HSV110 controller informs the other HSV110 controller to do likewise.
Termination Code: 3 6a 0 c0
Severity: Normal -- informational in nature. This HSV110 controller was requested to terminate operation, perform a crash dump and then not restart. In addition, prior to doing so this HSV110 controller informs the other HSV110 controller to do likewise.
Termination Code: 3 6b 0 1
Severity: Normal -- informational in nature. This controller was requested to terminate operation as a result of a unit having cache data that could not fail over.
<UL>
<LI>TP[0] contains the noid of the unit.
</UL>
Termination Code: 3 6d 0 20
Severity: Normal -- informational in nature. This HSV110 controller was requested to terminate operation and then restart to handle a difficult battery state.
Termination Code: 3 6e 0 20
Severity: Normal -- informational in nature. HSV110 controller restart was commanded at the LCD.
Termination Code: 3 78 1 21
Severity: Critical -- failure or failure imminent. Unable to realize the CVMDB or SCSDB during Storage System Master failover. Backend hardware failure, backend configuration problems, or HSV110 controller hardware failure are all possible causes.
<UL>
<LI>TP[0] contains the status of the realize that failed.
</UL>
Termination Code: 3 79 0 20
Severity: Normal -- informational in nature. This HSV110 controller is restarting in order to use a new version of firmware.
Termination Code: 4 0 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap (i.e., SIMM operand of twi instruction not a recognized FM$TRAP_TYPE_xxx variant or tw instruction executed).
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 1 1 1f
Severity: Critical -- failure or failure imminent. Machine Check Interrupt Vector Service Routine (MCIVSR) entered.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 2 1 1f
Severity: Critical -- failure or failure imminent. DEBUG statement executed.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 3 4 7f
Severity: Undetermined -- more information needed to determine severity. Termination event is recursive -- i.e., the Termination Event Information contained in multiple recent Termination Events array entries is identical and the terminations occurred within a short interval of time. A portion of the recursive event's termination event information is contained in this event's u.data.ltei.lter.termination_event.params array as follows:
<UL>
<LI>TP[0] contains the u.data.ltei.lter.termination_event.termination_location value.
<LI>TP[1] contains the u.data.ltei.lter.termination_event.u.code.value field value.
<LI>TP[2 through 30] contain the u.data.ltei.lter.termination_event.params.param[0 through 28] array values.
</UL>
Termination Code: 4 4 1 0
Severity: Critical -- failure or failure imminent. Insufficient memory available to allocate a data structure needed for Fault Manager operation.
Termination Code: 4 5 1 1
Severity: Critical -- failure or failure imminent. Out of range event data block index encountered in update_scelaba_entry.
<UL>
<LI>TP[0] contains the event data block index value.
</UL>
Termination Code: 4 6 1 7f
Severity: Critical -- failure or failure imminent. The EDC used to test the validity of the Last Termination Event area in nonvolatile memory was bad. Either the EDC was not updated due to premature termination of post-termination operations or the memory area was corrupted in an unexplained manner. A power supply internal failure could cause this termination. A portion of the termination event information belonging to the termination event that was being processed is contained in this event's u.data.ltei.lter.termination_event.params array as follows:
<UL>
<LI>TP[0] contains the u.data.ltei.lter.termination_event.termination_location value.
<LI>TP[1] contains the u.data.ltei.lter.termination_event.u.code.value field value.
<LI>TP[2 through 30] contain the u.data.ltei.lter.termination_event.params.param[0 through 28] array values.
</UL>Note: The in progress event information may not describe the event that caused the HSV110 controller to terminate operation depending on how far termination processing got before the event occurred.
Termination Code: 4 7 1 6a
Severity: Critical -- failure or failure imminent. An unexpected event array entry indicated that post-termination operations were terminated prematurely before or during the event report block load. The following information was obtained during the original entry to the termination event handler:
<UL>
<LI>TP[0] contains the Trap Type value.
<LI>TP[1] contains the Termination Code value. Note that the interpretation of this value varies depending on the Trap Type value (Reference: llisttcc).
<LI>TP[2] contains the SRR0 register value.
<LI>TP[3] contains the SRR1 register value.
<LI>TP[4] contains the CR register value.
<LI>TP[5] contains the XER register value.
<LI>TP[6] contains the CTR register value.
<LI>TP[7] contains the LR register value.
<LI>TP[8] contains the Exception Code value.
<LI>TP[9] contains the Exception Count value.
</UL>
Termination Code: 4 8 5 82
Severity: Undetermined -- more information needed to determine severity. A last gasp message was received from the other HSV110 controller with the coupled crash flag set. A portion of the termination event information belonging to the termination event that caused the other HSV110 controller to terminate operation is contained in this event's u.data.ltei.lter.termination_event.params array as follows:
<UL>
<LI>TP[0] contains the u.data.ltei.lter.termination_event.termination_location value.
<LI>TP[1] contains the u.data.ltei.lter.termination_event.u.code.value field value.
</UL>
Termination Code: 4 9 5 a2
Severity: Undetermined -- more information needed to determine severity. A last gasp message was received from the other HSV110 controller with the coupled crash flag set. A portion of the termination event information belonging to the termination event that caused the other HSV110 controller to terminate operation is contained in this event's u.data.ltei.lter.termination_event.params array as follows:
<UL>
<LI>TP[0] contains the u.data.ltei.lter.termination_event.termination_location value.
<LI>TP[1] contains the u.data.ltei.lter.termination_event.u.code.value field value.
</UL>
Termination Code: 4 a 5 c2
Severity: Undetermined -- more information needed to determine severity. A last gasp message was received from the other HSV110 controller with the coupled crash flag set. A portion of the termination event information belonging to the termination event that caused the other HSV110 controller to terminate operation is contained in this event's u.data.ltei.lter.termination_event.params array as follows:
<UL>
<LI>TP[0] contains the u.data.ltei.lter.termination_event.termination_location value.
<LI>TP[1] contains the u.data.ltei.lter.termination_event.u.code.value field value.
</UL>
Termination Code: 4 b 5 e2
Severity: Undetermined -- more information needed to determine severity. A last gasp message was received from the other HSV110 controller with the coupled crash flag set. A portion of the termination event information belonging to the termination event that caused the other HSV110 controller to terminate operation is contained in this event's u.data.ltei.lter.termination_event.params array as follows:
<UL>
<LI>TP[0] contains the u.data.ltei.lter.termination_event.termination_location value.
<LI>TP[1] contains the u.data.ltei.lter.termination_event.u.code.value field value.
</UL>
Termination Code: 4 c 5 82
Severity: Undetermined -- more information needed to determine severity. A last gasp message was received from the other HSV110 controller with the coupled crash flag set and an unrecognized Dump/Restart code. A portion of the termination event information belonging to the termination event that caused the other HSV110 controller to terminate operation is contained in this event's u.data.ltei.lter.termination_event.params array as follows:
<UL>
<LI>TP[0] contains the u.data.ltei.lter.termination_event.termination_location value.
<LI>TP[1] contains the u.data.ltei.lter.termination_event.u.code.value field value.
</UL>
Termination Code: 4 d 1 1
Severity: Critical -- failure or failure imminent. Unrecognized update_scelaba_entry operation code encountered.
<UL>
<LI>TP[0] contains the unrecognized value.
</UL>
Termination Code: 4 e 1 0
Severity: Critical -- failure or failure imminent. This HSV110 controller is not the Storage System Master when conditions dictate that it should be.
Termination Code: 4 f 1 0
Severity: Critical -- failure or failure imminent. This HSV110 controller is the Storage System Master when conditions dictate that it should not be.
Termination Code: 4 10 1 82
Severity: Critical -- failure or failure imminent. The Storage System Termination Event Log or Storage System Event Log is not active when conditions dictate that it should be.
<UL>
<LI>TP[0] contains the local control flags value.
<LI>TP[1] contains the master control flags value.
</UL>
Termination Code: 4 11 1 80
Severity: Critical -- failure or failure imminent. The Storage System Termination Event Log or Storage System Event Log is inaccessible.
Termination Code: 4 13 1 6
Severity: Critical -- failure or failure imminent. Structure type is not as expected.
<UL>
<LI>TP[0] contains the unexpected structure type value.
<LI>TP[1 through 5] contain the structure type values allowed.
</UL>
Termination Code: 4 14 1 4
Severity: Critical -- failure or failure imminent. Event Information Packet type is out of range.
<UL>
<LI>TP[0] contains the Event Code value.
<LI>TP[1] contains the Event Information Packet type value.
<LI>TP[2] contains the minimum Event Information Packet type value allowed.
<LI>TP[3] contains the maximum Event Information Packet type value allowed.
</UL>
Termination Code: 4 15 1 4
Severity: Critical -- failure or failure imminent. Event Information Packet size is too big.
<UL>
<LI>TP[0] contains the Event Code value.
<LI>TP[1] contains the Event Information Packet type value.
<LI>TP[2] contains the Event Information Packet size value.
<LI>TP[3] contains the maximum Event Information Packet size value allowed.
</UL>
Termination Code: 4 16 1 3
Severity: Critical -- failure or failure imminent. Event Information Packet size is not a longword multiple.
<UL>
<LI>TP[0] contains the Event Code value.
<LI>TP[1] contains the Event Information Packet type value.
<LI>TP[2] contains the Event Information Packet size value.
</UL>
Termination Code: 4 17 1 7
Severity: Critical -- failure or failure imminent. Invalid Storage System Termination Event Log or Storage System Event Log I/O request, No Data Mapped (Unallocated) or Object Is Unknown. This is the information returned by the Container Services software component in the I/O control block, unless otherwise noted:
<UL>
<LI>TP[0] contains the status value.
<LI>TP[1] contains the I/O operation value.
<LI>TP[2] contains the NOID value.
<LI>TP[3] contains the block address value.
<LI>TP[4] contains the number of blocks value.
<LI>TP[5] contains the buffer address supplied to Container Services (zero for erase request).
<LI>TP[6] contains the PC of the call to Container Services.
</UL>
Termination Code: 4 18 1 7
Severity: Critical -- failure or failure imminent. Unrecognized status returned following a Storage System Termination Event Log or Storage System Event Log I/O request. This is the information returned by the Container Services software component in the I/O control block, unless otherwise noted:
<UL>
<LI>TP[0] contains the status value.
<LI>TP[1] contains the I/O operation value.
<LI>TP[2] contains the NOID value.
<LI>TP[3] contains the block address value.
<LI>TP[4] contains the number of blocks value.
<LI>TP[5] contains the buffer address supplied to Container Services (zero for erase request).
<LI>TP[6] contains the PC of the call to Container Services.
</UL>
Termination Code: 4 19 1 0
Severity: Critical -- failure or failure imminent. restartdebug routine invoked without a termination having been performed.
Termination Code: 4 1a 1 0
Severity: Critical -- failure or failure imminent. The Fault Manager's active queue is unexpectedly empty.
Termination Code: 4 1d 1 0
Severity: Critical -- failure or failure imminent. Calling process is not the Storage System Management Interface as it should be.
Termination Code: 4 1e 1 2
Severity: Critical -- failure or failure imminent. Termination Event Information Store Packet content is not as expected.
<UL>
<LI>TP[0] contains the unexpected value.
<LI>TP[1] contains the expected value.
</UL>
Termination Code: 4 1f a 1f
Severity: Critical -- failure or failure imminent. Either a low memory access violation made by the HSV110 controller's software (e.g., access to memory address zero through an uninitialized pointer, etc.) or an uncorrectable memory error was detected.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the CR register value.
<LI>TP[4] contains the XER register value.
<LI>TP[5] contains the CTR register value.
<LI>TP[6] contains the LR register value.
<LI>TP[7] contains the Exception Code value.
<LI>TP[8] contains the Exception Count value.
<LI>TP[9 through 30] contain the R0 through R21 register values.
</UL>
Termination Code: 4 20 1 1f
Severity: Critical -- failure or failure imminent. The HSV110 controller inactivity watchdog timer expired.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 22 1 2
Severity: Critical -- failure or failure imminent. The Software Component ID specified in an Event Code is illegal.
<UL>
<LI>TP[0] contains the Event Code value.
<LI>TP[1] contains the illegal Software Component ID value.
</UL>
Termination Code: 4 24 9 60
Severity: Warning -- not failed but attention recommended or required. Power failed.
Termination Code: 4 25 20 14
Severity: Critical -- failure or failure imminent. PowerPC detected a data parity error.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
</UL>
Termination Code: 4 26 20 14
Severity: Critical -- failure or failure imminent. PowerPC detected an address parity error.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
</UL>
Termination Code: 4 27 39 14
Severity: Warning -- not failed but attention recommended or required. L2 Cache Parity error.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
</UL>
Termination Code: 4 28 20 14
Severity: Critical -- failure or failure imminent. Quasar detected a data parity error.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
</UL>
Termination Code: 4 29 20 14
Severity: Critical -- failure or failure imminent. Quasar detected an address parity error.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
</UL>
Termination Code: 4 2a 20 14
Severity: Critical -- failure or failure imminent. Quasar detected one of the following:
<UL>
<LI>Bad Transfer Type (TT) value,
<LI>Unaligned address for transfer size or invalid transfer size or invalid request to burst,
<LI>Unaligned or incorrect size request to the Device Configuration Register (DCR) bus, or
<LI>Timeout on a DCR access because of an invalid device offset.
</UL><P>
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
</UL>
Termination Code: 4 2b 1 13
Severity: Critical -- failure or failure imminent. The PowerPC attempted to access a nonexistent Quasar memory address.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the LR register value.
<LI>TP[3] contains the ACNS register value.
<LI>TP[4] contains the APNS register value.
<LI>TP[5] contains the ACFS register value.
<LI>TP[6] contains the APFS register value.
<LI>TP[7] contains the CTL register value.
<LI>TP[8] contains the PRIFOPT1 register value.
<LI>TP[9] contains the ERRDET1 register value.
<LI>TP[10] contains the ERREN1 register value.
<LI>TP[11] contains the ECCERR register value.
<LI>TP[12] contains the CPUERAT register value.
<LI>TP[13] contains the CPUERAD register value.
<LI>TP[14] contains the BESR register value.
<LI>TP[15] contains the BEAR register value.
<LI>TP[16] contains the SESR register value.
<LI>TP[17] contains the SEAR register value.
<LI>TP[18] contains the ERROR_STATUS register value.
</UL>
Termination Code: 4 2c 20 14
Severity: Critical -- failure or failure imminent. Policy memory ECC error.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
</UL>
Termination Code: 4 2d 20 14
Severity: Critical -- failure or failure imminent. PowerPC timeout.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
</UL>
Termination Code: 4 2e 20 1d
Severity: Critical -- failure or failure imminent. Quasar was the PCI target of an unsupported transfer type. Unsupported transfer types are:
<UL>
<LI>A burst read/write with a size of 1xxx,
<LI>An I/O or Configuration type access, or
<LI>A 16-word line read/write to/from DRAM.
</UL><P>
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
<LI>TP[20] contains the IS register value.
<LI>TP[21] contains the MCPE register value.
<LI>TP[22] contains the NPIS register value.
<LI>TP[23] contains the NPIE register value.
<LI>TP[24] contains the Quasar PCI_STATUS register value.
<LI>TP[25] contains the Surge Secondary PCI_STATUS register value.
<LI>TP[26] contains the Tachyon port 4 PCI_STATUS register value.
<LI>TP[27] contains the Tachyon port 5 PCI_STATUS register value.
<LI>TP[28] contains the Tachyon port 6 PCI_STATUS register value.
</UL>
Termination Code: 4 2f 1 1c
Severity: Critical -- failure or failure imminent. Near PCI nonexistent address.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the LR register value.
<LI>TP[3] contains the ACNS register value.
<LI>TP[4] contains the APNS register value.
<LI>TP[5] contains the ACFS register value.
<LI>TP[6] contains the APFS register value.
<LI>TP[7] contains the CTL register value.
<LI>TP[8] contains the PRIFOPT1 register value.
<LI>TP[9] contains the ERRDET1 register value.
<LI>TP[10] contains the ERREN1 register value.
<LI>TP[11] contains the ECCERR register value.
<LI>TP[12] contains the CPUERAT register value.
<LI>TP[13] contains the CPUERAD register value.
<LI>TP[14] contains the BESR register value.
<LI>TP[15] contains the BEAR register value.
<LI>TP[16] contains the SESR register value.
<LI>TP[17] contains the SEAR register value.
<LI>TP[18] contains the ERROR_STATUS register value.
<LI>TP[19] contains the IS register value.
<LI>TP[20] contains the MCPE register value.
<LI>TP[21] contains the NPIS register value.
<LI>TP[22] contains the NPIE register value.
<LI>TP[23] contains the Quasar PCI_STATUS register value.
<LI>TP[24] contains the Surge Secondary PCI_STATUS register value.
<LI>TP[25] contains the Tachyon port 4 PCI_STATUS register value.
<LI>TP[26] contains the Tachyon port 5 PCI_STATUS register value.
<LI>TP[27] contains the Tachyon port 6 PCI_STATUS register value.
</UL>
Termination Code: 4 30 20 1d
Severity: Critical -- failure or failure imminent. Near PCI parity error.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
<LI>TP[20] contains the IS register value.
<LI>TP[21] contains the MCPE register value.
<LI>TP[22] contains the NPIS register value.
<LI>TP[23] contains the NPIE register value.
<LI>TP[24] contains the Quasar PCI_STATUS register value.
<LI>TP[25] contains the Surge Secondary PCI_STATUS register value.
<LI>TP[26] contains the Tachyon port 4 PCI_STATUS register value.
<LI>TP[27] contains the Tachyon port 5 PCI_STATUS register value.
<LI>TP[28] contains the Tachyon port 6 PCI_STATUS register value.
</UL>
Termination Code: 4 31 20 1d
Severity: Critical -- failure or failure imminent. Near PCI timeout.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
<LI>TP[20] contains the IS register value.
<LI>TP[21] contains the MCPE register value.
<LI>TP[22] contains the NPIS register value.
<LI>TP[23] contains the NPIE register value.
<LI>TP[24] contains the Quasar PCI_STATUS register value.
<LI>TP[25] contains the Surge Secondary PCI_STATUS register value.
<LI>TP[26] contains the Tachyon port 4 PCI_STATUS register value.
<LI>TP[27] contains the Tachyon port 5 PCI_STATUS register value.
<LI>TP[28] contains the Tachyon port 6 PCI_STATUS register value.
</UL>
Termination Code: 4 32 20 1d
Severity: Critical -- failure or failure imminent. Near PCI bus protocol violation.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
<LI>TP[20] contains the IS register value.
<LI>TP[21] contains the MCPE register value.
<LI>TP[22] contains the NPIS register value.
<LI>TP[23] contains the NPIE register value.
<LI>TP[24] contains the Quasar PCI_STATUS register value.
<LI>TP[25] contains the Surge Secondary PCI_STATUS register value.
<LI>TP[26] contains the Tachyon port 4 PCI_STATUS register value.
<LI>TP[27] contains the Tachyon port 5 PCI_STATUS register value.
<LI>TP[28] contains the Tachyon port 6 PCI_STATUS register value.
</UL>
Termination Code: 4 33 20 1d
Severity: Critical -- failure or failure imminent. Near PCI system error.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
<LI>TP[20] contains the IS register value.
<LI>TP[21] contains the MCPE register value.
<LI>TP[22] contains the NPIS register value.
<LI>TP[23] contains the NPIE register value.
<LI>TP[24] contains the Quasar PCI_STATUS register value.
<LI>TP[25] contains the Surge Secondary PCI_STATUS register value.
<LI>TP[26] contains the Tachyon port 4 PCI_STATUS register value.
<LI>TP[27] contains the Tachyon port 5 PCI_STATUS register value.
<LI>TP[28] contains the Tachyon port 6 PCI_STATUS register value.
</UL>
Termination Code: 4 34 20 1d
Severity: Critical -- failure or failure imminent. Near PCI device signaled a target abort.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
<LI>TP[20] contains the IS register value.
<LI>TP[21] contains the MCPE register value.
<LI>TP[22] contains the NPIS register value.
<LI>TP[23] contains the NPIE register value.
<LI>TP[24] contains the Quasar PCI_STATUS register value.
<LI>TP[25] contains the Surge Secondary PCI_STATUS register value.
<LI>TP[26] contains the Tachyon port 4 PCI_STATUS register value.
<LI>TP[27] contains the Tachyon port 5 PCI_STATUS register value.
<LI>TP[28] contains the Tachyon port 6 PCI_STATUS register value.
</UL>
Termination Code: 4 35 20 1d
Severity: Critical -- failure or failure imminent. Near PCI device received a target abort.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
<LI>TP[20] contains the IS register value.
<LI>TP[21] contains the MCPE register value.
<LI>TP[22] contains the NPIS register value.
<LI>TP[23] contains the NPIE register value.
<LI>TP[24] contains the Quasar PCI_STATUS register value.
<LI>TP[25] contains the Surge Secondary PCI_STATUS register value.
<LI>TP[26] contains the Tachyon port 4 PCI_STATUS register value.
<LI>TP[27] contains the Tachyon port 5 PCI_STATUS register value.
<LI>TP[28] contains the Tachyon port 6 PCI_STATUS register value.
</UL>
Termination Code: 4 36 20 10
Severity: Critical -- failure or failure imminent. Cache memory ECC error.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the IOPISTAT register value.
<LI>TP[10] contains the IOPMASK register value.
<LI>TP[11] contains the DMA0_STATUS register value.
<LI>TP[12] contains the DMA1_STATUS register value.
<LI>TP[13] contains the ECC_STATUS register value.
<LI>TP[14] contains the ECC_AER_CS register value.
<LI>TP[15] contains the ECC_SP_CEC register value.
</UL>
Termination Code: 4 37 20 12
Severity: Critical -- failure or failure imminent. DMA engine halted.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the IOPISTAT register value.
<LI>TP[10] contains the IOPMASK register value.
<LI>TP[11] contains the DMA0_STATUS register value.
<LI>TP[12] contains the DMA1_STATUS register value.
<LI>TP[13] contains the ECC_STATUS register value.
<LI>TP[14] contains the ECC_AER_CS register value.
<LI>TP[15] contains the ECC_SP_CEC register value.
<LI>TP[16] contains DMA0's CDB pointer value.
<LI>TP[17] contains DMA1's CDB pointer value.
</UL>
Termination Code: 4 38 1 1c
Severity: Critical -- failure or failure imminent. Far PCI nonexistent address.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the LR register value.
<LI>TP[3] contains the ACNS register value.
<LI>TP[4] contains the APNS register value.
<LI>TP[5] contains the ACFS register value.
<LI>TP[6] contains the APFS register value.
<LI>TP[7] contains the CTL register value.
<LI>TP[8] contains the PRIFOPT1 register value.
<LI>TP[9] contains the ERRDET1 register value.
<LI>TP[10] contains the ERREN1 register value.
<LI>TP[11] contains the ECCERR register value.
<LI>TP[12] contains the CPUERAT register value.
<LI>TP[13] contains the CPUERAD register value.
<LI>TP[14] contains the BESR register value.
<LI>TP[15] contains the BEAR register value.
<LI>TP[16] contains the SESR register value.
<LI>TP[17] contains the SEAR register value.
<LI>TP[18] contains the ERROR_STATUS register value.
<LI>TP[19] contains the IS register value.
<LI>TP[20] contains the MCPE register value.
<LI>TP[21] contains the FPIS register value.
<LI>TP[22] contains the FPIE register value.
<LI>TP[23] contains the Surge Primary PCI_STATUS register value.
<LI>TP[24] contains the Tachyon port 0 PCI_STATUS register value.
<LI>TP[25] contains the Tachyon port 1 PCI_STATUS register value.
<LI>TP[26] contains the Tachyon port 2 PCI_STATUS register value.
<LI>TP[27] contains the Tachyon port 3 PCI_STATUS register value.
</UL>
Termination Code: 4 39 20 1d
Severity: Critical -- failure or failure imminent. Far PCI parity error.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
<LI>TP[20] contains the IS register value.
<LI>TP[21] contains the MCPE register value.
<LI>TP[22] contains the FPIS register value.
<LI>TP[23] contains the FPIE register value.
<LI>TP[24] contains the Surge Primary PCI_STATUS register value.
<LI>TP[25] contains the Tachyon port 0 PCI_STATUS register value.
<LI>TP[26] contains the Tachyon port 1 PCI_STATUS register value.
<LI>TP[27] contains the Tachyon port 2 PCI_STATUS register value.
<LI>TP[28] contains the Tachyon port 3 PCI_STATUS register value.
</UL>
Termination Code: 4 3a 20 1d
Severity: Critical -- failure or failure imminent. Far PCI timeout.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
<LI>TP[20] contains the IS register value.
<LI>TP[21] contains the MCPE register value.
<LI>TP[22] contains the FPIS register value.
<LI>TP[23] contains the FPIE register value.
<LI>TP[24] contains the Surge Primary PCI_STATUS register value.
<LI>TP[25] contains the Tachyon port 0 PCI_STATUS register value.
<LI>TP[26] contains the Tachyon port 1 PCI_STATUS register value.
<LI>TP[27] contains the Tachyon port 2 PCI_STATUS register value.
<LI>TP[28] contains the Tachyon port 3 PCI_STATUS register value.
</UL>
Termination Code: 4 3b 20 1d
Severity: Critical -- failure or failure imminent. Far PCI bus protocol violation.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
<LI>TP[20] contains the IS register value.
<LI>TP[21] contains the MCPE register value.
<LI>TP[22] contains the FPIS register value.
<LI>TP[23] contains the FPIE register value.
<LI>TP[24] contains the Surge Primary PCI_STATUS register value.
<LI>TP[25] contains the Tachyon port 0 PCI_STATUS register value.
<LI>TP[26] contains the Tachyon port 1 PCI_STATUS register value.
<LI>TP[27] contains the Tachyon port 2 PCI_STATUS register value.
<LI>TP[28] contains the Tachyon port 3 PCI_STATUS register value.
</UL>
Termination Code: 4 3c 20 1d
Severity: Critical -- failure or failure imminent. Far PCI system error.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
<LI>TP[20] contains the IS register value.
<LI>TP[21] contains the MCPE register value.
<LI>TP[22] contains the FPIS register value.
<LI>TP[23] contains the FPIE register value.
<LI>TP[24] contains the Surge Primary PCI_STATUS register value.
<LI>TP[25] contains the Tachyon port 0 PCI_STATUS register value.
<LI>TP[26] contains the Tachyon port 1 PCI_STATUS register value.
<LI>TP[27] contains the Tachyon port 2 PCI_STATUS register value.
<LI>TP[28] contains the Tachyon port 3 PCI_STATUS register value.
</UL>
Termination Code: 4 3d 20 1d
Severity: Critical -- failure or failure imminent. Far PCI device signaled a target abort.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
<LI>TP[20] contains the IS register value.
<LI>TP[21] contains the MCPE register value.
<LI>TP[22] contains the FPIS register value.
<LI>TP[23] contains the FPIE register value.
<LI>TP[24] contains the Surge Primary PCI_STATUS register value.
<LI>TP[25] contains the Tachyon port 0 PCI_STATUS register value.
<LI>TP[26] contains the Tachyon port 1 PCI_STATUS register value.
<LI>TP[27] contains the Tachyon port 2 PCI_STATUS register value.
<LI>TP[28] contains the Tachyon port 3 PCI_STATUS register value.
</UL>
Termination Code: 4 3e 20 1d
Severity: Critical -- failure or failure imminent. Far PCI device received a target abort.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the SRR0 register value.
<LI>TP[2] contains the SRR1 register value.
<LI>TP[3] contains the LR register value.
<LI>TP[4] contains the ACNS register value.
<LI>TP[5] contains the APNS register value.
<LI>TP[6] contains the ACFS register value.
<LI>TP[7] contains the APFS register value.
<LI>TP[8] contains the CTL register value.
<LI>TP[9] contains the PRIFOPT1 register value.
<LI>TP[10] contains the ERRDET1 register value.
<LI>TP[11] contains the ERREN1 register value.
<LI>TP[12] contains the ECCERR register value.
<LI>TP[13] contains the CPUERAT register value.
<LI>TP[14] contains the CPUERAD register value.
<LI>TP[15] contains the BESR register value.
<LI>TP[16] contains the BEAR register value.
<LI>TP[17] contains the SESR register value.
<LI>TP[18] contains the SEAR register value.
<LI>TP[19] contains the ERROR_STATUS register value.
<LI>TP[20] contains the IS register value.
<LI>TP[21] contains the MCPE register value.
<LI>TP[22] contains the FPIS register value.
<LI>TP[23] contains the FPIE register value.
<LI>TP[24] contains the Surge Primary PCI_STATUS register value.
<LI>TP[25] contains the Tachyon port 0 PCI_STATUS register value.
<LI>TP[26] contains the Tachyon port 1 PCI_STATUS register value.
<LI>TP[27] contains the Tachyon port 2 PCI_STATUS register value.
<LI>TP[28] contains the Tachyon port 3 PCI_STATUS register value.
</UL>
Termination Code: 4 3f 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector 0, Reserved exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 40 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector 100, System Reset exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 41 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector 200, Machine Check exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 42 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector 300, DSI exception (i.e., a data memory access cannot be performed).
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the DSISR value.
<LI>TP[7] contains the DAR value.
<LI>TP[8 through 29] contain the R0 through R21 register values.
<LI>TP[30] contains the DABR value.
</UL>
Termination Code: 4 43 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector 400, ISI exception (i.e., an attempt to fetch the next instruction to be executed failed).
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 44 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector 500, External Interrupt exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 45 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector 600, Alignment exception (i.e., a memory access cannot be performed because the address alignment or mode is incompatible for the instruction that was about to be executed).
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the DSISR value.
<LI>TP[7] contains the DAR value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 46 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector 700, Program exception (i.e., execution of an illegal or privileged instruction was attempted).
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 47 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector 800, Floating-Point Unavailable exception (i.e., an attempt was made to execute a floating-point instruction and the floating-point available bit in the MSR was cleared).
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 48 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector 900, Decrementer exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 49 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector A00, Reserved exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 4a 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector B00, Reserved exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 4b 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector C00, System Call exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 4c 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector D00, Trace exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 4d 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector E00, Floating-Point Assist exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 4e 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector F00, Reserved exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 4f 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector 1000, Instruction Translation Miss exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 50 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector 1100, Data Load Translation Miss exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 51 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector 1200, Data Store Translation Miss exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 52 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector 1300, Instruction Address Break exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 53 1 1f
Severity: Critical -- failure or failure imminent. Program Interrupt Vector Service Routine (PIVSR) entered with unhandled trap at Exception Vector 1400, System Management exception.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 4 54 1 1
Severity: Critical -- failure or failure imminent. Event data block count unexpected.
<UL>
<LI>TP[0] contains the event data block count value.
</UL>
Termination Code: 4 55 1 1
Severity: Critical -- failure or failure imminent. FM$RETRIEVE_EVENT_INFO returned unexpected status.
<UL>
<LI>TP[0] contains the unexpected status value.
</UL>
Termination Code: 4 56 1 2
Severity: Critical -- failure or failure imminent. FM$ACTIVEQ_READ_EVENT was unable to satisfy an active queue event request due to an internal inconsistency.
<UL>
<LI>TP[0] contains the sequence number of the event requested.
<LI>TP[1] contains the number of active queue events reported as valid for retrieval.
</UL>
Termination Code: 4 57 1 5
Severity: Critical -- failure or failure imminent. Direct call to FM$X_TERMINATE_NSC was made. FM$TERMINATE_NSC_USER or FM$TERMINATE_NSC_ISR must be used instead. The following information was obtained during entry to the termination event handler:
<UL>
<LI>TP[0] contains the PC of the direct call.
<LI>TP[1] contains the stack pointer value.
<LI>TP[2] contains the Trap Type parameter value.
<LI>TP[3] contains the Termination Code parameter value.
<LI>TP[4] contains the Save Area parameter value.
</UL>
Termination Code: 4 76 1 3f
Severity: Critical -- failure or failure imminent. The EDC used to test the validity of the Last Termination Event area in nonvolatile memory was bad; termination processing was completed. A portion of the termination event information belonging to the termination event that was processed is contained in this event's u.data.ltei.lter.termination_event.params array as follows:
<UL>
<LI>TP[0] contains the u.data.ltei.lter.termination_event.termination_location value.
<LI>TP[1] contains the u.data.ltei.lter.termination_event.u.code.value field value.
<LI>TP[2 through 30] contain the u.data.ltei.lter.termination_event.params.param[0 through 28] array values.
</UL>
Termination Code: 4 77 1 3f
Severity: Critical -- failure or failure imminent. The EDC used to test the validity of the Last Termination Event area in nonvolatile memory was bad; termination processing was initiated but not completed. A portion of the termination event information belonging to the termination event that was being processed is contained in this event's u.data.ltei.lter.termination_event.params array as follows:
<UL>
<LI>TP[0] contains the u.data.ltei.lter.termination_event.termination_location value.
<LI>TP[1] contains the u.data.ltei.lter.termination_event.u.code.value field value.
<LI>TP[2 through 30] contain the u.data.ltei.lter.termination_event.params.param[0 through 28] array values.
</UL>
Termination Code: 4 78 20 3f
Severity: Critical -- failure or failure imminent. The EDC used to test the validity of the Last Termination Event area in nonvolatile memory was bad; termination processing was not initiated, the HSV110 controller's PowerPC was spontaneously reset.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] through TP[2], reserved fields, contain the value zero.
<LI>TP[3 through 30] contain the previous termination event code values.
</UL>
Termination Code: 4 79 0 20
Severity: Normal -- informational in nature. The EDC used to test the validity of the Last Termination Event area in nonvolatile memory was bad; manufacturing full memory test was executed.
Termination Code: 4 7a 1 3f
Severity: Critical -- failure or failure imminent. The EDC used to test the validity of the Last Termination Event area in nonvolatile memory was bad; unexpected termination processing state. TP[0] contains the Termination processing state value. TP[1], a reserved field, contains the value zero. A portion of the termination event information belonging to the termination event that was being processed is contained in this event's u.data.ltei.lter.termination_event.params array as follows:
<UL>
<LI>TP[2] contains the u.data.ltei.lter.termination_event.termination_location value.
<LI>TP[3] contains the u.data.ltei.lter.termination_event.u.code.value field value.
<LI>TP[4 through 30] contain the u.data.ltei.lter.termination_event.params.param[0 through 26] array values.
</UL>
Termination Code: 4 7b 0 21
Severity: Normal -- informational in nature. The HSV110 controller have been requested to perform scrub(Uninitialize) operation by the user.
<UL>
<LI>TP[0] contains the local control flags value.
</UL>
Termination Code: 4 f6 1 3f
Severity: Critical -- failure or failure imminent. User termination test all parameters.
<UL>
<LI>TP[0 through 30] contain the numbers 30 through 0, respectively.
</UL>
Termination Code: 4 f7 0 0
Severity: Normal -- informational in nature. Console requested restart with dump (not coupled) via CTRL-Z.
Termination Code: 4 f9 1 7f
Severity: Critical -- failure or failure imminent. Poweroff test.
<UL>
<LI>TP[0 through 30] contain the numbers 30 through 0, respectively.
</UL>
Termination Code: 4 fa 1 0
Severity: Critical -- failure or failure imminent. User termination test no parameters.
Termination Code: 4 fb 1 1f
Severity: Critical -- failure or failure imminent. User termination test all parameters.
<UL>
<LI>TP[0 through 30] contain the numbers 30 through 0, respectively.
</UL>
Termination Code: 4 fc 1 0
Severity: Critical -- failure or failure imminent. ISR termination test no parameters.
Termination Code: 4 fd 1 1f
Severity: Critical -- failure or failure imminent. ISR termination test all parameters.
<UL>
<LI>TP[0 through 30] contain the numbers 30 through 0, respectively.
</UL>
Termination Code: 4 fe 1 0
Severity: Critical -- failure or failure imminent. Function not yet implemented.
Termination Code: 4 ff 1 1f
Severity: Critical -- failure or failure imminent. EXEC$BUGCHECK statement executed.
<UL>
<LI>TP[0] contains the SRR0 register value.
<LI>TP[1] contains the SRR1 register value.
<LI>TP[2] contains the CR register value.
<LI>TP[3] contains the XER register value.
<LI>TP[4] contains the CTR register value.
<LI>TP[5] contains the LR register value.
<LI>TP[6] contains the Exception Code value.
<LI>TP[7] contains the Exception Count value.
<LI>TP[8 through 30] contain the R0 through R22 register values.
</UL>
Termination Code: 6 4 1 0
Severity: Critical -- failure or failure imminent. Failed memory allocation for SFQ.
Termination Code: 6 15 1 0
Severity: Critical -- failure or failure imminent. Failed memory allocation for Fibre Channel Services Crash Dump structure.
Termination Code: 6 16 1 0
Severity: Critical -- failure or failure imminent. Failed memory allocation for MFC outbound buffer.
Termination Code: 6 17 1 0
Severity: Critical -- failure or failure imminent. Failed memory allocation for MFC inbound buffer.
Termination Code: 6 1c 1 0
Severity: Critical -- failure or failure imminent. Failed memory allocation for IBQ.
Termination Code: 6 1d 1 0
Severity: Critical -- failure or failure imminent. Failed memory allocation for MFC copy buffer.
Termination Code: 6 20 1 0
Severity: Critical -- failure or failure imminent. Invalid Completion Message type.
Termination Code: 6 23 1 0
Severity: Critical -- failure or failure imminent. Class 2 Failure for outbound sequence.
Termination Code: 6 24 1 1f
Severity: Critical -- failure or failure imminent. Host Programming error.
<UL>
<LI>TP[0] contains the FED's Callback.
<LI>TP[1] contains the FED's Byte Count.
<LI>TP[2] contains the SEST Byte Count.
<LI>TP[3] contains the SCSI Opcode.
<LI>TP[4] contains the SGL Loc (local vs external).
<LI>TP[5] contains the SGL Ptr.
<LI>TP[6] contains the SGL Byte Count.
<LI>TP[7 through 30] contain the additional SGL Ptr/BC pairs.
</UL>
Termination Code: 6 28 1 0
Severity: Critical -- failure or failure imminent. Invalid Port Event Type.
Termination Code: 6 29 1 0
Severity: Critical -- failure or failure imminent. Unknown FED type found.
Termination Code: 6 2a 1 0
Severity: Critical -- failure or failure imminent. Unknown FED found during Link Down cleanup.
Termination Code: 6 2b 1 0
Severity: Critical -- failure or failure imminent. Fail status returned for timer start.
Termination Code: 6 2c 1 0
Severity: Critical -- failure or failure imminent. Unexpected loop state.
Termination Code: 6 2e 1 0
Severity: Critical -- failure or failure imminent. SEST programming error.
Termination Code: 6 2f 1 0
Severity: Critical -- failure or failure imminent. SEST programming error.
Termination Code: 6 32 1 0
Severity: Critical -- failure or failure imminent. Port chip failed to go Offline.
Termination Code: 6 33 1 0
Severity: Critical -- failure or failure imminent. Out of Reserved FEDs.
Termination Code: 6 34 1 0
Severity: Critical -- failure or failure imminent. Unsupported ELS requested.
Termination Code: 6 36 1 0
Severity: Critical -- failure or failure imminent. Unsupported drive initialization sequence command.
Termination Code: 6 38 1 0
Severity: Critical -- failure or failure imminent. Unsupported TDS requested.
Termination Code: 6 3c 1 0
Severity: Critical -- failure or failure imminent. Command issued to an illegal LBA.
Termination Code: 6 41 1 0
Severity: Critical -- failure or failure imminent. Unknown SCSI status byte.
Termination Code: 6 46 1 0
Severity: Critical -- failure or failure imminent. Unsupported SES page for Receive Diagnostic Results.
Termination Code: 6 47 1 0
Severity: Critical -- failure or failure imminent. Unsupported SES String In subpage for Receive Diagnostic Results.
Termination Code: 7 0 1 0
Severity: Critical -- failure or failure imminent. Initialization failed due to insufficient memory.
Termination Code: 7 1 1 0
Severity: Critical -- failure or failure imminent. LMAP allocation failed.
Termination Code: 7 2 1 0
Severity: Critical -- failure or failure imminent. LMAP allocation failed.
Termination Code: 7 3 1 0
Severity: Critical -- failure or failure imminent. Invalid RAID type.
Termination Code: 7 7 1 0
Severity: Critical -- failure or failure imminent. Failed reading QS.
Termination Code: 7 a 1 0
Severity: Critical -- failure or failure imminent. RSD allocation failed.
Termination Code: 7 b 1 0
Severity: Critical -- failure or failure imminent. LDSB ref_count is off
Termination Code: 7 c 1 0
Severity: Critical -- failure or failure imminent. Invalid Object Class for I/O request.
Termination Code: 7 d 1 0
Severity: Critical -- failure or failure imminent. Invalid I/O range for given object.
Termination Code: 7 11 1 0
Severity: Critical -- failure or failure imminent. Invalid RAID type.
Termination Code: 7 13 1 0
Severity: Critical -- failure or failure imminent. Invalid RAID type.
Termination Code: 7 14 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - Zero process.
Termination Code: 7 15 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - Zero process.
Termination Code: 7 16 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - ODWORK process.
Termination Code: 7 17 1 0
Severity: Critical -- failure or failure imminent. Program buffer leak detected.
Termination Code: 7 18 1 0
Severity: Critical -- failure or failure imminent. Buffer pool leak detected.
Termination Code: 7 19 1 0
Severity: Critical -- failure or failure imminent. Code not yet implemented.
Termination Code: 7 1a 1 0
Severity: Critical -- failure or failure imminent. Wrong LDSB returned to waiting abort requester.
Termination Code: 7 1b 1 0
Severity: Critical -- failure or failure imminent. Wrong LDAD returned to waiting abort requester.
Termination Code: 7 1c 1 0
Severity: Critical -- failure or failure imminent. Bad map type for read merge.
Termination Code: 7 1d 1 0
Severity: Critical -- failure or failure imminent. Cache hit occurred while performing read merge.
Termination Code: 7 1e 1 0
Severity: Critical -- failure or failure imminent. PSAR indicates invalid usage.
Termination Code: 7 1f 1 0
Severity: Critical -- failure or failure imminent. Bad object class in Regen/Replace.
Termination Code: 7 20 1 0
Severity: Critical -- failure or failure imminent. No Free CMAPs.
Termination Code: 7 22 1 0
Severity: Critical -- failure or failure imminent. Invalid CS Drive Request.
Termination Code: 7 23 1 0
Severity: Critical -- failure or failure imminent. Invalid RStore type in PSAR.
Termination Code: 7 24 1 0
Severity: Critical -- failure or failure imminent. No Free CS Req items.
Termination Code: 7 26 1 0
Severity: Critical -- failure or failure imminent. Invalid Volnoid encountered.
Termination Code: 7 29 1 0
Severity: Critical -- failure or failure imminent. Multiple Metadata Transactions Detected.
Termination Code: 7 2a 1 0
Severity: Critical -- failure or failure imminent. I/O Failed in CS$RECOVER_TRANSACTIONS.
Termination Code: 7 2b 1 0
Severity: Critical -- failure or failure imminent. Invalid Transaction type.
Termination Code: 7 2d 1 0
Severity: Critical -- failure or failure imminent. No Transaction was found.
Termination Code: 7 2f 1 0
Severity: Critical -- failure or failure imminent. Member State not supported in zero_rsdm.
Termination Code: 7 34 1 0
Severity: Critical -- failure or failure imminent. Bad CS Req Object Class in handle CS Req.
Termination Code: 7 35 1 0
Severity: Critical -- failure or failure imminent. Invalid CS Req Operation in handle CS Req.
Termination Code: 7 37 1 0
Severity: Critical -- failure or failure imminent. Invalid Volnoid in Sparing Process.
Termination Code: 7 38 1 0
Severity: Critical -- failure or failure imminent. No XDs available for cs_req operation
Termination Code: 7 39 1 0
Severity: Critical -- failure or failure imminent. Invalid Raid Type in Regen/Reassign.
Termination Code: 7 3b 1 0
Severity: Critical -- failure or failure imminent. Unknown CS Transaction type for Journaling.
Termination Code: 7 3c 1 0
Severity: Critical -- failure or failure imminent. CS Journal Transaction inconsistency.
Termination Code: 7 3d 1 0
Severity: Critical -- failure or failure imminent. Invalid CS Transaction type for Journaling operation.
Termination Code: 7 3e 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - LD Leveling process.
Termination Code: 7 3f 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - RStore Sparing process.
Termination Code: 7 40 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - CS Req process.
Termination Code: 7 41 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - PLDMC process.
Termination Code: 7 42 1 0
Severity: Critical -- failure or failure imminent. No Free RLBs (RSD Lock Blocks).
Termination Code: 7 43 1 0
Severity: Critical -- failure or failure imminent. RLB List is inconsistent.
Termination Code: 7 44 1 0
Severity: Critical -- failure or failure imminent. RLB state is inconsistent.
Termination Code: 7 45 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - CS CSLD process.
Termination Code: 7 46 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - CS E-bit handler.
Termination Code: 7 48 1 0
Severity: Critical -- failure or failure imminent. Illegal QS I/O by Non Storage System Master.
Termination Code: 7 49 1 0
Severity: Critical -- failure or failure imminent. Illegal CSLD I/O by Non Storage System Master.
Termination Code: 7 4a 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - ACBW process.
Termination Code: 7 4b 1 0
Severity: Critical -- failure or failure imminent. Invalid ACBW Opcode.
Termination Code: 7 4c 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - Unsharing process.
Termination Code: 7 4f 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - RSS Migration process.
Termination Code: 7 50 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - RStore Migration process.
Termination Code: 7 51 1 0
Severity: Critical -- failure or failure imminent. Member State not supported.
Termination Code: 7 52 1 0
Severity: Critical -- failure or failure imminent. Metadata is inaccessible; an inoperative condition has occurred.
Termination Code: 7 53 1 0
Severity: Critical -- failure or failure imminent. An invalid structure was encountered on an ALB list.
Termination Code: 7 54 1 0
Severity: Critical -- failure or failure imminent. LMAP does not point to RStore, and RStore not being allocated.
Termination Code: 7 55 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - LD Allocation work process.
Termination Code: 7 57 1 0
Severity: Critical -- failure or failure imminent. Realize or realize_temp failed.
Termination Code: 7 58 1 0
Severity: Critical -- failure or failure imminent. Unrealize or unrealize_temp failed.
Termination Code: 7 59 1 0
Severity: Critical -- failure or failure imminent. Unit realized before initial allocation completed
Termination Code: 7 5b 1 0
Severity: Critical -- failure or failure imminent. An I/O that should NOT fail, did.
Termination Code: 7 5d 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - CS C-bit handler.
Termination Code: 7 5e 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - OD bg aloc process.
Termination Code: 7 5f 1 0
Severity: Critical -- failure or failure imminent. DUB and RSS do not agree with each other.
Termination Code: 7 60 1 0
Severity: Critical -- failure or failure imminent. Invalid LD type
Termination Code: 7 61 1 0
Severity: Critical -- failure or failure imminent. Invalid DIP State in LD
Termination Code: 7 62 1 0
Severity: Critical -- failure or failure imminent. Deallocation failed
Termination Code: 7 63 1 0
Severity: Critical -- failure or failure imminent. Failure to validate reserved capacity on each rss member
Termination Code: 7 64 1 0
Severity: Critical -- failure or failure imminent. Invalid structure - REBUILD PARITY MAIN
Termination Code: 7 67 1 0
Severity: Critical -- failure or failure imminent. The CSLD does not exist when paging in the FPGM
Termination Code: 7 68 1 0
Severity: Critical -- failure or failure imminent. An RSS member has been removed unexpectedly.
Termination Code: 7 69 1 0
Severity: Critical -- failure or failure imminent. An unsupported member manager state has occurred.
Termination Code: 7 6a 1 0
Severity: Critical -- failure or failure imminent. No Quorum Disks have been discovered.
Termination Code: 7 6b 1 0
Severity: Critical -- failure or failure imminent. Invalid/unknown pseg allocation type
Termination Code: 7 6c 1 0
Severity: Critical -- failure or failure imminent. XMFC Failure - other controller gone during communication with it.
Termination Code: 7 6d 1 0
Severity: Critical -- failure or failure imminent. Invalid XMFC operation.
Termination Code: 7 6e 1 0
Severity: Critical -- failure or failure imminent. Invalid type in RSDM.
Termination Code: 8 1 1 0
Severity: Critical -- failure or failure imminent. Bad status from CS$SET_EBIT
Termination Code: 8 2 1 0
Severity: Critical -- failure or failure imminent. An abnormal member's member_state is not supported
Termination Code: 8 3 1 0
Severity: Critical -- failure or failure imminent. A request was made to do I/O for an undefined RAID type.
Termination Code: 8 4 1 0
Severity: Critical -- failure or failure imminent. Drive rewrite function is not supported
Termination Code: 8 7 1 0
Severity: Critical -- failure or failure imminent. Cannot dynamically allocate enough memory to store waiters for ptr 9687 fix.
Termination Code: 9 1 1 0
Severity: Critical -- failure or failure imminent. EXEC$INIT_BQ failed.
Termination Code: 9 2 1 0
Severity: Critical -- failure or failure imminent. Memory allocation failed for Storage System Management Interface CP/RP (task block).
Termination Code: 9 4 1 0
Severity: Critical -- failure or failure imminent. Storage System Management Interface detected an internal inconsistency.
Termination Code: 9 6 1 0
Severity: Critical -- failure or failure imminent. Memory allocation failed for return buffer.
Termination Code: b 0 1 0
Severity: Critical -- failure or failure imminent. Invalid XMFC Response Packet.
Termination Code: b 1 1 0
Severity: Critical -- failure or failure imminent. Invalid MFC Vector (Index).
Termination Code: b 2 1 0
Severity: Critical -- failure or failure imminent. Invalid System Activity Collection state.
Termination Code: b 3 1 0
Severity: Critical -- failure or failure imminent. Initialization failed due to insufficient memory.
Termination Code: b 4 1 0
Severity: Critical -- failure or failure imminent. Invalid System Utility (Code Load or Resynchronization) state.
Termination Code: b 5 20 1
Severity: Critical -- failure or failure imminent. Attempt to access EEPROM for UUID Range failed.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
</UL>
Termination Code: b 6 20 1
Severity: Critical -- failure or failure imminent. UUID Range overflow.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
</UL>
Termination Code: b 7 20 1
Severity: Critical -- failure or failure imminent. Running on wrong GLUE code.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
</UL>
Termination Code: b 8 1 0
Severity: Critical -- failure or failure imminent. A resynchronization was requested at an inappropriate time.
Termination Code: b 9 20 3
Severity: Critical -- failure or failure imminent. Attempt to access LCD failed.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the failure status.
<LI>TP[2] contains the message code at the time of the failure.
</UL>
Termination Code: b a 1 0
Severity: Critical -- failure or failure imminent. Invalid XMFC State.
Termination Code: b b 0 20
Severity: Normal -- informational in nature. This HSV110 controller is the Storage System Master but has no connections; the slave does.
Termination Code: b c 0 20
Severity: Normal -- informational in nature. A Storage System State Logical Disk read failed due to RAID 1 data inaccessibility.
Termination Code: b d 0 20
Severity: Normal -- informational in nature. Fast Metadata Checker I/O failed.
Termination Code: b e 1 0
Severity: Critical -- failure or failure imminent. Program buffer leak detected.
Termination Code: b f 1 22
Severity: Critical -- failure or failure imminent. File is larger than predefined code load buffer.
<UL>
<LI>TP[0] contains the file size.
<LI>TP[1] contains the code load buffer size.
</UL>
Termination Code: c 1 1 0
Severity: Critical -- failure or failure imminent. Invalid Data Replication Manager Dual State was used for MFC communication between the dual controllers.
Termination Code: c 3 1 0
Severity: Critical -- failure or failure imminent. Invalid state exists for deleting a Group State Block.
Termination Code: c 4 1 0
Severity: Critical -- failure or failure imminent. A software problem was found in processing a recovery write upon controller start or failover. The group sequence number node already exists.
Termination Code: c 5 1 0
Severity: Critical -- failure or failure imminent. A software problem was found in processing a recovery write upon controller start or failover. The recovery write data was not in cache as expected.
Termination Code: c 6 1 0
Severity: Critical -- failure or failure imminent. A software problem was found in processing a recovery write upon controller start or failover. The recovery write data found in cache was not marked dirty write-back cached data as expected.
Termination Code: c 7 1 0
Severity: Critical -- failure or failure imminent. A software problem was found in processing a recovery write upon controller start or failover. Lookup of group sequence number node failed.
Termination Code: c 8 1 0
Severity: Critical -- failure or failure imminent. A software problem was found in cleaning Data Replication Manager context in the mirror cache when the mirror was declared invalid. A recovery write was found, but its associated RIE was not marked free as expected.
Termination Code: c 9 1 0
Severity: Critical -- failure or failure imminent. A software problem was found in cleaning Data Replication Manager context in the mirror cache when the mirror was declared invalid. Not all group members were processed.
Termination Code: c a 1 0
Severity: Critical -- failure or failure imminent. A software problem was found in cleaning Data Replication Manager context in the primary cache when the primary was declared invalid. A recovery write was found, but its associated RIE was not marked free as expected.
Termination Code: c b 1 0
Severity: Critical -- failure or failure imminent. A software problem was found in cleaning Data Replication Manager context in the primary cache when the primary was declared invalid. Not all group members were processed.
Termination Code: c c 1 0
Severity: Critical -- failure or failure imminent. A software problem was found when deleting the Group State Block. Transfers were not completely run down.
Termination Code: c d 1 0
Severity: Critical -- failure or failure imminent. A software problem was found when inserting a Group State Block into the active list. A Group State Block with this same Universal Unique Identifier is already on the active list.
Termination Code: c e 1 0
Severity: Critical -- failure or failure imminent. A group sequence number out of order was detected in the transfer path upon remote write completion after the mirror controller was updated. A Full Copy of the affected Data Replication Group may be initiated upon the next controller restart.
Termination Code: c f 1 0
Severity: Critical -- failure or failure imminent. Setting the e-bit failed for a write long command on the destination unit.
Termination Code: c 10 1 0
Severity: Critical -- failure or failure imminent. An attempt was made to acquire the Data Replication Manager Remote Response Waiter, but it was unexpectedly already in use.
Termination Code: c 11 1 0
Severity: Critical -- failure or failure imminent. A Group Sequence Number Node was lost during mirror synchronization.
Termination Code: c 14 1 0
Severity: Critical -- failure or failure imminent. A group sequence number out of order was detected in the transfer path on the mirror side upon remote write completion. A Full Copy of the affected Data Replication Group may be initiated upon controller restart.
Termination Code: c 15 1 0
Severity: Critical -- failure or failure imminent. A group sequence number out of order was detected upon controller restart or failover when building the list of incomplete writes. A Full Copy of the affected Data Replication Group may be initiated upon controller restart.
Termination Code: c 16 1 0
Severity: Critical -- failure or failure imminent. A group sequence number out of order was detected upon controller restart or failover when completing previously incomplete writes. A Full Copy of the affected Data Replication Group may be initiated upon controller restart.
Termination Code: c 17 1 0
Severity: Critical -- failure or failure imminent. A group sequence number out of order with the received group sequence number was detected after a controller restarted, when synchonizing the group sequence numbers with the mirror side. A Full Copy of the affected Data Replication Group may be initiated upon controller restart.
Termination Code: c 18 1 0
Severity: Critical -- failure or failure imminent. A group sequence number out of order with the use and sent group sequence numbers was detected after a controller restarted, when synchronizing the group sequence numbers with the mirror side. A Full Copy of the affected Data Replication Group may be initiated upon controller restart.
Termination Code: c 19 1 0
Severity: Critical -- failure or failure imminent. A group sequence number out of order with the received group sequence number was detected after a controller restarted, when synchronizing the group sequence numbers with the primary side. A Full Copy of the affected Data Replication Group may be initiated upon controller restart.
Termination Code: c 1a 1 0
Severity: Critical -- failure or failure imminent. A group sequence number out of order with the use and sent group sequence number was detected after a controller restart, when synchronizing the group sequence numbers with the primary side. A Full Copy of the affected Data Replication Group may be initiated upon controller restart.
Termination Code: c 1b 1 0
Severity: Critical -- failure or failure imminent. A group sequence number out of order with the use group sequence number was detected after a controller restart, when synchronizing the group sequence numbers with the primary side. A Full Copy of the affected Data Replication Group may be initiated upon controller restart.
Termination Code: c 1c 1 0
Severity: Critical -- failure or failure imminent. A group sequence number out of order was detected after a controller restart when synchronizing the mirror writes with the primary side. A Full Copy of the affected Data Replication Group may be initiated upon controller restart.
Termination Code: c 20 1 0
Severity: Critical -- failure or failure imminent. A group sequence number out of order with the use group sequence number was detected after a controller restart, when synchronizing the group sequence numbers with the primary side. A Full Copy of the affected Data Replication Group may be initiated upon controller restart.
Termination Code: c 21 1 0
Severity: Critical -- failure or failure imminent. A group sequence number out of order with the use group sequence number was detected to be too high. A Full Copy of the affected Data Replication Group may be initiated upon controller restart.
Termination Code: c 22 1 0
Severity: Critical -- failure or failure imminent. A group sequence number out of order with the use group sequence number was detected to be too low. A Full Copy of the affected Data Replication Group may be initiated upon controller restart.
Termination Code: c 23 1 0
Severity: Critical -- failure or failure imminent. A Data Replication Group member was detected to be in an unexpected cache state.
Termination Code: c 24 1 0
Severity: Critical -- failure or failure imminent. Secondary controller selection failed.
Termination Code: 42 0 1 0
Severity: Critical -- failure or failure imminent. No memory for hp$init.
Termination Code: 42 5 1 0
Severity: Critical -- failure or failure imminent. Unexpected Cache Node lock state for WRITE LONG.
Termination Code: 42 6 1 0
Severity: Critical -- failure or failure imminent. Unexpected outstanding SCSI command on unit.
Termination Code: 42 7 1 20
Severity: Critical -- failure or failure imminent. DD CDB function 0X42 received.
Termination Code: 42 8 1 a0
Severity: Critical -- failure or failure imminent. DD CDB function 0X43 received.
Termination Code: 42 9 1 c0
Severity: Critical -- failure or failure imminent. DD CDB function 0X86 received.
Termination Code: 42 c 1 80
Severity: Critical -- failure or failure imminent. Unknown build context received in remote SCSI MFC build routine.
Termination Code: 42 d 1 80
Severity: Critical -- failure or failure imminent. Unknown context received in remote SCSI MFC receive routine.
Termination Code: 42 e 1 80
Severity: Critical -- failure or failure imminent. ICOPS could not allocate necessary memory.
Termination Code: 42 f 1 80
Severity: Critical -- failure or failure imminent. Unknown build context in the ICOPS build routine.
Termination Code: 42 10 1 80
Severity: Critical -- failure or failure imminent. Unknown receive context in the ICOPS receive routine.
Termination Code: 42 11 1 80
Severity: Critical -- failure or failure imminent. Out of ICOPS work requests.
Termination Code: 42 12 1 0
Severity: Critical -- failure or failure imminent. Illegal structure on in process queue.
Termination Code: 42 13 1 0
Severity: Critical -- failure or failure imminent. No host port command HTBs.
Termination Code: 42 14 1 0
Severity: Critical -- failure or failure imminent. Invalid Context in HP$CALL_GET_SCSI_DATA.
Termination Code: 42 15 1 0
Severity: Critical -- failure or failure imminent. HP$CHANGE_HOST_MODE ACB-- not found.
Termination Code: 42 16 1 0
Severity: Critical -- failure or failure imminent. HP$PRESENT_LUN-- ACB not found.
Termination Code: 42 19 1 0
Severity: Critical -- failure or failure imminent. CCB either already in use or improperly marked not used.
Termination Code: 42 1b 1 0
Severity: Critical -- failure or failure imminent. A work request has an invalid type.
Termination Code: 42 1c 1 0
Severity: Critical -- failure or failure imminent. Work request resources have run out.
Termination Code: 42 1e 1 0
Severity: Critical -- failure or failure imminent. Allocated command HTB is already in use.
Termination Code: 42 23 1 0
Severity: Critical -- failure or failure imminent. HP$UNPRESENT_LUN ACB not found.
Termination Code: 42 24 1 80
Severity: Critical -- failure or failure imminent. Remote could not find ACB requested.
Termination Code: 42 25 1 0
Severity: Critical -- failure or failure imminent. Could not delete the ACB.
Termination Code: 42 26 1 0
Severity: Critical -- failure or failure imminent. Did not have a Unit Attention table and units are presented.
Termination Code: 42 27 1 0
Severity: Critical -- failure or failure imminent. Port event handler had an unknown port event.
Termination Code: 42 28 1 0
Severity: Critical -- failure or failure imminent. Unknown completion message from the Tachyon.
Termination Code: 42 29 1 0
Severity: Critical -- failure or failure imminent. Received an illegal SEST id.
Termination Code: 42 2a 1 0
Severity: Critical -- failure or failure imminent. Received a bad AL_PA from the Tachyon on a point to point topology.
Termination Code: 42 2b 1 0
Severity: Critical -- failure or failure imminent. Received an unknown error idle status from the Tachyon.
Termination Code: 42 2c 0 2
Severity: Normal -- informational in nature. Received an unknown error idle status from the Tachyon.
<UL>
<LI>TP[0] contains the port number (zero based).
<LI>TP[1] contains the value of the PCI Interrupt Status register.
</UL>
Termination Code: 42 2d 1 0
Severity: Critical -- failure or failure imminent. Received an unknown I/O error value.
Termination Code: 42 2e 1 0
Severity: Critical -- failure or failure imminent. Had a LUN with write only access.
Termination Code: 42 2f 1 0
Severity: Critical -- failure or failure imminent. Received an unknown FCP inbound completion status.
Termination Code: 42 30 1 2
Severity: Critical -- failure or failure imminent. Received an illegal script response.
<UL>
<LI>TP[0] contains the function that returned the bad response.
<LI>TP[1] contains the value of the bad response.
</UL>
Termination Code: 42 31 1 0
Severity: Critical -- failure or failure imminent. Received an illegal error status in the error routine.
Termination Code: 42 32 1 0
Severity: Critical -- failure or failure imminent. Requested to present a LUN that is already in existence or is illegal
Termination Code: 42 33 1 0
Severity: Critical -- failure or failure imminent. An internal request was made to return a status of Not Ready for work created in the controller.
Termination Code: 42 34 1 0
Severity: Critical -- failure or failure imminent. The state for a command with the Immed bit set in the CDB is incorrect.
Termination Code: 42 35 1 0
Severity: Critical -- failure or failure imminent. A unit unquiesce was called without the corresponding quiesce.
Termination Code: 42 36 1 0
Severity: Critical -- failure or failure imminent. A call to notify of new ELP encountered an invalid CSEL state.
Termination Code: 42 37 1 80
Severity: Critical -- failure or failure imminent. Gap in Sequence Numbers for Event Logs.
Termination Code: 42 38 1 1f
Severity: Critical -- failure or failure imminent. The host port has detected a CSM reset for 60 minutes. TP[0 through 30] contains the call stack for the CSM process, terminated by a hex value of FFFFFFFF.
Termination Code: 80 0 1 40
Severity: Critical -- failure or failure imminent. Initialization failed due to insufficient memory.
Termination Code: 80 1 1 40
Severity: Critical -- failure or failure imminent. Invalid work item passed to MDU process
Termination Code: 80 fc 1 c1
Severity: Critical -- failure or failure imminent. Forced crash upon informational/warning/error print
<UL>
<LI>TP[0] contains the PC of the crash
</UL>
Termination Code: 80 fd 1 c0
Severity: Critical -- failure or failure imminent. MDU process has returned outside message loop
Termination Code: 80 fe 1 c0
Severity: Critical -- failure or failure imminent. Unspecified MDU error (catch all debugging error)
Termination Code: 83 0 20 61
Severity: Critical -- failure or failure imminent. DOG cannot branch to this routine error
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
</UL>
Termination Code: 83 1 20 79
Severity: Critical -- failure or failure imminent. DOG unexpected vector to error
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the Pointer to ASCII error message
<LI>TP[2] contains the TE number
<LI>TP[3] contains the Test number
<LI>TP[4] contains the Error Code
<LI>TP[5] contains the Address of BUD
<LI>TP[6] contains the Exception type
<LI>TP[7] contains the SRR0 at interrupt(Return address)
<LI>TP[8] contains the SRR1/MSR at interrupt
<LI>TP[9] contains the LR at interrupt
<LI>TP[10] contains the UIC Status register
<LI>TP[11] contains the UIC Mask register
<LI>TP[12] contains the UIC Critical register
<LI>TP[13] contains the GLUE IS register
<LI>TP[14] contains the GLUE MCPE register
<LI>TP[15] contains the GLUE NPIS register
<LI>TP[16] contains the GLUE NPIE register
<LI>TP[17] contains the GLUE ACNS register
<LI>TP[18] contains the GLUE APNS register
<LI>TP[19] contains the GLUE FPIS register
<LI>TP[20] contains the GLUE FPIE register
<LI>TP[21] contains the GLUE ACFS register
<LI>TP[22] contains the GLUE APFS register
<LI>TP[23] contains the QSR ERRDET1 register
<LI>TP[24] contains the QSR ERREN1 register
</UL>
Termination Code: 83 2 20 6b
Severity: Critical -- failure or failure imminent. DOG non-fault tolerant hard error
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the Pointer to ASCII error message
<LI>TP[2] contains the TE number
<LI>TP[3] contains the Test number
<LI>TP[4] contains the Error Code
<LI>TP[5] contains the Address of BUD
<LI>TP[6] contains the Address of error
<LI>TP[7] contains the Expected data, hi
<LI>TP[8] contains the Expected data, lo
<LI>TP[9] contains the Actual data, hi
<LI>TP[10] contains the Actual data, lo
</UL>
Termination Code: 84 0 20 d
Severity: Critical -- failure or failure imminent. Cache scrubbing encountered one or more hard correctable memory errors.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the ACNS register value.
<LI>TP[2] contains the APNS register value.
<LI>TP[3] contains the ACFS register value.
<LI>TP[4] contains the APFS register value.
<LI>TP[5] contains the CTL register value.
<LI>TP[6] contains the IOPISTAT register value.
<LI>TP[7] contains the IOPMASK register value.
<LI>TP[8] contains the DMA0_STATUS register value.
<LI>TP[9] contains the DMA1_STATUS register value.
<LI>TP[10] contains the ECC_STATUS register value.
<LI>TP[11] contains the ECC_AER_CS register value.
<LI>TP[12] contains the ECC_SP_CEC register value.
</UL>
Termination Code: 84 1 20 4
Severity: Critical -- failure or failure imminent. Excessive correctable errors have been seen in cache memory.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the number of detected errors.
<LI>TP[2] contains the number of seconds over which the errors occurred.
<LI>TP[3] contains the cache address of the most recent error.
</UL>
Termination Code: 84 2 20 64
Severity: Critical -- failure or failure imminent. Uncorrectable ECC error in cache memory.
<UL>
<LI>TP[0] contains the HSV110 controller's DIMM memory size in megabytes.
<LI>TP[1] contains the ECC_STATUS register value.
<LI>TP[2] contains the ECC_AER_CS register value.
<LI>TP[3] contains the ECC_SP_CEC register value.
</UL>
Termination Code: 84 21 1 21
Severity: Critical -- failure or failure imminent. Degraded Voltage Monitor process has returned outside message loop.
<UL>
<LI>TP[0] contains the voltage being monitored.
</UL>
Termination Code: 84 23 1 20
Severity: Critical -- failure or failure imminent. Voltage Regulator Monitor process returned outside message loop
Termination Code: 84 24 0 21
Severity: Normal -- informational in nature. Found invalid Voltage Regulator Monitor process state.
<UL>
<LI>TP[0] contains the invalid state value.
</UL>
Termination Code: 84 40 1 22
Severity: Critical -- failure or failure imminent. Unable to clear Quasar interrupt line from Battery Charger PIC.
<UL>
<LI>TP[0] contains the Quasar UICTR register value.
<LI>TP[1] contains the Quasar UICSR register value.
</UL>
Termination Code: 84 41 1 21
Severity: Critical -- failure or failure imminent. Unable to read the Battery Assembly Charger PIC.
<UL>
<LI>TP[0] contains the IIC status.
</UL>
Termination Code: 84 42 1 22
Severity: Critical -- failure or failure imminent. Unable to write the Battery Assembly Charger PIC.
<UL>
<LI>TP[0] contains the IIC status.
<LI>TP[1] contains the write value.
</UL>
Termination Code: 84 44 1 22
Severity: Critical -- failure or failure imminent. Found invalid battery assembly state.
<UL>
<LI>TP[0] contains the previous number of installed battery assemblies.
<LI>TP[1] contains the current number of installed battery assemblies.
</UL>
Termination Code: 84 45 1 20
Severity: Critical -- failure or failure imminent. Charger PIC Monitor process has returned outside message loop.
Termination Code: 84 46 1 20
Severity: Critical -- failure or failure imminent. Degraded Battery Assembly Monitor process returned outside message loop.
Termination Code: 84 47 1 20
Severity: Critical -- failure or failure imminent. Battery PIC reprogramming has failed.
Termination Code: 84 48 0 20
Severity: Normal -- informational in nature. Charger PIC-induced HSV110 controller restart.
Termination Code: 84 49 0 20
Severity: Normal -- informational in nature. Found invalid battery system state.
Termination Code: 84 4a 1 20
Severity: Critical -- failure or failure imminent. UPS Monitor process returned outside message loop.
Termination Code: 84 4b 1 21
Severity: Critical -- failure or failure imminent. Invalid UPS Monitor state.
<UL>
<LI>TP[0] contains the current state machine value.
</UL>
Termination Code: 84 4c 1 20
Severity: Critical -- failure or failure imminent. Battery Timer Monitor process returned outside message loop.
Termination Code: 84 60 1 20
Severity: Critical -- failure or failure imminent. Degraded Blower Monitor process has returned outside message loop.
Termination Code: 84 80 1 1
Severity: Critical -- failure or failure imminent. Unable to communicate with LCD.
<UL>
<LI>TP[0] contains the IIC status.
</UL>
Termination Code: 84 81 1 0
Severity: Critical -- failure or failure imminent. LCD programming error.
Termination Code: 84 82 1 2
Severity: Critical -- failure or failure imminent. Unable to communicate with LCD.
<UL>
<LI>TP[0] contains function status.
<LI>TP[1] contains pointer to function call
</UL>
EVENT INFORMATION PACKETS:
Event Information Packet Type: 0
EIP00 - Fault Manager Termination Event
HSV110 controller operation was terminated due to an unrecoverable event detected by either software or hardware or due to an action initiated via the Storage System Management Interface.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
union hdu Termination Event Information Header
<byte 72>
{lteihd (Active if Termination Event Information Header revision is greater than 3)}
<byte 72>
{flags (Last Termination Event flags)}
<byte 72>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Termination event sequence number reset occurred
tbits:1 cccc_forced Coupled crash forced
tbits:1 rsvd Pad to fill byte
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 73>
utiny revision Structure revision number
<byte 74>
ushort size Structure size
{}
or hdu Termination Event Information Header
<byte 72>
{lteihd0 (Active if Termination Event Information Header revision less than or equal to 3)}
<byte 72>
{flags (Last Termination Event flags)}
<byte 72>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Termination event sequence number reset occurred
tbits:1 cccc_forced Coupled crash forced
tbits:1 stack_bad Stack contains pointer outside stack area
tbits:1 stack_guard_bad System or process stack guard value(s) overwritten
tbits:1 short_term_path Short termination path taken
tbits:1 feb_saved Final Event Block saved
{}
<byte 73>
utiny revision Structure revision number
<byte 74>
ushort size Structure size
{}
endunion hdu Termination Event Information Header
<byte 76>
union ru Termination Event Reporting Information
<byte 76>
{lter (Active if Termination Event Information Header revision greater than 3)}
<byte 76>
ulong seq Sequence number assigned to the termination event
<byte 80>
char[4] sw_version HSV110 controller software version number string
<byte 84>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 96>
char[8] ctrlr_model_id HSV110 controller model string
<byte 104>
scmi_obj_hnd terminating_ctrlr Storage System Management Interface Handle of HSV110 controller that terminated operation
<byte 124>
scmitim termination_time Time termination event occurred
<byte 132>
{termination_event (Termination event information)}
<byte 132>
ulong termination_location Location of termination event report call
<byte 136>
union u Termination Code Union
<byte 136>
{code (Termination Code)}
<byte 136>
tbits:5 parc Parameter Count
tbits:2 drcc Dump/Restart Control Code
tbits:1 cccc Coupled Crash Control Code
<byte 137>
cacode cac Corrective Action Code
<byte 138>
utiny evnum Event Number
<byte 139>
utiny scid HSV110 Controller Software Component Identification
{}
or u Termination Code Union
<byte 136>
ulong value Termination Code Value
endunion u Termination Code Union
{}
<byte 140>
utiny[2] reserved Reserved
<byte 142>
{flags (Other Last Termination Event flags)}
<byte 142>
tbits:1 lg_send_sts Last Gasp send status
tbits:1 stack_bad Stack contains pointer outside stack area
tbits:1 stack_guard_bad System or process stack guard value(s) overwritten
tbits:1 short_term_path Short termination path taken
tbits:1 feb_saved Final Event Block saved
tbits:3 rsvd Pad to fill byte
{}
<byte 143>
utiny reuea_index Termination Processing Recursive Entry Event or Unexpected Event array index
<byte 144>
ulonglong uptime Number of seconds HSV110 controller has run functional code
{}
or ru Termination Event Reporting Information
<byte 76>
{lter0 (Active if Termination Event Information Header revision is less than or equal to 3)}
<byte 76>
ulong seq Sequence number assigned to the termination event
<byte 80>
char[4] sw_version HSV110 controller software version number string
<byte 84>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 96>
char[8] ctrlr_model_id HSV110 controller model string
<byte 104>
scmi_obj_hnd terminating_ctrlr Storage System Management Interface Handle of HSV110 controller that terminated operation
<byte 124>
scmitim termination_time Time termination event occurred
<byte 132>
{termination_event (Termination event information)}
<byte 132>
ulong termination_location Location of termination event report call
<byte 136>
union u Termination Code Union
<byte 136>
{code (Termination Code)}
<byte 136>
tbits:5 parc Parameter Count
tbits:2 drcc Dump/Restart Control Code
tbits:1 cccc Coupled Crash Control Code
<byte 137>
cacode cac Corrective Action Code
<byte 138>
utiny evnum Event Number
<byte 139>
utiny scid HSV110 Controller Software Component Identification
{}
or u Termination Code Union
<byte 136>
ulong value Termination Code Value
endunion u Termination Code Union
{}
<byte 140>
utiny[2] reserved Reserved
<byte 142>
utiny lg_send_sts Last Gasp send status
<byte 143>
utiny reuea_index Termination Processing Recursive Entry Event or Unexpected Event array index
<byte 144>
ulonglong uptime Number of seconds HSV110 controller has run functional code
{}
endunion ru Termination Event Reporting Information
{}
Event Information Packet Type: 1
EIP01 - Fault Manager Termination Processing Recursive Entry Event
A machine check occurred while a termination event was being processed.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
union hdu Termination Event Information Header
<byte 72>
{lteihd (Active if Termination Event Information Header revision is greater than 3)}
<byte 72>
{flags (Last Termination Event flags)}
<byte 72>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Termination event sequence number reset occurred
tbits:1 cccc_forced Coupled crash forced
tbits:1 rsvd Pad to fill byte
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 73>
utiny revision Structure revision number
<byte 74>
ushort size Structure size
{}
or hdu Termination Event Information Header
<byte 72>
{lteihd0 (Active if Termination Event Information Header revision is less than or equal to 3)}
<byte 72>
{flags (Last Termination Event flags)}
<byte 72>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Termination event sequence number reset occurred
tbits:1 cccc_forced Coupled crash forced
tbits:1 stack_bad Stack contains pointer outside stack area
tbits:1 stack_guard_bad System or process stack guard value(s) overwritten
tbits:1 short_term_path Short termination path taken
tbits:1 feb_saved Final Event Block saved
{}
<byte 73>
utiny revision Structure revision number
<byte 74>
ushort size Structure size
{}
endunion hdu Termination Event Information Header
<byte 76>
union ru Termination Event Reporting Information
<byte 76>
{lter (Active if Termination Event Information Header revision greater than 3)}
<byte 76>
ulong seq Sequence number assigned to the termination event
<byte 80>
char[4] sw_version HSV110 controller software version number string
<byte 84>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 96>
char[8] ctrlr_model_id HSV110 controller model string
<byte 104>
scmi_obj_hnd terminating_ctrlr Storage System Management Interface Handle of HSV110 controller that terminated operation
<byte 124>
scmitim termination_time Time termination event occurred
<byte 132>
{termination_event (Termination event information)}
<byte 132>
ulong termination_location Location of termination event report call
<byte 136>
union u Termination Code Union
<byte 136>
{code (Termination Code)}
<byte 136>
tbits:5 parc Parameter Count
tbits:2 drcc Dump/Restart Control Code
tbits:1 cccc Coupled Crash Control Code
<byte 137>
cacode cac Corrective Action Code
<byte 138>
utiny evnum Event Number
<byte 139>
utiny scid HSV110 Controller Software Component Identification
{}
or u Termination Code Union
<byte 136>
ulong value Termination Code Value
endunion u Termination Code Union
{}
<byte 140>
utiny[2] reserved Reserved
<byte 142>
{flags (Other Last Termination Event flags)}
<byte 142>
tbits:1 lg_send_sts Last Gasp send status
tbits:1 stack_bad Stack contains pointer outside stack area
tbits:1 stack_guard_bad System or process stack guard value(s) overwritten
tbits:1 short_term_path Short termination path taken
tbits:1 feb_saved Final Event Block saved
tbits:3 rsvd Pad to fill byte
{}
<byte 143>
utiny reuea_index Termination Processing Recursive Entry Event or Unexpected Event array index
<byte 144>
ulonglong uptime Number of seconds HSV110 controller has run functional code
{}
or ru Termination Event Reporting Information
<byte 76>
{lter0 (Active if Termination Event Information Header revision is less than or equal to 3)}
<byte 76>
ulong seq Sequence number assigned to the termination event
<byte 80>
char[4] sw_version HSV110 controller software version number string
<byte 84>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 96>
char[8] ctrlr_model_id HSV110 controller model string
<byte 104>
scmi_obj_hnd terminating_ctrlr Storage System Management Interface Handle of HSV110 controller that terminated operation
<byte 124>
scmitim termination_time Time termination event occurred
<byte 132>
{termination_event (Termination event information)}
<byte 132>
ulong termination_location Location of termination event report call
<byte 136>
union u Termination Code Union
<byte 136>
{code (Termination Code)}
<byte 136>
tbits:5 parc Parameter Count
tbits:2 drcc Dump/Restart Control Code
tbits:1 cccc Coupled Crash Control Code
<byte 137>
cacode cac Corrective Action Code
<byte 138>
utiny evnum Event Number
<byte 139>
utiny scid HSV110 Controller Software Component Identification
{}
or u Termination Code Union
<byte 136>
ulong value Termination Code Value
endunion u Termination Code Union
{}
<byte 140>
utiny[2] reserved Reserved
<byte 142>
utiny lg_send_sts Last Gasp send status
<byte 143>
utiny reuea_index Termination Processing Recursive Entry Event or Unexpected Event array index
<byte 144>
ulonglong uptime Number of seconds HSV110 controller has run functional code
{}
endunion ru Termination Event Reporting Information
<byte 152>
{rei (Recursive Entry Event Information)}
<byte 152>
ulong tt Trap type
<byte 156>
ulong tc Termination code
<byte 160>
ulong srr0 SRR0 register
<byte 164>
ulong lr LR register
<byte 168>
ulong exception Exception code
{}
{}
Event Information Packet Type: 2
EIP02 - Fault Manager Termination Processing Unexpected Event
An unexpected event occurred while a termination event was being processed.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
union hdu Termination Event Information Header
<byte 72>
{lteihd (Active if Termination Event Information Header revision is greater than 3)}
<byte 72>
{flags (Last Termination Event flags)}
<byte 72>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Termination event sequence number reset occurred
tbits:1 cccc_forced Coupled crash forced
tbits:1 rsvd Pad to fill byte
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 73>
utiny revision Structure revision number
<byte 74>
ushort size Structure size
{}
or hdu Termination Event Information Header
<byte 72>
{lteihd0 (Active if Termination Event Information Header revision is less than or equal to 3)}
<byte 72>
{flags (Last Termination Event flags)}
<byte 72>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Termination event sequence number reset occurred
tbits:1 cccc_forced Coupled crash forced
tbits:1 stack_bad Stack contains pointer outside stack area
tbits:1 stack_guard_bad System or process stack guard value(s) overwritten
tbits:1 short_term_path Short termination path taken
tbits:1 feb_saved Final Event Block saved
{}
<byte 73>
utiny revision Structure revision number
<byte 74>
ushort size Structure size
{}
endunion hdu Termination Event Information Header
<byte 76>
union ru Termination Event Reporting Information
<byte 76>
{lter (Active if Termination Event Information Header revision greater than 3)}
<byte 76>
ulong seq Sequence number assigned to the termination event
<byte 80>
char[4] sw_version HSV110 controller software version number string
<byte 84>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 96>
char[8] ctrlr_model_id HSV110 controller model string
<byte 104>
scmi_obj_hnd terminating_ctrlr Storage System Management Interface Handle of HSV110 controller that terminated operation
<byte 124>
scmitim termination_time Time termination event occurred
<byte 132>
{termination_event (Termination event information)}
<byte 132>
ulong termination_location Location of termination event report call
<byte 136>
union u Termination Code Union
<byte 136>
{code (Termination Code)}
<byte 136>
tbits:5 parc Parameter Count
tbits:2 drcc Dump/Restart Control Code
tbits:1 cccc Coupled Crash Control Code
<byte 137>
cacode cac Corrective Action Code
<byte 138>
utiny evnum Event Number
<byte 139>
utiny scid HSV110 Controller Software Component Identification
{}
or u Termination Code Union
<byte 136>
ulong value Termination Code Value
endunion u Termination Code Union
{}
<byte 140>
utiny[2] reserved Reserved
<byte 142>
{flags (Other Last Termination Event flags)}
<byte 142>
tbits:1 lg_send_sts Last Gasp send status
tbits:1 stack_bad Stack contains pointer outside stack area
tbits:1 stack_guard_bad System or process stack guard value(s) overwritten
tbits:1 short_term_path Short termination path taken
tbits:1 feb_saved Final Event Block saved
tbits:3 rsvd Pad to fill byte
{}
<byte 143>
utiny reuea_index Termination Processing Recursive Entry Event or Unexpected Event array index
<byte 144>
ulonglong uptime Number of seconds HSV110 controller has run functional code
{}
or ru Termination Event Reporting Information
<byte 76>
{lter0 (Active if Termination Event Information Header revision is less than or equal to 3)}
<byte 76>
ulong seq Sequence number assigned to the termination event
<byte 80>
char[4] sw_version HSV110 controller software version number string
<byte 84>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 96>
char[8] ctrlr_model_id HSV110 controller model string
<byte 104>
scmi_obj_hnd terminating_ctrlr Storage System Management Interface Handle of HSV110 controller that terminated operation
<byte 124>
scmitim termination_time Time termination event occurred
<byte 132>
{termination_event (Termination event information)}
<byte 132>
ulong termination_location Location of termination event report call
<byte 136>
union u Termination Code Union
<byte 136>
{code (Termination Code)}
<byte 136>
tbits:5 parc Parameter Count
tbits:2 drcc Dump/Restart Control Code
tbits:1 cccc Coupled Crash Control Code
<byte 137>
cacode cac Corrective Action Code
<byte 138>
utiny evnum Event Number
<byte 139>
utiny scid HSV110 Controller Software Component Identification
{}
or u Termination Code Union
<byte 136>
ulong value Termination Code Value
endunion u Termination Code Union
{}
<byte 140>
utiny[2] reserved Reserved
<byte 142>
utiny lg_send_sts Last Gasp send status
<byte 143>
utiny reuea_index Termination Processing Recursive Entry Event or Unexpected Event array index
<byte 144>
ulonglong uptime Number of seconds HSV110 controller has run functional code
{}
endunion ru Termination Event Reporting Information
<byte 152>
{uei (Unexpected Event Information)}
<byte 152>
ulong type Unexpected event type
<byte 156>
ulong pto Post-Termination Operation Indicator
<byte 160>
ulong[5] param Unexpected event parameters
{}
{}
Event Information Packet Type: 3
EIP03 - Fault Manager Management Event
An event that affects Fault Manager operation occurred.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
union ainfo Ancillary Information Union
<byte 72>
ulong events_not_reported Number of events not reported
<byte 76>
do_not_display[4] union_pad Union Element Padding (DO NOT DISPLAY!)
or ainfo Ancillary Information Union
<byte 72>
ulong quiesce_type Quiesce type
<byte 76>
do_not_display[4] union_pad Union Element Padding (DO NOT DISPLAY!)
or ainfo Ancillary Information Union
<byte 72>
{remote_event (Remote event header information)}
<byte 72>
union u Event Code Union
<byte 72>
{ec (Event Code)}
<byte 72>
utiny eiptype Event Information Packet Type Code
<byte 73>
cacode cac Corrective Action Code
<byte 74>
utiny evnum Event Number
<byte 75>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 72>
ulong value Event Code Value
endunion u Event Code Union
<byte 76>
utiny revision Packet revision number
<byte 77>
utiny type Packet type
<byte 78>
ushort count Number of bytes in packet
{}
endunion ainfo Ancillary Information Union
<byte 80>
union cinfo Control Block Information Union
<byte 80>
{scelcbi (Storage System Event Log Control Block Information)}
<byte 80>
ushort current_offset Current offset within event buffer
<byte 82>
{flags (Flags)}
<byte 82>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Sequence number reset occurred
tbits:1 wrapped All event data blocks in use
tbits:4 rsvd Pad to fill byte
{}
<byte 83>
utiny status Maintenance status
<byte 84>
ulong current_edbn Current event data block number
<byte 88>
ulong start_edbn Storage System State Logical Disk-Storage System Event Log starting event data block number
<byte 92>
ulong end_edbn Storage System State Logical Disk-Storage System Event Log ending event data block number
<byte 96>
ulong seq_reset_edbn Event data block number where sequence number reset occurred
<byte 100>
ulong event_count Number of events contained in Storage System State Logical Disk-Storage System Event Log
<byte 104>
ulong event_count_wraps Event count overflow
<byte 108>
ulong sequence_number Last event sequence number used
{}
<byte 112>
do_not_display[12] union_pad Union Element Padding (DO NOT DISPLAY!)
or cinfo Control Block Information Union
<byte 80>
{sctelcbi (Storage System Termination Event Log Control Block Information)}
<byte 80>
ushort reserved Reserved for future use
<byte 82>
{flags (Flags)}
<byte 82>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 bctrlr_wrapped All termination event data blocks in use for "B" HSV110 controller
tbits:1 bctrlr_valid "B" HSV110 controller's Storage System State Logical Disk-Storage System Termination Event Log information is valid
tbits:1 actrlr_wrapped All termination event data blocks in use for "A" HSV110 controller
tbits:1 actrlr_valid "A" HSV110 controller's Storage System State Logical Disk-Storage System Termination Event Log information is valid
tbits:2 rsvd Pad to fill byte
{}
<byte 83>
utiny status Maintenance status
<byte 84>
uuid actrlr_id "A" HSV110 controller's UUID
<byte 100>
ulong actrlr_mru_edbn "A" HSV110 controller's Storage System State Logical Disk-Storage System Termination Event Log most recently used event data block number
<byte 104>
uuid bctrlr_id "B" HSV110 controller's UUID
<byte 120>
ulong bctrlr_mru_edbn "B" HSV110 controller's Storage System State Logical Disk-Storage System Termination Event Log most recently used event data block number
{}
or cinfo Control Block Information Union
<byte 80>
{stats30 (Last 30 seconds activity summary)}
<byte 80>
{host (Host Activity,)}
<byte 80>
ulong rps Requests Per Second,
<byte 84>
ulong kbs KB/Second.
{}
<byte 88>
{mirror (Mirror Activity,)}
<byte 88>
ulong rps Requests Per Second,
<byte 92>
ulong kbs KB/Second.
{}
<byte 96>
{backend (Backend Activity,)}
<byte 96>
ulong rps Requests Per Second,
<byte 100>
ulong kbs KB/Second.
{}
<byte 104>
{total (Total Activity,)}
<byte 104>
ulong rps Requests Per Second,
<byte 108>
ulong kbs KB/Second.
{}
<byte 112>
{background (Background Activity.)}
<byte 112>
ulong rps Requests Per Second,
<byte 116>
ulong kbs KB/Second.
{}
{}
<byte 120>
do_not_display[4] union_pad Union Element Padding (DO NOT DISPLAY!)
endunion cinfo Control Block Information Union
<byte 124>
union minfo Maintenance Information Union
<byte 124>
{scelmi (Storage System Event Log Maintenance Information)}
<byte 124>
ulong index Loop index
<byte 128>
*ptr *utp Zero test buffer pointer
<byte 132>
ulong current_eventp Pointer to the current event
<byte 136>
ulong current_edbn Current event data block number
<byte 140>
ulong current_seqn Current sequence number
<byte 144>
ushort previous_offset Previous event_buffer offset
<byte 146>
ushort current_offset Current event_buffer offset
<byte 148>
ulong previous_edbn Previous event data block number
<byte 152>
ulong previous_seqn Previous sequence number
<byte 156>
ulong end_found End of Storage System State Logical Disk-Storage System Event Log found flag
<byte 160>
ulong accept_new_to_old New to old transition acceptable flag
<byte 164>
ulong unequal_found Sequence number not as expected flag
<byte 168>
ulong iostatus I/O status
{}
or minfo Maintenance Information Union
<byte 124>
{sctelmi (Storage System Termination Event Log Maintenance Information)}
<byte 124>
ulong index Loop index
<byte 128>
ulong current_edbn Current event data block number
<byte 132>
ulong end_edbn End event data block number
<byte 136>
ulong actrlr If "A" HSV110 controller, TRUE
<byte 140>
ulong iostatus I/O status
<byte 144>
ulong hold_offset Hold buffer current offset
{}
<byte 148>
do_not_display[24] union_pad Union Element Padding (DO NOT DISPLAY!)
or minfo Maintenance Information Union
<byte 124>
{lerinfo (Last Event Reported Information)}
<byte 124>
ulong reporting_interval Last event reporting interval
<byte 128>
ulong sequence_number Sequence number assigned to the event
<byte 132>
scmitim report_time Time event was reported
<byte 140>
{header (Event Header)}
<byte 140>
union u Event Code Union
<byte 140>
{ec (Event Code)}
<byte 140>
utiny eiptype Event Information Packet Type Code
<byte 141>
cacode cac Corrective Action Code
<byte 142>
utiny evnum Event Number
<byte 143>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 140>
ulong value Event Code Value
endunion u Event Code Union
<byte 144>
utiny revision Packet revision number
<byte 145>
utiny type Packet type
<byte 146>
ushort count Number of bytes in packet
{}
{}
<byte 148>
do_not_display[24] union_pad Union Element Padding (DO NOT DISPLAY!)
endunion minfo Maintenance Information Union
{}
Event Information Packet Type: 4
EIP04 - Fibre Channel Services Physical Disk Drive Error
An error was encountered while accessing a physical disk drive.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
tag device UUID of physical disk drive associated with the event
<byte 88>
char[8] cerp_id HSV110 controller enclosure rear panel Fibre Channel port attached to the physical disk drive or mirror port
<byte 96>
ushort reserved Reserved
<byte 98>
ushort port HSV110 controller internal Fibre Channel port number attached to the physical disk drive or mirror port
<byte 100>
ushort dencl_num Enclosure where the physical disk drive is located
<byte 102>
ushort al_pa AL_PA of the physical disk drive or mirror port
<byte 104>
ushort rack_num Rack where physical disk drive is located
<byte 106>
ushort bay Enclosure bay where the physical disk drive is located
<byte 108>
char[16] pid Physical disk drive product identification string
<byte 124>
char[4] rev Current firmware level of physical disk drive
<byte 128>
{enclosures[1] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 128>
utiny rack_num Rack were enclosure is located
<byte 129>
utiny dencl_num Enclosure number
{}
<byte 130>
{enclosures[0] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 130>
utiny rack_num Rack were enclosure is located
<byte 131>
utiny dencl_num Enclosure number
{}
<byte 132>
{enclosures[3] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 132>
utiny rack_num Rack were enclosure is located
<byte 133>
utiny dencl_num Enclosure number
{}
<byte 134>
{enclosures[2] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 134>
utiny rack_num Rack were enclosure is located
<byte 135>
utiny dencl_num Enclosure number
{}
<byte 136>
{enclosures[5] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 136>
utiny rack_num Rack were enclosure is located
<byte 137>
utiny dencl_num Enclosure number
{}
<byte 138>
{enclosures[4] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 138>
utiny rack_num Rack were enclosure is located
<byte 139>
utiny dencl_num Enclosure number
{}
<byte 140>
{enclosures[7] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 140>
utiny rack_num Rack were enclosure is located
<byte 141>
utiny dencl_num Enclosure number
{}
<byte 142>
{enclosures[6] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 142>
utiny rack_num Rack were enclosure is located
<byte 143>
utiny dencl_num Enclosure number
{}
<byte 144>
{enclosures[9] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 144>
utiny rack_num Rack were enclosure is located
<byte 145>
utiny dencl_num Enclosure number
{}
<byte 146>
{enclosures[8] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 146>
utiny rack_num Rack were enclosure is located
<byte 147>
utiny dencl_num Enclosure number
{}
<byte 148>
ulong bypass_reason Reason the physical disk drive at this location has been bypassed
<byte 152>
char[4] new_rev Latest known firmware level of physical disk drive
{}
Event Information Packet Type: 5
EIP05 - Storage System Management Interface Entity State Change
The state of a Storage System Management Interface entity has changed.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
{event_type (Entity and Event type)}
<byte 72>
ushort scmi_object_type Entity type
<byte 74>
ushort scmi_object_event_type Event Information Packet type
{}
<byte 76>
{value (New entity state)}
<byte 76>
ulong ul1 Additional information longword 1
<byte 80>
ulong ul2 Additional information longword 2
{}
<byte 84>
scmi_obj_hnd handle Storage System Management Interface Handle of affected entity
<byte 104>
ulong secondary_id Alternate entity identification
<byte 108>
{attribute (Entity attributes)}
<byte 108>
ulong type Datatype used
<byte 112>
union value SCMI Attribute Union
<byte 112>
ulong[6] u32 As 32 bit words,
or value SCMI Attribute Union
<byte 112>
double_word[3] u64 As 64 bit words,
or value SCMI Attribute Union
<byte 112>
{obj (As typed Storage System Management Interface object handle,)}
<byte 112>
ulong value
<byte 116>
scmi_obj_hnd handle
{}
or value SCMI Attribute Union
<byte 112>
char[24] str As character string
endunion value SCMI Attribute Union
{}
<byte 136>
scmi_obj_hnd add_handle Additional entity identification (Storage System Management Interface Handle)
<byte 156>
ulong[6] add_data Additional Data
{}
Event Information Packet Type: 7
EIP07 - Fibre Channel Services Fibre Channel Port Link Error
Excessive link errors were detected on a Fibre Channel port.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
char[8] cerp_id HSV110 controller enclosure rear panel Fibre Channel port
<byte 80>
ushort reserved Reserved
<byte 82>
ushort port HSV110 controller internal Fibre Channel port number
<byte 84>
ulong loss_of_signal Number of times a loss of signal was detected
<byte 88>
ulong bad_rx_char Bad received character count
<byte 92>
ulong loss_of_sync Loss of synchronization count
<byte 96>
ulong link_fail Link failure count
<byte 100>
ulong rx_eofa The number of frames that have been received with an EOFa delimiter
<byte 104>
ulong dis_frm The number of frames that have been received and then discarded
<byte 108>
ulong bad_crc The number of frames that have been received with a Bad_CRC and a valid EOF
<byte 112>
ulong proto_err The number of N_Port protocol errors detected
<byte 116>
ulong exp_frm The number of outbound frames that have expired and therefore were discarded.
{}
Event Information Packet Type: 8
EIP08 - Fibre Channel Services Fibre Channel Port Link Failure
A Fibre Channel port link has failed or a Drive Enclosure Environmental Monitoring Unit task has failed.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
char[8] cerp_id HSV110 controller enclosure rear panel Fibre Channel port
<byte 80>
char[8] other_cerp_id HSV110 controller enclosure rear panel Fibre Channel port attached to the physical disk drive or mirror port
<byte 88>
{peb[0] (Fibre Channel port Event Blocks)}
<byte 88>
ulong type Error type code
<byte 92>
ulong context Error context
{}
<byte 96>
{peb[1] (Fibre Channel port Event Blocks)}
<byte 96>
ulong type Error type code
<byte 100>
ulong context Error context
{}
<byte 104>
{peb[2] (Fibre Channel port Event Blocks)}
<byte 104>
ulong type Error type code
<byte 108>
ulong context Error context
{}
<byte 112>
{peb[3] (Fibre Channel port Event Blocks)}
<byte 112>
ulong type Error type code
<byte 116>
ulong context Error context
{}
<byte 120>
{peb[4] (Fibre Channel port Event Blocks)}
<byte 120>
ulong type Error type code
<byte 124>
ulong context Error context
{}
<byte 128>
{peb[5] (Fibre Channel port Event Blocks)}
<byte 128>
ulong type Error type code
<byte 132>
ulong context Error context
{}
<byte 136>
{peb[6] (Fibre Channel port Event Blocks)}
<byte 136>
ulong type Error type code
<byte 140>
ulong context Error context
{}
<byte 144>
{peb[7] (Fibre Channel port Event Blocks)}
<byte 144>
ulong type Error type code
<byte 148>
ulong context Error context
{}
<byte 152>
ushort peq_prod_index Producer index
<byte 154>
ushort peq_frz_prod_index Error idle or freeze producer index
<byte 156>
ushort failure_cause Code indicating path to link failure
<byte 158>
ushort peq_cons_index Consumer index
<byte 160>
utiny reserved2 Reserved
<byte 161>
{time (No description available)}
<byte 161>
tbits:6 time_value
tbits:2 time_unit 2 bit value representing the unit in which the time_value represents the time. 00->seconds 01->minutes 10->hours 11->days
{}
<byte 162>
utiny other_port HSV110 controller internal Fibre Channel port number
<byte 163>
utiny port HSV110 controller internal Fibre Channel port number
<byte 164>
{recovery (Loop Recovery Operations)}
<byte 164>
ulong progress EWE Step for recovery process
<byte 168>
ulong shelf Physical Shelf being evaluated.
<byte 172>
ulong slot Physical Slot being evaluated.
<byte 176>
ulong cab Cabinet rack being evaluated.
{}
{}
Event Information Packet Type: 9
EIP09 - Fibre Channel Services Physical Disk Drive/Mirror Port Error
An error was encountered while attempting to access a physical disk drive or the mirror port.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
tag device UUID of physical disk drive associated with the event
<byte 88>
char[8] cerp_id HSV110 controller enclosure rear panel Fibre Channel port attached to the physical disk drive or mirror port
<byte 96>
ushort exch_type Frame exchange type
<byte 98>
ushort port HSV110 controller internal Fibre Channel port number attached to the physical disk drive or mirror port
<byte 100>
ushort dencl_num Enclosure where the physical disk drive is located
<byte 102>
ushort al_pa AL_PA of the physical disk drive or mirror port
<byte 104>
ushort rack_num Rack where physical disk drive is located
<byte 106>
ushort bay Enclosure bay where the physical disk drive is located
<byte 108>
ulong fed_class Fibre Channel Exchange Descriptor class
<byte 112>
union cmd Command Descriptor Block issued
<byte 112>
utiny[16] bytes CDB as bytes
or cmd Command Descriptor Block issued
<byte 112>
ulong[4] lw CDB as longwords
or cmd Command Descriptor Block issued
<byte 112>
{cdb6 (6 Byte CDB by field)}
<byte 112>
utiny opcode Offset 0 -- Operation Code
<byte 113>
tbits:5 lba0 Offset 1, Bits 0-4 -- Logical Block Address[0]
tbits:3 lun Offset 1, Bits 5-7 -- Logical Unit Number (obsolete method -- unused)
<byte 114>
utiny lba1 Offset 2 -- Logical Block Address[1]
<byte 115>
utiny lba2 Offset 3 -- Logical Block Address[2]
<byte 116>
utiny length Offset 4 -- Length
<byte 117>
utiny control Offset 5 -- Control
<byte 118>
ushort padding Offsets 6-7 -- Pad to longword align
{}
<byte 120>
do_not_display[8] union_pad Union Element Padding (DO NOT DISPLAY!)
or cmd Command Descriptor Block issued
<byte 112>
{cdb10 (10 Byte CDB by field)}
<byte 112>
utiny opcode Offset 0 -- Operation Code
<byte 113>
tbits:5 reserved Offset 1, Bits 0-4 -- Reserved
tbits:3 lun Offset 1, Bits 5-7 -- Logical Unit Number (obsolete method -- unused)
<byte 114>
utiny lba0 Offset 2 -- Logical Block Address[0]
<byte 115>
utiny lba1 Offset 3 -- Logical Block Address[1]
<byte 116>
utiny lba2 Offset 4 -- Logical Block Address[2]
<byte 117>
utiny lba3 Offset 5 -- Logical Block Address[3]
<byte 118>
utiny reserved6 Offset 6 -- Reserved
<byte 119>
utiny length0 Offset 7 -- Length[0]
<byte 120>
utiny length1 Offset 8 -- Length[1]
<byte 121>
utiny control Offset 9 -- Control
<byte 122>
ushort padding Offsets 10-11 -- Pad to longword align
{}
<byte 124>
do_not_display[4] union_pad Union Element Padding (DO NOT DISPLAY!)
or cmd Command Descriptor Block issued
<byte 112>
{cdb12 (12 Byte CDB by field)}
<byte 112>
utiny opcode Offset 0 -- Operation Code
<byte 113>
tbits:5 reserved Offset 1, Bits 0-4 -- Reserved
tbits:3 lun Offset 1, Bits 5-7 -- Logical Unit Number (obsolete method -- unused)
<byte 114>
utiny lba0 Offset 2 -- Logical Block Address[0]
<byte 115>
utiny lba1 Offset 3 -- Logical Block Address[1]
<byte 116>
utiny lba2 Offset 4 -- Logical Block Address[2]
<byte 117>
utiny lba3 Offset 5 -- Logical Block Address[3]
<byte 118>
utiny length0 Offset 6 -- Length[0]
<byte 119>
utiny length1 Offset 7 -- Length[1]
<byte 120>
utiny length2 Offset 8 -- Length[2]
<byte 121>
utiny length3 Offset 9 -- Length[3]
<byte 122>
utiny reserved10 Offset 10 -- Reserved
<byte 123>
utiny control Offset 11 -- Control
{}
<byte 124>
do_not_display[4] union_pad Union Element Padding (DO NOT DISPLAY!)
or cmd Command Descriptor Block issued
<byte 112>
{cdb16 (16 Byte CDB by field)}
<byte 112>
utiny opcode Offset 0 -- Operation Code
<byte 113>
utiny parameter Offset 1 -- Command specific parameters
<byte 114>
utiny lba0 Offset 2 -- Logical Block Address[0]
<byte 115>
utiny lba1 Offset 3 -- Logical Block Address[1]
<byte 116>
utiny lba2 Offset 4 -- Logical Block Address[2]
<byte 117>
utiny lba3 Offset 5 -- Logical Block Address[3]
<byte 118>
utiny lba4 Offset 6 -- Logical Block Address[4] or Operation Length[0]
<byte 119>
utiny lba5 Offset 7 -- Logical Block Address[5] or Operation Length[1]
<byte 120>
utiny lba6 Offset 8 -- Logical Block Address[6] or Operation Length[2]
<byte 121>
utiny lba7 Offset 9 -- Logical Block Address[7] or Operation Length[3]
<byte 122>
utiny length0 Offset 10 -- Length[0]
<byte 123>
utiny length1 Offset 11 -- Length[1]
<byte 124>
utiny length2 Offset 12 -- Length[2]
<byte 125>
utiny length3 Offset 13 -- Length[3]
<byte 126>
utiny reserved Offsets 14 -- Reserved
<byte 127>
utiny control Offset 15 -- Control
{}
endunion cmd Command Descriptor Block issued
<byte 128>
union error Sense data reported by the physical disk drive
<byte 128>
utiny[20] bytes Sense data as bytes
or error Sense data reported by the physical disk drive
<byte 128>
ulong[5] lw Sense data as longwords
or error Sense data reported by the physical disk drive
<byte 128>
{sense_data (Sense data by field)}
<byte 128>
tbits:7 error_code Offset 0, Bits 0-6 -- Error Code
tbits:1 valid Offset 0, Bit 7 -- Valid
<byte 129>
utiny segment Offset 1 -- Segment
<byte 130>
tbits:4 sense_key Offset 2, Bits 0-3 -- Sense Key
tbits:1 reserved_1 Offset 2, Bit 4 -- Reserved
tbits:1 ili Offset 2, Bit 5 -- Incorrect Length Indicator
tbits:1 eom Offset 2, Bit 6 -- End of Medium
tbits:1 filemark Offset 2, Bit 7 -- Filemark
<byte 131>
utiny info_0 Offset 3 -- Information[0]
<byte 132>
utiny info_1 Offset 4 -- Information[1]
<byte 133>
utiny info_2 Offset 5 -- Information[2]
<byte 134>
utiny info_3 Offset 6 -- Information[3]
<byte 135>
utiny add_length Offset 7 -- Additional Sense Length
<byte 136>
utiny[4] cmd_specific Offsets 8-11 -- Command Specific Information
<byte 140>
union asc_ascq ASC/ASCQ Union
<byte 140>
{asc_ascqb (Offsets 12-13 -- Additional Sense Code (ASC)/Additional Sense Code Qualifier (ASCQ))}
<byte 140>
utiny asc Offset 12 -- ASC
<byte 141>
utiny asq Offset 13 -- ASCQ
{}
or asc_ascq ASC/ASCQ Union
<byte 140>
ushort asc_ascqw Offsets 12-13 -- Combined ASC/ASCQ
endunion asc_ascq ASC/ASCQ Union
<byte 142>
utiny fru_code Offset 14 -- Field Replaceable Unit Code
<byte 143>
tbits:7 sks_0 Offset 15, Bits 0-6 -- Sense Key Specific[0]
tbits:1 sksv Offset 15, Bit 7 -- Sense Key Specific Valid
<byte 144>
utiny[2] sks Offsets 16-17 -- Sense Key Specific[1-2]
<byte 146>
ushort padding Offsets 18-19 -- Pad to longword align
{}
endunion error Sense data reported by the physical disk drive
<byte 148>
{enclosures[1] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 148>
utiny rack_num Rack were enclosure is located
<byte 149>
utiny dencl_num Enclosure number
{}
<byte 150>
{enclosures[0] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 150>
utiny rack_num Rack were enclosure is located
<byte 151>
utiny dencl_num Enclosure number
{}
<byte 152>
{enclosures[3] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 152>
utiny rack_num Rack were enclosure is located
<byte 153>
utiny dencl_num Enclosure number
{}
<byte 154>
{enclosures[2] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 154>
utiny rack_num Rack were enclosure is located
<byte 155>
utiny dencl_num Enclosure number
{}
<byte 156>
{enclosures[5] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 156>
utiny rack_num Rack were enclosure is located
<byte 157>
utiny dencl_num Enclosure number
{}
<byte 158>
{enclosures[4] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 158>
utiny rack_num Rack were enclosure is located
<byte 159>
utiny dencl_num Enclosure number
{}
<byte 160>
{enclosures[7] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 160>
utiny rack_num Rack were enclosure is located
<byte 161>
utiny dencl_num Enclosure number
{}
<byte 162>
{enclosures[6] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 162>
utiny rack_num Rack were enclosure is located
<byte 163>
utiny dencl_num Enclosure number
{}
<byte 164>
{enclosures[9] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 164>
utiny rack_num Rack were enclosure is located
<byte 165>
utiny dencl_num Enclosure number
{}
<byte 166>
{enclosures[8] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 166>
utiny rack_num Rack were enclosure is located
<byte 167>
utiny dencl_num Enclosure number
{}
{}
Event Information Packet Type: a
EIP0A - Storage System State Services State Change
A Storage System state change occurred.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
{node_name (World Wide Name of HSV110 controller)}
<byte 72>
ulong hi (Bits 31:28) Network Address Authority Code, (Bits 27:4) Company ID, (Bits 3:0) Type
<byte 76>
ulong lo (Bits 31:4) Node Number, (Bits 3:0) Port
{}
<byte 80>
tag scell_tag UUID of Storage System
<byte 96>
ulong dimm_size Size of this HSV110 controller's DIMM in megabytes
{}
Event Information Packet Type: b
EIP0B - Storage System State Services Physical Disk Drive State Change
A physical disk drive state change occurred.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
uuid device UUID of physical disk drive
<byte 88>
char[8] cerp_id HSV110 controller enclosure rear panel Fibre Channel port attached to the physical disk drive
<byte 96>
ushort reason_code Code identifying cause of the physical disk drive being marked inoperative
<byte 98>
ushort port HSV110 controller internal Fibre Channel port number attached to the physical disk drive or mirror port
<byte 100>
ushort dencl_num Enclosure where the physical disk drive is located
<byte 102>
{rss_flags (Redundant Storage Set member state flags)}
<byte 102>
tbits:1 member_migrating Migrating
tbits:1 member_missing Missing or never existed
tbits:1 member_abnormal Abnormal
tbits:5 reserved Reserved for future use
{}
<byte 103>
{flags (Information validity flags)}
<byte 103>
tbits:1 inq_state SCSI INQUIRY data is valid
tbits:1 quorum_disk Is Storage System quorum disk
tbits:6 reserved Reserved for future use
{}
<byte 104>
ushort rack_num Rack where the physical disk drive is located
<byte 106>
ushort bay Enclosure bay where the physical disk drive is located
<byte 108>
{inq_data (Last SCSI INQUIRY data read during discovery (Note: The inquiry data is truncated after the Version Descriptor 1 field.))}
<byte 108>
tbits:5 per_dev_typ Peripheral Device-type
tbits:3 per_qual Peripheral Qualifier
<byte 109>
tbits:7 reserved_1 Reserved
tbits:1 rmb Removable Medium bit
<byte 110>
tbits:8 version Version
<byte 111>
tbits:4 response_data Response data format ( 1 = SCSI-1, 2 = SCSI-2, 3 = SCSI-3)
tbits:1 hisup Hierarchical Support bit
tbits:1 normaca Normal ACA bit
tbits:1 obsolete Obsolete
tbits:1 aerc Asynchronous Event Reporting Capability bit
<byte 112>
utiny add_length Additional Length
<byte 113>
tbits:7 reserved_3 Reserved
tbits:1 sccs SCC Supported bit
<byte 114>
tbits:1 addr16 Address 16 bit
tbits:2 obsolete_1 Reserved
tbits:1 mchngr Medium Changer bit
tbits:1 multip Multiport bit
tbits:1 vs_1 Vendor Specific
tbits:1 encserv Enclosure Services bit
tbits:1 bque Basic Queuing bit
<byte 115>
tbits:1 vs Vendor Specific
tbits:1 cmdque Command Queuing bit
tbits:1 reserved_2 Reserved
tbits:1 linked Linked Command bit
tbits:1 sync Synchronous Transfer bit
tbits:1 wbus16 Wide Bus 16 bit
tbits:1 wbus32 Wide Bus 32 bit
tbits:1 reladr Relative Addressing bit
<byte 116>
char[8] vendor_id Vendor Identification
<byte 124>
char[16] product_id Product Identification
<byte 140>
char[4] product_rev Product Revision Level
<byte 144>
ulong[5] vendor_36_55 Vendor-specific
<byte 164>
ushort reserved_56_57 Reserved
<byte 166>
ushort vd1 Version Descriptor 1
{}
<byte 168>
ulong quorum_sequence Quorum Space Write Sequence (i.e., quorum disk 1, 2, or 3)
<byte 172>
ulong capacity LUN capacity (blocks)
<byte 176>
ulong member_state Redundant Storage Set member state
{}
Event Information Packet Type: c
EIP0C - Data Replication Manager State Change
A Data Replication Manager state change occurred.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
tag group_name_uuid Group Name UUID
<byte 88>
tag peer_scell_uuid Peer Storage System UUID
<byte 104>
tag group_uuid Data Replication Group UUID
<byte 120>
tag source_scvd_uuid Source Storage System Virtual Disk UUID
<byte 136>
tag dest_scvd_uuid If eip0c.flags.remote_adapter_wwn is set equal to 1, this field contains the WWN of the remote adapter. Otherwise, this field contains the Destination Storage System Virtual Disk UUID.
<byte 152>
ushort blocks Number of blocks in error
<byte 154>
ushort status Error status value
<byte 156>
ulong vda Virtual Disk Address in error
<byte 160>
char[8] cerp_id HSV110 controller enclosure rear panel Fibre Channel port
<byte 168>
utiny reserved Reserved for future use
<byte 169>
{flags (Field use flags)}
<byte 169>
tbits:7 reserved Reserved for future use
tbits:1 remote_adapter_wwn dest_scvd_uuid contains remote adapter WWN
{}
<byte 170>
utiny side Remote HSV110 controller used by Data Replication Manager tunnel: 0 => A; 1 => B
<byte 171>
utiny port HSV110 controller internal Fibre Channel port number
{}
Event Information Packet Type: d
EIP0D - Executive Services System Time Change
A change in system time occurred.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
utiny[3] unused Unused
<byte 75>
utiny action Action code
<byte 76>
ulong[2] reserved Reserved
<byte 84>
scmitim ctime Current time value
<byte 92>
scmitim ptime Previous time value
{}
Event Information Packet Type: e
EIP0E - Storage System Management Interface Entity Creation or Deletion
A Storage System Management Interface entity was created or deleted.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
{event_type (Entity and Event type)}
<byte 72>
ushort scmi_object_type Entity type
<byte 74>
ushort scmi_object_event_type Event Information Packet type
{}
<byte 76>
scmi_obj_hnd handle Storage System Management Interface Handle of affected entity
<byte 96>
scmi_obj_hnd add_handle Additional entity identification (Storage System Management Interface Handle)
<byte 116>
{attribute (Entity attributes)}
<byte 116>
ulong type Datatype used
<byte 120>
union value SCMI Attribute Union
<byte 120>
ulong[6] u32 As 32 bit words,
or value SCMI Attribute Union
<byte 120>
double_word[3] u64 As 64 bit words,
or value SCMI Attribute Union
<byte 120>
{obj (As typed Storage System Management Interface object handle,)}
<byte 120>
ulong value
<byte 124>
scmi_obj_hnd handle
{}
or value SCMI Attribute Union
<byte 120>
char[24] str As character string
endunion value SCMI Attribute Union
{}
<byte 144>
scmi_obj_hnd add_handle2 Additional SCMI object handle (2)
<byte 164>
ulong[4] add_data Additional Data
{}
Event Information Packet Type: f
EIP0F - Storage System Management Interface Entity Attribute Change
An attribute of a Storage System Management Interface entity has changed.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
{event_type (Entity and Event type)}
<byte 72>
ushort scmi_object_type Entity type
<byte 74>
ushort scmi_object_event_type Event Information Packet type
{}
<byte 76>
ulong secondary_id Alternate entity identification
<byte 80>
{old_attr (Old attribute information)}
<byte 80>
ulong type Datatype used
<byte 84>
union value SCMI Attribute Union
<byte 84>
ulong[6] u32 As 32 bit words,
or value SCMI Attribute Union
<byte 84>
double_word[3] u64 As 64 bit words,
or value SCMI Attribute Union
<byte 84>
{obj (As typed Storage System Management Interface object handle,)}
<byte 84>
ulong value
<byte 88>
scmi_obj_hnd handle
{}
or value SCMI Attribute Union
<byte 84>
char[24] str As character string
endunion value SCMI Attribute Union
{}
<byte 108>
{new_attr (New attribute information)}
<byte 108>
ulong type Datatype used
<byte 112>
union value SCMI Attribute Union
<byte 112>
ulong[6] u32 As 32 bit words,
or value SCMI Attribute Union
<byte 112>
double_word[3] u64 As 64 bit words,
or value SCMI Attribute Union
<byte 112>
{obj (As typed Storage System Management Interface object handle,)}
<byte 112>
ulong value
<byte 116>
scmi_obj_hnd handle
{}
or value SCMI Attribute Union
<byte 112>
char[24] str As character string
endunion value SCMI Attribute Union
{}
<byte 136>
scmi_obj_hnd handle Storage System Management Interface Handle of affected entity
<byte 156>
scmi_obj_hnd add_handle Additional entity identification (Storage System Management Interface
<byte 176>
ulong reserved reserved for future use
{}
Event Information Packet Type: 10
EIP10 - System Services HSV110 Controller State Change
A controller state change occurred.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
{node_name (World Wide Name of HSV110 controller)}
<byte 72>
ulong hi (Bits 31:28) Network Address Authority Code, (Bits 27:4) Company ID, (Bits 3:0) Type
<byte 76>
ulong lo (Bits 31:4) Node Number, (Bits 3:0) Port
{}
<byte 80>
{information (State change information)}
<byte 80>
ulong pc Program counter
<byte 84>
ulong flags Flags
<byte 88>
ulong code Code
{}
{}
Event Information Packet Type: 11
EIP11 - Disk Enclosure Environmental Monitoring Unit Services Status Change.
Status of a disk enclosure element has changed.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
{event_type (Entity and Event type)}
<byte 72>
ushort scmi_object_type Entity type
<byte 74>
ushort scmi_object_event_type Event Information Packet type
{}
<byte 76>
scmi_obj_hnd handle Storage System Management Interface Handle of affected disk enclosure
<byte 96>
ulong rack_num Rack number
<byte 100>
ulong dencl_num Disk enclosure number
<byte 104>
union alarm_error_code Alarm code
<byte 104>
ulong value As longword
or alarm_error_code Alarm code
<byte 104>
{field (By field)}
<byte 104>
utiny reserved Reserved for future use
<byte 105>
utiny ec Error code
<byte 106>
utiny en Element number
<byte 107>
utiny et Element type code
{}
endunion alarm_error_code Alarm code
<byte 108>
utiny[3] rsvd1 Reserved for future use
<byte 111>
utiny loop Loop number
<byte 112>
{enclosures[1] (Enclosure available on the Fibre Channel loop pair identified in the loop field)}
<byte 112>
utiny rack_num Rack were enclosure is located
<byte 113>
utiny dencl_num Enclosure number
{}
<byte 114>
{enclosures[0] (Enclosure available on the Fibre Channel loop pair identified in the loop field)}
<byte 114>
utiny rack_num Rack were enclosure is located
<byte 115>
utiny dencl_num Enclosure number
{}
<byte 116>
{enclosures[3] (Enclosure available on the Fibre Channel loop pair identified in the loop field)}
<byte 116>
utiny rack_num Rack were enclosure is located
<byte 117>
utiny dencl_num Enclosure number
{}
<byte 118>
{enclosures[2] (Enclosure available on the Fibre Channel loop pair identified in the loop field)}
<byte 118>
utiny rack_num Rack were enclosure is located
<byte 119>
utiny dencl_num Enclosure number
{}
<byte 120>
{enclosures[5] (Enclosure available on the Fibre Channel loop pair identified in the loop field)}
<byte 120>
utiny rack_num Rack were enclosure is located
<byte 121>
utiny dencl_num Enclosure number
{}
<byte 122>
{enclosures[4] (Enclosure available on the Fibre Channel loop pair identified in the loop field)}
<byte 122>
utiny rack_num Rack were enclosure is located
<byte 123>
utiny dencl_num Enclosure number
{}
<byte 124>
{enclosures[7] (Enclosure available on the Fibre Channel loop pair identified in the loop field)}
<byte 124>
utiny rack_num Rack were enclosure is located
<byte 125>
utiny dencl_num Enclosure number
{}
<byte 126>
{enclosures[6] (Enclosure available on the Fibre Channel loop pair identified in the loop field)}
<byte 126>
utiny rack_num Rack were enclosure is located
<byte 127>
utiny dencl_num Enclosure number
{}
<byte 128>
{enclosures[9] (Enclosure available on the Fibre Channel loop pair identified in the loop field)}
<byte 128>
utiny rack_num Rack were enclosure is located
<byte 129>
utiny dencl_num Enclosure number
{}
<byte 130>
{enclosures[8] (Enclosure available on the Fibre Channel loop pair identified in the loop field)}
<byte 130>
utiny rack_num Rack were enclosure is located
<byte 131>
utiny dencl_num Enclosure number
{}
<byte 132>
ulong[12] rsvd Reserved for future use
{}
Event Information Packet Type: 12
EIP12 - Fibre Channel Services Physical Disk Drive/Mirror Port Unexpected Work Encountered
Unexpected work was received from a physical disk drive or the mirror port.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
tag device UUID of the physical disk drive or HSV110 controller associated with the event
<byte 88>
char[8] cerp_id HSV110 controller enclosure rear panel Fibre Channel port attached to the physical disk drive or mirror port
<byte 96>
ushort reserved Reserved
<byte 98>
ushort port HSV110 controller internal Fibre Channel port number attached to the physical disk drive or mirror port
<byte 100>
ushort dencl_num Enclosure where the physical disk drive is located
<byte 102>
ushort al_pa AL_PA of the physical disk drive or the mirror port
<byte 104>
ushort rack_num Rack where the physical disk drive is located
<byte 106>
ushort bay Enclosure bay where the physical disk drive is located
<byte 108>
ulong[14] hdr_cdb Command Descriptor Block issued and Fibre Channel Header
{}
Event Information Packet Type: 13
EIP13 - Fibre Channel Services Physical Disk Drive/Mirror Port/Drive Enclosure Environmental Monitoring Unit Error summary.
Summary of errors encountered while attempting to access a physical disk drive, the mirror port, or a Drive Enclosure Environmental Monitoring Unit.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
tag device UUID of the physical disk drive, HSV110 controller, or Drive Enclosure Environmental Monitoring Unit associated with the event
<byte 88>
char[8] cerp_id HSV110 controller enclosure rear panel Fibre Channel port attached to the physical disk drive or mirror port
<byte 96>
ushort reserved Reserved
<byte 98>
ushort port HSV110 controller internal Fibre Channel port number attached to the physical disk drive or mirror port
<byte 100>
ushort dencl_num Enclosure where the physical disk drive is located
<byte 102>
ushort al_pa AL_PA of the physical disk drive or the mirror port
<byte 104>
ushort rack_num Rack where the physical disk drive is located
<byte 106>
ushort bay Enclosure bay where the physical disk drive is located
<byte 108>
ulong fed_class Fibre Channel Exchange Descriptor class
<byte 112>
ulong num_times Number of occurrences of the error.
<byte 116>
{enclosures[1] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 116>
utiny rack_num Rack were enclosure is located
<byte 117>
utiny dencl_num Enclosure number
{}
<byte 118>
{enclosures[0] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 118>
utiny rack_num Rack were enclosure is located
<byte 119>
utiny dencl_num Enclosure number
{}
<byte 120>
{enclosures[3] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 120>
utiny rack_num Rack were enclosure is located
<byte 121>
utiny dencl_num Enclosure number
{}
<byte 122>
{enclosures[2] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 122>
utiny rack_num Rack were enclosure is located
<byte 123>
utiny dencl_num Enclosure number
{}
<byte 124>
{enclosures[5] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 124>
utiny rack_num Rack were enclosure is located
<byte 125>
utiny dencl_num Enclosure number
{}
<byte 126>
{enclosures[4] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 126>
utiny rack_num Rack were enclosure is located
<byte 127>
utiny dencl_num Enclosure number
{}
<byte 128>
{enclosures[7] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 128>
utiny rack_num Rack were enclosure is located
<byte 129>
utiny dencl_num Enclosure number
{}
<byte 130>
{enclosures[6] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 130>
utiny rack_num Rack were enclosure is located
<byte 131>
utiny dencl_num Enclosure number
{}
<byte 132>
{enclosures[9] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 132>
utiny rack_num Rack were enclosure is located
<byte 133>
utiny dencl_num Enclosure number
{}
<byte 134>
{enclosures[8] (Enclosure available on the Fibre Channel port identified in the cerp_id and port fields)}
<byte 134>
utiny rack_num Rack were enclosure is located
<byte 135>
utiny dencl_num Enclosure number
{}
<byte 136>
char[8] missing_cerp_id HSV110 controller enclosure rear panel Fibre Channel port that cannot connect to physical disk drive or mirror port
<byte 144>
ushort padding LW Padding
<byte 146>
ushort missing_port HSV110 controller internal Fibre Channel port number that cannont connect to the physical disk drive or mirror port
{}
Event Information Packet Type: 14
EIP14 - Diagnostic Operations Generator Detected Failure.
A failure was detected during the execution of a diagnostic.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
{eep_error (Diagnostic error EEPROM data)}
<byte 72>
utiny padding Pad to longword align this structure
<byte 73>
utiny count Duplicate error count
<byte 74>
utiny test_num Test number
<byte 75>
utiny TE_num TE number
<byte 76>
ulong Z_code Z's code
<byte 80>
ulong error_code Error code
<byte 84>
ulong address Address of Error
<byte 88>
ulong expected Expected Data
<byte 92>
ulong actual Actual Data
<byte 96>
ulong[2] uptime Time of error
{}
<byte 104>
ulong dimm_size Size of this HSV110 controller's DIMM in megabytes
{}
Event Information Packet Type: 15
EIP15 - Container Services Management Operation has started or completed.
An operation on a Disk Group has started or completed.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
tag tag1 UUID of the Virtual Disk, physical disk drive, or Disk Group associated with the event
<byte 88>
tag tag2 UUID of the Virtual Disk, physical disk drive, or Disk Group associated with the event
<byte 104>
ulong state Event-specific state value
<byte 108>
ulong status Event-specific operation status
{}
Event Information Packet Type: 16
EIP16 - Data Replication Manager Time Report.
An HSV110 controller has received a time report message.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
uuid sender HSV110 controller initiating time report message
<byte 88>
uuid receiver HSV110 controller receiving time report message
<byte 104>
uuid receiver_partner Other HSV110 controller in receiving HSV110 controller's Storage System
<byte 120>
scmitim sent_time Time message was sent
<byte 128>
scmitim received_time Time message was received
{}
Event Information Packet Type: 17
EIP17 - Fibre Channel Services Fibre Channel Port Loop Config
A new device map has been generated on a Fibre Channel port.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
char[8] cerp_id HSV110 controller enclosure rear panel Fibre Channel port
<byte 80>
ulong map_id Using the LSB of the RTC to tie multi-page maps together in the event log.
<byte 84>
utiny entries Number of map entries (ALPAs) in this map
<byte 85>
utiny total_pages Total pages containing portions of this map
<byte 86>
utiny page Page number of this loop map event
<byte 87>
utiny port HSV110 controller internal Fibre Channel port number
<byte 88>
utiny[92] loop_map Loop configuration info
{}
Event Information Packet Type: 18
EIP18 - Storage System State Services Redundant Storage Set State Change
A Redundant Storage Set state change occurred.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
tag ldad_tag Tag of the Disk Group associated with the event
<byte 88>
ushort target_rss Migration target
<byte 90>
ushort source_rss Migration source
<byte 92>
ushort target_migr Migration flags for target
<byte 94>
ushort source_migr Migration flags for source
<byte 96>
utiny[16] smembers Volumes in source
<byte 112>
utiny[16] tmembers Volumes in target
{}
Event Information Packet Type: 1b
EIP1B - Host Port Event
A Host Port Event Occurred
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
tag scvd_tag Virtual Disk tag
{}
Event Information Packet Type: 1e
EIP1E - General Storage System State Services State Information Event
General Storage System state information to be reported.
{Event Log Packet Event Specific Information}
<byte 0>
{flags (Flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Event sequence number reset occurred
tbits:1 outofsequence Event reported out of sequence due to Final Event Block reconciliation or lost host event
tbits:1 requeued Event requeued following restart or resynchronization
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort count Event specific information size in bytes
<byte 4>
ulong sequence_number Sequence number assigned to the event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd reporting_ctrlr Storage System Management Interface Handle of HSV110 controller that reported the event
<byte 52>
scmitim report_time Time event was reported
<byte 60>
ulong report_location Location of event report call
<byte 64>
{header (Header Information)}
<byte 64>
union u Event Code Union
<byte 64>
{ec (Event Code)}
<byte 64>
utiny eiptype Event Information Packet Type Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Event Code Union
<byte 64>
ulong value Event Code Value
endunion u Event Code Union
<byte 68>
utiny revision Packet revision number
<byte 69>
utiny type Packet type
<byte 70>
ushort count Number of bytes in packet
{}
<byte 72>
char[12] info Informational String
<byte 84>
ulong[24] data Informational Data
{}
TERMINATION EVENT BLOCK:
{Termination Event Block}
<byte 0>
union u Last Termination Event Block Union
<byte 0>
{data (Termination Event Block Data)}
<byte 0>
{ltei (Last Termination Event Information)}
<byte 0>
{lteihd (Last Termination Event Information Header)}
<byte 0>
{flags (Last Termination Event flags)}
<byte 0>
tbits:1 time_set Time has been set on this HSV110 controller
tbits:1 time_synched Time has been synchronized with all HSV110 controllers in the Storage System
tbits:1 seq_reset Termination event sequence number reset occurred
tbits:1 cccc_forced Coupled crash forced
tbits:1 rsvd Pad to fill byte
tbits:1 labcode Event reported using LAB code
tbits:1 prictrlr Event reported by primary HSV110 controller (Note: Not valid until Storage System primary HSV110 controller is elected)
tbits:1 spsctrlr Single power supply HSV110 controller
{}
<byte 1>
utiny revision Structure revision number
<byte 2>
ushort size Structure size
{}
<byte 4>
{lter (Last Termination Event Report Block)}
<byte 4>
ulong seq Sequence number assigned to the termination event
<byte 8>
char[4] sw_version HSV110 controller software version number string
<byte 12>
char[12] baselevel_id HSV110 controller baselevel build string
<byte 24>
char[8] ctrlr_model_id HSV110 controller model string
<byte 32>
scmi_obj_hnd terminating_ctrlr Storage System Management Interface Handle of HSV110 controller that terminated operation
<byte 52>
scmitim termination_time Time termination event occurred
<byte 60>
{termination_event (Termination event information)}
<byte 60>
ulong termination_location Location of termination event report call
<byte 64>
union u Termination Code Union
<byte 64>
{code (Termination Code)}
<byte 64>
tbits:5 parc Parameter Count
tbits:2 drcc Dump/Restart Control Code
tbits:1 cccc Coupled Crash Control Code
<byte 65>
cacode cac Corrective Action Code
<byte 66>
utiny evnum Event Number
<byte 67>
utiny scid HSV110 Controller Software Component Identification
{}
or u Termination Code Union
<byte 64>
ulong value Termination Code Value
endunion u Termination Code Union
<byte 68>
{params (Termination Parameters)}
<byte 68>
ulong[31] param Termination Parameters
{}
{}
<byte 192>
utiny[2] reserved Reserved
<byte 194>
{flags (Other Last Termination Event flags)}
<byte 194>
tbits:1 lg_send_sts Last Gasp send status
tbits:1 stack_bad Stack contains pointer outside stack area
tbits:1 stack_guard_bad System or process stack guard value(s) overwritten
tbits:1 short_term_path Short termination path taken
tbits:1 feb_saved Final Event Block saved
tbits:3 rsvd Pad to fill byte
{}
<byte 195>
utiny reuea_index Termination Processing Recursive Entry Event or Unexpected Event array index
<byte 196>
ulonglong uptime Number of seconds HSV110 controller has run functional code
{}
<byte 204>
{sa (Exception save area)}
<byte 204>
ulong[32] registers R0-R31,
<byte 332>
ulong srr0 SRR0,
<byte 336>
ulong srr1 SRR1,
<byte 340>
ulong cr CR,
<byte 344>
ulong xer XER,
<byte 348>
ulong ctr CTR,
<byte 352>
ulong lr LR,
<byte 356>
ulong exception Exception Code,
<byte 360>
ulong count Exception Count (MC).
{}
<byte 364>
char[8] current_process Current process name
<byte 372>
{stack (Stack information)}
<byte 372>
ulong stack_depth Total calls made
<byte 376>
{stack[0] (Stack entries)}
<byte 376>
ulong bc Back chain (old stack pointer)
<byte 380>
ulong slr Saved link register
{}
<byte 384>
{stack[1] (Stack entries)}
<byte 384>
ulong bc Back chain (old stack pointer)
<byte 388>
ulong slr Saved link register
{}
<byte 392>
{stack[2] (Stack entries)}
<byte 392>
ulong bc Back chain (old stack pointer)
<byte 396>
ulong slr Saved link register
{}
<byte 400>
{stack[3] (Stack entries)}
<byte 400>
ulong bc Back chain (old stack pointer)
<byte 404>
ulong slr Saved link register
{}
<byte 408>
{stack[4] (Stack entries)}
<byte 408>
ulong bc Back chain (old stack pointer)
<byte 412>
ulong slr Saved link register
{}
<byte 416>
{stack[5] (Stack entries)}
<byte 416>
ulong bc Back chain (old stack pointer)
<byte 420>
ulong slr Saved link register
{}
<byte 424>
{stack[6] (Stack entries)}
<byte 424>
ulong bc Back chain (old stack pointer)
<byte 428>
ulong slr Saved link register
{}
<byte 432>
{stack[7] (Stack entries)}
<byte 432>
ulong bc Back chain (old stack pointer)
<byte 436>
ulong slr Saved link register
{}
<byte 440>
{stack[8] (Stack entries)}
<byte 440>
ulong bc Back chain (old stack pointer)
<byte 444>
ulong slr Saved link register
{}
<byte 448>
{stack[9] (Stack entries)}
<byte 448>
ulong bc Back chain (old stack pointer)
<byte 452>
ulong slr Saved link register
{}
<byte 456>
{stack[10] (Stack entries)}
<byte 456>
ulong bc Back chain (old stack pointer)
<byte 460>
ulong slr Saved link register
{}
<byte 464>
{stack[11] (Stack entries)}
<byte 464>
ulong bc Back chain (old stack pointer)
<byte 468>
ulong slr Saved link register
{}
<byte 472>
{stack[12] (Stack entries)}
<byte 472>
ulong bc Back chain (old stack pointer)
<byte 476>
ulong slr Saved link register
{}
<byte 480>
{stack[13] (Stack entries)}
<byte 480>
ulong bc Back chain (old stack pointer)
<byte 484>
ulong slr Saved link register
{}
<byte 488>
{stack[14] (Stack entries)}
<byte 488>
ulong bc Back chain (old stack pointer)
<byte 492>
ulong slr Saved link register
{}
<byte 496>
{stack[15] (Stack entries)}
<byte 496>
ulong bc Back chain (old stack pointer)
<byte 500>
ulong slr Saved link register
{}
<byte 504>
{stack[16] (Stack entries)}
<byte 504>
ulong bc Back chain (old stack pointer)
<byte 508>
ulong slr Saved link register
{}
<byte 512>
{stack[17] (Stack entries)}
<byte 512>
ulong bc Back chain (old stack pointer)
<byte 516>
ulong slr Saved link register
{}
<byte 520>
{stack[18] (Stack entries)}
<byte 520>
ulong bc Back chain (old stack pointer)
<byte 524>
ulong slr Saved link register
{}
<byte 528>
{stack[19] (Stack entries)}
<byte 528>
ulong bc Back chain (old stack pointer)
<byte 532>
ulong slr Saved link register
{}
<byte 536>
{stack[20] (Stack entries)}
<byte 536>
ulong bc Back chain (old stack pointer)
<byte 540>
ulong slr Saved link register
{}
<byte 544>
{stack[21] (Stack entries)}
<byte 544>
ulong bc Back chain (old stack pointer)
<byte 548>
ulong slr Saved link register
{}
<byte 552>
{stack[22] (Stack entries)}
<byte 552>
ulong bc Back chain (old stack pointer)
<byte 556>
ulong slr Saved link register
{}
<byte 560>
{stack[23] (Stack entries)}
<byte 560>
ulong bc Back chain (old stack pointer)
<byte 564>
ulong slr Saved link register
{}
<byte 568>
{stack[24] (Stack entries)}
<byte 568>
ulong bc Back chain (old stack pointer)
<byte 572>
ulong slr Saved link register
{}
<byte 576>
{stack[25] (Stack entries)}
<byte 576>
ulong bc Back chain (old stack pointer)
<byte 580>
ulong slr Saved link register
{}
<byte 584>
{stack[26] (Stack entries)}
<byte 584>
ulong bc Back chain (old stack pointer)
<byte 588>
ulong slr Saved link register
{}
<byte 592>
{stack[27] (Stack entries)}
<byte 592>
ulong bc Back chain (old stack pointer)
<byte 596>
ulong slr Saved link register
{}
<byte 600>
{stack[28] (Stack entries)}
<byte 600>
ulong bc Back chain (old stack pointer)
<byte 604>
ulong slr Saved link register
{}
<byte 608>
{stack[29] (Stack entries)}
<byte 608>
ulong bc Back chain (old stack pointer)
<byte 612>
ulong slr Saved link register
{}
<byte 616>
{stack[30] (Stack entries)}
<byte 616>
ulong bc Back chain (old stack pointer)
<byte 620>
ulong slr Saved link register
{}
<byte 624>
{stack[31] (Stack entries)}
<byte 624>
ulong bc Back chain (old stack pointer)
<byte 628>
ulong slr Saved link register
{}
<byte 632>
*ptr *bad_stack_ptr Bad stack address
<byte 636>
ulong system_stack_guard System stack guard intact flags (set to 1 if not intact)
<byte 640>
ulong[16] stack_guard Process stack guard intact flags (set to 1 if not intact)
{}
<byte 704>
{hardware (Hardware registers)}
<byte 704>
{flags (Hardware registers gathered flags)}
<byte 704>
lbits:1 st16c2552_uart2 ST16C2552 UART2 registers gathered
lbits:1 st16c2552_uart1 ST16C2552 UART1 registers gathered
lbits:1 toyclock DS1557 4MEG NV Y2KC Timekeeping RAM registers gathered
lbits:1 g3_glue_csr G3 Glue Chip CSR registers gathered
lbits:1 surge_csr Surge Chip CSR registers gathered
lbits:1 surge_pcicfg Surge PCI Configuration registers gathered
lbits:1 quasar_gpt General Purpose Timer registers gathered
lbits:1 quasar_iic1 IIC1 Core registers gathered
lbits:1 quasar_iic0 IIC0 Core registers gathered
lbits:1 quasar_uart1 UART1 Core registers gathered
lbits:1 quasar_uart0 UART0 Core registers gathered
lbits:1 quasar_cpr Clock, Power Management and Reset registers gathered
lbits:1 quasar_uic Universal Interrupt Controller registers gathered
lbits:1 quasar_plbmc Processor Local Bus Macro Configuration registers gathered
lbits:1 quasar_ocpbbm On-Chip Peripheral Bus Bridge Macro registers gathered
lbits:1 quasar_plbpci Processor Local Bus-PCI Core registers gathered
lbits:1 quasar_plbiasc Processor Local Bus Interrupt registers gathered
lbits:1 quasar_mc Memory Controller Registers gathered
lbits:1 quasar_pi Processor Interface registers gathered
lbits:1 quasar_pcicfg PCI Configuration registers gathered
lbits:12 rsvd
{}
<byte 708>
{tach_flags (Tachyon registers gathered flags)}
<byte 708>
lbits:1 tachyon6_csr Tachyon 6 CSR registers gathered
lbits:1 tachyon6_pcicfg Tachyon 6 PCI Configuration registers gathered
lbits:1 tachyon6_gbic Tachyon 6 GBIC Small Form Factor Serial ID data gathered
lbits:1 tachyon5_csr Tachyon 5 CSR registers gathered
lbits:1 tachyon5_pcicfg Tachyon 5 PCI Configuration registers gathered
lbits:1 tachyon5_gbic Tachyon 5 GBIC Small Form Factor Serial ID data gathered
lbits:1 tachyon4_csr Tachyon 4 CSR registers gathered
lbits:1 tachyon4_pcicfg Tachyon 4 PCI Configuration registers gathered
lbits:1 tachyon4_gbic Tachyon 4 GBIC Small Form Factor Serial ID data gathered
lbits:1 tachyon3_csr Tachyon 3 CSR registers gathered
lbits:1 tachyon3_pcicfg Tachyon 3 PCI Configuration registers gathered
lbits:1 tachyon3_gbic Tachyon 3 GBIC Small Form Factor Serial ID data gathered
lbits:1 tachyon2_csr Tachyon 2 CSR registers gathered
lbits:1 tachyon2_pcicfg Tachyon 2 PCI Configuration registers gathered
lbits:1 tachyon2_gbic Tachyon 2 GBIC Small Form Factor Serial ID data gathered
lbits:1 tachyon1_csr Tachyon 1 CSR registers gathered
lbits:1 tachyon1_pcicfg Tachyon 1 PCI Configuration registers gathered
lbits:1 tachyon1_gbic Tachyon 1 GBIC Small Form Factor Serial ID data gathered
lbits:1 tachyon0_csr Tachyon 0 CSR registers gathered
lbits:1 tachyon0_pcicfg Tachyon 0 PCI Configuration registers gathered
lbits:1 tachyon0_gbic Tachyon 0 GBIC Small Form Factor Serial ID data gathered
lbits:11 rsvd
{}
<byte 712>
{quasar (Quasar register save area)}
<byte 712>
union pcicfg Quasar PCI Configuration Registers
<byte 712>
ulong[25] pcicfga Quasar PCI Configuration Registers As Longwords
or pcicfg Quasar PCI Configuration Registers
<byte 712>
{pcicfg (Quasar PCI Configuration Registers By Field)}
<byte 712>
union pci_device_id (Offset 02) PCI Device ID
<byte 712>
{field (By field)}
<byte 712>
bits:16 id Vendor ID
{}
or pci_device_id (Offset 02) PCI Device ID
<byte 712>
ushort value As word
endunion pci_device_id (Offset 02) PCI Device ID
<byte 714>
union pci_vendor_id (Offset 00) PCI Vendor ID
<byte 714>
{field (By field)}
<byte 714>
bits:16 id Vendor ID
{}
or pci_vendor_id (Offset 00) PCI Vendor ID
<byte 714>
ushort value As word
endunion pci_vendor_id (Offset 00) PCI Vendor ID
<byte 716>
union pci_status (Offset 06) PCI Status
<byte 716>
{field (By field)}
<byte 716>
bits:4 rsvd Reserved
bits:1 cpl New Capabilities
bits:1 cap66mhz 66MHz Capable
bits:1 udfsup UDF Supported (read only, always returns 0)
bits:1 capfbbw Fast Back-to-Back Capable (read only, always returns 0)
bits:1 dperr Data Parity Error Detected
bits:2 devsel_time PCI_DEVSEL# response timing (read only, always returns 1)
bits:1 sgnltabrt Signaled Target Abort
bits:1 rcvdtabrt Received Target Abort
bits:1 rcvdmabrt Received Master Abort
bits:1 sgnlsyserr Signaled System Error
bits:1 perr Detected Parity Error
{}
or pci_status (Offset 06) PCI Status
<byte 716>
ushort value As word
endunion pci_status (Offset 06) PCI Status
<byte 718>
union pci_cmd (Offset 04) PCI Command
<byte 718>
{field (By field)}
<byte 718>
bits:1 io_access I/O Access Control
bits:1 mem_access Memory Access Control
bits:1 pcim_en PCI Master Enable
bits:1 scycle_en Special Cycle Enable (read only, always returns 0)
bits:1 memwinv Memory Write & Invalidate
bits:1 paltsnp_en Palette Snooping Enable (read only, always returns 0)
bits:1 perrrsp Parity Error Response
bits:1 waitcycctrl Wait Cycle Control
bits:1 serrx_en SERR# Enable
bits:1 fbbw_en Fast Back-to-Back Write enable (read only, always returns 0)
bits:6 rsvd Reserved
{}
or pci_cmd (Offset 04) PCI Command
<byte 718>
ushort value As word
endunion pci_cmd (Offset 04) PCI Command
<byte 720>
union pci_class (Offset 09) PCI Class
<byte 720>
{field (By field)}
<byte 720>
tbits:8 baseclcode Base Class Code
<byte 721>
tbits:8 subclcode Subclass Code
<byte 722>
tbits:8 reglevpi Register Level Programming Interface
{}
or pci_class (Offset 09) PCI Class
<byte 720>
utiny[3] value As byte array
endunion pci_class (Offset 09) PCI Class
<byte 723>
union pci_rev_id (Offset 08) PCI Revision ID
<byte 723>
{field (By field)}
<byte 723>
tbits:8 id Revision ID
{}
or pci_rev_id (Offset 08) PCI Revision ID
<byte 723>
utiny value As byte
endunion pci_rev_id (Offset 08) PCI Revision ID
<byte 724>
union pci_bist (Offset 0F) PCI Built-in Self Test
<byte 724>
{field (By field)}
<byte 724>
tbits:4 cc Completion Code
tbits:2 rsvd Reserved
tbits:1 selftest Self Test
tbits:1 supported BIST Supported
{}
or pci_bist (Offset 0F) PCI Built-in Self Test
<byte 724>
utiny value As byte
endunion pci_bist (Offset 0F) PCI Built-in Self Test
<byte 725>
union pci_hdrtype (Offset 0E) PCI Header Type
<byte 725>
{field (By field)}
<byte 725>
tbits:8 type PCI header type (read only)
{}
or pci_hdrtype (Offset 0E) PCI Header Type
<byte 725>
utiny value As byte
endunion pci_hdrtype (Offset 0E) PCI Header Type
<byte 726>
union pci_lattmr (Offset 0D) PCI Latency Timer
<byte 726>
{field (By field)}
<byte 726>
tbits:8 tmr PCI latency timer
{}
or pci_lattmr (Offset 0D) PCI Latency Timer
<byte 726>
utiny value As byte
endunion pci_lattmr (Offset 0D) PCI Latency Timer
<byte 727>
union pci_clsize (Offset 0C) PCI Cache Line Size
<byte 727>
{field (By field)}
<byte 727>
tbits:8 size PCI cache line size
{}
or pci_clsize (Offset 0C) PCI Cache Line Size
<byte 727>
utiny value As byte
endunion pci_clsize (Offset 0C) PCI Cache Line Size
<byte 728>
union pci_0_bar (Offset 10) PCI BAR 0
<byte 728>
{field (By field)}
<byte 728>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:8 baseaddraz Base Address
lbits:20 baseaddr Base Address
{}
or pci_0_bar (Offset 10) PCI BAR 0
<byte 728>
ulong value As longword
endunion pci_0_bar (Offset 10) PCI BAR 0
<byte 732>
union pci_ptm1_bar (Offset 14) PCI PTM 1 BAR
<byte 732>
{field (By field)}
<byte 732>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:8 baseaddraz Base Address
lbits:20 baseaddr Base Address
{}
or pci_ptm1_bar (Offset 14) PCI PTM 1 BAR
<byte 732>
ulong value As longword
endunion pci_ptm1_bar (Offset 14) PCI PTM 1 BAR
<byte 736>
union pci_ptm2_bar (Offset 18) PCI PTM 2 BAR
<byte 736>
{field (By field)}
<byte 736>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:8 baseaddraz Base Address
lbits:20 baseaddr Base Address
{}
or pci_ptm2_bar (Offset 18) PCI PTM 2 BAR
<byte 736>
ulong value As longword
endunion pci_ptm2_bar (Offset 18) PCI PTM 2 BAR
<byte 740>
union pci_unusd1_bar (Offset 1C) PCI Unused BAR 1
<byte 740>
{field (By field)}
<byte 740>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:8 baseaddraz Base Address
lbits:20 baseaddr Base Address
{}
or pci_unusd1_bar (Offset 1C) PCI Unused BAR 1
<byte 740>
ulong value As longword
endunion pci_unusd1_bar (Offset 1C) PCI Unused BAR 1
<byte 744>
union pci_unusd2_bar (Offset 20) PCI Unused BAR 2
<byte 744>
{field (By field)}
<byte 744>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:8 baseaddraz Base Address
lbits:20 baseaddr Base Address
{}
or pci_unusd2_bar (Offset 20) PCI Unused BAR 2
<byte 744>
ulong value As longword
endunion pci_unusd2_bar (Offset 20) PCI Unused BAR 2
<byte 748>
union pci_unusd3_bar (Offset 24) PCI Unused BAR 3
<byte 748>
{field (By field)}
<byte 748>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:8 baseaddraz Base Address
lbits:20 baseaddr Base Address
{}
or pci_unusd3_bar (Offset 24) PCI Unused BAR 3
<byte 748>
ulong value As longword
endunion pci_unusd3_bar (Offset 24) PCI Unused BAR 3
<byte 752>
union pci_csrptr (Offset 28) PCI Cardbus CIS Pointer
<byte 752>
{field (By field)}
<byte 752>
lbits:32 ptr PCI Cardbus CIS Pointer (must be zero)
{}
or pci_csrptr (Offset 28) PCI Cardbus CIS Pointer
<byte 752>
ulong value As longword
endunion pci_csrptr (Offset 28) PCI Cardbus CIS Pointer
<byte 756>
union pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 756>
{field (By field)}
<byte 756>
bits:16 id Vendor ID
{}
or pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 756>
ushort value As word
endunion pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 758>
union pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 758>
{field (By field)}
<byte 758>
bits:16 id Vendor ID
{}
or pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 758>
ushort value As word
endunion pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 760>
{pci_rsvd30_33 ((Offset 30) PCI Reserved 1)}
<byte 760>
ulong value
{}
<byte 764>
{pci_rsvd34_37 ((Offset 34) PCI Reserved 2)}
<byte 764>
ulong value
{}
<byte 768>
{pci_rsvd38_3b ((Offset 38) PCI Reserved 3)}
<byte 768>
ulong value
{}
<byte 772>
union pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 772>
{field (By field)}
<byte 772>
tbits:8 lat PCI Maximum Latentcy (read only)
{}
or pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 772>
utiny value As byte
endunion pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 773>
union pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 773>
{field (By field)}
<byte 773>
tbits:8 grant PCI Minimum Grant (read only)
{}
or pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 773>
utiny value As byte
endunion pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 774>
union pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 774>
{field (By field)}
<byte 774>
tbits:8 pin PCI Interrupt Pin (read only)
{}
or pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 774>
utiny value As byte
endunion pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 775>
union pci_int_line (Offset 3C) PCI Interrupt Line
<byte 775>
{field (By field)}
<byte 775>
tbits:8 line PCI Interrupt Line
{}
or pci_int_line (Offset 3C) PCI Interrupt Line
<byte 775>
utiny value As byte
endunion pci_int_line (Offset 3C) PCI Interrupt Line
<byte 776>
{unused43 ((Offset 43) Unused)}
<byte 776>
utiny value
{}
<byte 777>
union pci_disc_ctr (Offset 42) PCI Disconnect Counter
<byte 777>
{field (By field)}
<byte 777>
tbits:8 ctr PCI Disconnect Counter (read only, always returns 0)
{}
or pci_disc_ctr (Offset 42) PCI Disconnect Counter
<byte 777>
utiny value As byte
endunion pci_disc_ctr (Offset 42) PCI Disconnect Counter
<byte 778>
union pci_sbus_numbr (Offset 41) PCI Subordinate Bus Number
<byte 778>
{field (By field)}
<byte 778>
tbits:8 bus PCI Bus Number (read only, always returns 0)
{}
or pci_sbus_numbr (Offset 41) PCI Subordinate Bus Number
<byte 778>
utiny value As byte
endunion pci_sbus_numbr (Offset 41) PCI Subordinate Bus Number
<byte 779>
union pci_bus_number (Offset 40) PCI Bus Number
<byte 779>
{field (By field)}
<byte 779>
tbits:8 bus PCI Bus Number (read only, always returns 0)
{}
or pci_bus_number (Offset 40) PCI Bus Number
<byte 779>
utiny value As byte
endunion pci_bus_number (Offset 40) PCI Bus Number
<byte 780>
union pci_arb_contl (Offset 44) PCI Arbiter Control
<byte 780>
{field (By field)}
<byte 780>
lbits:1 pm_banka0 Priority Mode, Bank A0
lbits:1 fp_banka0 Fixed Priority Control, Bank A0
lbits:1 pm_banka1 Priority Mode, Bank A1
lbits:1 fp_banka1 Fixed Priority Control, Bank A1
lbits:1 pm_banka2 Priority Mode, Bank A2
lbits:1 fp_banka2 Fixed Priority Control, Bank A1
lbits:1 pm_banka3 Priority Mode, Bank A3 (Quasar reserved)
lbits:1 fp_banka3 Fixed Priority Control, Bank A3 (Quasar reserved)
lbits:1 pm_bankb0 Priority Mode, Bank B0
lbits:1 fp_bankb0 Fixed Priority Control, Bank B0
lbits:1 pm_bankb1 Priority Mode, Bank B1
lbits:1 fp_bankb1 Fixed Priority Control, Bank B1
lbits:1 pm_bankc0 Priority Mode, Bank C0
lbits:1 unused Unused
lbits:10 rsvd Reserved
lbits:1 arbdisable Arbiter Disable
lbits:1 balance Priority tree balance
lbits:1 buspark_en Bus Parking Enable
lbits:1 buspark_md Bus Parking Mode
lbits:4 maxxfercnt Maximum Transfer Count Per Grant
{}
or pci_arb_contl (Offset 44) PCI Arbiter Control
<byte 780>
ulong value As longword
endunion pci_arb_contl (Offset 44) PCI Arbiter Control
<byte 784>
union bridgeopt1 (Offset 4A) Bridge Options 1
<byte 784>
{field (By field)}
<byte 784>
bits:4 rsvd Reserved
bits:1 plbgma_en PLB Guarded Memory Access enable
bits:2 plbreqpri PLB Request Priority
bits:1 plblerr_en PLB Lock Error Status enable
bits:8 plbmltc PLB Master Latency Timer Count Register (four low-order bits read only, hardwired to logic 1)
{}
or bridgeopt1 (Offset 4A) Bridge Options 1
<byte 784>
ushort value As word
endunion bridgeopt1 (Offset 4A) Bridge Options 1
<byte 786>
union error_status (Offset 49) Error Status
<byte 786>
{field (By field)}
<byte 786>
tbits:1 plbur PLB Unsupported Request
tbits:1 pci_serr_wdp PCI_SERR# on Write Data Parity Error
tbits:1 merrae MErr Assertion Event
tbits:1 merrd MErr Detected
tbits:1 serrarmerr SERR# Asserted on Received MErr
tbits:3 rsvd Reserved
{}
or error_status (Offset 49) Error Status
<byte 786>
utiny value As byte
endunion error_status (Offset 49) Error Status
<byte 787>
union error_enable (Offset 48) Error Enable
<byte 787>
{field (By field)}
<byte 787>
tbits:1 mae_en Master Abort Error Enable
tbits:1 wdppciserr_en Write Data Parity PCI_SERR# Enable
tbits:1 merra_en MErr Assertion Enable
tbits:1 merrd_en MErr Detection Enable
tbits:2 merr_en Merr Response Enable
tbits:1 tae_en Target Abort Error Enable
tbits:1 rsvd Reserved
{}
or error_enable (Offset 48) Error Enable
<byte 787>
utiny value As byte
endunion error_enable (Offset 48) Error Enable
<byte 788>
union sesr (Offset 4C) Slave Error Syndrome
<byte 788>
{field (By field)}
<byte 788>
lbits:8 rsvd Reserved
lbits:1 m3al Master 3 SEAR Address Lock (Quasar Reserved)
lbits:1 m3fl Master 3 SESR Field Lock (Quasar Reserved)
lbits:1 m3rws Master 3 Read/Write Status (Quasar Reserved)
lbits:3 m3et Master 3 Error Type (Quasar Reserved)
lbits:1 m2al Master 2 SEAR Address Lock (Quasar Reserved)
lbits:1 m2fl Master 2 SESR Field Lock (Quasar Reserved)
lbits:1 m2rws Master 2 Read/Write (Quasar Reserved) Status
lbits:3 m2et Master 2 Error Type (Quasar Reserved)
lbits:1 m1al Master 1 (the PCI interface Core in Quasar) SEAR Address Lock
lbits:1 m1fl Master 1 (the PCI interface Core in Quasar) SESR Field Lock
lbits:1 m1rws Master 1 (the PCI interface Core in Quasar) Read/Write Status
lbits:3 m1et Master 1 (the PCI interface Core in Quasar) Error Type
lbits:1 m0al Master 0 (60X-PLB Core in Quasar) SEAR Address Lock
lbits:1 m0fl Master 0 (60X-PLB Core in Quasar) SESR Field Lock
lbits:1 m0rws Master 0 (60X-PLB Core in Quasar) Read/Write Status
lbits:3 m0et Master 0 (60X-PLB Core in Quasar) Error Type
{}
or sesr (Offset 4C) Slave Error Syndrome
<byte 788>
ulong value As longword
endunion sesr (Offset 4C) Slave Error Syndrome
<byte 792>
union sear0 (Offset 50) Processor Local Bus Slave Error Address 0
<byte 792>
{field (By field)}
<byte 792>
lbits:32 addr PLB Slave Error Address (read only)
{}
or sear0 (Offset 50) Processor Local Bus Slave Error Address 0
<byte 792>
ulong value As longword
endunion sear0 (Offset 50) Processor Local Bus Slave Error Address 0
<byte 796>
union sear1 (Offset 54) Processor Local Bus Slave Error Address 1
<byte 796>
{field (By field)}
<byte 796>
lbits:32 addr PLB Slave Error Address (read only)
{}
or sear1 (Offset 54) Processor Local Bus Slave Error Address 1
<byte 796>
ulong value As longword
endunion sear1 (Offset 54) Processor Local Bus Slave Error Address 1
<byte 800>
union sear2 (Offset 58) Processor Local Bus Slave Error Address 2
<byte 800>
{field (By field)}
<byte 800>
lbits:32 addr PLB Slave Error Address (read only)
{}
or sear2 (Offset 58) Processor Local Bus Slave Error Address 2
<byte 800>
ulong value As longword
endunion sear2 (Offset 58) Processor Local Bus Slave Error Address 2
<byte 804>
union sear3 (Offset 5C) Processor Local Bus Slave Error Address 3
<byte 804>
{field (By field)}
<byte 804>
lbits:32 addr PLB Slave Error Address (read only)
{}
or sear3 (Offset 5C) Processor Local Bus Slave Error Address 3
<byte 804>
ulong value As longword
endunion sear3 (Offset 5C) Processor Local Bus Slave Error Address 3
<byte 808>
{unused62_63 ((Offset 62) Unused)}
<byte 808>
ushort value
{}
<byte 810>
union bridgeopt2 (Offset 60) Bridge Options 2
<byte 810>
{field (By field)}
<byte 810>
bits:1 hcfg_en Host Configuration Enable
bits:1 tlattmr_dis Target Latency Timer Disable
bits:1 pcidisctmr_dis PCI Discard Timer Disable
bits:5 pciinitlattmrdur PCI Initial Target Latency Timer Duration
bits:4 pcisubtlattmrdur PCI Subsequent Target Latency Timer Duration
bits:1 drivepcirst Drive PCI Reset
bits:1 exwpcici External Write to PCI Command Interrupt
bits:2 rsvd Reserved
{}
or bridgeopt2 (Offset 60) Bridge Options 2
<byte 810>
ushort value As word
endunion bridgeopt2 (Offset 60) Bridge Options 2
{}
endunion pcicfg Quasar PCI Configuration Registers
<byte 812>
union pir Processor Interface Registers
<byte 812>
ulong[33] pira Processor Interface Registers As Longwords
or pir Processor Interface Registers
<byte 812>
{pir (Processor Interface Registers By Field)}
<byte 812>
union prifopt1 (Offset 00) Processor Interface Options 1
<byte 812>
{field (By field)}
<byte 812>
lbits:25 rsvd RESERVED (Quasar reserved)
lbits:1 wr_int_en PLB Slave write region interrupt enable
lbits:2 plbm_pri Processor Interface - PLB Master Request Priority (Quasar reserved)
lbits:1 osrom_b1 OS specific ROM present and installed in bank 1 (Quasar reserved)
lbits:1 snp60X_dis Disable snoop cycles on processor bus
lbits:1 mcp_en MCP_enable
lbits:1 ppc603_1_1 Enable support for 603 1:1 mode
{}
or prifopt1 (Offset 00) Processor Interface Options 1
<byte 812>
ulong value As longword
endunion prifopt1 (Offset 00) Processor Interface Options 1
<byte 816>
union errdet1 (Offset 04) Error Detection 1
<byte 816>
{field (By field)}
<byte 816>
lbits:25 rsvd RESERVED (Quasar reserved)
lbits:1 cpu_dpe_er 60x Data Parity Error
lbits:1 cpu_ape_er 60x Address Parity Error
lbits:1 fl_wr_er Flash Write Error
lbits:1 plb_slv_er PLB Slave Error
lbits:1 plb_mstr_er PLB Master Error
lbits:1 mem_sel_er Memory Select Error
lbits:1 cpu_tt_er CPU Transfer Type/Size Error
{}
or errdet1 (Offset 04) Error Detection 1
<byte 816>
ulong value As longword
endunion errdet1 (Offset 04) Error Detection 1
<byte 820>
union erren1 (Offset 08) Error Detection Enable 1
<byte 820>
{field (By field)}
<byte 820>
lbits:24 rsvd RESERVED (Quasar reserved)
lbits:1 cpu_dpe_en 60x Data Parity Error Enable
lbits:1 cpu_ape_en 60x Address Parity Error Enable
lbits:1 f_wr_er_en Flash Write Error Enable
lbits:1 plb_s_er_en PLB Slave Error Generation Enable
lbits:1 plbm_len PLB Master Lock Error Enable
lbits:1 plb_m_er_en PLB Master Error Dtection Enable
lbits:1 m_sel_er_en Memory Select Error Enable
lbits:1 c_tt_er_en CPU Transfer Type Error Enable
{}
or erren1 (Offset 08) Error Detection Enable 1
<byte 820>
ulong value As longword
endunion erren1 (Offset 08) Error Detection Enable 1
<byte 824>
union cpuerad (Offset 0C) Processor Error Address
<byte 824>
{field (By field)}
<byte 824>
lbits:32 cpuerad Processor Error Address
{}
or cpuerad (Offset 0C) Processor Error Address
<byte 824>
ulong value As longword
endunion cpuerad (Offset 0C) Processor Error Address
<byte 828>
union cpuerat (Offset 10) Processor Error Attributes
<byte 828>
{field (By field)}
<byte 828>
lbits:24 rsvd RESERVED (Quasar reserved)
lbits:3 cpuerts Processor Error Transfer Size
lbits:5 cpuertt Processor Error Transfer Type
{}
or cpuerat (Offset 10) Processor Error Attributes
<byte 828>
ulong value As longword
endunion cpuerat (Offset 10) Processor Error Attributes
<byte 832>
{rsvd14 ((Offset 14) Reserved)}
<byte 832>
ulong value
{}
<byte 836>
union plbmifopt (Offset 18) Processor Local Bus Interface Options
<byte 836>
{field (By field)}
<byte 836>
lbits:28 rsvd RESERVED (Quasar reserved)
lbits:1 plbs_xl_en PCI to Memory Byte Swapping
lbits:1 xlr_3_en Processor PLB Byte Swap Region 3
lbits:1 xlr_2_en Processor PLB Byte Swap Region 2
lbits:1 xlr_1_en Processor PLB Byte Swap Region 1
{}
or plbmifopt (Offset 18) Processor Local Bus Interface Options
<byte 836>
ulong value As longword
endunion plbmifopt (Offset 18) Processor Local Bus Interface Options
<byte 840>
{unused1c ((Offset 1C) Unused)}
<byte 840>
ulong value
{}
<byte 844>
union plbmtlsa1 (Offset 20) Processor Local Bus Master Byte Swap Region 1 Starting Address
<byte 844>
{field (By field)}
<byte 844>
lbits:14 rsvd RESERVED (Quasar reserved)
lbits:18 xlr_x_sa Processor PLB Byte Swap Region x Starting Address
{}
or plbmtlsa1 (Offset 20) Processor Local Bus Master Byte Swap Region 1 Starting Address
<byte 844>
ulong value As longword
endunion plbmtlsa1 (Offset 20) Processor Local Bus Master Byte Swap Region 1 Starting Address
<byte 848>
union plbmtlea1 (Offset 24) Processor Local Bus Master Byte Swap Region 1 Ending Address
<byte 848>
{field (By field)}
<byte 848>
lbits:14 rsvd RESERVED (Quasar reserved)
lbits:18 xlr_x_ea PLB Byte Swap Region x Ending Address
{}
or plbmtlea1 (Offset 24) Processor Local Bus Master Byte Swap Region 1 Ending Address
<byte 848>
ulong value As longword
endunion plbmtlea1 (Offset 24) Processor Local Bus Master Byte Swap Region 1 Ending Address
<byte 852>
union plbmtlsa2 (Offset 28) Processor Local Bus Master Byte Swap Region 2 Starting Address
<byte 852>
{field (By field)}
<byte 852>
lbits:14 rsvd RESERVED (Quasar reserved)
lbits:18 xlr_x_sa Processor PLB Byte Swap Region x Starting Address
{}
or plbmtlsa2 (Offset 28) Processor Local Bus Master Byte Swap Region 2 Starting Address
<byte 852>
ulong value As longword
endunion plbmtlsa2 (Offset 28) Processor Local Bus Master Byte Swap Region 2 Starting Address
<byte 856>
union plbmtlea2 (Offset 2C) Processor Local Bus Master Byte Swap Region 2 Ending Address
<byte 856>
{field (By field)}
<byte 856>
lbits:14 rsvd RESERVED (Quasar reserved)
lbits:18 xlr_x_ea PLB Byte Swap Region x Ending Address
{}
or plbmtlea2 (Offset 2C) Processor Local Bus Master Byte Swap Region 2 Ending Address
<byte 856>
ulong value As longword
endunion plbmtlea2 (Offset 2C) Processor Local Bus Master Byte Swap Region 2 Ending Address
<byte 860>
union plbmtlsa3 (Offset 30) Processor Local Bus Master Byte Swap Region 3 Starting Address
<byte 860>
{field (By field)}
<byte 860>
lbits:14 rsvd RESERVED (Quasar reserved)
lbits:18 xlr_x_sa Processor PLB Byte Swap Region x Starting Address
{}
or plbmtlsa3 (Offset 30) Processor Local Bus Master Byte Swap Region 3 Starting Address
<byte 860>
ulong value As longword
endunion plbmtlsa3 (Offset 30) Processor Local Bus Master Byte Swap Region 3 Starting Address
<byte 864>
union plbmtlea3 (Offset 34) Processor Local Bus Master Byte Swap Region 3 Ending Address
<byte 864>
{field (By field)}
<byte 864>
lbits:14 rsvd RESERVED (Quasar reserved)
lbits:18 xlr_x_ea PLB Byte Swap Region x Ending Address
{}
or plbmtlea3 (Offset 34) Processor Local Bus Master Byte Swap Region 3 Ending Address
<byte 864>
ulong value As longword
endunion plbmtlea3 (Offset 34) Processor Local Bus Master Byte Swap Region 3 Ending Address
<byte 868>
union plbsnssa0 (Offset 38) Processor Local Bus Snoop Region No Snoop Starting Address
<byte 868>
{field (By field)}
<byte 868>
lbits:14 rsvd RESERVED (Quasar reserved)
lbits:18 nssa0 Snoop Disable Starting Address
{}
or plbsnssa0 (Offset 38) Processor Local Bus Snoop Region No Snoop Starting Address
<byte 868>
ulong value As longword
endunion plbsnssa0 (Offset 38) Processor Local Bus Snoop Region No Snoop Starting Address
<byte 872>
union plbsnsea0 (Offset 3C) Processor Local Bus Snoop Region No Snoop Ending Address
<byte 872>
{field (By field)}
<byte 872>
lbits:14 rsvd RESERVED (Quasar reserved)
lbits:18 nsea0 Snoop Disable Ending Address
{}
or plbsnsea0 (Offset 3C) Processor Local Bus Snoop Region No Snoop Ending Address
<byte 872>
ulong value As longword
endunion plbsnsea0 (Offset 3C) Processor Local Bus Snoop Region No Snoop Ending Address
<byte 876>
union besr (Offset 40) Processor Local Bus Bus Error Syndrome Register
<byte 876>
{field (By field)}
<byte 876>
lbits:8 rsvd RESERVED (Quasar reserved)
lbits:1 m3al Master 3 BEAR Address Lock (Quasar reserved)
lbits:1 m3fl Master 3 BESR Field Lock (Quasar reserved)
lbits:1 m3rws Master 3 Read/Write Status (Quasar reserved)
lbits:3 m3et Master 3 Error Type (Quasar reserved)
lbits:1 m2al Master 2 BEAR Address Lock (Quasar reserved)
lbits:1 m2fl Master 2 BESR Field Lock (Quasar reserved)
lbits:1 m2rws Master 2 Read/Write Status (Quasar reserved)
lbits:3 m2et Master 2 Error Type (Quasar reserved)
lbits:1 m1al Master 1 (PCI Core) BEAR Address Lock
lbits:1 m1fl Master 1 (PCI Core) BESR Field Lock
lbits:1 m1rws Master 1 (PCI Core) Read/Write Status
lbits:3 m1et Master 1 (PCI Core) Error Type
lbits:1 m0al Master 0 BEAR Address Lock (Quasar reserved)
lbits:1 m0fl Master 0 BESR Field Lock (Quasar reserved)
lbits:1 m0rws Master 0 Read/Write Status (Quasar reserved)
lbits:3 m0et Master 0 Error Type (Quasar reserved)
{}
or besr (Offset 40) Processor Local Bus Bus Error Syndrome Register
<byte 876>
ulong value As longword
endunion besr (Offset 40) Processor Local Bus Bus Error Syndrome Register
<byte 880>
union besrset (Offset 44) Processor Local Bus Bus Error Syndrome Register Set (for test/verification use)
<byte 880>
{field (By field)}
<byte 880>
lbits:32 mask Set bits mask
{}
or besrset (Offset 44) Processor Local Bus Bus Error Syndrome Register Set (for test/verification use)
<byte 880>
ulong value As longword
endunion besrset (Offset 44) Processor Local Bus Bus Error Syndrome Register Set (for test/verification use)
<byte 884>
union bear_rsvda (Offset 48) Processor Local Bus Master (x = Reserved) Bus Error Address Register
<byte 884>
{field (By field)}
<byte 884>
lbits:32 bearx Error address address register for PLB Master x related errors
{}
or bear_rsvda (Offset 48) Processor Local Bus Master (x = Reserved) Bus Error Address Register
<byte 884>
ulong value As longword
endunion bear_rsvda (Offset 48) Processor Local Bus Master (x = Reserved) Bus Error Address Register
<byte 888>
union bearpcicore (Offset 4C) Processor Local Bus Master (x = PCI Core) Bus Error Address Register
<byte 888>
{field (By field)}
<byte 888>
lbits:32 bearx Error address address register for PLB Master x related errors
{}
or bearpcicore (Offset 4C) Processor Local Bus Master (x = PCI Core) Bus Error Address Register
<byte 888>
ulong value As longword
endunion bearpcicore (Offset 4C) Processor Local Bus Master (x = PCI Core) Bus Error Address Register
<byte 892>
union bear_rsvdb (Offset 50) Processor Local Bus Master (x = Reserved) Bus Error Address Register
<byte 892>
{field (By field)}
<byte 892>
lbits:32 bearx Error address address register for PLB Master x related errors
{}
or bear_rsvdb (Offset 50) Processor Local Bus Master (x = Reserved) Bus Error Address Register
<byte 892>
ulong value As longword
endunion bear_rsvdb (Offset 50) Processor Local Bus Master (x = Reserved) Bus Error Address Register
<byte 896>
union bear_rsvdc (Offset 54) Processor Local Bus Master (x = Reserved) Bus Error Address Register
<byte 896>
{field (By field)}
<byte 896>
lbits:32 bearx Error address address register for PLB Master x related errors
{}
or bear_rsvdc (Offset 54) Processor Local Bus Master (x = Reserved) Bus Error Address Register
<byte 896>
ulong value As longword
endunion bear_rsvdc (Offset 54) Processor Local Bus Master (x = Reserved) Bus Error Address Register
<byte 900>
{rsvd58_7c[0] ((Offset 58 through 0x7C) Reserved)}
<byte 900>
ulong value
{}
<byte 904>
{rsvd58_7c[1] ((Offset 58 through 0x7C) Reserved)}
<byte 904>
ulong value
{}
<byte 908>
{rsvd58_7c[2] ((Offset 58 through 0x7C) Reserved)}
<byte 908>
ulong value
{}
<byte 912>
{rsvd58_7c[3] ((Offset 58 through 0x7C) Reserved)}
<byte 912>
ulong value
{}
<byte 916>
{rsvd58_7c[4] ((Offset 58 through 0x7C) Reserved)}
<byte 916>
ulong value
{}
<byte 920>
{rsvd58_7c[5] ((Offset 58 through 0x7C) Reserved)}
<byte 920>
ulong value
{}
<byte 924>
{rsvd58_7c[6] ((Offset 58 through 0x7C) Reserved)}
<byte 924>
ulong value
{}
<byte 928>
{rsvd58_7c[7] ((Offset 58 through 0x7C) Reserved)}
<byte 928>
ulong value
{}
<byte 932>
{rsvd58_7c[8] ((Offset 58 through 0x7C) Reserved)}
<byte 932>
ulong value
{}
<byte 936>
{rsvd58_7c[9] ((Offset 58 through 0x7C) Reserved)}
<byte 936>
ulong value
{}
<byte 940>
union plbswrint (Offset 80) Write Interrupt Region Base Address
<byte 940>
{field (By field)}
<byte 940>
lbits:14 rsvd RESERVED (Quasar reserved)
lbits:18 wr_int_b Write Interrupt Base Address
{}
or plbswrint (Offset 80) Write Interrupt Region Base Address
<byte 940>
ulong value As longword
endunion plbswrint (Offset 80) Write Interrupt Region Base Address
{}
endunion pir Processor Interface Registers
<byte 944>
union mcr Memory Controller Registers
<byte 944>
ulong[64] mcra Memory Controller Registers As Longwords
or mcr Memory Controller Registers
<byte 944>
{mcr (Memory Controller Registers By Field)}
<byte 944>
{unused00_1c[0] ((Offset 00 through x1C) Unused)}
<byte 944>
ulong value
{}
<byte 948>
{unused00_1c[1] ((Offset 00 through x1C) Unused)}
<byte 948>
ulong value
{}
<byte 952>
{unused00_1c[2] ((Offset 00 through x1C) Unused)}
<byte 952>
ulong value
{}
<byte 956>
{unused00_1c[3] ((Offset 00 through x1C) Unused)}
<byte 956>
ulong value
{}
<byte 960>
{unused00_1c[4] ((Offset 00 through x1C) Unused)}
<byte 960>
ulong value
{}
<byte 964>
{unused00_1c[5] ((Offset 00 through x1C) Unused)}
<byte 964>
ulong value
{}
<byte 968>
{unused00_1c[6] ((Offset 00 through x1C) Unused)}
<byte 968>
ulong value
{}
<byte 972>
{unused00_1c[7] ((Offset 00 through x1C) Unused)}
<byte 972>
ulong value
{}
<byte 976>
union mcopt1 (Offset 20) Memory Controller Options 1
<byte 976>
{field (By field)}
<byte 976>
lbits:24 rsvdb RESERVED (Quasar reserved)
lbits:1 bootromp Boot ROM present and installed in Bank 0
lbits:2 dramtyp DRAM type
lbits:2 rsvda RESERVED (Quasar reserved)
lbits:1 pm_en Power Management enable
lbits:1 slfrefen Self-Refresh enable
lbits:1 dc_en SDRAM Controller enable
{}
or mcopt1 (Offset 20) Memory Controller Options 1
<byte 976>
ulong value As longword
endunion mcopt1 (Offset 20) Memory Controller Options 1
<byte 980>
union mben (Offset 24) Memory Bank Enable
<byte 980>
{field (By field)}
<byte 980>
lbits:24 rsvd RESERVED (Quasar reserved)
lbits:1 mbe_7 Memory bank 7 enable (Quasar reserved)
lbits:1 mbe_6 Memory bank 6 enable (Quasar reserved)
lbits:1 mbe_5 Memory bank 5 enable (Quasar reserved)
lbits:1 mbe_4 Memory bank 4 enable
lbits:1 mbe_3 Memory bank 3 enable
lbits:1 mbe_2 Memory bank 2 enable
lbits:1 mbe_1 Memory bank 1 enable
lbits:1 mbe_0 Memory bank 0 enable
{}
or mben (Offset 24) Memory Bank Enable
<byte 980>
ulong value As longword
endunion mben (Offset 24) Memory Bank Enable
<byte 984>
union memtype (Offset 28) Installed Memory Type
<byte 984>
{field (By field)}
<byte 984>
lbits:16 rsvd RESERVED (Quasar reserved)
lbits:2 mt_7 Bank 7 Memory (Quasar reserved)
lbits:2 mt_6 Bank 6 Memory (Quasar reserved)
lbits:2 mt_5 Bank 5 Memory (Quasar reserved)
lbits:2 mt_4 Bank 4 Memory
lbits:2 mt_3 Bank 3 Memory
lbits:2 mt_2 Bank 2 Memory
lbits:2 mt_1 Bank 1 Memory
lbits:2 mt_0 Bank 0 Memory
{}
or memtype (Offset 28) Installed Memory Type
<byte 984>
ulong value As longword
endunion memtype (Offset 28) Installed Memory Type
<byte 988>
union rwd (Offset 2C) Bank Active Watchdog Timer
<byte 988>
{field (By field)}
<byte 988>
lbits:24 rsvd RESERVED (Quasar reserved)
lbits:8 raswdt Bank Active Watchdog timer value
{}
or rwd (Offset 2C) Bank Active Watchdog Timer
<byte 988>
ulong value As longword
endunion rwd (Offset 2C) Bank Active Watchdog Timer
<byte 992>
union rtr (Offset 30) Refresh Timer Register
<byte 992>
{field (By field)}
<byte 992>
lbits:16 rsvd RESERVED (Quasar reserved) - Hardcoded to Zero
lbits:3 hardcd13_15 Hardcoded to Zero
lbits:9 rtintvl Programmable
lbits:4 hardcd0_3 Hardcoded to Zero
{}
or rtr (Offset 30) Refresh Timer Register
<byte 992>
ulong value As longword
endunion rtr (Offset 30) Refresh Timer Register
<byte 996>
union dam (Offset 34) DRAM Addressing Mode
<byte 996>
{field (By field)}
<byte 996>
lbits:16 rsvd RESERVED (Quasar reserved)
lbits:2 dam_7 Bank 7 Addressing mode (Quasar reserved)
lbits:2 dam_6 Bank 6 Addressing mode (Quasar reserved)
lbits:2 dam_5 Bank 5 Addressing mode (Quasar reserved)
lbits:2 dam_4 Bank 4 Addressing mode
lbits:2 dam_3 Bank 3 Addressing mode
lbits:2 dam_2 Bank 2 Addressing mode
lbits:2 dam_1 Bank 1 Addressing mode
lbits:2 dam_0 Bank 0 Addressing mode
{}
or dam (Offset 34) DRAM Addressing Mode
<byte 996>
ulong value As longword
endunion dam (Offset 34) DRAM Addressing Mode
<byte 1000>
union mb0sa (Offset 38) Memory Bank 0 Starting Address
<byte 1000>
{field (By field)}
<byte 1000>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxsa Memory Bank x starting address
{}
or mb0sa (Offset 38) Memory Bank 0 Starting Address
<byte 1000>
ulong value As longword
endunion mb0sa (Offset 38) Memory Bank 0 Starting Address
<byte 1004>
union mb1sa (Offset 3C) Memory Bank 1 Starting Address
<byte 1004>
{field (By field)}
<byte 1004>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxsa Memory Bank x starting address
{}
or mb1sa (Offset 3C) Memory Bank 1 Starting Address
<byte 1004>
ulong value As longword
endunion mb1sa (Offset 3C) Memory Bank 1 Starting Address
<byte 1008>
union mb2sa (Offset 40) Memory Bank 2 Starting Address
<byte 1008>
{field (By field)}
<byte 1008>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxsa Memory Bank x starting address
{}
or mb2sa (Offset 40) Memory Bank 2 Starting Address
<byte 1008>
ulong value As longword
endunion mb2sa (Offset 40) Memory Bank 2 Starting Address
<byte 1012>
union mb3sa (Offset 44) Memory Bank 3 Starting Address
<byte 1012>
{field (By field)}
<byte 1012>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxsa Memory Bank x starting address
{}
or mb3sa (Offset 44) Memory Bank 3 Starting Address
<byte 1012>
ulong value As longword
endunion mb3sa (Offset 44) Memory Bank 3 Starting Address
<byte 1016>
union mb4sa (Offset 48) Memory Bank 4 Starting Address
<byte 1016>
{field (By field)}
<byte 1016>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxsa Memory Bank x starting address
{}
or mb4sa (Offset 48) Memory Bank 4 Starting Address
<byte 1016>
ulong value As longword
endunion mb4sa (Offset 48) Memory Bank 4 Starting Address
<byte 1020>
union mb5sa_rsvd (Offset 4C) Memory Bank 5 Starting Address (Quasar reserved)
<byte 1020>
{field (By field)}
<byte 1020>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxsa Memory Bank x starting address
{}
or mb5sa_rsvd (Offset 4C) Memory Bank 5 Starting Address (Quasar reserved)
<byte 1020>
ulong value As longword
endunion mb5sa_rsvd (Offset 4C) Memory Bank 5 Starting Address (Quasar reserved)
<byte 1024>
union mb6sa_rsvd (Offset 50) Memory Bank 6 Starting Address (Quasar reserved)
<byte 1024>
{field (By field)}
<byte 1024>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxsa Memory Bank x starting address
{}
or mb6sa_rsvd (Offset 50) Memory Bank 6 Starting Address (Quasar reserved)
<byte 1024>
ulong value As longword
endunion mb6sa_rsvd (Offset 50) Memory Bank 6 Starting Address (Quasar reserved)
<byte 1028>
union mb7sa_rsvd (Offset 54) Memory Bank 7 Starting Address (Quasar reserved)
<byte 1028>
{field (By field)}
<byte 1028>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxsa Memory Bank x starting address
{}
or mb7sa_rsvd (Offset 54) Memory Bank 7 Starting Address (Quasar reserved)
<byte 1028>
ulong value As longword
endunion mb7sa_rsvd (Offset 54) Memory Bank 7 Starting Address (Quasar reserved)
<byte 1032>
union mb0ea (Offset 58) Memory Bank 0 Ending Address
<byte 1032>
{field (By field)}
<byte 1032>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxea Memory Bank x ending address
{}
or mb0ea (Offset 58) Memory Bank 0 Ending Address
<byte 1032>
ulong value As longword
endunion mb0ea (Offset 58) Memory Bank 0 Ending Address
<byte 1036>
union mb1ea (Offset 5C) Memory Bank 1 Ending Address
<byte 1036>
{field (By field)}
<byte 1036>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxea Memory Bank x ending address
{}
or mb1ea (Offset 5C) Memory Bank 1 Ending Address
<byte 1036>
ulong value As longword
endunion mb1ea (Offset 5C) Memory Bank 1 Ending Address
<byte 1040>
union mb2ea (Offset 60) Memory Bank 2 Ending Address
<byte 1040>
{field (By field)}
<byte 1040>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxea Memory Bank x ending address
{}
or mb2ea (Offset 60) Memory Bank 2 Ending Address
<byte 1040>
ulong value As longword
endunion mb2ea (Offset 60) Memory Bank 2 Ending Address
<byte 1044>
union mb3ea (Offset 64) Memory Bank 3 Ending Address
<byte 1044>
{field (By field)}
<byte 1044>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxea Memory Bank x ending address
{}
or mb3ea (Offset 64) Memory Bank 3 Ending Address
<byte 1044>
ulong value As longword
endunion mb3ea (Offset 64) Memory Bank 3 Ending Address
<byte 1048>
union mb4ea (Offset 68) Memory Bank 4 Ending Address
<byte 1048>
{field (By field)}
<byte 1048>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxea Memory Bank x ending address
{}
or mb4ea (Offset 68) Memory Bank 4 Ending Address
<byte 1048>
ulong value As longword
endunion mb4ea (Offset 68) Memory Bank 4 Ending Address
<byte 1052>
union mb5ea_rsvd (Offset 6C) Memory Bank 5 Ending Address (Quasar reserved)
<byte 1052>
{field (By field)}
<byte 1052>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxea Memory Bank x ending address
{}
or mb5ea_rsvd (Offset 6C) Memory Bank 5 Ending Address (Quasar reserved)
<byte 1052>
ulong value As longword
endunion mb5ea_rsvd (Offset 6C) Memory Bank 5 Ending Address (Quasar reserved)
<byte 1056>
union mb6ea_rsvd (Offset 70) Memory Bank 6 Ending Address (Quasar reserved)
<byte 1056>
{field (By field)}
<byte 1056>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxea Memory Bank x ending address
{}
or mb6ea_rsvd (Offset 70) Memory Bank 6 Ending Address (Quasar reserved)
<byte 1056>
ulong value As longword
endunion mb6ea_rsvd (Offset 70) Memory Bank 6 Ending Address (Quasar reserved)
<byte 1060>
union mb7ea_rsvd (Offset 74) Memory Bank 7 Ending Address (Quasar reserved)
<byte 1060>
{field (By field)}
<byte 1060>
lbits:20 rsvd RESERVED (Quasar reserved)
lbits:12 mbxea Memory Bank x ending address
{}
or mb7ea_rsvd (Offset 74) Memory Bank 7 Ending Address (Quasar reserved)
<byte 1060>
ulong value As longword
endunion mb7ea_rsvd (Offset 74) Memory Bank 7 Ending Address (Quasar reserved)
<byte 1064>
{unused78_7c[0] ((Offset 78 through x7C) Unused)}
<byte 1064>
ulong value
{}
<byte 1068>
{unused78_7c[1] ((Offset 78 through x7C) Unused)}
<byte 1068>
ulong value
{}
<byte 1072>
union sdtr1 (Offset 80) SDRAM Timing Register 1
<byte 1072>
{field (By field)}
<byte 1072>
lbits:2 sd_rcd SDRAM RAS to CAS delay
lbits:3 sd_rfta SDRAM CAS before RAS Refresh Command to next Activate Command minimum
lbits:5 rsvdb RESERVED (Quasar reserved)
lbits:4 sd_rtp SDRAM Read Command to Precharge Command minimum
lbits:4 sd_wtp SDRAM Write Command to Precharge Command minimum
lbits:2 sd_pta SDRAM Precharge Command to next Activate Command minimum
lbits:1 sd_srex SDRAM Self-Refresh Exit delay
lbits:1 sd_rrd SDRAM module minimum Bank-to-Bank Delay
lbits:1 sd_apge SDRAM Auto-Precharge enable
lbits:2 sd_casl SDRAM CAS_ latency
lbits:7 rsvda RESERVED (Quasar reserved)
{}
or sdtr1 (Offset 80) SDRAM Timing Register 1
<byte 1072>
ulong value As longword
endunion sdtr1 (Offset 80) SDRAM Timing Register 1
<byte 1076>
{unused84 ((Offset 84) Unused)}
<byte 1076>
ulong value
{}
<byte 1080>
union rbw (Offset 88) ROM Bank Width
<byte 1080>
{field (By field)}
<byte 1080>
lbits:16 rsvd RESERVED (Quasar reserved)
lbits:2 r64n8_7 ROM Bank 7 width (Quasar reserved)
lbits:2 r64n8_6 ROM Bank 6 width (Quasar reserved)
lbits:2 r64n8_5 ROM Bank 5 width (Quasar reserved)
lbits:2 r64n8_4 ROM Bank 4 width
lbits:2 r64n8_3 ROM Bank 3 width
lbits:2 r64n8_2 ROM Bank 2 width
lbits:2 r64n8_1 ROM Bank 1 width
lbits:2 r64n8_0 ROM Bank 0 width
{}
or rbw (Offset 88) ROM Bank Width
<byte 1080>
ulong value As longword
endunion rbw (Offset 88) ROM Bank Width
<byte 1084>
{unused8c ((Offset 8C) Unused)}
<byte 1084>
ulong value
{}
<byte 1088>
union fwen (Offset 90) Flash Write Enable
<byte 1088>
{field (By field)}
<byte 1088>
lbits:24 rsvd RESERVED (Quasar reserved)
lbits:1 flshwen_7 Bank 7 Flash write enable (Quasar reserved)
lbits:1 flshwen_6 Bank 6 Flash write enable (Quasar reserved)
lbits:1 flshwen_5 Bank 5 Flash write enable (Quasar reserved)
lbits:1 flshwen_4 Bank 4 Flash write enable
lbits:1 flshwen_3 Bank 3 Flash write enable
lbits:1 flshwen_2 Bank 2 Flash write enable
lbits:1 flshwen_1 Bank 1 Flash write enable
lbits:1 flshwen_0 Bank 0 Flash write enable
{}
or fwen (Offset 90) Flash Write Enable
<byte 1088>
ulong value As longword
endunion fwen (Offset 90) Flash Write Enable
<byte 1092>
union ecccf (Offset 94) ECC Configuration Register
<byte 1092>
{field (By field)}
<byte 1092>
lbits:8 rsvdc RESERVED (Quasar reserved)
lbits:1 ecc_bank7_cen ECC Bank 7 Correction Enable (Quasar reserved)
lbits:1 ecc_bank6_cen ECC Bank 6 Correction Enable (Quasar reserved)
lbits:1 ecc_bank5_cen ECC Bank 5 Correction Enable (Quasar reserved)
lbits:1 ecc_bank4_cen ECC Bank 4 Correction Enable
lbits:1 ecc_bank3_cen ECC Bank 3 Correction Enable
lbits:1 ecc_bank2_cen ECC Bank 2 Correction Enable
lbits:1 ecc_bank1_cen ECC Bank 1 Correction Enable
lbits:1 ecc_bank0_cen ECC Bank 0 Correction Enable
lbits:1 ecc_bank7_enable ECC Bank 7 Enable (Quasar reserved)
lbits:1 ecc_bank6_enable ECC Bank 6 Enable (Quasar reserved)
lbits:1 ecc_bank5_enable ECC Bank 5 Enable (Quasar reserved)
lbits:1 ecc_bank4_enable ECC Bank 4 Enable
lbits:1 ecc_bank3_enable ECC Bank 3 Enable
lbits:1 ecc_bank2_enable ECC Bank 2 Enable
lbits:1 ecc_bank1_enable ECC Bank 1 Enable
lbits:1 ecc_bank0_enable ECC Bank 0 Enable
lbits:3 rsvdb RESERVED (Quasar reserved)
lbits:1 sd_wdth SDRAM Data Bus Width
lbits:2 rsvda RESERVED (Quasar reserved)
lbits:1 ecc_en ECC Enable
lbits:1 ecc_mode ECC Mode
{}
or ecccf (Offset 94) ECC Configuration Register
<byte 1092>
ulong value As longword
endunion ecccf (Offset 94) ECC Configuration Register
<byte 1096>
union eccerr (Offset 98) ECC Error Register
<byte 1096>
{field (By field)}
<byte 1096>
lbits:8 rsvdb RESERVED (Quasar reserved)
lbits:1 bnk7err Bank 7 Error
lbits:1 bnk6err Bank 6 Error
lbits:1 bnk5err Bank 5 Error
lbits:1 bnk4err Bank 4 Error
lbits:1 bnk3err Bank 3 Error
lbits:1 bnk2err Bank 2 Error
lbits:1 bnk1err Bank 1 Error
lbits:1 bnk0err Bank 0 Error
lbits:3 rsvda RESERVED (Quasar reserved)
lbits:1 ap Address Parity Error
lbits:1 ue Uncorrectable Error
lbits:1 ce Correctable Error
lbits:2 chkbiterr Error Detected in Checkbits
lbits:1 b7ce Byte Lane 7 Corrected Error
lbits:1 b6ce Byte Lane 6 Corrected Error
lbits:1 b5ce Byte Lane 5 Corrected Error
lbits:1 b4ce Byte Lane 4 Corrected Error
lbits:1 b3ce Byte Lane 3 Corrected Error
lbits:1 b2ce Byte Lane 2 Corrected Error
lbits:1 b1ce Byte Lane 1 Corrected Error
lbits:1 b0ce Byte Lane 0 Corrected Error
{}
or eccerr (Offset 98) ECC Error Register
<byte 1096>
ulong value As longword
endunion eccerr (Offset 98) ECC Error Register
<byte 1100>
{unused9c_dc[0] ((Offset 9C through xDC) Unused)}
<byte 1100>
ulong value
{}
<byte 1104>
{unused9c_dc[1] ((Offset 9C through xDC) Unused)}
<byte 1104>
ulong value
{}
<byte 1108>
{unused9c_dc[2] ((Offset 9C through xDC) Unused)}
<byte 1108>
ulong value
{}
<byte 1112>
{unused9c_dc[3] ((Offset 9C through xDC) Unused)}
<byte 1112>
ulong value
{}
<byte 1116>
{unused9c_dc[4] ((Offset 9C through xDC) Unused)}
<byte 1116>
ulong value
{}
<byte 1120>
{unused9c_dc[5] ((Offset 9C through xDC) Unused)}
<byte 1120>
ulong value
{}
<byte 1124>
{unused9c_dc[6] ((Offset 9C through xDC) Unused)}
<byte 1124>
ulong value
{}
<byte 1128>
{unused9c_dc[7] ((Offset 9C through xDC) Unused)}
<byte 1128>
ulong value
{}
<byte 1132>
{unused9c_dc[8] ((Offset 9C through xDC) Unused)}
<byte 1132>
ulong value
{}
<byte 1136>
{unused9c_dc[9] ((Offset 9C through xDC) Unused)}
<byte 1136>
ulong value
{}
<byte 1140>
{unused9c_dc[10] ((Offset 9C through xDC) Unused)}
<byte 1140>
ulong value
{}
<byte 1144>
{unused9c_dc[11] ((Offset 9C through xDC) Unused)}
<byte 1144>
ulong value
{}
<byte 1148>
{unused9c_dc[12] ((Offset 9C through xDC) Unused)}
<byte 1148>
ulong value
{}
<byte 1152>
{unused9c_dc[13] ((Offset 9C through xDC) Unused)}
<byte 1152>
ulong value
{}
<byte 1156>
{unused9c_dc[14] ((Offset 9C through xDC) Unused)}
<byte 1156>
ulong value
{}
<byte 1160>
{unused9c_dc[15] ((Offset 9C through xDC) Unused)}
<byte 1160>
ulong value
{}
<byte 1164>
{unused9c_dc[16] ((Offset 9C through xDC) Unused)}
<byte 1164>
ulong value
{}
<byte 1168>
union rpb0p (Offset E0) ROM/Peripheral Bank 0 Parameters
<byte 1168>
{field (By field)}
<byte 1168>
lbits:4 rsvd RESERVED (Quasar reserved)
lbits:4 fwt First Wait (Burst Mode Enabled: BME = 1)
lbits:1 bme Burst Mode Enable
lbits:1 are Asynchronous ready Enabled (Ready Enabled: RE = 1)
lbits:1 re Ready Enable
lbits:4 thdwr Transfer Hold on Writes
lbits:4 thdrd Transfer Hold on Reads
lbits:1 weoff Write Enable Off Timing
lbits:2 weon Write Enable On Timing
lbits:2 oeon Output Enable On Timing
lbits:2 cson Chip Select On Timing
lbits:6 twt Transfer Wait (Burst Mode Disabled: BME=0)
{}
or rpb0p (Offset E0) ROM/Peripheral Bank 0 Parameters
<byte 1168>
ulong value As longword
endunion rpb0p (Offset E0) ROM/Peripheral Bank 0 Parameters
<byte 1172>
union rpb1p (Offset E4) ROM/Peripheral Bank 1 Parameters
<byte 1172>
{field (By field)}
<byte 1172>
lbits:4 rsvd RESERVED (Quasar reserved)
lbits:4 fwt First Wait (Burst Mode Enabled: BME = 1)
lbits:1 bme Burst Mode Enable
lbits:1 are Asynchronous ready Enabled (Ready Enabled: RE = 1)
lbits:1 re Ready Enable
lbits:4 thdwr Transfer Hold on Writes
lbits:4 thdrd Transfer Hold on Reads
lbits:1 weoff Write Enable Off Timing
lbits:2 weon Write Enable On Timing
lbits:2 oeon Output Enable On Timing
lbits:2 cson Chip Select On Timing
lbits:6 twt Transfer Wait (Burst Mode Disabled: BME=0)
{}
or rpb1p (Offset E4) ROM/Peripheral Bank 1 Parameters
<byte 1172>
ulong value As longword
endunion rpb1p (Offset E4) ROM/Peripheral Bank 1 Parameters
<byte 1176>
union rpb2p (Offset E8) ROM/Peripheral Bank 2 Parameters
<byte 1176>
{field (By field)}
<byte 1176>
lbits:4 rsvd RESERVED (Quasar reserved)
lbits:4 fwt First Wait (Burst Mode Enabled: BME = 1)
lbits:1 bme Burst Mode Enable
lbits:1 are Asynchronous ready Enabled (Ready Enabled: RE = 1)
lbits:1 re Ready Enable
lbits:4 thdwr Transfer Hold on Writes
lbits:4 thdrd Transfer Hold on Reads
lbits:1 weoff Write Enable Off Timing
lbits:2 weon Write Enable On Timing
lbits:2 oeon Output Enable On Timing
lbits:2 cson Chip Select On Timing
lbits:6 twt Transfer Wait (Burst Mode Disabled: BME=0)
{}
or rpb2p (Offset E8) ROM/Peripheral Bank 2 Parameters
<byte 1176>
ulong value As longword
endunion rpb2p (Offset E8) ROM/Peripheral Bank 2 Parameters
<byte 1180>
union rpb3p (Offset EC) ROM/Peripheral Bank 3 Parameters
<byte 1180>
{field (By field)}
<byte 1180>
lbits:4 rsvd RESERVED (Quasar reserved)
lbits:4 fwt First Wait (Burst Mode Enabled: BME = 1)
lbits:1 bme Burst Mode Enable
lbits:1 are Asynchronous ready Enabled (Ready Enabled: RE = 1)
lbits:1 re Ready Enable
lbits:4 thdwr Transfer Hold on Writes
lbits:4 thdrd Transfer Hold on Reads
lbits:1 weoff Write Enable Off Timing
lbits:2 weon Write Enable On Timing
lbits:2 oeon Output Enable On Timing
lbits:2 cson Chip Select On Timing
lbits:6 twt Transfer Wait (Burst Mode Disabled: BME=0)
{}
or rpb3p (Offset EC) ROM/Peripheral Bank 3 Parameters
<byte 1180>
ulong value As longword
endunion rpb3p (Offset EC) ROM/Peripheral Bank 3 Parameters
<byte 1184>
union rpb4p (Offset F0) ROM/Peripheral Bank 4 Parameters
<byte 1184>
{field (By field)}
<byte 1184>
lbits:4 rsvd RESERVED (Quasar reserved)
lbits:4 fwt First Wait (Burst Mode Enabled: BME = 1)
lbits:1 bme Burst Mode Enable
lbits:1 are Asynchronous ready Enabled (Ready Enabled: RE = 1)
lbits:1 re Ready Enable
lbits:4 thdwr Transfer Hold on Writes
lbits:4 thdrd Transfer Hold on Reads
lbits:1 weoff Write Enable Off Timing
lbits:2 weon Write Enable On Timing
lbits:2 oeon Output Enable On Timing
lbits:2 cson Chip Select On Timing
lbits:6 twt Transfer Wait (Burst Mode Disabled: BME=0)
{}
or rpb4p (Offset F0) ROM/Peripheral Bank 4 Parameters
<byte 1184>
ulong value As longword
endunion rpb4p (Offset F0) ROM/Peripheral Bank 4 Parameters
<byte 1188>
union rpb5p_rsvd (Offset F4) ROM/Peripheral Bank 5 Parameters (Quasar reserved)
<byte 1188>
{field (By field)}
<byte 1188>
lbits:4 rsvd RESERVED (Quasar reserved)
lbits:4 fwt First Wait (Burst Mode Enabled: BME = 1)
lbits:1 bme Burst Mode Enable
lbits:1 are Asynchronous ready Enabled (Ready Enabled: RE = 1)
lbits:1 re Ready Enable
lbits:4 thdwr Transfer Hold on Writes
lbits:4 thdrd Transfer Hold on Reads
lbits:1 weoff Write Enable Off Timing
lbits:2 weon Write Enable On Timing
lbits:2 oeon Output Enable On Timing
lbits:2 cson Chip Select On Timing
lbits:6 twt Transfer Wait (Burst Mode Disabled: BME=0)
{}
or rpb5p_rsvd (Offset F4) ROM/Peripheral Bank 5 Parameters (Quasar reserved)
<byte 1188>
ulong value As longword
endunion rpb5p_rsvd (Offset F4) ROM/Peripheral Bank 5 Parameters (Quasar reserved)
<byte 1192>
union rpb6p_rsvd (Offset F8) ROM/Peripheral Bank 6 Parameters (Quasar reserved)
<byte 1192>
{field (By field)}
<byte 1192>
lbits:4 rsvd RESERVED (Quasar reserved)
lbits:4 fwt First Wait (Burst Mode Enabled: BME = 1)
lbits:1 bme Burst Mode Enable
lbits:1 are Asynchronous ready Enabled (Ready Enabled: RE = 1)
lbits:1 re Ready Enable
lbits:4 thdwr Transfer Hold on Writes
lbits:4 thdrd Transfer Hold on Reads
lbits:1 weoff Write Enable Off Timing
lbits:2 weon Write Enable On Timing
lbits:2 oeon Output Enable On Timing
lbits:2 cson Chip Select On Timing
lbits:6 twt Transfer Wait (Burst Mode Disabled: BME=0)
{}
or rpb6p_rsvd (Offset F8) ROM/Peripheral Bank 6 Parameters (Quasar reserved)
<byte 1192>
ulong value As longword
endunion rpb6p_rsvd (Offset F8) ROM/Peripheral Bank 6 Parameters (Quasar reserved)
<byte 1196>
union rpb7p_rsvd (Offset FC) ROM/Peripheral Bank 7 Parameters (Quasar reserved)
<byte 1196>
{field (By field)}
<byte 1196>
lbits:4 rsvd RESERVED (Quasar reserved)
lbits:4 fwt First Wait (Burst Mode Enabled: BME = 1)
lbits:1 bme Burst Mode Enable
lbits:1 are Asynchronous ready Enabled (Ready Enabled: RE = 1)
lbits:1 re Ready Enable
lbits:4 thdwr Transfer Hold on Writes
lbits:4 thdrd Transfer Hold on Reads
lbits:1 weoff Write Enable Off Timing
lbits:2 weon Write Enable On Timing
lbits:2 oeon Output Enable On Timing
lbits:2 cson Chip Select On Timing
lbits:6 twt Transfer Wait (Burst Mode Disabled: BME=0)
{}
or rpb7p_rsvd (Offset FC) ROM/Peripheral Bank 7 Parameters (Quasar reserved)
<byte 1196>
ulong value As longword
endunion rpb7p_rsvd (Offset FC) ROM/Peripheral Bank 7 Parameters (Quasar reserved)
{}
endunion mcr Memory Controller Registers
<byte 1200>
union plbpcir PLB-PCI Core Registers
<byte 1200>
ulong[16] plbpcira PLB-PCI Core Registers As Longwords
or plbpcir PLB-PCI Core Registers
<byte 1200>
{plbpcir (PLB-PCI Core Registers By Field)}
<byte 1200>
union pmm0la (Offset 00) PMM 0 Local Address
<byte 1200>
{field (By field)}
<byte 1200>
lbits:12 mbz Must be zero
lbits:20 address PLB starting address of range x PLB space mapped to PCI Memory
{}
or pmm0la (Offset 00) PMM 0 Local Address
<byte 1200>
ulong value As longword
endunion pmm0la (Offset 00) PMM 0 Local Address
<byte 1204>
union pmm0ma (Offset 04) PMM 0 Mask/Attribute
<byte 1204>
{field (By field)}
<byte 1204>
lbits:1 enable Enable range x PLB space to PCI Memory space mapping
lbits:1 prefetch Enable range x read prefetching
lbits:10 rsvd (Quasar Reserved) Returns zero when read
lbits:20 mask Bits of PMM x Local Address used to decode range x of PLB space
{}
or pmm0ma (Offset 04) PMM 0 Mask/Attribute
<byte 1204>
ulong value As longword
endunion pmm0ma (Offset 04) PMM 0 Mask/Attribute
<byte 1208>
union pmm0pcila (Offset 08) PMM 0 PCI Low Address
<byte 1208>
{field (By field)}
<byte 1208>
lbits:12 mbz Must be zero
lbits:20 address Low PCI address generated for PLB access to range x
{}
or pmm0pcila (Offset 08) PMM 0 PCI Low Address
<byte 1208>
ulong value As longword
endunion pmm0pcila (Offset 08) PMM 0 PCI Low Address
<byte 1212>
union pmm0pciha (Offset 0C) PMM 0 PCI High Address
<byte 1212>
{field (By field)}
<byte 1212>
lbits:32 address High PCI address generated for PLB access to range x
{}
or pmm0pciha (Offset 0C) PMM 0 PCI High Address
<byte 1212>
ulong value As longword
endunion pmm0pciha (Offset 0C) PMM 0 PCI High Address
<byte 1216>
union pmm1la (Offset 10) PMM 1 Local Address
<byte 1216>
{field (By field)}
<byte 1216>
lbits:12 mbz Must be zero
lbits:20 address PLB starting address of range x PLB space mapped to PCI Memory
{}
or pmm1la (Offset 10) PMM 1 Local Address
<byte 1216>
ulong value As longword
endunion pmm1la (Offset 10) PMM 1 Local Address
<byte 1220>
union pmm1ma (Offset 14) PMM 1 Mask/Attribute
<byte 1220>
{field (By field)}
<byte 1220>
lbits:1 enable Enable range x PLB space to PCI Memory space mapping
lbits:1 prefetch Enable range x read prefetching
lbits:10 rsvd (Quasar Reserved) Returns zero when read
lbits:20 mask Bits of PMM x Local Address used to decode range x of PLB space
{}
or pmm1ma (Offset 14) PMM 1 Mask/Attribute
<byte 1220>
ulong value As longword
endunion pmm1ma (Offset 14) PMM 1 Mask/Attribute
<byte 1224>
union pmm1pcila (Offset 18) PMM 1 PCI Low Address
<byte 1224>
{field (By field)}
<byte 1224>
lbits:12 mbz Must be zero
lbits:20 address Low PCI address generated for PLB access to range x
{}
or pmm1pcila (Offset 18) PMM 1 PCI Low Address
<byte 1224>
ulong value As longword
endunion pmm1pcila (Offset 18) PMM 1 PCI Low Address
<byte 1228>
union pmm1pciha (Offset 1C) PMM 1 PCI High Address
<byte 1228>
{field (By field)}
<byte 1228>
lbits:32 address High PCI address generated for PLB access to range x
{}
or pmm1pciha (Offset 1C) PMM 1 PCI High Address
<byte 1228>
ulong value As longword
endunion pmm1pciha (Offset 1C) PMM 1 PCI High Address
<byte 1232>
union pmm2la (Offset 20) PMM 2 Local Address
<byte 1232>
{field (By field)}
<byte 1232>
lbits:12 mbz Must be zero
lbits:20 address PLB starting address of range x PLB space mapped to PCI Memory
{}
or pmm2la (Offset 20) PMM 2 Local Address
<byte 1232>
ulong value As longword
endunion pmm2la (Offset 20) PMM 2 Local Address
<byte 1236>
union pmm2ma (Offset 24) PMM 2 Mask/Attribute
<byte 1236>
{field (By field)}
<byte 1236>
lbits:1 enable Enable range x PLB space to PCI Memory space mapping
lbits:1 prefetch Enable range x read prefetching
lbits:10 rsvd (Quasar Reserved) Returns zero when read
lbits:20 mask Bits of PMM x Local Address used to decode range x of PLB space
{}
or pmm2ma (Offset 24) PMM 2 Mask/Attribute
<byte 1236>
ulong value As longword
endunion pmm2ma (Offset 24) PMM 2 Mask/Attribute
<byte 1240>
union pmm2pcila (Offset 28) PMM 2 PCI Low Address
<byte 1240>
{field (By field)}
<byte 1240>
lbits:12 mbz Must be zero
lbits:20 address Low PCI address generated for PLB access to range x
{}
or pmm2pcila (Offset 28) PMM 2 PCI Low Address
<byte 1240>
ulong value As longword
endunion pmm2pcila (Offset 28) PMM 2 PCI Low Address
<byte 1244>
union pmm2pciha (Offset 2C) PMM 2 PCI High Address
<byte 1244>
{field (By field)}
<byte 1244>
lbits:32 address High PCI address generated for PLB access to range x
{}
or pmm2pciha (Offset 2C) PMM 2 PCI High Address
<byte 1244>
ulong value As longword
endunion pmm2pciha (Offset 2C) PMM 2 PCI High Address
<byte 1248>
union ptm1ms (Offset 30) PTM 1 Memory Size
<byte 1248>
{field (By field)}
<byte 1248>
lbits:1 enable Enable range x PCI Memory space to PLB Space (hardwired to ONE)
lbits:11 rsvd (Quasar Reserved) Returns zero when read
lbits:20 size Size of PCI Memory space region mapped to local (PLB) space through PTM x
{}
or ptm1ms (Offset 30) PTM 1 Memory Size
<byte 1248>
ulong value As longword
endunion ptm1ms (Offset 30) PTM 1 Memory Size
<byte 1252>
union ptm1la (Offset 34) PTM 1 Local Address
<byte 1252>
{field (By field)}
<byte 1252>
lbits:12 mbz Must be zero
lbits:20 address PLB address generated in response to local (PLB) space access through PTM x
{}
or ptm1la (Offset 34) PTM 1 Local Address
<byte 1252>
ulong value As longword
endunion ptm1la (Offset 34) PTM 1 Local Address
<byte 1256>
union ptm2ms (Offset 38) PTM 2 Memory Size
<byte 1256>
{field (By field)}
<byte 1256>
lbits:1 enable Enable range x PCI Memory space to PLB Space (hardwired to ONE)
lbits:11 rsvd (Quasar Reserved) Returns zero when read
lbits:20 size Size of PCI Memory space region mapped to local (PLB) space through PTM x
{}
or ptm2ms (Offset 38) PTM 2 Memory Size
<byte 1256>
ulong value As longword
endunion ptm2ms (Offset 38) PTM 2 Memory Size
<byte 1260>
union ptm2la (Offset 3C) PTM 2 Local Address
<byte 1260>
{field (By field)}
<byte 1260>
lbits:12 mbz Must be zero
lbits:20 address PLB address generated in response to local (PLB) space access through PTM x
{}
or ptm2la (Offset 3C) PTM 2 Local Address
<byte 1260>
ulong value As longword
endunion ptm2la (Offset 3C) PTM 2 Local Address
{}
endunion plbpcir PLB-PCI Core Registers
<byte 1264>
union cprr Read Clock, Power Management and Reset Control Registers
<byte 1264>
ulong[6] cprra Read Clock, Power Management and Reset Control Registers As Longwords
or cprr Read Clock, Power Management and Reset Control Registers
<byte 1264>
{cprr (Read Clock, Power Management and Reset Control Registers By Field)}
<byte 1264>
union pmctrl (Offset 00) Peripheral Power Management Control
<byte 1264>
{field (By field)}
<byte 1264>
lbits:27 rsvd 0 Reserved
lbits:1 gpt_sleep General Purpose Timer Sleep
lbits:1 iic1_slp_init IIC 1 Sleep Init
lbits:1 iic0_slp_init IIC 0 Sleep Init
lbits:1 uart1_sleep UART 1 Sleep
lbits:1 uart0_sleep UART 0 Sleep
{}
or pmctrl (Offset 00) Peripheral Power Management Control
<byte 1264>
ulong value As longword
endunion pmctrl (Offset 00) Peripheral Power Management Control
<byte 1268>
union reset (Offset 04) Peripheral Reset Control
<byte 1268>
{field (By field)}
<byte 1268>
lbits:26 rsvd Reserved
lbits:1 gpt_tbc_rst General Purpose Timer Time Base Counter Reset
lbits:1 gpt_rst General Purpose Timer Reset
lbits:1 iic1_rst IIC 1 Reset
lbits:1 iic0_rst IIC 0 Reset
lbits:1 uart1_rst UART 1 Reset
lbits:1 uart0_rst UART 0 Reset
{}
or reset (Offset 04) Peripheral Reset Control
<byte 1268>
ulong value As longword
endunion reset (Offset 04) Peripheral Reset Control
<byte 1272>
union captevnt (Offset 08) Capture Event Generation
<byte 1272>
{field (By field)}
<byte 1272>
lbits:27 rsvd Reserved
lbits:1 gptevnt4 Generate/Capture event to event timer 4
lbits:1 gptevnt3 Generate/Capture event to event timer 3
lbits:1 gptevnt2 Generate/Capture event to event timer 2
lbits:1 gptevnt1 Generate/Capture event to event timer 1
lbits:1 gptevnt0 Generate/Capture event to event timer 0
{}
or captevnt (Offset 08) Capture Event Generation
<byte 1272>
ulong value As longword
endunion captevnt (Offset 08) Capture Event Generation
<byte 1276>
union pllaccess (Offset 0C) PLL Configuration Access
<byte 1276>
{field (By field)}
<byte 1276>
lbits:31 rsvd Reserved
lbits:1 pllwrenable PLL Configuration Register Access Enable
{}
or pllaccess (Offset 0C) PLL Configuration Access
<byte 1276>
ulong value As longword
endunion pllaccess (Offset 0C) PLL Configuration Access
<byte 1280>
union plltune (Offset 10) PLL Tuning Control
<byte 1280>
{field (By field)}
<byte 1280>
lbits:6 pll1_tune PLL 1 Tune Bits
lbits:4 pll1_mult PLL 1 Multiplication Factor
lbits:3 pll1_rangeb PLL 1 RangeB
lbits:3 pll1_rangea PLL 1 RangeA
lbits:6 pll0_tune PLL 0 Tune Bits
lbits:4 pll0_mult PLL 0 Multiplication Factor
lbits:3 pll0_rangeb PLL 0 RangeB
lbits:3 pll0_rangea PLL 0 RangeA
{}
or plltune (Offset 10) PLL Tuning Control
<byte 1280>
ulong value As longword
endunion plltune (Offset 10) PLL Tuning Control
<byte 1284>
union strapread (Offset 14) Strapping Pin
<byte 1284>
{field (By field)}
<byte 1284>
lbits:26 rsvd Reserved
lbits:1 dqmnecc Select either DQM[1:7] or ECC[1:7] to be muxed on ECC/DQM lines (GBL_N)
lbits:1 syncasync Sync vs Async Select (PCI PLL Bypass) (TSIZ[1])
lbits:1 pll0bypass System Clock PLL Bypass (TSIZ[0])
lbits:1 muxarbpar PCI Arbiter / Processor Data Parity Mux Control (TT[4])
lbits:1 pcifreq1 PCI Frequency Select 1 (PCI_66_EN)
lbits:1 pcifreq0 PCI Frequency Select 0 (TSIZ[2])
{}
or strapread (Offset 14) Strapping Pin
<byte 1284>
ulong value As longword
endunion strapread (Offset 14) Strapping Pin
{}
endunion cprr Read Clock, Power Management and Reset Control Registers
<byte 1288>
union uart0r UART0 Core Registers
<byte 1288>
ulong[2] uart0ra UART0 Core Registers As Longwords
or uart0r UART0 Core Registers
<byte 1288>
{uart0r (UART0 Core Registers By Field)}
<byte 1288>
union lcr (Offset 03) Line Control (read and write)
<byte 1288>
{field (By field)}
<byte 1288>
tbits:1 wls0 Word Length Select Bit 0
tbits:1 wls1 Word Length Select Bit 1
tbits:1 stb Number of Stop Bits
tbits:1 pen Parity Enable
tbits:1 eps Even Parity Select
tbits:1 st Stick Parity
tbits:1 sb Set Break
tbits:1 dlab Divisor Latch Access Bit
{}
or lcr (Offset 03) Line Control (read and write)
<byte 1288>
utiny value As byte
endunion lcr (Offset 03) Line Control (read and write)
<byte 1289>
union iirfcr (Offset 02) Interrupt Identification (read only)/FIFO Control (write only)
<byte 1289>
{field (By field)}
<byte 1289>
union subfield IIR/FCR Union
<byte 1289>
{iir (By field)}
<byte 1289>
tbits:1 ip Interrupt Pending
tbits:3 intid Interrupt ID
tbits:2 rsvd Reserved
tbits:2 fifosen Enabled
{}
or subfield IIR/FCR Union
<byte 1289>
{fcr (By field)}
<byte 1289>
tbits:1 fifoen FIFO Enable
tbits:1 rfifor RCVR FIFO Reset
tbits:1 tfifor XMIT FIFO Reset
tbits:1 dmams DMA Mode Select
tbits:2 rsvd Reserved
tbits:1 rtrigl RCVR Trigger (LSB)
tbits:1 rtrigm RCVR Trigger (MSB)
{}
endunion subfield IIR/FCR Union
{}
or iirfcr (Offset 02) Interrupt Identification (read only)/FIFO Control (write only)
<byte 1289>
utiny value As byte
endunion iirfcr (Offset 02) Interrupt Identification (read only)/FIFO Control (write only)
<byte 1290>
union mux1 Multiplexor 1 Union
<byte 1290>
union ier (Offset 01) Interrupt Enable (read and write)
<byte 1290>
{field (By field)}
<byte 1290>
tbits:1 erbfi Enable Receive Data Available Interrupt
tbits:1 etbei Enable Transmitter Holding Register Empty Interrupt
tbits:1 elsi Enable Receiver Line Status Interrupt
tbits:1 eddsi Enable Modem Status Interrupt
tbits:4 rsvd Reserved
{}
or ier (Offset 01) Interrupt Enable (read and write)
<byte 1290>
utiny value As byte
endunion ier (Offset 01) Interrupt Enable (read and write)
or mux1 Multiplexor 1 Union
<byte 1290>
union dlm (Offset 01) Divisor Latch (MSB bits 8:15) (read and write)
<byte 1290>
{field (By field)}
<byte 1290>
tbits:8 data Data
{}
or dlm (Offset 01) Divisor Latch (MSB bits 8:15) (read and write)
<byte 1290>
utiny value As byte
endunion dlm (Offset 01) Divisor Latch (MSB bits 8:15) (read and write)
endunion mux1 Multiplexor 1 Union
<byte 1291>
union mux0 Multiplexor 0 Union
<byte 1291>
union rbrthr (Offset 00) Receiver Buffer (read only)/Transmitter Holding (write only)
<byte 1291>
{field (By field)}
<byte 1291>
tbits:8 data Data
{}
or rbrthr (Offset 00) Receiver Buffer (read only)/Transmitter Holding (write only)
<byte 1291>
utiny value As byte
endunion rbrthr (Offset 00) Receiver Buffer (read only)/Transmitter Holding (write only)
or mux0 Multiplexor 0 Union
<byte 1291>
union dll (Offset 00) Divisor Latch (LSB bits 0:7) (read and write)
<byte 1291>
{field (By field)}
<byte 1291>
tbits:8 data Data
{}
or dll (Offset 00) Divisor Latch (LSB bits 0:7) (read and write)
<byte 1291>
utiny value As byte
endunion dll (Offset 00) Divisor Latch (LSB bits 0:7) (read and write)
endunion mux0 Multiplexor 0 Union
<byte 1292>
union scr (Offset 07) Scratch (read and write)
<byte 1292>
{field (By field)}
<byte 1292>
tbits:8 data Data
{}
or scr (Offset 07) Scratch (read and write)
<byte 1292>
utiny value As byte
endunion scr (Offset 07) Scratch (read and write)
<byte 1293>
union msr (Offset 06) Modem Status (read and write)
<byte 1293>
{field (By field)}
<byte 1293>
tbits:1 dcts Delta Clear To Send
tbits:1 ddsr Delta Data Set Ready
tbits:1 teri Trailing Edge Ring Indicator
tbits:1 ddcd Delta Data Carrier Detect
tbits:1 cts Clear To Send
tbits:1 dsr Data Set Ready
tbits:1 ri Ring Indicator
tbits:1 dcd Data Carrier Detect
{}
or msr (Offset 06) Modem Status (read and write)
<byte 1293>
utiny value As byte
endunion msr (Offset 06) Modem Status (read and write)
<byte 1294>
union lsr (Offset 05) Line Status (read and write)
<byte 1294>
{field (By field)}
<byte 1294>
tbits:1 dr Data Ready
tbits:1 oe Overrun Error
tbits:1 pe Parity Error
tbits:1 fe FramingError
tbits:1 bi Break Interrupt
tbits:1 thre Transmitter Holding Register
tbits:1 temt Transmitter Empty
tbits:1 erfifo Error in Receiver FIFO
{}
or lsr (Offset 05) Line Status (read and write)
<byte 1294>
utiny value As byte
endunion lsr (Offset 05) Line Status (read and write)
<byte 1295>
union mcr (Offset 04) Modem Control (read and write)
<byte 1295>
{field (By field)}
<byte 1295>
tbits:1 dtr Data Terminal Ready
tbits:1 rts Request To Send
tbits:1 out1 Out 1
tbits:1 out2 Out 2
tbits:1 loop Loop
tbits:3 rsvd Reserved
{}
or mcr (Offset 04) Modem Control (read and write)
<byte 1295>
utiny value As byte
endunion mcr (Offset 04) Modem Control (read and write)
{}
endunion uart0r UART0 Core Registers
<byte 1296>
union uart1r UART1 Core Registers
<byte 1296>
ulong[2] uart1ra UART1 Core Registers As Longwords
or uart1r UART1 Core Registers
<byte 1296>
{uart1r (UART1 Core Registers By Field)}
<byte 1296>
union lcr (Offset 03) Line Control (read and write)
<byte 1296>
{field (By field)}
<byte 1296>
tbits:1 wls0 Word Length Select Bit 0
tbits:1 wls1 Word Length Select Bit 1
tbits:1 stb Number of Stop Bits
tbits:1 pen Parity Enable
tbits:1 eps Even Parity Select
tbits:1 st Stick Parity
tbits:1 sb Set Break
tbits:1 dlab Divisor Latch Access Bit
{}
or lcr (Offset 03) Line Control (read and write)
<byte 1296>
utiny value As byte
endunion lcr (Offset 03) Line Control (read and write)
<byte 1297>
union iirfcr (Offset 02) Interrupt Identification (read only)/FIFO Control (write only)
<byte 1297>
{field (By field)}
<byte 1297>
union subfield IIR/FCR Union
<byte 1297>
{iir (By field)}
<byte 1297>
tbits:1 ip Interrupt Pending
tbits:3 intid Interrupt ID
tbits:2 rsvd Reserved
tbits:2 fifosen Enabled
{}
or subfield IIR/FCR Union
<byte 1297>
{fcr (By field)}
<byte 1297>
tbits:1 fifoen FIFO Enable
tbits:1 rfifor RCVR FIFO Reset
tbits:1 tfifor XMIT FIFO Reset
tbits:1 dmams DMA Mode Select
tbits:2 rsvd Reserved
tbits:1 rtrigl RCVR Trigger (LSB)
tbits:1 rtrigm RCVR Trigger (MSB)
{}
endunion subfield IIR/FCR Union
{}
or iirfcr (Offset 02) Interrupt Identification (read only)/FIFO Control (write only)
<byte 1297>
utiny value As byte
endunion iirfcr (Offset 02) Interrupt Identification (read only)/FIFO Control (write only)
<byte 1298>
union mux1 Multiplexor 1 Union
<byte 1298>
union ier (Offset 01) Interrupt Enable (read and write)
<byte 1298>
{field (By field)}
<byte 1298>
tbits:1 erbfi Enable Receive Data Available Interrupt
tbits:1 etbei Enable Transmitter Holding Register Empty Interrupt
tbits:1 elsi Enable Receiver Line Status Interrupt
tbits:1 eddsi Enable Modem Status Interrupt
tbits:4 rsvd Reserved
{}
or ier (Offset 01) Interrupt Enable (read and write)
<byte 1298>
utiny value As byte
endunion ier (Offset 01) Interrupt Enable (read and write)
or mux1 Multiplexor 1 Union
<byte 1298>
union dlm (Offset 01) Divisor Latch (MSB bits 8:15) (read and write)
<byte 1298>
{field (By field)}
<byte 1298>
tbits:8 data Data
{}
or dlm (Offset 01) Divisor Latch (MSB bits 8:15) (read and write)
<byte 1298>
utiny value As byte
endunion dlm (Offset 01) Divisor Latch (MSB bits 8:15) (read and write)
endunion mux1 Multiplexor 1 Union
<byte 1299>
union mux0 Multiplexor 0 Union
<byte 1299>
union rbrthr (Offset 00) Receiver Buffer (read only)/Transmitter Holding (write only)
<byte 1299>
{field (By field)}
<byte 1299>
tbits:8 data Data
{}
or rbrthr (Offset 00) Receiver Buffer (read only)/Transmitter Holding (write only)
<byte 1299>
utiny value As byte
endunion rbrthr (Offset 00) Receiver Buffer (read only)/Transmitter Holding (write only)
or mux0 Multiplexor 0 Union
<byte 1299>
union dll (Offset 00) Divisor Latch (LSB bits 0:7) (read and write)
<byte 1299>
{field (By field)}
<byte 1299>
tbits:8 data Data
{}
or dll (Offset 00) Divisor Latch (LSB bits 0:7) (read and write)
<byte 1299>
utiny value As byte
endunion dll (Offset 00) Divisor Latch (LSB bits 0:7) (read and write)
endunion mux0 Multiplexor 0 Union
<byte 1300>
union scr (Offset 07) Scratch (read and write)
<byte 1300>
{field (By field)}
<byte 1300>
tbits:8 data Data
{}
or scr (Offset 07) Scratch (read and write)
<byte 1300>
utiny value As byte
endunion scr (Offset 07) Scratch (read and write)
<byte 1301>
union msr (Offset 06) Modem Status (read and write)
<byte 1301>
{field (By field)}
<byte 1301>
tbits:1 dcts Delta Clear To Send
tbits:1 ddsr Delta Data Set Ready
tbits:1 teri Trailing Edge Ring Indicator
tbits:1 ddcd Delta Data Carrier Detect
tbits:1 cts Clear To Send
tbits:1 dsr Data Set Ready
tbits:1 ri Ring Indicator
tbits:1 dcd Data Carrier Detect
{}
or msr (Offset 06) Modem Status (read and write)
<byte 1301>
utiny value As byte
endunion msr (Offset 06) Modem Status (read and write)
<byte 1302>
union lsr (Offset 05) Line Status (read and write)
<byte 1302>
{field (By field)}
<byte 1302>
tbits:1 dr Data Ready
tbits:1 oe Overrun Error
tbits:1 pe Parity Error
tbits:1 fe FramingError
tbits:1 bi Break Interrupt
tbits:1 thre Transmitter Holding Register
tbits:1 temt Transmitter Empty
tbits:1 erfifo Error in Receiver FIFO
{}
or lsr (Offset 05) Line Status (read and write)
<byte 1302>
utiny value As byte
endunion lsr (Offset 05) Line Status (read and write)
<byte 1303>
union mcr (Offset 04) Modem Control (read and write)
<byte 1303>
{field (By field)}
<byte 1303>
tbits:1 dtr Data Terminal Ready
tbits:1 rts Request To Send
tbits:1 out1 Out 1
tbits:1 out2 Out 2
tbits:1 loop Loop
tbits:3 rsvd Reserved
{}
or mcr (Offset 04) Modem Control (read and write)
<byte 1303>
utiny value As byte
endunion mcr (Offset 04) Modem Control (read and write)
{}
endunion uart1r UART1 Core Registers
<byte 1304>
union iic0r IIC0 Core Registers
<byte 1304>
ulong[5] iic0ra IIC0 Core Registers As Longwords
or iic0r IIC0 Core Registers
<byte 1304>
{quasar_iic0r (IIC0 Core Registers By Field)}
<byte 1304>
{iic0r (IIC0 Core Registers By Field)}
<byte 1304>
{rsvd3 ((Offset 03) Reserved)}
<byte 1304>
utiny value
{}
<byte 1305>
union sdbuf (Offset 02) Slave Data Buffer
<byte 1305>
{field (By field)}
<byte 1305>
tbits:8 data Data
{}
or sdbuf (Offset 02) Slave Data Buffer
<byte 1305>
utiny value As byte
endunion sdbuf (Offset 02) Slave Data Buffer
<byte 1306>
{rsvd1 ((Offset 01) Reserved)}
<byte 1306>
utiny value
{}
<byte 1307>
union mdbuf (Offset 00) Master Data Buffer
<byte 1307>
{field (By field)}
<byte 1307>
tbits:8 data Data
{}
or mdbuf (Offset 00) Master Data Buffer
<byte 1307>
utiny value As byte
endunion mdbuf (Offset 00) Master Data Buffer
<byte 1308>
union mdcntl (Offset 07) Mode Control
<byte 1308>
{field (By field)}
<byte 1308>
tbits:1 ehscl Enable hold SCL
tbits:1 euiicbs Exit unknown I 2 C bus state
tbits:1 ei Enable interrupt
tbits:1 esm Enable slave mode
tbits:1 fsm Fast/standard mode
tbits:1 egc Enable general call
tbits:1 fmdb Flush master data buffer
tbits:1 fsdb Flush slave data buffer
{}
or mdcntl (Offset 07) Mode Control
<byte 1308>
utiny value As byte
endunion mdcntl (Offset 07) Mode Control
<byte 1309>
union cntl (Offset 06) Control
<byte 1309>
{field (By field)}
<byte 1309>
tbits:1 pt Pending transfer
tbits:1 rorw Read or Write
tbits:1 chain Chain
tbits:1 rs Repeated start
tbits:1 cb0 Count bit 0 (LSB)
tbits:1 cb1 Count bit 1 (MSB)
tbits:1 tenseven 10/7 bit addressing
tbits:1 hmt Halt master transfer
{}
or cntl (Offset 06) Control
<byte 1309>
utiny value As byte
endunion cntl (Offset 06) Control
<byte 1310>
union hmadr (Offset 05) High Master Address
<byte 1310>
{field (By field)}
<byte 1310>
tbits:8 address Address
{}
or hmadr (Offset 05) High Master Address
<byte 1310>
utiny value As byte
endunion hmadr (Offset 05) High Master Address
<byte 1311>
union lmadr (Offset 04) Low Master Address
<byte 1311>
{field (By field)}
<byte 1311>
tbits:8 address Address
{}
or lmadr (Offset 04) Low Master Address
<byte 1311>
utiny value As byte
endunion lmadr (Offset 04) Low Master Address
<byte 1312>
union hsadr (Offset 0B) High Slave Address
<byte 1312>
{field (By field)}
<byte 1312>
tbits:8 address Address
{}
or hsadr (Offset 0B) High Slave Address
<byte 1312>
utiny value As byte
endunion hsadr (Offset 0B) High Slave Address
<byte 1313>
union lsadr (Offset 0A) Low Slave Address
<byte 1313>
{field (By field)}
<byte 1313>
tbits:8 address Address
{}
or lsadr (Offset 0A) Low Slave Address
<byte 1313>
utiny value As byte
endunion lsadr (Offset 0A) Low Slave Address
<byte 1314>
union extsts (Offset 09) Extended Status
<byte 1314>
{field (By field)}
<byte 1314>
tbits:1 ta Transfer aborted
tbits:1 ic Incomplete transfer
tbits:1 la Lost arbitration
tbits:1 irqoond IRQ on-deck
tbits:1 bcsb0 Bus control state bit 0 (LSB) (read only)
tbits:1 bcsb1 Bus control state bit 1 (read only)
tbits:1 bcsb2 Bus control state bit 2 (MSB) (read only)
tbits:1 irqp IRQ pending
{}
or extsts (Offset 09) Extended Status
<byte 1314>
utiny value As byte
endunion extsts (Offset 09) Extended Status
<byte 1315>
union sts (Offset 08) Status
<byte 1315>
{field (By field)}
<byte 1315>
tbits:1 pt Pending transfer
tbits:1 irqa IRQ active
tbits:1 error Error
tbits:1 hors Halted or stopped
tbits:1 mdbf Master data buffer full
tbits:1 mdbhd Master data buffer has data
tbits:1 sr Sleep request
tbits:1 sss Slave status set
{}
or sts (Offset 08) Status
<byte 1315>
utiny value As byte
endunion sts (Offset 08) Status
<byte 1316>
union xtcntlss (Offset 0F) Extended Control and Slave Status
<byte 1316>
{field (By field)}
<byte 1316>
tbits:1 sr Soft reset
tbits:1 epi Enable pulsed IRQ
tbits:1 sdbf Slave data buffer full
tbits:1 sdbhd Slave data buffer has data
tbits:1 swns Slave write needs service
tbits:1 swc Slave write complete
tbits:1 srns Slave read needs service
tbits:1 src Slave read complete
{}
or xtcntlss (Offset 0F) Extended Control and Slave Status
<byte 1316>
utiny value As byte
endunion xtcntlss (Offset 0F) Extended Control and Slave Status
<byte 1317>
union xfrcnt (Offset 0E) Transfer Count
<byte 1317>
{field (By field)}
<byte 1317>
tbits:3 mtc Master Transfer Count
tbits:1 rsvda Reserved
tbits:3 stc Slave Transfer Count
tbits:1 rsvdb Reserved
{}
or xfrcnt (Offset 0E) Transfer Count
<byte 1317>
utiny value As byte
endunion xfrcnt (Offset 0E) Transfer Count
<byte 1318>
union intrmsk (Offset 0D) Interrupt Mask
<byte 1318>
{field (By field)}
<byte 1318>
tbits:1 eirmtc Enable IRQ on requested master transfer complete
tbits:1 eita Enable IRQ on transfer aborted
tbits:1 eiit Enable IRQ on incomplete transfer
tbits:1 eihe Enable IRQ on halt executed
tbits:1 eisns Enable IRQ on slave write needs service
tbits:1 eiswc Enable IRQ on slave write complete
tbits:1 eisrns Enable IRQ on slave read needs service
tbits:1 eisrc Enable IRQ on slave read complete
{}
or intrmsk (Offset 0D) Interrupt Mask
<byte 1318>
utiny value As byte
endunion intrmsk (Offset 0D) Interrupt Mask
<byte 1319>
union clkdiv (Offset 0C) Clock Divide
<byte 1319>
{field (By field)}
<byte 1319>
tbits:8 data Data
{}
or clkdiv (Offset 0C) Clock Divide
<byte 1319>
utiny value As byte
endunion clkdiv (Offset 0C) Clock Divide
<byte 1320>
utiny[3] pad3 Structure Padding (DO NOT DISPLAY!)
<byte 1323>
union directcntl (Offset 10) Direct Control
<byte 1323>
{field (By field)}
<byte 1323>
tbits:1 cksclin Check value of IIC_SCL_In
tbits:1 cksdain Check value of IIC_SDA_In
tbits:1 ctsclout Directly control IIC_SCL_Out
tbits:1 ctsdaout Directly control IIC_SDA_Out
tbits:4 rsvd Reserved
{}
or directcntl (Offset 10) Direct Control
<byte 1323>
utiny value As byte
endunion directcntl (Offset 10) Direct Control
{}
{}
endunion iic0r IIC0 Core Registers
<byte 1324>
union iic1r IIC1 Core Registers
<byte 1324>
ulong[5] iic1ra IIC1 Core Registers As Longwords
or iic1r IIC1 Core Registers
<byte 1324>
{quasar_iic1r (IIC1 Core Registers By Field)}
<byte 1324>
{iic1r (IIC1 Core Registers By Field)}
<byte 1324>
{rsvd3 ((Offset 03) Reserved)}
<byte 1324>
utiny value
{}
<byte 1325>
union sdbuf (Offset 02) Slave Data Buffer
<byte 1325>
{field (By field)}
<byte 1325>
tbits:8 data Data
{}
or sdbuf (Offset 02) Slave Data Buffer
<byte 1325>
utiny value As byte
endunion sdbuf (Offset 02) Slave Data Buffer
<byte 1326>
{rsvd1 ((Offset 01) Reserved)}
<byte 1326>
utiny value
{}
<byte 1327>
union mdbuf (Offset 00) Master Data Buffer
<byte 1327>
{field (By field)}
<byte 1327>
tbits:8 data Data
{}
or mdbuf (Offset 00) Master Data Buffer
<byte 1327>
utiny value As byte
endunion mdbuf (Offset 00) Master Data Buffer
<byte 1328>
union mdcntl (Offset 07) Mode Control
<byte 1328>
{field (By field)}
<byte 1328>
tbits:1 ehscl Enable hold SCL
tbits:1 euiicbs Exit unknown I 2 C bus state
tbits:1 ei Enable interrupt
tbits:1 esm Enable slave mode
tbits:1 fsm Fast/standard mode
tbits:1 egc Enable general call
tbits:1 fmdb Flush master data buffer
tbits:1 fsdb Flush slave data buffer
{}
or mdcntl (Offset 07) Mode Control
<byte 1328>
utiny value As byte
endunion mdcntl (Offset 07) Mode Control
<byte 1329>
union cntl (Offset 06) Control
<byte 1329>
{field (By field)}
<byte 1329>
tbits:1 pt Pending transfer
tbits:1 rorw Read or Write
tbits:1 chain Chain
tbits:1 rs Repeated start
tbits:1 cb0 Count bit 0 (LSB)
tbits:1 cb1 Count bit 1 (MSB)
tbits:1 tenseven 10/7 bit addressing
tbits:1 hmt Halt master transfer
{}
or cntl (Offset 06) Control
<byte 1329>
utiny value As byte
endunion cntl (Offset 06) Control
<byte 1330>
union hmadr (Offset 05) High Master Address
<byte 1330>
{field (By field)}
<byte 1330>
tbits:8 address Address
{}
or hmadr (Offset 05) High Master Address
<byte 1330>
utiny value As byte
endunion hmadr (Offset 05) High Master Address
<byte 1331>
union lmadr (Offset 04) Low Master Address
<byte 1331>
{field (By field)}
<byte 1331>
tbits:8 address Address
{}
or lmadr (Offset 04) Low Master Address
<byte 1331>
utiny value As byte
endunion lmadr (Offset 04) Low Master Address
<byte 1332>
union hsadr (Offset 0B) High Slave Address
<byte 1332>
{field (By field)}
<byte 1332>
tbits:8 address Address
{}
or hsadr (Offset 0B) High Slave Address
<byte 1332>
utiny value As byte
endunion hsadr (Offset 0B) High Slave Address
<byte 1333>
union lsadr (Offset 0A) Low Slave Address
<byte 1333>
{field (By field)}
<byte 1333>
tbits:8 address Address
{}
or lsadr (Offset 0A) Low Slave Address
<byte 1333>
utiny value As byte
endunion lsadr (Offset 0A) Low Slave Address
<byte 1334>
union extsts (Offset 09) Extended Status
<byte 1334>
{field (By field)}
<byte 1334>
tbits:1 ta Transfer aborted
tbits:1 ic Incomplete transfer
tbits:1 la Lost arbitration
tbits:1 irqoond IRQ on-deck
tbits:1 bcsb0 Bus control state bit 0 (LSB) (read only)
tbits:1 bcsb1 Bus control state bit 1 (read only)
tbits:1 bcsb2 Bus control state bit 2 (MSB) (read only)
tbits:1 irqp IRQ pending
{}
or extsts (Offset 09) Extended Status
<byte 1334>
utiny value As byte
endunion extsts (Offset 09) Extended Status
<byte 1335>
union sts (Offset 08) Status
<byte 1335>
{field (By field)}
<byte 1335>
tbits:1 pt Pending transfer
tbits:1 irqa IRQ active
tbits:1 error Error
tbits:1 hors Halted or stopped
tbits:1 mdbf Master data buffer full
tbits:1 mdbhd Master data buffer has data
tbits:1 sr Sleep request
tbits:1 sss Slave status set
{}
or sts (Offset 08) Status
<byte 1335>
utiny value As byte
endunion sts (Offset 08) Status
<byte 1336>
union xtcntlss (Offset 0F) Extended Control and Slave Status
<byte 1336>
{field (By field)}
<byte 1336>
tbits:1 sr Soft reset
tbits:1 epi Enable pulsed IRQ
tbits:1 sdbf Slave data buffer full
tbits:1 sdbhd Slave data buffer has data
tbits:1 swns Slave write needs service
tbits:1 swc Slave write complete
tbits:1 srns Slave read needs service
tbits:1 src Slave read complete
{}
or xtcntlss (Offset 0F) Extended Control and Slave Status
<byte 1336>
utiny value As byte
endunion xtcntlss (Offset 0F) Extended Control and Slave Status
<byte 1337>
union xfrcnt (Offset 0E) Transfer Count
<byte 1337>
{field (By field)}
<byte 1337>
tbits:3 mtc Master Transfer Count
tbits:1 rsvda Reserved
tbits:3 stc Slave Transfer Count
tbits:1 rsvdb Reserved
{}
or xfrcnt (Offset 0E) Transfer Count
<byte 1337>
utiny value As byte
endunion xfrcnt (Offset 0E) Transfer Count
<byte 1338>
union intrmsk (Offset 0D) Interrupt Mask
<byte 1338>
{field (By field)}
<byte 1338>
tbits:1 eirmtc Enable IRQ on requested master transfer complete
tbits:1 eita Enable IRQ on transfer aborted
tbits:1 eiit Enable IRQ on incomplete transfer
tbits:1 eihe Enable IRQ on halt executed
tbits:1 eisns Enable IRQ on slave write needs service
tbits:1 eiswc Enable IRQ on slave write complete
tbits:1 eisrns Enable IRQ on slave read needs service
tbits:1 eisrc Enable IRQ on slave read complete
{}
or intrmsk (Offset 0D) Interrupt Mask
<byte 1338>
utiny value As byte
endunion intrmsk (Offset 0D) Interrupt Mask
<byte 1339>
union clkdiv (Offset 0C) Clock Divide
<byte 1339>
{field (By field)}
<byte 1339>
tbits:8 data Data
{}
or clkdiv (Offset 0C) Clock Divide
<byte 1339>
utiny value As byte
endunion clkdiv (Offset 0C) Clock Divide
<byte 1340>
utiny[3] pad3 Structure Padding (DO NOT DISPLAY!)
<byte 1343>
union directcntl (Offset 10) Direct Control
<byte 1343>
{field (By field)}
<byte 1343>
tbits:1 cksclin Check value of IIC_SCL_In
tbits:1 cksdain Check value of IIC_SDA_In
tbits:1 ctsclout Directly control IIC_SCL_Out
tbits:1 ctsdaout Directly control IIC_SDA_Out
tbits:4 rsvd Reserved
{}
or directcntl (Offset 10) Direct Control
<byte 1343>
utiny value As byte
endunion directcntl (Offset 10) Direct Control
{}
{}
endunion iic1r IIC1 Core Registers
<byte 1344>
union gptr General Purpose Timer Registers
<byte 1344>
ulong[64] gptra General Purpose Timer Registers As Longwords
or gptr General Purpose Timer Registers
<byte 1344>
{gptr (General Purpose Timer Registers By Field)}
<byte 1344>
union tbc (Offset 00) Time Base Counter
<byte 1344>
{field (By field)}
<byte 1344>
lbits:32 count Count
{}
or tbc (Offset 00) Time Base Counter
<byte 1344>
ulong value As longword
endunion tbc (Offset 00) Time Base Counter
<byte 1348>
union tmce (Offset 04) Capture Timers Enable
<byte 1348>
{field (By field)}
<byte 1348>
lbits:27 rsvd Reserved
lbits:1 capt4e Capture Timer 4 Enable
lbits:1 capt3e Capture Timer 3 Enable
lbits:1 capt2e Capture Timer 2 Enable
lbits:1 capt1e Capture Timer 1 Enable
lbits:1 capt0e Capture Timer 0 Enable
{}
or tmce (Offset 04) Capture Timers Enable
<byte 1348>
ulong value As longword
endunion tmce (Offset 04) Capture Timers Enable
<byte 1352>
union tmec (Offset 08) Edge Detection Control
<byte 1352>
{field (By field)}
<byte 1352>
lbits:27 rsvd Reserved
lbits:1 capt4ed Capture Timer 4 Edge Detect
lbits:1 capt3ed Capture Timer 3 Edge Detect
lbits:1 capt2ed Capture Timer 2 Edge Detect
lbits:1 capt1ed Capture Timer 1 Edge Detect
lbits:1 capt0ed Capture Timer 0 Edge Detect
{}
or tmec (Offset 08) Edge Detection Control
<byte 1352>
ulong value As longword
endunion tmec (Offset 08) Edge Detection Control
<byte 1356>
union tmsc (Offset 0C) Capture Events Synchronization Control
<byte 1356>
{field (By field)}
<byte 1356>
lbits:27 rsvd Reserved
lbits:1 capt4s Capture Timer 4 Synchronization
lbits:1 capt3s Capture Timer 3 Synchronization
lbits:1 capt2s Capture Timer 2 Synchronization
lbits:1 capt1s Capture Timer 1 Synchronization
lbits:1 capt0s Capture Timer 0 Synchronization
{}
or tmsc (Offset 0C) Capture Events Synchronization Control
<byte 1356>
ulong value As longword
endunion tmsc (Offset 0C) Capture Events Synchronization Control
<byte 1360>
union tmoe (Offset 10) Compare Timers Output Enable
<byte 1360>
{field (By field)}
<byte 1360>
lbits:27 rsvd Reserved
lbits:1 comp4oe Compare Timer 4 Output Enable
lbits:1 comp3oe Compare Timer 3 Output Enable
lbits:1 comp2oe Compare Timer 2 Output Enable
lbits:1 comp1oe Compare Timer 1 Output Enable
lbits:1 comp0oe Compare Timer 0 Output Enable
{}
or tmoe (Offset 10) Compare Timers Output Enable
<byte 1360>
ulong value As longword
endunion tmoe (Offset 10) Compare Timers Output Enable
<byte 1364>
union tmol (Offset 14) Compare Timer Output Level
<byte 1364>
{field (By field)}
<byte 1364>
lbits:27 rsvd Reserved
lbits:1 comp4ol Compare Timer 4 Output Level
lbits:1 comp3ol Compare Timer 3 Output Level
lbits:1 comp2ol Compare Timer 2 Output Level
lbits:1 comp1ol Compare Timer 1 Output Level
lbits:1 comp0ol Compare Timer 0 Output Level
{}
or tmol (Offset 14) Compare Timer Output Level
<byte 1364>
ulong value As longword
endunion tmol (Offset 14) Compare Timer Output Level
<byte 1368>
union tmie (Offset 18) Timers Interrupt Enable
<byte 1368>
{field (By field)}
<byte 1368>
lbits:11 rsvdb Reserved
lbits:1 comp4ie Compare Timer 4 Interrupt Enable
lbits:1 comp3ie Compare Timer 3 Interrupt Enable
lbits:1 comp2ie Compare Timer 2 Interrupt Enable
lbits:1 comp1ie Compare Timer 1 Interrupt Enable
lbits:1 comp0ie Compare Timer 0 Interrupt Enable
lbits:11 rsvda Reserved
lbits:1 capt4ie Capture Timer 4 Interrupt Enable
lbits:1 capt3ie Capture Timer 3 Interrupt Enable
lbits:1 capt2ie Capture Timer 2 Interrupt Enable
lbits:1 capt1ie Capture Timer 1 Interrupt Enable
lbits:1 capt0ie Capture Timer 0 Interrupt Enable
{}
or tmie (Offset 18) Timers Interrupt Enable
<byte 1368>
ulong value As longword
endunion tmie (Offset 18) Timers Interrupt Enable
<byte 1372>
union tmis (Offset 1C) Timers Interrupt Status
<byte 1372>
{field (By field)}
<byte 1372>
lbits:11 rsvdb Reserved
lbits:1 comp4is Compare Timer 4 Interrupt Status
lbits:1 comp3is Compare Timer 3 Interrupt Status
lbits:1 comp2is Compare Timer 2 Interrupt Status
lbits:1 comp1is Compare Timer 1 Interrupt Status
lbits:1 comp0is Compare Timer 0 Interrupt Status
lbits:11 rsvda Reserved
lbits:1 capt4is Capture Timer 4 Interrupt Status
lbits:1 capt3is Capture Timer 3 Interrupt Status
lbits:1 capt2is Capture Timer 2 Interrupt Status
lbits:1 capt1is Capture Timer 1 Interrupt Status
lbits:1 capt0is Capture Timer 0 Interrupt Status
{}
or tmis (Offset 1C) Timers Interrupt Status
<byte 1372>
ulong value As longword
endunion tmis (Offset 1C) Timers Interrupt Status
<byte 1376>
union tmisc (Offset 20) Timers Interrupt Status (clear upon read)
<byte 1376>
{field (By field)}
<byte 1376>
lbits:11 rsvdb Reserved
lbits:1 comp4is Compare Timer 4 Interrupt Status
lbits:1 comp3is Compare Timer 3 Interrupt Status
lbits:1 comp2is Compare Timer 2 Interrupt Status
lbits:1 comp1is Compare Timer 1 Interrupt Status
lbits:1 comp0is Compare Timer 0 Interrupt Status
lbits:11 rsvda Reserved
lbits:1 capt4is Capture Timer 4 Interrupt Status
lbits:1 capt3is Capture Timer 3 Interrupt Status
lbits:1 capt2is Capture Timer 2 Interrupt Status
lbits:1 capt1is Capture Timer 1 Interrupt Status
lbits:1 capt0is Capture Timer 0 Interrupt Status
{}
or tmisc (Offset 20) Timers Interrupt Status (clear upon read)
<byte 1376>
ulong value As longword
endunion tmisc (Offset 20) Timers Interrupt Status (clear upon read)
<byte 1380>
union tmim (Offset 24) Timers Interrupt Mask
<byte 1380>
{field (By field)}
<byte 1380>
lbits:11 rsvdb Reserved
lbits:1 comp4im Compare Timer 4 Interrupt Mask
lbits:1 comp3im Compare Timer 3 Interrupt Mask
lbits:1 comp2im Compare Timer 2 Interrupt Mask
lbits:1 comp1im Compare Timer 1 Interrupt Mask
lbits:1 comp0im Compare Timer 0 Interrupt Mask
lbits:11 rsvda Reserved
lbits:1 capt4im Capture Timer 4 Interrupt Mask
lbits:1 capt3im Capture Timer 3 Interrupt Mask
lbits:1 capt2im Capture Timer 2 Interrupt Mask
lbits:1 capt1im Capture Timer 1 Interrupt Mask
lbits:1 capt0im Capture Timer 0 Interrupt Mask
{}
or tmim (Offset 24) Timers Interrupt Mask
<byte 1380>
ulong value As longword
endunion tmim (Offset 24) Timers Interrupt Mask
<byte 1384>
{rsvd28_2b ((Offset 28) Reserved)}
<byte 1384>
ulong value
{}
<byte 1388>
{rsvd2c_2f ((Offset 2C) Reserved)}
<byte 1388>
ulong value
{}
<byte 1392>
{rsvd30_33 ((Offset 30) Reserved)}
<byte 1392>
ulong value
{}
<byte 1396>
{rsvd34_37 ((Offset 34) Reserved)}
<byte 1396>
ulong value
{}
<byte 1400>
{rsvd38_3b ((Offset 38) Reserved)}
<byte 1400>
ulong value
{}
<byte 1404>
{rsvd3c_3f ((Offset 3C) Reserved)}
<byte 1404>
ulong value
{}
<byte 1408>
union capt0 (Offset 40) Capture Timer 0
<byte 1408>
{field (By field)}
<byte 1408>
lbits:32 count Count
{}
or capt0 (Offset 40) Capture Timer 0
<byte 1408>
ulong value As longword
endunion capt0 (Offset 40) Capture Timer 0
<byte 1412>
union capt1 (Offset 44) Capture Timer 1
<byte 1412>
{field (By field)}
<byte 1412>
lbits:32 count Count
{}
or capt1 (Offset 44) Capture Timer 1
<byte 1412>
ulong value As longword
endunion capt1 (Offset 44) Capture Timer 1
<byte 1416>
union capt2 (Offset 48) Capture Timer 2
<byte 1416>
{field (By field)}
<byte 1416>
lbits:32 count Count
{}
or capt2 (Offset 48) Capture Timer 2
<byte 1416>
ulong value As longword
endunion capt2 (Offset 48) Capture Timer 2
<byte 1420>
union capt3 (Offset 4C) Capture Timer 3
<byte 1420>
{field (By field)}
<byte 1420>
lbits:32 count Count
{}
or capt3 (Offset 4C) Capture Timer 3
<byte 1420>
ulong value As longword
endunion capt3 (Offset 4C) Capture Timer 3
<byte 1424>
union capt4 (Offset 50) Capture Timer 4
<byte 1424>
{field (By field)}
<byte 1424>
lbits:32 count Count
{}
or capt4 (Offset 50) Capture Timer 4
<byte 1424>
ulong value As longword
endunion capt4 (Offset 50) Capture Timer 4
<byte 1428>
{rsvd54_57 ((Offset 54) Reserved)}
<byte 1428>
ulong value
{}
<byte 1432>
{rsvd58_5b ((Offset 58) Reserved)}
<byte 1432>
ulong value
{}
<byte 1436>
{rsvd5c_5f ((Offset 5C) Reserved)}
<byte 1436>
ulong value
{}
<byte 1440>
{rsvd60_63 ((Offset 60) Reserved)}
<byte 1440>
ulong value
{}
<byte 1444>
{rsvd64_67 ((Offset 64) Reserved)}
<byte 1444>
ulong value
{}
<byte 1448>
{rsvd68_6b ((Offset 68) Reserved)}
<byte 1448>
ulong value
{}
<byte 1452>
{rsvd6c_6f ((Offset 6C) Reserved)}
<byte 1452>
ulong value
{}
<byte 1456>
{rsvd70_73 ((Offset 70) Reserved)}
<byte 1456>
ulong value
{}
<byte 1460>
{rsvd74_77 ((Offset 74) Reserved)}
<byte 1460>
ulong value
{}
<byte 1464>
{rsvd78_7b ((Offset 78) Reserved)}
<byte 1464>
ulong value
{}
<byte 1468>
{rsvd7c_7f ((Offset 7C) Reserved)}
<byte 1468>
ulong value
{}
<byte 1472>
union comp0 (Offset 80) Compare Timer 0
<byte 1472>
{field (By field)}
<byte 1472>
lbits:32 count Count
{}
or comp0 (Offset 80) Compare Timer 0
<byte 1472>
ulong value As longword
endunion comp0 (Offset 80) Compare Timer 0
<byte 1476>
union comp1 (Offset 84) Compare Timer 1
<byte 1476>
{field (By field)}
<byte 1476>
lbits:32 count Count
{}
or comp1 (Offset 84) Compare Timer 1
<byte 1476>
ulong value As longword
endunion comp1 (Offset 84) Compare Timer 1
<byte 1480>
union comp2 (Offset 88) Compare Timer 2
<byte 1480>
{field (By field)}
<byte 1480>
lbits:32 count Count
{}
or comp2 (Offset 88) Compare Timer 2
<byte 1480>
ulong value As longword
endunion comp2 (Offset 88) Compare Timer 2
<byte 1484>
union comp3 (Offset 8C) Compare Timer 3
<byte 1484>
{field (By field)}
<byte 1484>
lbits:32 count Count
{}
or comp3 (Offset 8C) Compare Timer 3
<byte 1484>
ulong value As longword
endunion comp3 (Offset 8C) Compare Timer 3
<byte 1488>
union comp4 (Offset 90) Compare Timer 4
<byte 1488>
{field (By field)}
<byte 1488>
lbits:32 count Count
{}
or comp4 (Offset 90) Compare Timer 4
<byte 1488>
ulong value As longword
endunion comp4 (Offset 90) Compare Timer 4
<byte 1492>
{rsvd94_97 ((Offset 94) Reserved)}
<byte 1492>
ulong value
{}
<byte 1496>
{rsvd98_9b ((Offset 98) Reserved)}
<byte 1496>
ulong value
{}
<byte 1500>
{rsvd9c_9f ((Offset 9C) Reserved)}
<byte 1500>
ulong value
{}
<byte 1504>
{rsvda0_a3 ((Offset A0) Reserved)}
<byte 1504>
ulong value
{}
<byte 1508>
{rsvda4_a7 ((Offset A4) Reserved)}
<byte 1508>
ulong value
{}
<byte 1512>
{rsvda8_ab ((Offset A8) Reserved)}
<byte 1512>
ulong value
{}
<byte 1516>
{rsvdac_af ((Offset AC) Reserved)}
<byte 1516>
ulong value
{}
<byte 1520>
{rsvdb0_b3 ((Offset B0) Reserved)}
<byte 1520>
ulong value
{}
<byte 1524>
{rsvdb4_b7 ((Offset B4) Reserved)}
<byte 1524>
ulong value
{}
<byte 1528>
{rsvdb8_bb ((Offset B8) Reserved)}
<byte 1528>
ulong value
{}
<byte 1532>
{rsvdbc_bf ((Offset BC) Reserved)}
<byte 1532>
ulong value
{}
<byte 1536>
union mask0 (Offset C0) Time Base Counter Mask 0
<byte 1536>
{field (By field)}
<byte 1536>
lbits:32 mask Mask
{}
or mask0 (Offset C0) Time Base Counter Mask 0
<byte 1536>
ulong value As longword
endunion mask0 (Offset C0) Time Base Counter Mask 0
<byte 1540>
union mask1 (Offset C4) Time Base Counter Mask 1
<byte 1540>
{field (By field)}
<byte 1540>
lbits:32 mask Mask
{}
or mask1 (Offset C4) Time Base Counter Mask 1
<byte 1540>
ulong value As longword
endunion mask1 (Offset C4) Time Base Counter Mask 1
<byte 1544>
union mask2 (Offset C8) Time Base Counter Mask 2
<byte 1544>
{field (By field)}
<byte 1544>
lbits:32 mask Mask
{}
or mask2 (Offset C8) Time Base Counter Mask 2
<byte 1544>
ulong value As longword
endunion mask2 (Offset C8) Time Base Counter Mask 2
<byte 1548>
union mask3 (Offset CC) Time Base Counter Mask 3
<byte 1548>
{field (By field)}
<byte 1548>
lbits:32 mask Mask
{}
or mask3 (Offset CC) Time Base Counter Mask 3
<byte 1548>
ulong value As longword
endunion mask3 (Offset CC) Time Base Counter Mask 3
<byte 1552>
union mask4 (Offset D0) Time Base Counter Mask 4
<byte 1552>
{field (By field)}
<byte 1552>
lbits:32 mask Mask
{}
or mask4 (Offset D0) Time Base Counter Mask 4
<byte 1552>
ulong value As longword
endunion mask4 (Offset D0) Time Base Counter Mask 4
<byte 1556>
{rsvdd4_d7 ((Offset D4) Reserved)}
<byte 1556>
ulong value
{}
<byte 1560>
{rsvdd8_db ((Offset D8) Reserved)}
<byte 1560>
ulong value
{}
<byte 1564>
{rsvddc_df ((Offset DC) Reserved)}
<byte 1564>
ulong value
{}
<byte 1568>
{rsvde0_e3 ((Offset E0) Reserved)}
<byte 1568>
ulong value
{}
<byte 1572>
{rsvde4_e7 ((Offset E4) Reserved)}
<byte 1572>
ulong value
{}
<byte 1576>
{rsvde8_eb ((Offset E8) Reserved)}
<byte 1576>
ulong value
{}
<byte 1580>
{rsvdec_ef ((Offset EC) Reserved)}
<byte 1580>
ulong value
{}
<byte 1584>
{rsvdf0_f3 ((Offset F0) Reserved)}
<byte 1584>
ulong value
{}
<byte 1588>
{rsvdf4_f7 ((Offset F4) Reserved)}
<byte 1588>
ulong value
{}
<byte 1592>
{rsvdf8_fb ((Offset F8) Reserved)}
<byte 1592>
ulong value
{}
<byte 1596>
{rsvdfc_ff ((Offset FC) Reserved)}
<byte 1596>
ulong value
{}
{}
endunion gptr General Purpose Timer Registers
<byte 1600>
union uicr Universal Interrupt Controller Registers
<byte 1600>
ulong[9] uicra Universal Interrupt Controller Registers As Longwords
or uicr Universal Interrupt Controller Registers
<byte 1600>
{uicr (Universal Interrupt Controller Registers By Field)}
<byte 1600>
union sr (Offset 00) Status
<byte 1600>
{field (By field)}
<byte 1600>
lbits:1 ists31 Interrupt [31] Status
lbits:1 ists30 Interrupt [30] Status
lbits:1 ists29 Interrupt [29] Status
lbits:1 ists28 Interrupt [28] Status
lbits:1 ists27 Interrupt [27] Status
lbits:1 ists26 Interrupt [26] Status
lbits:1 ists25 Interrupt [25] Status
lbits:1 ists24 Interrupt [24] Status
lbits:1 ists23 Interrupt [23] Status
lbits:1 ists22 Interrupt [22] Status
lbits:1 ists21 Interrupt [21] Status
lbits:1 ists20 Interrupt [20] Status
lbits:1 ists19 Interrupt [19] Status
lbits:1 ists18 Interrupt [18] Status
lbits:1 ists17 Interrupt [17] Status
lbits:1 ists16 Interrupt [16] Status
lbits:1 ists15 Interrupt [15] Status
lbits:1 ists14 Interrupt [14] Status
lbits:1 ists13 Interrupt [13] Status
lbits:1 ists12 Interrupt [12] Status
lbits:1 ists11 Interrupt [11] Status
lbits:1 ists10 Interrupt [10] Status
lbits:1 ists9 Interrupt [9] Status
lbits:1 ists8 Interrupt [8] Status
lbits:1 ists7 Interrupt [7] Status
lbits:1 ists6 Interrupt [6] Status
lbits:1 ists5 Interrupt [5] Status
lbits:1 ists4 Interrupt [4] Status
lbits:1 ists3 Interrupt [3] Status
lbits:1 ists2 Interrupt [2] Status
lbits:1 ists1 Interrupt [1] Status
lbits:1 ists0 Interrupt [0] Status
{}
or sr (Offset 00) Status
<byte 1600>
ulong value As longword
endunion sr (Offset 00) Status
<byte 1604>
union srs (Offset 04) Status Set
<byte 1604>
{field (By field)}
<byte 1604>
lbits:1 istss31 Interrupt [31] Status Set
lbits:1 istss30 Interrupt [30] Status Set
lbits:1 istss29 Interrupt [29] Status Set
lbits:1 istss28 Interrupt [28] Status Set
lbits:1 istss27 Interrupt [27] Status Set
lbits:1 istss26 Interrupt [26] Status Set
lbits:1 istss25 Interrupt [25] Status Set
lbits:1 istss24 Interrupt [24] Status Set
lbits:1 istss23 Interrupt [23] Status Set
lbits:1 istss22 Interrupt [22] Status Set
lbits:1 istss21 Interrupt [21] Status Set
lbits:1 istss20 Interrupt [20] Status Set
lbits:1 istss19 Interrupt [19] Status Set
lbits:1 istss18 Interrupt [18] Status Set
lbits:1 istss17 Interrupt [17] Status Set
lbits:1 istss16 Interrupt [16] Status Set
lbits:1 istss15 Interrupt [15] Status Set
lbits:1 istss14 Interrupt [14] Status Set
lbits:1 istss13 Interrupt [13] Status Set
lbits:1 istss12 Interrupt [12] Status Set
lbits:1 istss11 Interrupt [11] Status Set
lbits:1 istss10 Interrupt [10] Status Set
lbits:1 istss9 Interrupt [9] Status Set
lbits:1 istss8 Interrupt [8] Status Set
lbits:1 istss7 Interrupt [7] Status Set
lbits:1 istss6 Interrupt [6] Status Set
lbits:1 istss5 Interrupt [5] Status Set
lbits:1 istss4 Interrupt [4] Status Set
lbits:1 istss3 Interrupt [3] Status Set
lbits:1 istss2 Interrupt [2] Status Set
lbits:1 istss1 Interrupt [1] Status Set
lbits:1 istss0 Interrupt [0] Status Set
{}
or srs (Offset 04) Status Set
<byte 1604>
ulong value As longword
endunion srs (Offset 04) Status Set
<byte 1608>
union er (Offset 08) Enable
<byte 1608>
{field (By field)}
<byte 1608>
lbits:1 ie31 Interrupt [31] Enable
lbits:1 ie30 Interrupt [30] Enable
lbits:1 ie29 Interrupt [29] Enable
lbits:1 ie28 Interrupt [28] Enable
lbits:1 ie27 Interrupt [27] Enable
lbits:1 ie26 Interrupt [26] Enable
lbits:1 ie25 Interrupt [25] Enable
lbits:1 ie24 Interrupt [24] Enable
lbits:1 ie23 Interrupt [23] Enable
lbits:1 ie22 Interrupt [22] Enable
lbits:1 ie21 Interrupt [21] Enable
lbits:1 ie20 Interrupt [20] Enable
lbits:1 ie19 Interrupt [19] Enable
lbits:1 ie18 Interrupt [18] Enable
lbits:1 ie17 Interrupt [17] Enable
lbits:1 ie16 Interrupt [16] Enable
lbits:1 ie15 Interrupt [15] Enable
lbits:1 ie14 Interrupt [14] Enable
lbits:1 ie13 Interrupt [13] Enable
lbits:1 ie12 Interrupt [12] Enable
lbits:1 ie11 Interrupt [11] Enable
lbits:1 ie10 Interrupt [10] Enable
lbits:1 ie9 Interrupt [9] Enable
lbits:1 ie8 Interrupt [8] Enable
lbits:1 ie7 Interrupt [7] Enable
lbits:1 ie6 Interrupt [6] Enable
lbits:1 ie5 Interrupt [5] Enable
lbits:1 ie4 Interrupt [4] Enable
lbits:1 ie3 Interrupt [3] Enable
lbits:1 ie2 Interrupt [2] Enable
lbits:1 ie1 Interrupt [1] Enable
lbits:1 ie0 Interrupt [0] Enable
{}
or er (Offset 08) Enable
<byte 1608>
ulong value As longword
endunion er (Offset 08) Enable
<byte 1612>
union cr (Offset 0C) Critical Interrupt
<byte 1612>
{field (By field)}
<byte 1612>
lbits:1 ic31 Interrupt [31] Critical
lbits:1 ic30 Interrupt [30] Critical
lbits:1 ic29 Interrupt [29] Critical
lbits:1 ic28 Interrupt [28] Critical
lbits:1 ic27 Interrupt [27] Critical
lbits:1 ic26 Interrupt [26] Critical
lbits:1 ic25 Interrupt [25] Critical
lbits:1 ic24 Interrupt [24] Critical
lbits:1 ic23 Interrupt [23] Critical
lbits:1 ic22 Interrupt [22] Critical
lbits:1 ic21 Interrupt [21] Critical
lbits:1 ic20 Interrupt [20] Critical
lbits:1 ic19 Interrupt [19] Critical
lbits:1 ic18 Interrupt [18] Critical
lbits:1 ic17 Interrupt [17] Critical
lbits:1 ic16 Interrupt [16] Critical
lbits:1 ic15 Interrupt [15] Critical
lbits:1 ic14 Interrupt [14] Critical
lbits:1 ic13 Interrupt [13] Critical
lbits:1 ic12 Interrupt [12] Critical
lbits:1 ic11 Interrupt [11] Critical
lbits:1 ic10 Interrupt [10] Critical
lbits:1 ic9 Interrupt [9] Critical
lbits:1 ic8 Interrupt [8] Critical
lbits:1 ic7 Interrupt [7] Critical
lbits:1 ic6 Interrupt [6] Critical
lbits:1 ic5 Interrupt [5] Critical
lbits:1 ic4 Interrupt [4] Critical
lbits:1 ic3 Interrupt [3] Critical
lbits:1 ic2 Interrupt [2] Critical
lbits:1 ic1 Interrupt [1] Critical
lbits:1 ic0 Interrupt [0] Critical
{}
or cr (Offset 0C) Critical Interrupt
<byte 1612>
ulong value As longword
endunion cr (Offset 0C) Critical Interrupt
<byte 1616>
union pr (Offset 10) Polarity
<byte 1616>
{field (By field)}
<byte 1616>
lbits:1 ip31 Interrupt [31] Polarity
lbits:1 ip30 Interrupt [30] Polarity
lbits:1 ip29 Interrupt [29] Polarity
lbits:1 ip28 Interrupt [28] Polarity
lbits:1 ip27 Interrupt [27] Polarity
lbits:1 ip26 Interrupt [26] Polarity
lbits:1 ip25 Interrupt [25] Polarity
lbits:1 ip24 Interrupt [24] Polarity
lbits:1 ip23 Interrupt [23] Polarity
lbits:1 ip22 Interrupt [22] Polarity
lbits:1 ip21 Interrupt [21] Polarity
lbits:1 ip20 Interrupt [20] Polarity
lbits:1 ip19 Interrupt [19] Polarity
lbits:1 ip18 Interrupt [18] Polarity
lbits:1 ip17 Interrupt [17] Polarity
lbits:1 ip16 Interrupt [16] Polarity
lbits:1 ip15 Interrupt [15] Polarity
lbits:1 ip14 Interrupt [14] Polarity
lbits:1 ip13 Interrupt [13] Polarity
lbits:1 ip12 Interrupt [12] Polarity
lbits:1 ip11 Interrupt [11] Polarity
lbits:1 ip10 Interrupt [10] Polarity
lbits:1 ip9 Interrupt [9] Polarity
lbits:1 ip8 Interrupt [8] Polarity
lbits:1 ip7 Interrupt [7] Polarity
lbits:1 ip6 Interrupt [6] Polarity
lbits:1 ip5 Interrupt [5] Polarity
lbits:1 ip4 Interrupt [4] Polarity
lbits:1 ip3 Interrupt [3] Polarity
lbits:1 ip2 Interrupt [2] Polarity
lbits:1 ip1 Interrupt [1] Polarity
lbits:1 ip0 Interrupt [0] Polarity
{}
or pr (Offset 10) Polarity
<byte 1616>
ulong value As longword
endunion pr (Offset 10) Polarity
<byte 1620>
union tr (Offset 14) Trigger
<byte 1620>
{field (By field)}
<byte 1620>
lbits:1 it31 Interrupt [31] Trigger
lbits:1 it30 Interrupt [30] Trigger
lbits:1 it29 Interrupt [29] Trigger
lbits:1 it28 Interrupt [28] Trigger
lbits:1 it27 Interrupt [27] Trigger
lbits:1 it26 Interrupt [26] Trigger
lbits:1 it25 Interrupt [25] Trigger
lbits:1 it24 Interrupt [24] Trigger
lbits:1 it23 Interrupt [23] Trigger
lbits:1 it22 Interrupt [22] Trigger
lbits:1 it21 Interrupt [21] Trigger
lbits:1 it20 Interrupt [20] Trigger
lbits:1 it19 Interrupt [19] Trigger
lbits:1 it18 Interrupt [18] Trigger
lbits:1 it17 Interrupt [17] Trigger
lbits:1 it16 Interrupt [16] Trigger
lbits:1 it15 Interrupt [15] Trigger
lbits:1 it14 Interrupt [14] Trigger
lbits:1 it13 Interrupt [13] Trigger
lbits:1 it12 Interrupt [12] Trigger
lbits:1 it11 Interrupt [11] Trigger
lbits:1 it10 Interrupt [10] Trigger
lbits:1 it9 Interrupt [9] Trigger
lbits:1 it8 Interrupt [8] Trigger
lbits:1 it7 Interrupt [7] Trigger
lbits:1 it6 Interrupt [6] Trigger
lbits:1 it5 Interrupt [5] Trigger
lbits:1 it4 Interrupt [4] Trigger
lbits:1 it3 Interrupt [3] Trigger
lbits:1 it2 Interrupt [2] Trigger
lbits:1 it1 Interrupt [1] Trigger
lbits:1 it0 Interrupt [0] Trigger
{}
or tr (Offset 14) Trigger
<byte 1620>
ulong value As longword
endunion tr (Offset 14) Trigger
<byte 1624>
union msr (Offset 18) Masked Status
<byte 1624>
{field (By field)}
<byte 1624>
lbits:1 msts31 Interrupt [31] Masked Status
lbits:1 msts30 Interrupt [30] Masked Status
lbits:1 msts29 Interrupt [29] Masked Status
lbits:1 msts28 Interrupt [28] Masked Status
lbits:1 msts27 Interrupt [27] Masked Status
lbits:1 msts26 Interrupt [26] Masked Status
lbits:1 msts25 Interrupt [25] Masked Status
lbits:1 msts24 Interrupt [24] Masked Status
lbits:1 msts23 Interrupt [23] Masked Status
lbits:1 msts22 Interrupt [22] Masked Status
lbits:1 msts21 Interrupt [21] Masked Status
lbits:1 msts20 Interrupt [20] Masked Status
lbits:1 msts19 Interrupt [19] Masked Status
lbits:1 msts18 Interrupt [18] Masked Status
lbits:1 msts17 Interrupt [17] Masked Status
lbits:1 msts16 Interrupt [16] Masked Status
lbits:1 msts15 Interrupt [15] Masked Status
lbits:1 msts14 Interrupt [14] Masked Status
lbits:1 msts13 Interrupt [13] Masked Status
lbits:1 msts12 Interrupt [12] Masked Status
lbits:1 msts11 Interrupt [11] Masked Status
lbits:1 msts10 Interrupt [10] Masked Status
lbits:1 msts9 Interrupt [9] Masked Status
lbits:1 msts8 Interrupt [8] Masked Status
lbits:1 msts7 Interrupt [7] Masked Status
lbits:1 msts6 Interrupt [6] Masked Status
lbits:1 msts5 Interrupt [5] Masked Status
lbits:1 msts4 Interrupt [4] Masked Status
lbits:1 msts3 Interrupt [3] Masked Status
lbits:1 msts2 Interrupt [2] Masked Status
lbits:1 msts1 Interrupt [1] Masked Status
lbits:1 msts0 Interrupt [0] Masked Status
{}
or msr (Offset 18) Masked Status
<byte 1624>
ulong value As longword
endunion msr (Offset 18) Masked Status
<byte 1628>
union vr (Offset 1C) Vector
<byte 1628>
{field (By field)}
<byte 1628>
lbits:32 address Address
{}
or vr (Offset 1C) Vector
<byte 1628>
ulong value As longword
endunion vr (Offset 1C) Vector
<byte 1632>
union vcr (Offset 20) Vector Configuration
<byte 1632>
{field (By field)}
<byte 1632>
lbits:1 pob Priority Ordering Bit
lbits:1 unused Unused
lbits:30 base Interrupt Vector Base Address
{}
or vcr (Offset 20) Vector Configuration
<byte 1632>
ulong value As longword
endunion vcr (Offset 20) Vector Configuration
{}
endunion uicr Universal Interrupt Controller Registers
<byte 1636>
union plbmcr Processor Local Bus Macro Configuration Registers
<byte 1636>
ulong[4] plbmcra Processor Local Bus Macro Configuration Registers As Longwords
or plbmcr Processor Local Bus Macro Configuration Registers
<byte 1636>
{plbmcr (Processor Local Bus Macro Configuration Registers By Field)}
<byte 1636>
union esrrd (Offset 00) Error Status (read/clear)
<byte 1636>
{field (By field)}
<byte 1636>
lbits:32 sts Status
{}
or esrrd (Offset 00) Error Status (read/clear)
<byte 1636>
ulong value As longword
endunion esrrd (Offset 00) Error Status (read/clear)
<byte 1640>
union esrwr (Offset 04) Error Status Set
<byte 1640>
{field (By field)}
<byte 1640>
lbits:32 stss Status Set
{}
or esrwr (Offset 04) Error Status Set
<byte 1640>
ulong value As longword
endunion esrwr (Offset 04) Error Status Set
<byte 1644>
{rsvd08_0b ((Offset 08) Reserved)}
<byte 1644>
ulong value
{}
<byte 1648>
union acr (Offset 0C) Arbiter Control
<byte 1648>
{field (By field)}
<byte 1648>
lbits:32 ctrl Control
{}
or acr (Offset 0C) Arbiter Control
<byte 1648>
ulong value As longword
endunion acr (Offset 0C) Arbiter Control
{}
endunion plbmcr Processor Local Bus Macro Configuration Registers
<byte 1652>
union ocpbbmr On-Chip Peripheral Bus Bridge Macro Registers
<byte 1652>
ulong[3] ocpbbmra On-Chip Peripheral Bus Bridge Macro Registers As Longwords
or ocpbbmr On-Chip Peripheral Bus Bridge Macro Registers
<byte 1652>
{ocpbbmr (On-Chip Peripheral Bus Bridge Macro Registers By Field)}
<byte 1652>
union besrrd (Offset 00) Bridge Error Status (read/clear)
<byte 1652>
{field (By field)}
<byte 1652>
lbits:32 sts Status
{}
or besrrd (Offset 00) Bridge Error Status (read/clear)
<byte 1652>
ulong value As longword
endunion besrrd (Offset 00) Bridge Error Status (read/clear)
<byte 1656>
union besrwr (Offset 04) Bridge Error Status Set
<byte 1656>
{field (By field)}
<byte 1656>
lbits:32 stss Status Set
{}
or besrwr (Offset 04) Bridge Error Status Set
<byte 1656>
ulong value As longword
endunion besrwr (Offset 04) Bridge Error Status Set
<byte 1660>
union bear (Offset 08) Bridge Error Address
<byte 1660>
{field (By field)}
<byte 1660>
lbits:32 eaddress Error Address
{}
or bear (Offset 08) Bridge Error Address
<byte 1660>
ulong value As longword
endunion bear (Offset 08) Bridge Error Address
{}
endunion ocpbbmr On-Chip Peripheral Bus Bridge Macro Registers
<byte 1664>
union plbiascr Processor Local Bus Interrupt Acknowledge/Special Cycle Registers
<byte 1664>
ulong plbiascra Processor Local Bus Interrupt Acknowledge/Special Cycle Registers As Longword
or plbiascr Processor Local Bus Interrupt Acknowledge/Special Cycle Registers
<byte 1664>
{plbiascr (Processor Local Bus Interrupt Acknowledge/Special Cycle Registers By Field)}
<byte 1664>
union intackspcycr (Offset 00) Interrupt Acknowledge (read)/Special Cycle (write)
<byte 1664>
{field (By field)}
<byte 1664>
lbits:32 data Data
{}
or intackspcycr (Offset 00) Interrupt Acknowledge (read)/Special Cycle (write)
<byte 1664>
ulong value As longword
endunion intackspcycr (Offset 00) Interrupt Acknowledge (read)/Special Cycle (write)
{}
endunion plbiascr Processor Local Bus Interrupt Acknowledge/Special Cycle Registers
{}
<byte 1668>
{surge (Surge register save area)}
<byte 1668>
union pcicfg Surge PCI Configuration Registers
<byte 1668>
ulong[64] pcicfga Surge PCI Configuration Registers As Longwords
or pcicfg Surge PCI Configuration Registers
<byte 1668>
{pcicfg (Surge PCI Configuration Registers By Field)}
<byte 1668>
union devid (Offset x02) PCI Device ID
<byte 1668>
{field (By field)}
<byte 1668>
bits:16 id Vendor ID
{}
or devid (Offset x02) PCI Device ID
<byte 1668>
ushort value As word
endunion devid (Offset x02) PCI Device ID
<byte 1670>
union vendid (Offset x00) PCI Vendor ID Configuration
<byte 1670>
{field (By field)}
<byte 1670>
bits:16 id Vendor ID
{}
or vendid (Offset x00) PCI Vendor ID Configuration
<byte 1670>
ushort value As word
endunion vendid (Offset x00) PCI Vendor ID Configuration
<byte 1672>
union p_cfgstat (Offset x06) PCI Primary PCI Status
<byte 1672>
{field (By field)}
<byte 1672>
bits:4 rsvd Reserved
bits:1 cpl New Capabilities
bits:1 cap66mhz 66MHz Capable
bits:1 udfsup UDF Supported (read only, always returns 0)
bits:1 capfbbw Fast Back-to-Back Capable (read only, always returns 0)
bits:1 dperr Data Parity Error Detected
bits:2 devsel_time PCI_DEVSEL# response timing (read only, always returns 1)
bits:1 sgnltabrt Signaled Target Abort
bits:1 rcvdtabrt Received Target Abort
bits:1 rcvdmabrt Received Master Abort
bits:1 sgnlsyserr Signaled System Error
bits:1 perr Detected Parity Error
{}
or p_cfgstat (Offset x06) PCI Primary PCI Status
<byte 1672>
ushort value As word
endunion p_cfgstat (Offset x06) PCI Primary PCI Status
<byte 1674>
union cfgcmd (Offset x04) PCI Configuration Command
<byte 1674>
{field (By field)}
<byte 1674>
bits:1 io_access I/O Access Control
bits:1 mem_access Memory Access Control
bits:1 pcim_en PCI Master Enable
bits:1 scycle_en Special Cycle Enable (read only, always returns 0)
bits:1 memwinv Memory Write & Invalidate
bits:1 paltsnp_en Palette Snooping Enable (read only, always returns 0)
bits:1 perrrsp Parity Error Response
bits:1 waitcycctrl Wait Cycle Control
bits:1 serrx_en SERR# Enable
bits:1 fbbw_en Fast Back-to-Back Write enable (read only, always returns 0)
bits:6 rsvd Reserved
{}
or cfgcmd (Offset x04) PCI Configuration Command
<byte 1674>
ushort value As word
endunion cfgcmd (Offset x04) PCI Configuration Command
<byte 1676>
union clscode (Offset x09) PCI Class Code
<byte 1676>
{field (By field)}
<byte 1676>
tbits:8 baseclcode Base Class Code
<byte 1677>
tbits:8 subclcode Subclass Code
<byte 1678>
tbits:8 reglevpi Register Level Programming Interface
{}
or clscode (Offset x09) PCI Class Code
<byte 1676>
utiny[3] value As byte array
endunion clscode (Offset x09) PCI Class Code
<byte 1679>
union revid (Offset x08) PCI Revision ID
<byte 1679>
{field (By field)}
<byte 1679>
tbits:8 id Revision ID
{}
or revid (Offset x08) PCI Revision ID
<byte 1679>
utiny value As byte
endunion revid (Offset x08) PCI Revision ID
<byte 1680>
union bist (Offset x0F) PCI BIST
<byte 1680>
{field (By field)}
<byte 1680>
tbits:4 cc Completion Code
tbits:2 rsvd Reserved
tbits:1 selftest Self Test
tbits:1 supported BIST Supported
{}
or bist (Offset x0F) PCI BIST
<byte 1680>
utiny value As byte
endunion bist (Offset x0F) PCI BIST
<byte 1681>
union hdrtype (Offset x0E) PCI Header Type
<byte 1681>
{field (By field)}
<byte 1681>
tbits:8 type PCI header type (read only)
{}
or hdrtype (Offset x0E) PCI Header Type
<byte 1681>
utiny value As byte
endunion hdrtype (Offset x0E) PCI Header Type
<byte 1682>
union p_lattim (Offset x0D) PCI Primary PCI Latency Timer
<byte 1682>
{field (By field)}
<byte 1682>
tbits:8 tmr PCI latency timer
{}
or p_lattim (Offset x0D) PCI Primary PCI Latency Timer
<byte 1682>
utiny value As byte
endunion p_lattim (Offset x0D) PCI Primary PCI Latency Timer
<byte 1683>
union clssize (Offset x0C) PCI Cache Line Size
<byte 1683>
{field (By field)}
<byte 1683>
tbits:8 size PCI cache line size
{}
or clssize (Offset x0C) PCI Cache Line Size
<byte 1683>
utiny value As byte
endunion clssize (Offset x0C) PCI Cache Line Size
<byte 1684>
union p_i2o_base (Offset x10) Primary I2O Memory Base
<byte 1684>
{field (By field)}
<byte 1684>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:14 rsvd Reserved
lbits:14 baseaddr Base Address
{}
or p_i2o_base (Offset x10) Primary I2O Memory Base
<byte 1684>
ulong value As longword
endunion p_i2o_base (Offset x10) Primary I2O Memory Base
<byte 1688>
{reservedx14_x17 ((Offset x14) (Reserved))}
<byte 1688>
ulong value
{}
<byte 1692>
union s_lattim (Offset x1B) Secondary PCI Latency Timer
<byte 1692>
{field (By field)}
<byte 1692>
tbits:8 tmr PCI latency timer
{}
or s_lattim (Offset x1B) Secondary PCI Latency Timer
<byte 1692>
utiny value As byte
endunion s_lattim (Offset x1B) Secondary PCI Latency Timer
<byte 1693>
union sb_busnum (Offset x1A) Secondary Subordinate PCI Bus Number
<byte 1693>
{field (By field)}
<byte 1693>
tbits:8 bn PCI Bus Number
{}
or sb_busnum (Offset x1A) Secondary Subordinate PCI Bus Number
<byte 1693>
utiny value As byte
endunion sb_busnum (Offset x1A) Secondary Subordinate PCI Bus Number
<byte 1694>
union sc_busnum (Offset x19) Secondary PCI Bus Number
<byte 1694>
{field (By field)}
<byte 1694>
tbits:8 bn PCI Bus Number
{}
or sc_busnum (Offset x19) Secondary PCI Bus Number
<byte 1694>
utiny value As byte
endunion sc_busnum (Offset x19) Secondary PCI Bus Number
<byte 1695>
union p_busnum (Offset x18) Primary PCI Bus Number
<byte 1695>
{field (By field)}
<byte 1695>
tbits:8 bn PCI Bus Number
{}
or p_busnum (Offset x18) Primary PCI Bus Number
<byte 1695>
utiny value As byte
endunion p_busnum (Offset x18) Primary PCI Bus Number
<byte 1696>
union s_cfgstat (Offset x1E) PCI Secondary PCI Status
<byte 1696>
{field (By field)}
<byte 1696>
bits:4 rsvd Reserved
bits:1 cpl New Capabilities
bits:1 cap66mhz 66MHz Capable
bits:1 udfsup UDF Supported (read only, always returns 0)
bits:1 capfbbw Fast Back-to-Back Capable (read only, always returns 0)
bits:1 dperr Data Parity Error Detected
bits:2 devsel_time PCI_DEVSEL# response timing (read only, always returns 1)
bits:1 sgnltabrt Signaled Target Abort
bits:1 rcvdtabrt Received Target Abort
bits:1 rcvdmabrt Received Master Abort
bits:1 sgnlsyserr Signaled System Error
bits:1 perr Detected Parity Error
{}
or s_cfgstat (Offset x1E) PCI Secondary PCI Status
<byte 1696>
ushort value As word
endunion s_cfgstat (Offset x1E) PCI Secondary PCI Status
<byte 1698>
union io_liml (Offset x1D) Lower I/O Base Limit
<byte 1698>
{field (By field)}
<byte 1698>
tbits:4 ro Read only as 1
tbits:4 limitaddress Limit Address
{}
or io_liml (Offset x1D) Lower I/O Base Limit
<byte 1698>
utiny value As byte
endunion io_liml (Offset x1D) Lower I/O Base Limit
<byte 1699>
union io_basel (Offset x1C) Lower I/O Base Address
<byte 1699>
{field (By field)}
<byte 1699>
tbits:4 ro Read only as 1
tbits:4 address Bottom Address
{}
or io_basel (Offset x1C) Lower I/O Base Address
<byte 1699>
utiny value As byte
endunion io_basel (Offset x1C) Lower I/O Base Address
<byte 1700>
union p_pci_lim_1 (Offset x22) Primary PCI Memory Limit 1
<byte 1700>
{field (By field)}
<byte 1700>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or p_pci_lim_1 (Offset x22) Primary PCI Memory Limit 1
<byte 1700>
ushort value As word
endunion p_pci_lim_1 (Offset x22) Primary PCI Memory Limit 1
<byte 1702>
union p_pci_base_1 (Offset x20) Primary PCI Memory Base 1
<byte 1702>
{field (By field)}
<byte 1702>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or p_pci_base_1 (Offset x20) Primary PCI Memory Base 1
<byte 1702>
ushort value As word
endunion p_pci_base_1 (Offset x20) Primary PCI Memory Base 1
<byte 1704>
union p_pci_lim_3l (Offset x26) Primary PCI Memory Lower Limit 3
<byte 1704>
{field (By field)}
<byte 1704>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or p_pci_lim_3l (Offset x26) Primary PCI Memory Lower Limit 3
<byte 1704>
ushort value As word
endunion p_pci_lim_3l (Offset x26) Primary PCI Memory Lower Limit 3
<byte 1706>
union p_pci_base_3l (Offset x24) Primary PCI Memory Lower Base 3
<byte 1706>
{field (By field)}
<byte 1706>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or p_pci_base_3l (Offset x24) Primary PCI Memory Lower Base 3
<byte 1706>
ushort value As word
endunion p_pci_base_3l (Offset x24) Primary PCI Memory Lower Base 3
<byte 1708>
union p_pci_base_3u (Offset x28) Primary PCI Memory Upper Base 3
<byte 1708>
{field (By field)}
<byte 1708>
lbits:32 upperaddr Upper 32-bit Base Address
{}
or p_pci_base_3u (Offset x28) Primary PCI Memory Upper Base 3
<byte 1708>
ulong value As longword
endunion p_pci_base_3u (Offset x28) Primary PCI Memory Upper Base 3
<byte 1712>
union p_pci_lim_3u (Offset x2C) Primary PCI Memory Upper Limit 3
<byte 1712>
{field (By field)}
<byte 1712>
lbits:32 upperaddr Upper 32-bit Limit Address
{}
or p_pci_lim_3u (Offset x2C) Primary PCI Memory Upper Limit 3
<byte 1712>
ulong value As longword
endunion p_pci_lim_3u (Offset x2C) Primary PCI Memory Upper Limit 3
<byte 1716>
union io_limu (Offset x32) Upper I/O Base Limit
<byte 1716>
{field (By field)}
<byte 1716>
bits:16 upperaddr Upper 32-bit Limit Address
{}
or io_limu (Offset x32) Upper I/O Base Limit
<byte 1716>
ushort value As word
endunion io_limu (Offset x32) Upper I/O Base Limit
<byte 1718>
union io_baseu (Offset x30) Upper I/O Base Address
<byte 1718>
{field (By field)}
<byte 1718>
bits:16 upperaddr Upper 32-bit Address
{}
or io_baseu (Offset x30) Upper I/O Base Address
<byte 1718>
ushort value As word
endunion io_baseu (Offset x30) Upper I/O Base Address
<byte 1720>
{reservedx35_x37[2] ((Offset x35-x37) Reserved)}
<byte 1720>
utiny value
{}
<byte 1721>
{reservedx35_x37[1] ((Offset x35-x37) Reserved)}
<byte 1721>
utiny value
{}
<byte 1722>
{reservedx35_x37[0] ((Offset x35-x37) Reserved)}
<byte 1722>
utiny value
{}
<byte 1723>
union cap_ptr (Offset x34) Capabilities List Pointer
<byte 1723>
{field (By field)}
<byte 1723>
tbits:8 offset Offset to the next item in the capabilities linked list
{}
or cap_ptr (Offset x34) Capabilities List Pointer
<byte 1723>
utiny value As byte
endunion cap_ptr (Offset x34) Capabilities List Pointer
<byte 1724>
union p_rombase (Offset x38) Primary ROM Base Address
<byte 1724>
{field (By field)}
<byte 1724>
lbits:1 eromsd Enable ROM Space Decode
lbits:19 rsvd Reserved
lbits:12 baseaddr Base Address
{}
or p_rombase (Offset x38) Primary ROM Base Address
<byte 1724>
ulong value As longword
endunion p_rombase (Offset x38) Primary ROM Base Address
<byte 1728>
union brdgctr (Offset x3E) Bridge Control
<byte 1728>
{field (By field)}
<byte 1728>
bits:1 pere Parity Error Response Enable
bits:1 se SERR# Enable
bits:1 ie ISA Enable
bits:1 ve VGA Enable
bits:1 rsvd2 Reserved
bits:1 mam Master Abort Mode
bits:5 rsvd1 Reserved
bits:1 dtse Discard Timer SERR Enable
bits:4 rsvd Reserved
{}
or brdgctr (Offset x3E) Bridge Control
<byte 1728>
ushort value As word
endunion brdgctr (Offset x3E) Bridge Control
<byte 1730>
{reservedx3c_x3d ((Offset x3C-x3D) Reserved)}
<byte 1730>
ushort value
{}
<byte 1732>
union p_arbctr (Offset x42) Primary Arbiter Control
<byte 1732>
{field (By field)}
<byte 1732>
bits:1 a0 Agent 0
bits:1 a1 Agent 1
bits:1 a2 Agent 2
bits:1 a3 Agent 3
bits:1 a4 Agent 4
bits:1 a5 Agent 5
bits:1 a6 Agent 6
bits:8 rsvd Reserved
bits:1 exclusive Exclusive Access
{}
or p_arbctr (Offset x42) Primary Arbiter Control
<byte 1732>
ushort value As word
endunion p_arbctr (Offset x42) Primary Arbiter Control
<byte 1734>
union s_arbctr (Offset x40) Secondary Arbiter Control
<byte 1734>
{field (By field)}
<byte 1734>
bits:1 a0 Agent 0
bits:1 a1 Agent 1
bits:1 a2 Agent 2
bits:1 a3 Agent 3
bits:1 a4 Agent 4
bits:1 a5 Agent 5
bits:1 a6 Agent 6
bits:8 rsvd Reserved
bits:1 exclusive Exclusive Access
{}
or s_arbctr (Offset x40) Secondary Arbiter Control
<byte 1734>
ushort value As word
endunion s_arbctr (Offset x40) Secondary Arbiter Control
<byte 1736>
union pathctr (Offset x44) Path Control
<byte 1736>
{field (By field)}
<byte 1736>
lbits:1 ppcib1ede Primary PCI Base 1 Exclusive Decoding Enable
lbits:1 ppcib2ede Primary PCI Base 2 Exclusive Decoding Enable
lbits:1 ppcib3ede Primary PCI Base 3 Exclusive Decoding Enable
lbits:1 ppcib4ede Primary PCI Base 4 Exclusive Decoding Enable
lbits:1 pioede Primary I/O Exclusive Decoding Enable
lbits:1 rsvd1 Reserved
lbits:1 pxorde Primary XOR Decoding Enable
lbits:1 pwce Primary Wait Count Enable
lbits:8 pwc Primary Wait Count
lbits:1 spcib1ede Secondary PCI Base 1 Exclusive Decoding Enable
lbits:1 spcib2ede Secondary PCI Base 2 Exclusive Decoding Enable
lbits:1 spcib3ede Secondary PCI Base 3 Exclusive Decoding Enable
lbits:1 spcib4ede Secondary PCI Base 4 Exclusive Decoding Enable
lbits:2 rsvd Reserved
lbits:1 sxorde Secondary XOR Decoding Enable
lbits:1 swce Secondary Wait Count Enable
lbits:8 swc Secondary Wait Count
{}
or pathctr (Offset x44) Path Control
<byte 1736>
ulong value As longword
endunion pathctr (Offset x44) Path Control
<byte 1740>
union cfgctr (Offset x48) Configuration Control
<byte 1740>
{field (By field)}
<byte 1740>
lbits:1 bm Bridge Mode
lbits:1 rsvd2 Reserved
lbits:1 cv Configuration Valid
lbits:1 ncapd New Capabilities Disable
lbits:1 d2pmse D2 Power Management State Enable
lbits:5 rsvd1 Reserved
lbits:1 cvto Configuration Valid Timeout
lbits:1 sbus64 Attached Secondary PCI Bus Capable of 64-bit Operation
lbits:1 pbus64 Attached Primary PCI Bus Capable of 64-bit Operation
lbits:1 sm66en Attached Secondary PCI Bus Operating at 66 MHz
lbits:1 pm66en Attached Primary PCI Bus Operating at 66 MHz
lbits:17 rsvd Reserved
{}
or cfgctr (Offset x48) Configuration Control
<byte 1740>
ulong value As longword
endunion cfgctr (Offset x48) Configuration Control
<byte 1744>
union s_rombase (Offset x4C) Secondary ROM Base Address
<byte 1744>
{field (By field)}
<byte 1744>
lbits:1 eromsd Enable ROM Space Decode
lbits:19 rsvd Reserved
lbits:12 baseaddr Base Address
{}
or s_rombase (Offset x4C) Secondary ROM Base Address
<byte 1744>
ulong value As longword
endunion s_rombase (Offset x4C) Secondary ROM Base Address
<byte 1748>
union p_mctrl (Offset x53) Primary Master Control
<byte 1748>
{field (By field)}
<byte 1748>
tbits:1 ltdppm Latency Timer Disable
tbits:1 emrmmrlcecl Enable MRM and MRL Completion to End of Cache Line
tbits:1 pmrrde PCI Memory Read Round Down Enable
tbits:5 rsvd Reserved
{}
or p_mctrl (Offset x53) Primary Master Control
<byte 1748>
utiny value As byte
endunion p_mctrl (Offset x53) Primary Master Control
<byte 1749>
union s_mctrl (Offset x52) Secondary Master Control
<byte 1749>
{field (By field)}
<byte 1749>
tbits:1 ltdppm Latency Timer Disable
tbits:1 emrmmrlcecl Enable MRM and MRL Completion to End of Cache Line
tbits:1 pmrrde PCI Memory Read Round Down Enable
tbits:5 rsvd Reserved
{}
or s_mctrl (Offset x52) Secondary Master Control
<byte 1749>
utiny value As byte
endunion s_mctrl (Offset x52) Secondary Master Control
<byte 1750>
union debug (Offset x50) Debug/Test
<byte 1750>
{field (By field)}
<byte 1750>
bits:1 epcmps Enable Primary Configuration Mode, Primary Side
bits:1 et1ccrps Enable Type 1 Configuration Cycle Response, Primary Side
bits:1 epcmss Enable Primary Configuration Mode, Secondary Side
bits:1 et1ccrss Enable Type 1 Configuration Cycle Response, Secondary Side
bits:1 pmwi Primary MWI
bits:1 smwi Secondary MWI
bits:1 ppb64bd Primary PCI Bus 64-Bit Disable
bits:1 spb64bd Secondary PCI Bus 64-Bit Disable
bits:6 rsvd1 Reserved
bits:1 dsr DRAM Software Reset
bits:1 rsvd Reserved
{}
or debug (Offset x50) Debug/Test
<byte 1750>
ushort value As word
endunion debug (Offset x50) Debug/Test
<byte 1752>
union p_i2o_size (Offset x56) Primary I2O Size
<byte 1752>
{field (By field)}
<byte 1752>
bits:2 ro Read only as 0
bits:14 size Memory Range Size
{}
or p_i2o_size (Offset x56) Primary I2O Size
<byte 1752>
ushort value As word
endunion p_i2o_size (Offset x56) Primary I2O Size
<byte 1754>
union i2octr (Offset x54) I2O Control
<byte 1754>
{field (By field)}
<byte 1754>
bits:1 efspci Enable FIFOs in Secondary PCI
bits:1 mfspci Message Frames in Secondary PCI
bits:14 rsvd Reserved
{}
or i2octr (Offset x54) I2O Control
<byte 1754>
ushort value As word
endunion i2octr (Offset x54) I2O Control
<byte 1756>
union s_i2o_size (Offset x5A) Secondary I2O Size
<byte 1756>
{field (By field)}
<byte 1756>
bits:2 ro Read only as 0
bits:14 size Memory Range Size
{}
or s_i2o_size (Offset x5A) Secondary I2O Size
<byte 1756>
ushort value As word
endunion s_i2o_size (Offset x5A) Secondary I2O Size
<byte 1758>
union s_i2o_base (Offset x58) Secondary I2O Memory Base
<byte 1758>
{field (By field)}
<byte 1758>
bits:2 ro Read only as 0
bits:14 address 32-bit Base Address
{}
or s_i2o_base (Offset x58) Secondary I2O Memory Base
<byte 1758>
ushort value As word
endunion s_i2o_base (Offset x58) Secondary I2O Memory Base
<byte 1760>
union m_i2o_adr (Offset x5E) Message Frame Base
<byte 1760>
{field (By field)}
<byte 1760>
bits:2 ro Read only as 0
bits:14 address 32-bit Base Address
{}
or m_i2o_adr (Offset x5E) Message Frame Base
<byte 1760>
ushort value As word
endunion m_i2o_adr (Offset x5E) Message Frame Base
<byte 1762>
union f_i2o_adr (Offset x5C) FIFO Memory Base
<byte 1762>
{field (By field)}
<byte 1762>
bits:2 ro Read only as 0
bits:14 address 32-bit Base Address
{}
or f_i2o_adr (Offset x5C) FIFO Memory Base
<byte 1762>
ushort value As word
endunion f_i2o_adr (Offset x5C) FIFO Memory Base
<byte 1764>
union p_pci_size_2 (Offset x62) Primary PCI Memory Size
<byte 1764>
{field (By field)}
<byte 1764>
bits:4 ro Read only (probably as 4)
bits:12 size Memory Range Size
{}
or p_pci_size_2 (Offset x62) Primary PCI Memory Size
<byte 1764>
ushort value As word
endunion p_pci_size_2 (Offset x62) Primary PCI Memory Size
<byte 1766>
union p_pci_base_2 (Offset x60) Primary PCI Memory Base 2
<byte 1766>
{field (By field)}
<byte 1766>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or p_pci_base_2 (Offset x60) Primary PCI Memory Base 2
<byte 1766>
ushort value As word
endunion p_pci_base_2 (Offset x60) Primary PCI Memory Base 2
<byte 1768>
union p_pci_lim_4 (Offset x66) Primary PCI Memory Limit 4
<byte 1768>
{field (By field)}
<byte 1768>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or p_pci_lim_4 (Offset x66) Primary PCI Memory Limit 4
<byte 1768>
ushort value As word
endunion p_pci_lim_4 (Offset x66) Primary PCI Memory Limit 4
<byte 1770>
union p_pci_base_4l (Offset x64) Primary PCI Memory Lower Base 4
<byte 1770>
{field (By field)}
<byte 1770>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or p_pci_base_4l (Offset x64) Primary PCI Memory Lower Base 4
<byte 1770>
ushort value As word
endunion p_pci_base_4l (Offset x64) Primary PCI Memory Lower Base 4
<byte 1772>
union p_pci_base_4u (Offset x68) Primary PCI Memory Upper Base 4
<byte 1772>
{field (By field)}
<byte 1772>
lbits:32 upperaddr Upper 32-bit Base Address
{}
or p_pci_base_4u (Offset x68) Primary PCI Memory Upper Base 4
<byte 1772>
ulong value As longword
endunion p_pci_base_4u (Offset x68) Primary PCI Memory Upper Base 4
<byte 1776>
union s_pci_lim_1 (Offset x6E) Secondary PCI Memory Limit 1
<byte 1776>
{field (By field)}
<byte 1776>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or s_pci_lim_1 (Offset x6E) Secondary PCI Memory Limit 1
<byte 1776>
ushort value As word
endunion s_pci_lim_1 (Offset x6E) Secondary PCI Memory Limit 1
<byte 1778>
union s_pci_base_1 (Offset x6C) Secondary PCI Memory Base 1
<byte 1778>
{field (By field)}
<byte 1778>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or s_pci_base_1 (Offset x6C) Secondary PCI Memory Base 1
<byte 1778>
ushort value As word
endunion s_pci_base_1 (Offset x6C) Secondary PCI Memory Base 1
<byte 1780>
union s_pci_size_2 (Offset x72) Secondary PCI Memory Size 2
<byte 1780>
{field (By field)}
<byte 1780>
bits:4 ro Read only (probably as 4)
bits:12 size Memory Range Size
{}
or s_pci_size_2 (Offset x72) Secondary PCI Memory Size 2
<byte 1780>
ushort value As word
endunion s_pci_size_2 (Offset x72) Secondary PCI Memory Size 2
<byte 1782>
union s_pci_base_2 (Offset x70) Secondary PCI Memory Base 2
<byte 1782>
{field (By field)}
<byte 1782>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or s_pci_base_2 (Offset x70) Secondary PCI Memory Base 2
<byte 1782>
ushort value As word
endunion s_pci_base_2 (Offset x70) Secondary PCI Memory Base 2
<byte 1784>
union s_pci_lim_3l (Offset x76) Secondary PCI Memory Lower Limit 3
<byte 1784>
{field (By field)}
<byte 1784>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or s_pci_lim_3l (Offset x76) Secondary PCI Memory Lower Limit 3
<byte 1784>
ushort value As word
endunion s_pci_lim_3l (Offset x76) Secondary PCI Memory Lower Limit 3
<byte 1786>
union s_pci_base_3l (Offset x74) Secondary PCI Memory Lower Base 3
<byte 1786>
{field (By field)}
<byte 1786>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or s_pci_base_3l (Offset x74) Secondary PCI Memory Lower Base 3
<byte 1786>
ushort value As word
endunion s_pci_base_3l (Offset x74) Secondary PCI Memory Lower Base 3
<byte 1788>
union s_pci_base_3u (Offset x78) Secondary PCI Memory Upper Base 3
<byte 1788>
{field (By field)}
<byte 1788>
lbits:32 upperaddr Upper 32-bit Base Address
{}
or s_pci_base_3u (Offset x78) Secondary PCI Memory Upper Base 3
<byte 1788>
ulong value As longword
endunion s_pci_base_3u (Offset x78) Secondary PCI Memory Upper Base 3
<byte 1792>
union s_pci_lim_3u (Offset x7C) Secondary PCI Memory Upper Limit 3
<byte 1792>
{field (By field)}
<byte 1792>
lbits:32 upperaddr Upper 32-bit Limit Address
{}
or s_pci_lim_3u (Offset x7C) Secondary PCI Memory Upper Limit 3
<byte 1792>
ulong value As longword
endunion s_pci_lim_3u (Offset x7C) Secondary PCI Memory Upper Limit 3
<byte 1796>
union s_pci_lim_4l (Offset x82) Secondary PCI Memory Lower Limit 4
<byte 1796>
{field (By field)}
<byte 1796>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or s_pci_lim_4l (Offset x82) Secondary PCI Memory Lower Limit 4
<byte 1796>
ushort value As word
endunion s_pci_lim_4l (Offset x82) Secondary PCI Memory Lower Limit 4
<byte 1798>
union s_pci_base_4l (Offset x80) Secondary PCI Memory Lower Base 4
<byte 1798>
{field (By field)}
<byte 1798>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or s_pci_base_4l (Offset x80) Secondary PCI Memory Lower Base 4
<byte 1798>
ushort value As word
endunion s_pci_base_4l (Offset x80) Secondary PCI Memory Lower Base 4
<byte 1800>
union s_pci_base_4u (Offset x84) Secondary PCI Memory Upper Base 4
<byte 1800>
{field (By field)}
<byte 1800>
lbits:32 upperaddr Upper 32-bit Base Address
{}
or s_pci_base_4u (Offset x84) Secondary PCI Memory Upper Base 4
<byte 1800>
ulong value As longword
endunion s_pci_base_4u (Offset x84) Secondary PCI Memory Upper Base 4
<byte 1804>
union s_pci_tadr_1 (Offset x8A) Secondary PCI Translation 1
<byte 1804>
{field (By field)}
<byte 1804>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or s_pci_tadr_1 (Offset x8A) Secondary PCI Translation 1
<byte 1804>
ushort value As word
endunion s_pci_tadr_1 (Offset x8A) Secondary PCI Translation 1
<byte 1806>
union p_pci_tadr_1 (Offset x88) Primary PCI Translation 1
<byte 1806>
{field (By field)}
<byte 1806>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or p_pci_tadr_1 (Offset x88) Primary PCI Translation 1
<byte 1806>
ushort value As word
endunion p_pci_tadr_1 (Offset x88) Primary PCI Translation 1
<byte 1808>
union s_pci_tadr_2l (Offset x8E) Lower Secondary PCI Translation 2
<byte 1808>
{field (By field)}
<byte 1808>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or s_pci_tadr_2l (Offset x8E) Lower Secondary PCI Translation 2
<byte 1808>
ushort value As word
endunion s_pci_tadr_2l (Offset x8E) Lower Secondary PCI Translation 2
<byte 1810>
union p_pci_tadr_2l (Offset x8C) Lower Primary PCI Translation 2
<byte 1810>
{field (By field)}
<byte 1810>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or p_pci_tadr_2l (Offset x8C) Lower Primary PCI Translation 2
<byte 1810>
ushort value As word
endunion p_pci_tadr_2l (Offset x8C) Lower Primary PCI Translation 2
<byte 1812>
union p_pci_tadr_2u (Offset x90) Upper Primary PCI Translation 2
<byte 1812>
{field (By field)}
<byte 1812>
lbits:32 address Translation Address
{}
or p_pci_tadr_2u (Offset x90) Upper Primary PCI Translation 2
<byte 1812>
ulong value As longword
endunion p_pci_tadr_2u (Offset x90) Upper Primary PCI Translation 2
<byte 1816>
union s_pci_tadr_2u (Offset x94) Upper Secondary PCI Translation 2
<byte 1816>
{field (By field)}
<byte 1816>
lbits:32 address Translation Address
{}
or s_pci_tadr_2u (Offset x94) Upper Secondary PCI Translation 2
<byte 1816>
ulong value As longword
endunion s_pci_tadr_2u (Offset x94) Upper Secondary PCI Translation 2
<byte 1820>
union s_pci_tadr_3l (Offset x9A) Lower Secondary PCI Translater 3
<byte 1820>
{field (By field)}
<byte 1820>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or s_pci_tadr_3l (Offset x9A) Lower Secondary PCI Translater 3
<byte 1820>
ushort value As word
endunion s_pci_tadr_3l (Offset x9A) Lower Secondary PCI Translater 3
<byte 1822>
union p_pci_tadr_3l (Offset x98) Lower Primary PCI Translation 3
<byte 1822>
{field (By field)}
<byte 1822>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or p_pci_tadr_3l (Offset x98) Lower Primary PCI Translation 3
<byte 1822>
ushort value As word
endunion p_pci_tadr_3l (Offset x98) Lower Primary PCI Translation 3
<byte 1824>
union p_pci_tadr_3u (Offset x9C) Upper Primary PCI Translation 3
<byte 1824>
{field (By field)}
<byte 1824>
lbits:32 address Translation Address
{}
or p_pci_tadr_3u (Offset x9C) Upper Primary PCI Translation 3
<byte 1824>
ulong value As longword
endunion p_pci_tadr_3u (Offset x9C) Upper Primary PCI Translation 3
<byte 1828>
union s_pci_tadr_3u (Offset xA0) Upper Secondary PCI Translation 3
<byte 1828>
{field (By field)}
<byte 1828>
lbits:32 address Translation Address
{}
or s_pci_tadr_3u (Offset xA0) Upper Secondary PCI Translation 3
<byte 1828>
ulong value As longword
endunion s_pci_tadr_3u (Offset xA0) Upper Secondary PCI Translation 3
<byte 1832>
union s_dram_tadr_1 (Offset xA6) Secondary DRAM Translation 1
<byte 1832>
{field (By field)}
<byte 1832>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or s_dram_tadr_1 (Offset xA6) Secondary DRAM Translation 1
<byte 1832>
ushort value As word
endunion s_dram_tadr_1 (Offset xA6) Secondary DRAM Translation 1
<byte 1834>
union p_dram_tadr_1 (Offset xA4) Primary DRAM Translation 1
<byte 1834>
{field (By field)}
<byte 1834>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or p_dram_tadr_1 (Offset xA4) Primary DRAM Translation 1
<byte 1834>
ushort value As word
endunion p_dram_tadr_1 (Offset xA4) Primary DRAM Translation 1
<byte 1836>
union s_dram_tadr_2 (Offset xAA) Secondary DRAM Translation 2
<byte 1836>
{field (By field)}
<byte 1836>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or s_dram_tadr_2 (Offset xAA) Secondary DRAM Translation 2
<byte 1836>
ushort value As word
endunion s_dram_tadr_2 (Offset xAA) Secondary DRAM Translation 2
<byte 1838>
union p_dram_tadr_2 (Offset xA8) Primary DRAM Translation 2
<byte 1838>
{field (By field)}
<byte 1838>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or p_dram_tadr_2 (Offset xA8) Primary DRAM Translation 2
<byte 1838>
ushort value As word
endunion p_dram_tadr_2 (Offset xA8) Primary DRAM Translation 2
<byte 1840>
union p_dram_size_1 (Offset xAE) Primary DRAM Size 1
<byte 1840>
{field (By field)}
<byte 1840>
bits:4 ro Read only (probably as 4)
bits:12 size Memory Range Size
{}
or p_dram_size_1 (Offset xAE) Primary DRAM Size 1
<byte 1840>
ushort value As word
endunion p_dram_size_1 (Offset xAE) Primary DRAM Size 1
<byte 1842>
union p_dram_base_1 (Offset xAC) Primary DRAM Memory Base 1
<byte 1842>
{field (By field)}
<byte 1842>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or p_dram_base_1 (Offset xAC) Primary DRAM Memory Base 1
<byte 1842>
ushort value As word
endunion p_dram_base_1 (Offset xAC) Primary DRAM Memory Base 1
<byte 1844>
union p_dram_lim_2 (Offset xB2) Primary DRAM Memory Limit 2
<byte 1844>
{field (By field)}
<byte 1844>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or p_dram_lim_2 (Offset xB2) Primary DRAM Memory Limit 2
<byte 1844>
ushort value As word
endunion p_dram_lim_2 (Offset xB2) Primary DRAM Memory Limit 2
<byte 1846>
union p_dram_base_2 (Offset xB0) Primary DRAM Memory Base 2
<byte 1846>
{field (By field)}
<byte 1846>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or p_dram_base_2 (Offset xB0) Primary DRAM Memory Base 2
<byte 1846>
ushort value As word
endunion p_dram_base_2 (Offset xB0) Primary DRAM Memory Base 2
<byte 1848>
union p_dram_size_3 (Offset xB6) Primary DRAM Size 3
<byte 1848>
{field (By field)}
<byte 1848>
bits:1 ro Read only as 1
bits:15 size Memory Range Size
{}
or p_dram_size_3 (Offset xB6) Primary DRAM Size 3
<byte 1848>
ushort value As word
endunion p_dram_size_3 (Offset xB6) Primary DRAM Size 3
<byte 1850>
union p_dram_base_3l (Offset xB4) Primary Lower DRAM Memory Base 3
<byte 1850>
{field (By field)}
<byte 1850>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or p_dram_base_3l (Offset xB4) Primary Lower DRAM Memory Base 3
<byte 1850>
ushort value As word
endunion p_dram_base_3l (Offset xB4) Primary Lower DRAM Memory Base 3
<byte 1852>
union p_dram_base_3u (Offset xB8) Primary Upper DRAM Memory Base 3
<byte 1852>
{field (By field)}
<byte 1852>
lbits:32 upperaddr Upper 32-bit Base Address
{}
or p_dram_base_3u (Offset xB8) Primary Upper DRAM Memory Base 3
<byte 1852>
ulong value As longword
endunion p_dram_base_3u (Offset xB8) Primary Upper DRAM Memory Base 3
<byte 1856>
union s_dram_size_1 (Offset xBE) Secondary DRAM Memory Size 1
<byte 1856>
{field (By field)}
<byte 1856>
bits:4 ro Read only (probably as 4)
bits:12 size Memory Range Size
{}
or s_dram_size_1 (Offset xBE) Secondary DRAM Memory Size 1
<byte 1856>
ushort value As word
endunion s_dram_size_1 (Offset xBE) Secondary DRAM Memory Size 1
<byte 1858>
union s_dram_base_1 (Offset xBC) Secondary DRAM Memory Base 1
<byte 1858>
{field (By field)}
<byte 1858>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or s_dram_base_1 (Offset xBC) Secondary DRAM Memory Base 1
<byte 1858>
ushort value As word
endunion s_dram_base_1 (Offset xBC) Secondary DRAM Memory Base 1
<byte 1860>
union s_dram_lim_2 (Offset xC2) Secondary DRAM Memory Limit 2
<byte 1860>
{field (By field)}
<byte 1860>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or s_dram_lim_2 (Offset xC2) Secondary DRAM Memory Limit 2
<byte 1860>
ushort value As word
endunion s_dram_lim_2 (Offset xC2) Secondary DRAM Memory Limit 2
<byte 1862>
union s_dram_base_2 (Offset xC0) Secondary DRAM Memory Base 2
<byte 1862>
{field (By field)}
<byte 1862>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or s_dram_base_2 (Offset xC0) Secondary DRAM Memory Base 2
<byte 1862>
ushort value As word
endunion s_dram_base_2 (Offset xC0) Secondary DRAM Memory Base 2
<byte 1864>
union s_dram_size_3 (Offset xC6) Secondary DRAM Size 3
<byte 1864>
{field (By field)}
<byte 1864>
bits:1 ro Read only as 1
bits:15 size Memory Range Size
{}
or s_dram_size_3 (Offset xC6) Secondary DRAM Size 3
<byte 1864>
ushort value As word
endunion s_dram_size_3 (Offset xC6) Secondary DRAM Size 3
<byte 1866>
union s_dram_base_3l (Offset xC4) Secondary Lower DRAM Memory Base 3
<byte 1866>
{field (By field)}
<byte 1866>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or s_dram_base_3l (Offset xC4) Secondary Lower DRAM Memory Base 3
<byte 1866>
ushort value As word
endunion s_dram_base_3l (Offset xC4) Secondary Lower DRAM Memory Base 3
<byte 1868>
union s_dram_base_3u (Offset xC8) Secondary Upper DRAM Memory Base 3
<byte 1868>
{field (By field)}
<byte 1868>
lbits:32 upperaddr Upper 32-bit Base Address
{}
or s_dram_base_3u (Offset xC8) Secondary Upper DRAM Memory Base 3
<byte 1868>
ulong value As longword
endunion s_dram_base_3u (Offset xC8) Secondary Upper DRAM Memory Base 3
<byte 1872>
union p_io_base (Offset xCC) Primary I/O Base
<byte 1872>
{field (By field)}
<byte 1872>
lbits:8 rsvd Reserved
lbits:24 address Base Address
{}
or p_io_base (Offset xCC) Primary I/O Base
<byte 1872>
ulong value As longword
endunion p_io_base (Offset xCC) Primary I/O Base
<byte 1876>
union p_xor_base (Offset xD0) Primary XOR Base
<byte 1876>
{field (By field)}
<byte 1876>
lbits:8 rsvd Reserved
lbits:24 address Base Address
{}
or p_xor_base (Offset xD0) Primary XOR Base
<byte 1876>
ulong value As longword
endunion p_xor_base (Offset xD0) Primary XOR Base
<byte 1880>
{reservedxd4_xd7 ((Offset xD4) Reserved)}
<byte 1880>
ulong value
{}
<byte 1884>
union s_xor_base (Offset xD8) Secondary XOR Base
<byte 1884>
{field (By field)}
<byte 1884>
lbits:8 rsvd Reserved
lbits:24 address Base Address
{}
or s_xor_base (Offset xD8) Secondary XOR Base
<byte 1884>
ulong value As longword
endunion s_xor_base (Offset xD8) Secondary XOR Base
<byte 1888>
union sid (Offset xDE) PCI Subsystem ID
<byte 1888>
{field (By field)}
<byte 1888>
bits:16 id Vendor ID
{}
or sid (Offset xDE) PCI Subsystem ID
<byte 1888>
ushort value As word
endunion sid (Offset xDE) PCI Subsystem ID
<byte 1890>
union svid (Offset xDC) PCI Subsystem Vendor ID
<byte 1890>
{field (By field)}
<byte 1890>
bits:16 id Vendor ID
{}
or svid (Offset xDC) PCI Subsystem Vendor ID
<byte 1890>
ushort value As word
endunion svid (Offset xDC) PCI Subsystem Vendor ID
<byte 1892>
union rom_tadr (Offset xE0) ROM Base Translation
<byte 1892>
{field (By field)}
<byte 1892>
lbits:1 ptrans Enable P_ROMBASE[31:20] Translation
lbits:1 strans Enable S_ROMBASE[31:20] Translation
lbits:18 rsvd Reserved
lbits:12 address Translation Address
{}
or rom_tadr (Offset xE0) ROM Base Translation
<byte 1892>
ulong value As longword
endunion rom_tadr (Offset xE0) ROM Base Translation
<byte 1896>
{reservedxe4_xef[0] ((Offset xE4-xEF) Reserved)}
<byte 1896>
ulong value
{}
<byte 1900>
{reservedxe4_xef[1] ((Offset xE4-xEF) Reserved)}
<byte 1900>
ulong value
{}
<byte 1904>
{reservedxe4_xef[2] ((Offset xE4-xEF) Reserved)}
<byte 1904>
ulong value
{}
<byte 1908>
union pm_cap (Offset xF2) Power Management Capabilities
<byte 1908>
{field (By field)}
<byte 1908>
bits:3 ver PCI Power Management Specification Version
bits:1 clk PME Clock
bits:1 aps Auxilliary Power Source
bits:1 dsi Device Specific Initialization
bits:3 rsvd Reserved
bits:1 d1 D1 Support
bits:1 d2 D2 Support
bits:5 pme PME Support
{}
or pm_cap (Offset xF2) Power Management Capabilities
<byte 1908>
ushort value As word
endunion pm_cap (Offset xF2) Power Management Capabilities
<byte 1910>
union next_cap_ptr_1 (Offset xF1) Next Capabilities Pointer 1
<byte 1910>
{field (By field)}
<byte 1910>
tbits:8 offset Offset to the next item in the capabilities linked list
{}
or next_cap_ptr_1 (Offset xF1) Next Capabilities Pointer 1
<byte 1910>
utiny value As byte
endunion next_cap_ptr_1 (Offset xF1) Next Capabilities Pointer 1
<byte 1911>
union pm_id (Offset xF0) Power Management Capabilities ID
<byte 1911>
{field (By field)}
<byte 1911>
tbits:8 cap_id Capability structure identifier
{}
or pm_id (Offset xF0) Power Management Capabilities ID
<byte 1911>
utiny value As byte
endunion pm_id (Offset xF0) Power Management Capabilities ID
<byte 1912>
union pm_data (Offset xF7) Power Management Data
<byte 1912>
{field (By field)}
<byte 1912>
tbits:8 data Power Management Data
{}
or pm_data (Offset xF7) Power Management Data
<byte 1912>
utiny value As byte
endunion pm_data (Offset xF7) Power Management Data
<byte 1913>
union pmcsr_bse (Offset xF6) PM CSR Bridge Support Extensions,
<byte 1913>
{field (By field)}
<byte 1913>
tbits:7 rsvd Reserved
tbits:1 control Bus Power/Clock Control Mechanism Support
{}
or pmcsr_bse (Offset xF6) PM CSR Bridge Support Extensions,
<byte 1913>
utiny value As byte
endunion pmcsr_bse (Offset xF6) PM CSR Bridge Support Extensions,
<byte 1914>
union pmcsr (Offset xF4) Power Management Control/Status
<byte 1914>
{field (By field)}
<byte 1914>
bits:2 pst Power State
bits:6 rsvd Reserved
bits:1 pen PME Enable
bits:4 sel Data Select
bits:2 scl Data Scale
bits:1 pme PME Status
{}
or pmcsr (Offset xF4) Power Management Control/Status
<byte 1914>
ushort value As word
endunion pmcsr (Offset xF4) Power Management Control/Status
<byte 1916>
union vpd_add (Offset xFA) Vital Product Data Address
<byte 1916>
{field (By field)}
<byte 1916>
bits:9 qaddr Vital Product Data Address
bits:6 qrsvd Reserved
bits:1 qvpdf VPD Flag
{}
or vpd_add (Offset xFA) Vital Product Data Address
<byte 1916>
ushort value As word
endunion vpd_add (Offset xFA) Vital Product Data Address
<byte 1918>
union next_cap_ptr_2 (Offset xF9) Next Capabilities Pointer 2
<byte 1918>
{field (By field)}
<byte 1918>
tbits:8 offset Offset to the next item in the capabilities linked list
{}
or next_cap_ptr_2 (Offset xF9) Next Capabilities Pointer 2
<byte 1918>
utiny value As byte
endunion next_cap_ptr_2 (Offset xF9) Next Capabilities Pointer 2
<byte 1919>
union vpd_id (Offset xF8) Vital Product Data Capabilities ID
<byte 1919>
{field (By field)}
<byte 1919>
tbits:8 cap_id Capability structure identifier
{}
or vpd_id (Offset xF8) Vital Product Data Capabilities ID
<byte 1919>
utiny value As byte
endunion vpd_id (Offset xF8) Vital Product Data Capabilities ID
<byte 1920>
union vpd_data (Offset xFC) Vital Product Data Data.
<byte 1920>
{field (By field)}
<byte 1920>
lbits:32 qdata VPD Data
{}
or vpd_data (Offset xFC) Vital Product Data Data.
<byte 1920>
ulong value As longword
endunion vpd_data (Offset xFC) Vital Product Data Data.
{}
endunion pcicfg Surge PCI Configuration Registers
<byte 1924>
union csr Surge CSR Registers
<byte 1924>
ulong[256] csra Surge CSR Registers As Longwords
or csr Surge CSR Registers
<byte 1924>
{csr (Surge CSR Registers By Field)}
<byte 1924>
{reserved0_1f[0] ((Offset 000-01F) Reserved)}
<byte 1924>
ulong value
{}
<byte 1928>
{reserved0_1f[1] ((Offset 000-01F) Reserved)}
<byte 1928>
ulong value
{}
<byte 1932>
{reserved0_1f[2] ((Offset 000-01F) Reserved)}
<byte 1932>
ulong value
{}
<byte 1936>
{reserved0_1f[3] ((Offset 000-01F) Reserved)}
<byte 1936>
ulong value
{}
<byte 1940>
{reserved0_1f[4] ((Offset 000-01F) Reserved)}
<byte 1940>
ulong value
{}
<byte 1944>
{reserved0_1f[5] ((Offset 000-01F) Reserved)}
<byte 1944>
ulong value
{}
<byte 1948>
{reserved0_1f[6] ((Offset 000-01F) Reserved)}
<byte 1948>
ulong value
{}
<byte 1952>
{reserved0_1f[7] ((Offset 000-01F) Reserved)}
<byte 1952>
ulong value
{}
<byte 1956>
union hibdb (Offset 020) Host Inbound Doorbell
<byte 1956>
{field (By field)}
<byte 1956>
lbits:1 inbplfne Inbound Post List FIFO Not Empty
lbits:1 pripcismaes Primary PCI Slave Memory Access Enable Set
lbits:1 inbdbset Inbound Doorbell Set
lbits:1 de0cpsfne DMA Engine 0 Command Pointer Status FIFO Not Empty
lbits:1 de0cpfnf DMA Engine 0 Command Pointer FIFO Not Full
lbits:1 de0hltone DMA Engine 0 Halted on Error
lbits:1 de1cpsfne DMA Engine 1 Command Pointer Status FIFO Not Empty
lbits:1 de1cpfnf DMA Engine 1 Command Pointer FIFO Not Full
lbits:1 de1hltone DMA Engine 1 Halted on Error
lbits:1 pripcie Primary PCI Error
lbits:1 secpcie Secondary PCI Error
lbits:1 dramuncecc DRAM Uncorrectable ECC Error
lbits:1 i2ote I2O Transaction Error
lbits:1 d0d3ti D0-->D3 Transition Interrupt
lbits:1 vpdri VPD Read Interrupt
lbits:1 vpdwi VPD Write Interrupt
lbits:16 reserved Reserved
{}
or hibdb (Offset 020) Host Inbound Doorbell
<byte 1956>
ulong value As longword
endunion hibdb (Offset 020) Host Inbound Doorbell
<byte 1960>
{reserved24_2f[0] ((Offset 024-02F) Reserved)}
<byte 1960>
ulong value
{}
<byte 1964>
{reserved24_2f[1] ((Offset 024-02F) Reserved)}
<byte 1964>
ulong value
{}
<byte 1968>
{reserved24_2f[2] ((Offset 024-02F) Reserved)}
<byte 1968>
ulong value
{}
<byte 1972>
union histat (Offset 030) Host Interrupt Status
<byte 1972>
{field (By field)}
<byte 1972>
lbits:3 rsvd1 Reserved
lbits:1 obdplfnei Outbound Post List FIFO Not Empty Interrupt
lbits:28 rsvd Reserved
{}
or histat (Offset 030) Host Interrupt Status
<byte 1972>
ulong value As longword
endunion histat (Offset 030) Host Interrupt Status
<byte 1976>
union himask (Offset 034) Host Interrupt Mask
<byte 1976>
{field (By field)}
<byte 1976>
lbits:3 rsvd1 Reserved
lbits:1 obdplfnei Outbound Post List FIFO Not Empty Interrupt
lbits:28 rsvd Reserved
{}
or himask (Offset 034) Host Interrupt Mask
<byte 1976>
ulong value As longword
endunion himask (Offset 034) Host Interrupt Mask
<byte 1980>
{reserved38_3f[0] ((Offset 038-03F) Reserved)}
<byte 1980>
ulong value
{}
<byte 1984>
{reserved38_3f[1] ((Offset 038-03F) Reserved)}
<byte 1984>
ulong value
{}
<byte 1988>
union hibqp (Offset 040) Host Inbound Queue Port
<byte 1988>
{field (By field)}
<byte 1988>
lbits:32 qport Queue Port
{}
or hibqp (Offset 040) Host Inbound Queue Port
<byte 1988>
ulong value As longword
endunion hibqp (Offset 040) Host Inbound Queue Port
<byte 1992>
union hobqp (Offset 044) Host Outbound Queue Port
<byte 1992>
{field (By field)}
<byte 1992>
lbits:32 qport Queue Port
{}
or hobqp (Offset 044) Host Outbound Queue Port
<byte 1992>
ulong value As longword
endunion hobqp (Offset 044) Host Outbound Queue Port
<byte 1996>
{reserved48_4f[0] ((Offset 048-04F) Reserved)}
<byte 1996>
ulong value
{}
<byte 2000>
{reserved48_4f[1] ((Offset 048-04F) Reserved)}
<byte 2000>
ulong value
{}
<byte 2004>
union iopistat (Offset 050) IOP Interrupt Status
<byte 2004>
{field (By field)}
<byte 2004>
lbits:1 inbplfne Inbound Post List FIFO Not Empty
lbits:1 pripcismaes Primary PCI Slave Memory Access Enable Set
lbits:1 inbdbset Inbound Doorbell Set
lbits:1 de0cpsfne DMA Engine 0 Command Pointer Status FIFO Not Empty
lbits:1 de0cpfnf DMA Engine 0 Command Pointer FIFO Not Full
lbits:1 de0hltone DMA Engine 0 Halted on Error
lbits:1 de1cpsfne DMA Engine 1 Command Pointer Status FIFO Not Empty
lbits:1 de1cpfnf DMA Engine 1 Command Pointer FIFO Not Full
lbits:1 de1hltone DMA Engine 1 Halted on Error
lbits:1 pripcie Primary PCI Error
lbits:1 secpcie Secondary PCI Error
lbits:1 dramuncecc DRAM Uncorrectable ECC Error
lbits:1 i2ote I2O Transaction Error
lbits:1 d0d3ti D0-->D3 Transition Interrupt
lbits:1 vpdri VPD Read Interrupt
lbits:1 vpdwi VPD Write Interrupt
lbits:16 reserved Reserved
{}
or iopistat (Offset 050) IOP Interrupt Status
<byte 2004>
ulong value As longword
endunion iopistat (Offset 050) IOP Interrupt Status
<byte 2008>
union iopmask (Offset 054) IOP Interrupt Mask
<byte 2008>
{field (By field)}
<byte 2008>
lbits:1 inbplfne Inbound Post List FIFO Not Empty
lbits:1 pripcismaes Primary PCI Slave Memory Access Enable Set
lbits:1 inbdbset Inbound Doorbell Set
lbits:1 de0cpsfne DMA Engine 0 Command Pointer Status FIFO Not Empty
lbits:1 de0cpfnf DMA Engine 0 Command Pointer FIFO Not Full
lbits:1 de0hltone DMA Engine 0 Halted on Error
lbits:1 de1cpsfne DMA Engine 1 Command Pointer Status FIFO Not Empty
lbits:1 de1cpfnf DMA Engine 1 Command Pointer FIFO Not Full
lbits:1 de1hltone DMA Engine 1 Halted on Error
lbits:1 pripcie Primary PCI Error
lbits:1 secpcie Secondary PCI Error
lbits:1 dramuncecc DRAM Uncorrectable ECC Error
lbits:1 i2ote I2O Transaction Error
lbits:1 d0d3ti D0-->D3 Transition Interrupt
lbits:1 vpdri VPD Read Interrupt
lbits:1 vpdwi VPD Write Interrupt
lbits:16 reserved Reserved
{}
or iopmask (Offset 054) IOP Interrupt Mask
<byte 2008>
ulong value As longword
endunion iopmask (Offset 054) IOP Interrupt Mask
<byte 2012>
union iopibqp (Offset 058) IOP Inbound Queue Port
<byte 2012>
{field (By field)}
<byte 2012>
lbits:32 qport Queue Port
{}
or iopibqp (Offset 058) IOP Inbound Queue Port
<byte 2012>
ulong value As longword
endunion iopibqp (Offset 058) IOP Inbound Queue Port
<byte 2016>
union iopobqp (Offset 05C) IOP Outbound Queue Port
<byte 2016>
{field (By field)}
<byte 2016>
lbits:32 qport Queue Port
{}
or iopobqp (Offset 05C) IOP Outbound Queue Port
<byte 2016>
ulong value As longword
endunion iopobqp (Offset 05C) IOP Outbound Queue Port
<byte 2020>
union ibfltp (Offset 062) Inbound Free List Tail Pointer
<byte 2020>
{field (By field)}
<byte 2020>
bits:14 tail Tail Pointer
bits:1 fifofull FIFO Full
bits:1 rsvd Reserved
{}
or ibfltp (Offset 062) Inbound Free List Tail Pointer
<byte 2020>
ushort value As word
endunion ibfltp (Offset 062) Inbound Free List Tail Pointer
<byte 2022>
union ibflhp (Offset 060) Inbound Free List Head Pointer
<byte 2022>
{field (By field)}
<byte 2022>
bits:14 head Head Pointer
bits:2 rsvd Reserved
{}
or ibflhp (Offset 060) Inbound Free List Head Pointer
<byte 2022>
ushort value As word
endunion ibflhp (Offset 060) Inbound Free List Head Pointer
<byte 2024>
union ibpltp (Offset 066) Inbound Post List Tail Pointer
<byte 2024>
{field (By field)}
<byte 2024>
bits:14 tail Tail Pointer
bits:1 fifofull FIFO Full
bits:1 rsvd Reserved
{}
or ibpltp (Offset 066) Inbound Post List Tail Pointer
<byte 2024>
ushort value As word
endunion ibpltp (Offset 066) Inbound Post List Tail Pointer
<byte 2026>
union ibplhp (Offset 064) Inbound Post List Head Pointer
<byte 2026>
{field (By field)}
<byte 2026>
bits:14 head Head Pointer
bits:2 rsvd Reserved
{}
or ibplhp (Offset 064) Inbound Post List Head Pointer
<byte 2026>
ushort value As word
endunion ibplhp (Offset 064) Inbound Post List Head Pointer
<byte 2028>
union obfltp (Offset 06A) Outbound Free List Tail Pointer
<byte 2028>
{field (By field)}
<byte 2028>
bits:14 tail Tail Pointer
bits:1 fifofull FIFO Full
bits:1 rsvd Reserved
{}
or obfltp (Offset 06A) Outbound Free List Tail Pointer
<byte 2028>
ushort value As word
endunion obfltp (Offset 06A) Outbound Free List Tail Pointer
<byte 2030>
union obflhp (Offset 068) Outbound Free List Head Pointer
<byte 2030>
{field (By field)}
<byte 2030>
bits:14 head Head Pointer
bits:2 rsvd Reserved
{}
or obflhp (Offset 068) Outbound Free List Head Pointer
<byte 2030>
ushort value As word
endunion obflhp (Offset 068) Outbound Free List Head Pointer
<byte 2032>
union obpltp (Offset 06E) Outbound Post List Tail Pointer
<byte 2032>
{field (By field)}
<byte 2032>
bits:14 tail Tail Pointer
bits:1 fifofull FIFO Full
bits:1 rsvd Reserved
{}
or obpltp (Offset 06E) Outbound Post List Tail Pointer
<byte 2032>
ushort value As word
endunion obpltp (Offset 06E) Outbound Post List Tail Pointer
<byte 2034>
union obplhp (Offset 06C) Outbound Post List Head Pointer
<byte 2034>
{field (By field)}
<byte 2034>
bits:14 head Head Pointer
bits:2 rsvd Reserved
{}
or obplhp (Offset 06C) Outbound Post List Head Pointer
<byte 2034>
ushort value As word
endunion obplhp (Offset 06C) Outbound Post List Head Pointer
<byte 2036>
union iopibdb (Offset 070) IOP Inbound Doorbell
<byte 2036>
{field (By field)}
<byte 2036>
lbits:1 inbplfne Inbound Post List FIFO Not Empty
lbits:1 pripcismaes Primary PCI Slave Memory Access Enable Set
lbits:1 inbdbset Inbound Doorbell Set
lbits:1 de0cpsfne DMA Engine 0 Command Pointer Status FIFO Not Empty
lbits:1 de0cpfnf DMA Engine 0 Command Pointer FIFO Not Full
lbits:1 de0hltone DMA Engine 0 Halted on Error
lbits:1 de1cpsfne DMA Engine 1 Command Pointer Status FIFO Not Empty
lbits:1 de1cpfnf DMA Engine 1 Command Pointer FIFO Not Full
lbits:1 de1hltone DMA Engine 1 Halted on Error
lbits:1 pripcie Primary PCI Error
lbits:1 secpcie Secondary PCI Error
lbits:1 dramuncecc DRAM Uncorrectable ECC Error
lbits:1 i2ote I2O Transaction Error
lbits:1 d0d3ti D0-->D3 Transition Interrupt
lbits:1 vpdri VPD Read Interrupt
lbits:1 vpdwi VPD Write Interrupt
lbits:16 reserved Reserved
{}
or iopibdb (Offset 070) IOP Inbound Doorbell
<byte 2036>
ulong value As longword
endunion iopibdb (Offset 070) IOP Inbound Doorbell
<byte 2040>
union i2o_controller (Offset 074) I2O Controller
<byte 2040>
{field (By field)}
<byte 2040>
lbits:1 fifocrushfox FIFO Crush Fox MFA
lbits:1 i2opulle I2O Pull Enable
lbits:30 rsvd Reserved
{}
or i2o_controller (Offset 074) I2O Controller
<byte 2040>
ulong value As longword
endunion i2o_controller (Offset 074) I2O Controller
<byte 2044>
union cdbcpp (Offset 078) Command Descriptor Block Command Pointer Port
<byte 2044>
{field (By field)}
<byte 2044>
lbits:32 port Command Descriptor Block Command Pointer Port
{}
or cdbcpp (Offset 078) Command Descriptor Block Command Pointer Port
<byte 2044>
ulong value As longword
endunion cdbcpp (Offset 078) Command Descriptor Block Command Pointer Port
<byte 2048>
union sg1flags (Offset 07C) SG1 Flags
<byte 2048>
{field (By field)}
<byte 2048>
lbits:1 mpt0e Must be programmed to 0
lbits:1 mpt0d Must be programmed to 0
lbits:1 mpt0c Must be programmed to 0
lbits:1 local_address Local Address Flag
lbits:1 mpt1b Must be programmed to 1
lbits:1 mpt0b Must be programmed to 0
lbits:1 mpt0a Must be programmed to 0
lbits:1 mpt1a Must be programmed to 1
lbits:24 rsvd Reserved
{}
or sg1flags (Offset 07C) SG1 Flags
<byte 2048>
ulong value As longword
endunion sg1flags (Offset 07C) SG1 Flags
<byte 2052>
union sg1count_0_1 (Offset 080) SG1 Count 0 Count 1,
<byte 2052>
{field (Surge Register (surge$csr) -- Transaction Error (Offset 094))}
<byte 2052>
lbits:16 count_even
lbits:16 count_odd
{}
or sg1count_0_1 (Offset 080) SG1 Count 0 Count 1,
<byte 2052>
ulong value Reserved
endunion sg1count_0_1 (Offset 080) SG1 Count 0 Count 1,
<byte 2056>
union sg1count_2_3 (Offset 084) SG1 Count 2 Count 3,
<byte 2056>
{field (Surge Register (surge$csr) -- Transaction Error (Offset 094))}
<byte 2056>
lbits:16 count_even
lbits:16 count_odd
{}
or sg1count_2_3 (Offset 084) SG1 Count 2 Count 3,
<byte 2056>
ulong value Reserved
endunion sg1count_2_3 (Offset 084) SG1 Count 2 Count 3,
<byte 2060>
union sg1count_4_5 (Offset 088) SG1 Count 4 Count 5,
<byte 2060>
{field (Surge Register (surge$csr) -- Transaction Error (Offset 094))}
<byte 2060>
lbits:16 count_even
lbits:16 count_odd
{}
or sg1count_4_5 (Offset 088) SG1 Count 4 Count 5,
<byte 2060>
ulong value Reserved
endunion sg1count_4_5 (Offset 088) SG1 Count 4 Count 5,
<byte 2064>
union sg1count_6_7 (Offset 08C) SG1 Count 6 Count 7,
<byte 2064>
{field (Surge Register (surge$csr) -- Transaction Error (Offset 094))}
<byte 2064>
lbits:16 count_even
lbits:16 count_odd
{}
or sg1count_6_7 (Offset 08C) SG1 Count 6 Count 7,
<byte 2064>
ulong value Reserved
endunion sg1count_6_7 (Offset 08C) SG1 Count 6 Count 7,
<byte 2068>
union cdb_cptp (Offset 092) CDB Command Pointer Tail Pointer
<byte 2068>
{field (By field)}
<byte 2068>
bits:14 tail Tail Pointer
bits:1 fifofull FIFO Full
bits:1 rsvd Reserved
{}
or cdb_cptp (Offset 092) CDB Command Pointer Tail Pointer
<byte 2068>
ushort value As word
endunion cdb_cptp (Offset 092) CDB Command Pointer Tail Pointer
<byte 2070>
union cdb_cphp (Offset 090) CDB Command Pointer Head Pointer
<byte 2070>
{field (By field)}
<byte 2070>
bits:14 head Head Pointer
bits:2 rsvd Reserved
{}
or cdb_cphp (Offset 090) CDB Command Pointer Head Pointer
<byte 2070>
ushort value As word
endunion cdb_cphp (Offset 090) CDB Command Pointer Head Pointer
<byte 2072>
union tx_err (Offset 094) Transaction Error
<byte 2072>
{field (By field)}
<byte 2072>
lbits:3 es Error Status
lbits:5 rsvd1 Reserved
lbits:1 par_err Parity error detected on lower 32 bits of data bus during I2O read
lbits:1 par64_err Parity error detected on upper 32 bits of data bus during an I2O read
lbits:22 rsvd Reserved
{}
or tx_err (Offset 094) Transaction Error
<byte 2072>
ulong value As longword
endunion tx_err (Offset 094) Transaction Error
<byte 2076>
union intfq (Offset 098) Interrupt Frequency
<byte 2076>
{field (By field)}
<byte 2076>
lbits:24 delay_ctr Delay Counter
lbits:7 rsvd Reserved
lbits:1 mode_sel Mode Selector
{}
or intfq (Offset 098) Interrupt Frequency
<byte 2076>
ulong value As longword
endunion intfq (Offset 098) Interrupt Frequency
<byte 2080>
{reserved9c_ff[0] ((Offset 09C-0FF) Reserved)}
<byte 2080>
ulong value
{}
<byte 2084>
{reserved9c_ff[1] ((Offset 09C-0FF) Reserved)}
<byte 2084>
ulong value
{}
<byte 2088>
{reserved9c_ff[2] ((Offset 09C-0FF) Reserved)}
<byte 2088>
ulong value
{}
<byte 2092>
{reserved9c_ff[3] ((Offset 09C-0FF) Reserved)}
<byte 2092>
ulong value
{}
<byte 2096>
{reserved9c_ff[4] ((Offset 09C-0FF) Reserved)}
<byte 2096>
ulong value
{}
<byte 2100>
{reserved9c_ff[5] ((Offset 09C-0FF) Reserved)}
<byte 2100>
ulong value
{}
<byte 2104>
{reserved9c_ff[6] ((Offset 09C-0FF) Reserved)}
<byte 2104>
ulong value
{}
<byte 2108>
{reserved9c_ff[7] ((Offset 09C-0FF) Reserved)}
<byte 2108>
ulong value
{}
<byte 2112>
{reserved9c_ff[8] ((Offset 09C-0FF) Reserved)}
<byte 2112>
ulong value
{}
<byte 2116>
{reserved9c_ff[9] ((Offset 09C-0FF) Reserved)}
<byte 2116>
ulong value
{}
<byte 2120>
{reserved9c_ff[10] ((Offset 09C-0FF) Reserved)}
<byte 2120>
ulong value
{}
<byte 2124>
{reserved9c_ff[11] ((Offset 09C-0FF) Reserved)}
<byte 2124>
ulong value
{}
<byte 2128>
{reserved9c_ff[12] ((Offset 09C-0FF) Reserved)}
<byte 2128>
ulong value
{}
<byte 2132>
{reserved9c_ff[13] ((Offset 09C-0FF) Reserved)}
<byte 2132>
ulong value
{}
<byte 2136>
{reserved9c_ff[14] ((Offset 09C-0FF) Reserved)}
<byte 2136>
ulong value
{}
<byte 2140>
{reserved9c_ff[15] ((Offset 09C-0FF) Reserved)}
<byte 2140>
ulong value
{}
<byte 2144>
{reserved9c_ff[16] ((Offset 09C-0FF) Reserved)}
<byte 2144>
ulong value
{}
<byte 2148>
{reserved9c_ff[17] ((Offset 09C-0FF) Reserved)}
<byte 2148>
ulong value
{}
<byte 2152>
{reserved9c_ff[18] ((Offset 09C-0FF) Reserved)}
<byte 2152>
ulong value
{}
<byte 2156>
{reserved9c_ff[19] ((Offset 09C-0FF) Reserved)}
<byte 2156>
ulong value
{}
<byte 2160>
{reserved9c_ff[20] ((Offset 09C-0FF) Reserved)}
<byte 2160>
ulong value
{}
<byte 2164>
{reserved9c_ff[21] ((Offset 09C-0FF) Reserved)}
<byte 2164>
ulong value
{}
<byte 2168>
{reserved9c_ff[22] ((Offset 09C-0FF) Reserved)}
<byte 2168>
ulong value
{}
<byte 2172>
{reserved9c_ff[23] ((Offset 09C-0FF) Reserved)}
<byte 2172>
ulong value
{}
<byte 2176>
{reserved9c_ff[24] ((Offset 09C-0FF) Reserved)}
<byte 2176>
ulong value
{}
<byte 2180>
union dma0_cp_fifol (Offset 100) DMA Engine 0 Command Pointer FIFO Lower 32 Bits
<byte 2180>
{field (By field)}
<byte 2180>
lbits:32 address DMA Engine Command Address
{}
or dma0_cp_fifol (Offset 100) DMA Engine 0 Command Pointer FIFO Lower 32 Bits
<byte 2180>
ulong value As longword
endunion dma0_cp_fifol (Offset 100) DMA Engine 0 Command Pointer FIFO Lower 32 Bits
<byte 2184>
union dma0_cp_fifou (Offset 104) DMA Engine 0 Command Pointer FIFO Upper 32 Bits
<byte 2184>
{field (By field)}
<byte 2184>
lbits:32 address DMA Engine Command Address
{}
or dma0_cp_fifou (Offset 104) DMA Engine 0 Command Pointer FIFO Upper 32 Bits
<byte 2184>
ulong value As longword
endunion dma0_cp_fifou (Offset 104) DMA Engine 0 Command Pointer FIFO Upper 32 Bits
<byte 2188>
union dma0_cs_fifol (Offset 108) DMA Engine 0 Command Status FIFO Lower 32 Bits
<byte 2188>
{field (By field)}
<byte 2188>
lbits:32 address DMA Engine Command Address
{}
or dma0_cs_fifol (Offset 108) DMA Engine 0 Command Status FIFO Lower 32 Bits
<byte 2188>
ulong value As longword
endunion dma0_cs_fifol (Offset 108) DMA Engine 0 Command Status FIFO Lower 32 Bits
<byte 2192>
union dma0_cs_fifou (Offset 10C) DMA Engine 0 Command Status FIFO Upper 32 Bits
<byte 2192>
{field (By field)}
<byte 2192>
lbits:32 address DMA Engine Command Address
{}
or dma0_cs_fifou (Offset 10C) DMA Engine 0 Command Status FIFO Upper 32 Bits
<byte 2192>
ulong value As longword
endunion dma0_cs_fifou (Offset 10C) DMA Engine 0 Command Status FIFO Upper 32 Bits
<byte 2196>
union dma0_status (Offset 110) DMA Engine 0 Status
<byte 2196>
{field (By field)}
<byte 2196>
lbits:3 tqs Transaction Queue Status
lbits:1 illopc Illegal Opcode
lbits:2 ss Status Source
lbits:1 hltoe Halted On Error
lbits:25 rsvd Reserved
{}
or dma0_status (Offset 110) DMA Engine 0 Status
<byte 2196>
ulong value As longword
endunion dma0_status (Offset 110) DMA Engine 0 Status
<byte 2200>
union dma0_cfg (Offset 114) DMA Engine 0 Configuration
<byte 2200>
{field (By field)}
<byte 2200>
lbits:8 mtts Maximum Transaction Transfer Size
lbits:8 dwt DMA Write Threshold
lbits:4 msssq Minimum Space in SDRAM Submit Queue
lbits:4 msspsq Minimum Space in Secondary PCI Submit Queue
lbits:4 msppsq Minimum Space in Primary PCI Submit Queue
lbits:1 mwid MWI Disable
lbits:3 rsvd Reserved
{}
or dma0_cfg (Offset 114) DMA Engine 0 Configuration
<byte 2200>
ulong value As longword
endunion dma0_cfg (Offset 114) DMA Engine 0 Configuration
<byte 2204>
{reserved118_11f[0] ((Offset 118-11F) Reserved)}
<byte 2204>
ulong value
{}
<byte 2208>
{reserved118_11f[1] ((Offset 118-11F) Reserved)}
<byte 2208>
ulong value
{}
<byte 2212>
union dma0cp_tp (Offset 122) DMA Engine 0 Command Pointer FIFO Tail Pointer
<byte 2212>
{field (By field)}
<byte 2212>
bits:14 tail Tail Pointer
bits:1 fifofull FIFO Full
bits:1 rsvd Reserved
{}
or dma0cp_tp (Offset 122) DMA Engine 0 Command Pointer FIFO Tail Pointer
<byte 2212>
ushort value As word
endunion dma0cp_tp (Offset 122) DMA Engine 0 Command Pointer FIFO Tail Pointer
<byte 2214>
union dma0cp_hp (Offset 120) DMA Engine 0 Command Pointer FIFO Head Pointer
<byte 2214>
{field (By field)}
<byte 2214>
bits:14 head Head Pointer
bits:2 rsvd Reserved
{}
or dma0cp_hp (Offset 120) DMA Engine 0 Command Pointer FIFO Head Pointer
<byte 2214>
ushort value As word
endunion dma0cp_hp (Offset 120) DMA Engine 0 Command Pointer FIFO Head Pointer
<byte 2216>
union dma0cs_tp (Offset 126) DMA Engine 0 Command Status FIFO Tail Pointer
<byte 2216>
{field (By field)}
<byte 2216>
bits:14 tail Tail Pointer
bits:1 fifofull FIFO Full
bits:1 rsvd Reserved
{}
or dma0cs_tp (Offset 126) DMA Engine 0 Command Status FIFO Tail Pointer
<byte 2216>
ushort value As word
endunion dma0cs_tp (Offset 126) DMA Engine 0 Command Status FIFO Tail Pointer
<byte 2218>
union dma0cs_hp (Offset 124) DMA Engine 0 Command Status FIFO Head Pointer
<byte 2218>
{field (By field)}
<byte 2218>
bits:14 head Head Pointer
bits:2 rsvd Reserved
{}
or dma0cs_hp (Offset 124) DMA Engine 0 Command Status FIFO Head Pointer
<byte 2218>
ushort value As word
endunion dma0cs_hp (Offset 124) DMA Engine 0 Command Status FIFO Head Pointer
<byte 2220>
{reserved128_12f[0] ((Offset 128-12F) Reserved)}
<byte 2220>
ulong value
{}
<byte 2224>
{reserved128_12f[1] ((Offset 128-12F) Reserved)}
<byte 2224>
ulong value
{}
<byte 2228>
union dma0_cdbpl (Offset 130) DMA Engine 0 Command Descriptor Block Pointer Lower 32 Bits
<byte 2228>
{field (By field)}
<byte 2228>
lbits:2 addrspace Address Space
lbits:1 addrsize Address Size (when set, indicates a 64-bit address)
lbits:29 cdbp Command Descriptor Block Pointer
{}
or dma0_cdbpl (Offset 130) DMA Engine 0 Command Descriptor Block Pointer Lower 32 Bits
<byte 2228>
ulong value As longword
endunion dma0_cdbpl (Offset 130) DMA Engine 0 Command Descriptor Block Pointer Lower 32 Bits
<byte 2232>
union dma0_cdbph (Offset 134) DMA Engine 0 Command Descriptor Block Pointer Upper 32 Bits
<byte 2232>
{field (By field)}
<byte 2232>
lbits:32 address DMA Engine Command Address
{}
or dma0_cdbph (Offset 134) DMA Engine 0 Command Descriptor Block Pointer Upper 32 Bits
<byte 2232>
ulong value As longword
endunion dma0_cdbph (Offset 134) DMA Engine 0 Command Descriptor Block Pointer Upper 32 Bits
<byte 2236>
union dma0_sg1_pointer_lo (Offset 138) DMA Engine 0 SG1 Buffer Pointer Lower 32 Bits
<byte 2236>
{field (By field)}
<byte 2236>
lbits:32 address DMA Engine Command Address
{}
or dma0_sg1_pointer_lo (Offset 138) DMA Engine 0 SG1 Buffer Pointer Lower 32 Bits
<byte 2236>
ulong value As longword
endunion dma0_sg1_pointer_lo (Offset 138) DMA Engine 0 SG1 Buffer Pointer Lower 32 Bits
<byte 2240>
union dma0_sg1_pointer_hi (Offset 13C) DMA Engine 0 SG1 Buffer Pointer Upper 32 Bits
<byte 2240>
{field (By field)}
<byte 2240>
lbits:32 address DMA Engine Command Address
{}
or dma0_sg1_pointer_hi (Offset 13C) DMA Engine 0 SG1 Buffer Pointer Upper 32 Bits
<byte 2240>
ulong value As longword
endunion dma0_sg1_pointer_hi (Offset 13C) DMA Engine 0 SG1 Buffer Pointer Upper 32 Bits
<byte 2244>
union dma0_sg2_pointer_lo (Offset 140) DMA Engine 0 SG2 Buffer Pointer Lower 32 Bits
<byte 2244>
{field (By field)}
<byte 2244>
lbits:32 address DMA Engine Command Address
{}
or dma0_sg2_pointer_lo (Offset 140) DMA Engine 0 SG2 Buffer Pointer Lower 32 Bits
<byte 2244>
ulong value As longword
endunion dma0_sg2_pointer_lo (Offset 140) DMA Engine 0 SG2 Buffer Pointer Lower 32 Bits
<byte 2248>
union dma0_sg2_pointer_hi (Offset 144) DMA Engine 0 SG2 Buffer Pointer Upper 32 Bits
<byte 2248>
{field (By field)}
<byte 2248>
lbits:32 address DMA Engine Command Address
{}
or dma0_sg2_pointer_hi (Offset 144) DMA Engine 0 SG2 Buffer Pointer Upper 32 Bits
<byte 2248>
ulong value As longword
endunion dma0_sg2_pointer_hi (Offset 144) DMA Engine 0 SG2 Buffer Pointer Upper 32 Bits
<byte 2252>
{reserved148_177[0] ((Offset 148-177) Reserved)}
<byte 2252>
ulong value
{}
<byte 2256>
{reserved148_177[1] ((Offset 148-177) Reserved)}
<byte 2256>
ulong value
{}
<byte 2260>
{reserved148_177[2] ((Offset 148-177) Reserved)}
<byte 2260>
ulong value
{}
<byte 2264>
{reserved148_177[3] ((Offset 148-177) Reserved)}
<byte 2264>
ulong value
{}
<byte 2268>
{reserved148_177[4] ((Offset 148-177) Reserved)}
<byte 2268>
ulong value
{}
<byte 2272>
{reserved148_177[5] ((Offset 148-177) Reserved)}
<byte 2272>
ulong value
{}
<byte 2276>
{reserved148_177[6] ((Offset 148-177) Reserved)}
<byte 2276>
ulong value
{}
<byte 2280>
{reserved148_177[7] ((Offset 148-177) Reserved)}
<byte 2280>
ulong value
{}
<byte 2284>
{reserved148_177[8] ((Offset 148-177) Reserved)}
<byte 2284>
ulong value
{}
<byte 2288>
{reserved148_177[9] ((Offset 148-177) Reserved)}
<byte 2288>
ulong value
{}
<byte 2292>
{reserved148_177[10] ((Offset 148-177) Reserved)}
<byte 2292>
ulong value
{}
<byte 2296>
{reserved148_177[11] ((Offset 148-177) Reserved)}
<byte 2296>
ulong value
{}
<byte 2300>
union dma0debug (Offset 178) DMA Engine 0 Debug
<byte 2300>
{field (By field)}
<byte 2300>
lbits:2 drbetqsms DMA Register - (Back End) TQ State Machine State
lbits:2 rsvd4 Reserved
lbits:3 ddpwsms DMA Data Path Write State Machine State
lbits:1 rsvd3 Reserved
lbits:3 ddprsms DMA Data Path Read State Machine State
lbits:1 rsvd2 Reserved
lbits:5 drcusms DMA Read Control Unit State Machine State
lbits:1 rsvd1 Reserved
lbits:5 dwcusms DMA Write Control Unit State Machine State
lbits:9 rsvd Reserved
{}
or dma0debug (Offset 178) DMA Engine 0 Debug
<byte 2300>
ulong value As longword
endunion dma0debug (Offset 178) DMA Engine 0 Debug
<byte 2304>
{reserved17c_17f ((Offset 17C-17F) Reserved)}
<byte 2304>
ulong value
{}
<byte 2308>
union dma1_cp_fifol (Offset 180) DMA Engine 1 Command Pointer FIFO Lower 32 Bits
<byte 2308>
{field (By field)}
<byte 2308>
lbits:32 address DMA Engine Command Address
{}
or dma1_cp_fifol (Offset 180) DMA Engine 1 Command Pointer FIFO Lower 32 Bits
<byte 2308>
ulong value As longword
endunion dma1_cp_fifol (Offset 180) DMA Engine 1 Command Pointer FIFO Lower 32 Bits
<byte 2312>
union dma1_cp_fifou (Offset 184) DMA Engine 1 Command Pointer FIFO Upper 32 Bits
<byte 2312>
{field (By field)}
<byte 2312>
lbits:32 address DMA Engine Command Address
{}
or dma1_cp_fifou (Offset 184) DMA Engine 1 Command Pointer FIFO Upper 32 Bits
<byte 2312>
ulong value As longword
endunion dma1_cp_fifou (Offset 184) DMA Engine 1 Command Pointer FIFO Upper 32 Bits
<byte 2316>
union dma1_cs_fifol (Offset 188) DMA Engine 1 Command Status FIFO Lower 32 Bits
<byte 2316>
{field (By field)}
<byte 2316>
lbits:32 address DMA Engine Command Address
{}
or dma1_cs_fifol (Offset 188) DMA Engine 1 Command Status FIFO Lower 32 Bits
<byte 2316>
ulong value As longword
endunion dma1_cs_fifol (Offset 188) DMA Engine 1 Command Status FIFO Lower 32 Bits
<byte 2320>
union dma1_cs_fifou (Offset 18C) DMA Engine 1 Command Status FIFO Upper 32 Bits
<byte 2320>
{field (By field)}
<byte 2320>
lbits:32 address DMA Engine Command Address
{}
or dma1_cs_fifou (Offset 18C) DMA Engine 1 Command Status FIFO Upper 32 Bits
<byte 2320>
ulong value As longword
endunion dma1_cs_fifou (Offset 18C) DMA Engine 1 Command Status FIFO Upper 32 Bits
<byte 2324>
union dma1_status (Offset 190) DMA Engine 1 Status
<byte 2324>
{field (By field)}
<byte 2324>
lbits:3 tqs Transaction Queue Status
lbits:1 illopc Illegal Opcode
lbits:2 ss Status Source
lbits:1 hltoe Halted On Error
lbits:25 rsvd Reserved
{}
or dma1_status (Offset 190) DMA Engine 1 Status
<byte 2324>
ulong value As longword
endunion dma1_status (Offset 190) DMA Engine 1 Status
<byte 2328>
union dma1_cfg (Offset 194) DMA Engine 1 Configuration
<byte 2328>
{field (By field)}
<byte 2328>
lbits:8 mtts Maximum Transaction Transfer Size
lbits:8 dwt DMA Write Threshold
lbits:4 msssq Minimum Space in SDRAM Submit Queue
lbits:4 msspsq Minimum Space in Secondary PCI Submit Queue
lbits:4 msppsq Minimum Space in Primary PCI Submit Queue
lbits:1 mwid MWI Disable
lbits:3 rsvd Reserved
{}
or dma1_cfg (Offset 194) DMA Engine 1 Configuration
<byte 2328>
ulong value As longword
endunion dma1_cfg (Offset 194) DMA Engine 1 Configuration
<byte 2332>
{reserved198_19f[0] ((Offset 198-19F) Reserved)}
<byte 2332>
ulong value
{}
<byte 2336>
{reserved198_19f[1] ((Offset 198-19F) Reserved)}
<byte 2336>
ulong value
{}
<byte 2340>
union dma1cp_tp (Offset 1A2) DMA Engine 1 Command Pointer FIFO Tail Pointer
<byte 2340>
{field (By field)}
<byte 2340>
bits:14 tail Tail Pointer
bits:1 fifofull FIFO Full
bits:1 rsvd Reserved
{}
or dma1cp_tp (Offset 1A2) DMA Engine 1 Command Pointer FIFO Tail Pointer
<byte 2340>
ushort value As word
endunion dma1cp_tp (Offset 1A2) DMA Engine 1 Command Pointer FIFO Tail Pointer
<byte 2342>
union dma1cp_hp (Offset 1A0) DMA Engine 1 Command Pointer FIFO Head Pointer
<byte 2342>
{field (By field)}
<byte 2342>
bits:14 head Head Pointer
bits:2 rsvd Reserved
{}
or dma1cp_hp (Offset 1A0) DMA Engine 1 Command Pointer FIFO Head Pointer
<byte 2342>
ushort value As word
endunion dma1cp_hp (Offset 1A0) DMA Engine 1 Command Pointer FIFO Head Pointer
<byte 2344>
union dma1cs_tp (Offset 1A6) DMA Engine 1 Command Status FIFO Tail Pointer
<byte 2344>
{field (By field)}
<byte 2344>
bits:14 tail Tail Pointer
bits:1 fifofull FIFO Full
bits:1 rsvd Reserved
{}
or dma1cs_tp (Offset 1A6) DMA Engine 1 Command Status FIFO Tail Pointer
<byte 2344>
ushort value As word
endunion dma1cs_tp (Offset 1A6) DMA Engine 1 Command Status FIFO Tail Pointer
<byte 2346>
union dma1cs_hp (Offset 1A4) DMA Engine 1 Command Status FIFO Head Pointer
<byte 2346>
{field (By field)}
<byte 2346>
bits:14 head Head Pointer
bits:2 rsvd Reserved
{}
or dma1cs_hp (Offset 1A4) DMA Engine 1 Command Status FIFO Head Pointer
<byte 2346>
ushort value As word
endunion dma1cs_hp (Offset 1A4) DMA Engine 1 Command Status FIFO Head Pointer
<byte 2348>
{reserved1a8_1af[0] ((Offset 1A8-1AF) Reserved)}
<byte 2348>
ulong value
{}
<byte 2352>
{reserved1a8_1af[1] ((Offset 1A8-1AF) Reserved)}
<byte 2352>
ulong value
{}
<byte 2356>
union dma1_cdbpl (Offset 1B0) DMA Engine 1 Command Descriptor Block Pointer Lower 32 Bits
<byte 2356>
{field (By field)}
<byte 2356>
lbits:2 addrspace Address Space
lbits:1 addrsize Address Size (when set, indicates a 64-bit address)
lbits:29 cdbp Command Descriptor Block Pointer
{}
or dma1_cdbpl (Offset 1B0) DMA Engine 1 Command Descriptor Block Pointer Lower 32 Bits
<byte 2356>
ulong value As longword
endunion dma1_cdbpl (Offset 1B0) DMA Engine 1 Command Descriptor Block Pointer Lower 32 Bits
<byte 2360>
union dma1_cdbph (Offset 1B4) DMA Engine 1 Command Descriptor Block Pointer Upper 32 Bits
<byte 2360>
{field (By field)}
<byte 2360>
lbits:32 address DMA Engine Command Address
{}
or dma1_cdbph (Offset 1B4) DMA Engine 1 Command Descriptor Block Pointer Upper 32 Bits
<byte 2360>
ulong value As longword
endunion dma1_cdbph (Offset 1B4) DMA Engine 1 Command Descriptor Block Pointer Upper 32 Bits
<byte 2364>
union dma1_sg1_pointer_lo (Offset 1B8) DMA Engine 1 SG1 Buffer Pointer Lower 32 Bits
<byte 2364>
{field (By field)}
<byte 2364>
lbits:32 address DMA Engine Command Address
{}
or dma1_sg1_pointer_lo (Offset 1B8) DMA Engine 1 SG1 Buffer Pointer Lower 32 Bits
<byte 2364>
ulong value As longword
endunion dma1_sg1_pointer_lo (Offset 1B8) DMA Engine 1 SG1 Buffer Pointer Lower 32 Bits
<byte 2368>
union dma1_sg1_pointer_hi (Offset 1BC) DMA Engine 1 SG1 Buffer Pointer Upper 32 Bits
<byte 2368>
{field (By field)}
<byte 2368>
lbits:32 address DMA Engine Command Address
{}
or dma1_sg1_pointer_hi (Offset 1BC) DMA Engine 1 SG1 Buffer Pointer Upper 32 Bits
<byte 2368>
ulong value As longword
endunion dma1_sg1_pointer_hi (Offset 1BC) DMA Engine 1 SG1 Buffer Pointer Upper 32 Bits
<byte 2372>
union dma1_sg2_pointer_lo (Offset 1C0) DMA Engine 1 SG2 Buffer Pointer Lower 32 Bits
<byte 2372>
{field (By field)}
<byte 2372>
lbits:32 address DMA Engine Command Address
{}
or dma1_sg2_pointer_lo (Offset 1C0) DMA Engine 1 SG2 Buffer Pointer Lower 32 Bits
<byte 2372>
ulong value As longword
endunion dma1_sg2_pointer_lo (Offset 1C0) DMA Engine 1 SG2 Buffer Pointer Lower 32 Bits
<byte 2376>
union dma1_sg2_pointer_hi (Offset 1C4) DMA Engine 1 SG2 Buffer Pointer Upper 32 Bits
<byte 2376>
{field (By field)}
<byte 2376>
lbits:32 address DMA Engine Command Address
{}
or dma1_sg2_pointer_hi (Offset 1C4) DMA Engine 1 SG2 Buffer Pointer Upper 32 Bits
<byte 2376>
ulong value As longword
endunion dma1_sg2_pointer_hi (Offset 1C4) DMA Engine 1 SG2 Buffer Pointer Upper 32 Bits
<byte 2380>
{reserved1c8_1f7[0] ((Offset 1C8-1F7) Reserved)}
<byte 2380>
ulong value
{}
<byte 2384>
{reserved1c8_1f7[1] ((Offset 1C8-1F7) Reserved)}
<byte 2384>
ulong value
{}
<byte 2388>
{reserved1c8_1f7[2] ((Offset 1C8-1F7) Reserved)}
<byte 2388>
ulong value
{}
<byte 2392>
{reserved1c8_1f7[3] ((Offset 1C8-1F7) Reserved)}
<byte 2392>
ulong value
{}
<byte 2396>
{reserved1c8_1f7[4] ((Offset 1C8-1F7) Reserved)}
<byte 2396>
ulong value
{}
<byte 2400>
{reserved1c8_1f7[5] ((Offset 1C8-1F7) Reserved)}
<byte 2400>
ulong value
{}
<byte 2404>
{reserved1c8_1f7[6] ((Offset 1C8-1F7) Reserved)}
<byte 2404>
ulong value
{}
<byte 2408>
{reserved1c8_1f7[7] ((Offset 1C8-1F7) Reserved)}
<byte 2408>
ulong value
{}
<byte 2412>
{reserved1c8_1f7[8] ((Offset 1C8-1F7) Reserved)}
<byte 2412>
ulong value
{}
<byte 2416>
{reserved1c8_1f7[9] ((Offset 1C8-1F7) Reserved)}
<byte 2416>
ulong value
{}
<byte 2420>
{reserved1c8_1f7[10] ((Offset 1C8-1F7) Reserved)}
<byte 2420>
ulong value
{}
<byte 2424>
{reserved1c8_1f7[11] ((Offset 1C8-1F7) Reserved)}
<byte 2424>
ulong value
{}
<byte 2428>
union dma1debug (Offset 1F8) DMA Engine 1 Debug
<byte 2428>
{field (By field)}
<byte 2428>
lbits:2 drbetqsms DMA Register - (Back End) TQ State Machine State
lbits:2 rsvd4 Reserved
lbits:3 ddpwsms DMA Data Path Write State Machine State
lbits:1 rsvd3 Reserved
lbits:3 ddprsms DMA Data Path Read State Machine State
lbits:1 rsvd2 Reserved
lbits:5 drcusms DMA Read Control Unit State Machine State
lbits:1 rsvd1 Reserved
lbits:5 dwcusms DMA Write Control Unit State Machine State
lbits:9 rsvd Reserved
{}
or dma1debug (Offset 1F8) DMA Engine 1 Debug
<byte 2428>
ulong value As longword
endunion dma1debug (Offset 1F8) DMA Engine 1 Debug
<byte 2432>
{reserved1fc_1ff ((Offset 1FC-1FF) Reserved)}
<byte 2432>
ulong value
{}
<byte 2436>
{reserved201_203[2] ((Offset 201-203) Reserved)}
<byte 2436>
utiny value
{}
<byte 2437>
{reserved201_203[1] ((Offset 201-203) Reserved)}
<byte 2437>
utiny value
{}
<byte 2438>
{reserved201_203[0] ((Offset 201-203) Reserved)}
<byte 2438>
utiny value
{}
<byte 2439>
union dtq_control (Offset 200) DRAM Transaction Queue Control
<byte 2439>
{field (By field)}
<byte 2439>
tbits:1 ewft Enable Write Flow Through
tbits:1 erft Enable Read Flow Through
tbits:1 etdt Enable Transaction Discard Timer
tbits:5 rsvd Reserved
{}
or dtq_control (Offset 200) DRAM Transaction Queue Control
<byte 2439>
utiny value As byte
endunion dtq_control (Offset 200) DRAM Transaction Queue Control
<byte 2440>
union dwr_ft_threshold (Offset 207) DRAM Transaction Queue Write Flow Through Threshold
<byte 2440>
{field (By field)}
<byte 2440>
tbits:7 threshold Threshold
tbits:1 rsvd Reserved
{}
or dwr_ft_threshold (Offset 207) DRAM Transaction Queue Write Flow Through Threshold
<byte 2440>
utiny value As byte
endunion dwr_ft_threshold (Offset 207) DRAM Transaction Queue Write Flow Through Threshold
<byte 2441>
union drd_ft_threshold (Offset 206) DRAM Transaction Queue Read Flow Through Threshold
<byte 2441>
{field (By field)}
<byte 2441>
tbits:7 threshold Threshold
tbits:1 rsvd Reserved
{}
or drd_ft_threshold (Offset 206) DRAM Transaction Queue Read Flow Through Threshold
<byte 2441>
utiny value As byte
endunion drd_ft_threshold (Offset 206) DRAM Transaction Queue Read Flow Through Threshold
<byte 2442>
union dwr_threshold (Offset 205) DRAM Transaction Queue Write Threshold
<byte 2442>
{field (By field)}
<byte 2442>
tbits:7 threshold Threshold
tbits:1 rsvd Reserved
{}
or dwr_threshold (Offset 205) DRAM Transaction Queue Write Threshold
<byte 2442>
utiny value As byte
endunion dwr_threshold (Offset 205) DRAM Transaction Queue Write Threshold
<byte 2443>
union drd_threshold (Offset 204) DRAM Transaction Queue Read Threshold
<byte 2443>
{field (By field)}
<byte 2443>
tbits:7 threshold Threshold
tbits:1 rsvd Reserved
{}
or drd_threshold (Offset 204) DRAM Transaction Queue Read Threshold
<byte 2443>
utiny value As byte
endunion drd_threshold (Offset 204) DRAM Transaction Queue Read Threshold
<byte 2444>
{reserved20a_20b ((Offset 20A-20B) Reserved)}
<byte 2444>
ushort value
{}
<byte 2446>
union dmax_ttime_count (Offset 208) DRAM Transaction Queue Max Transaction Time Count
<byte 2446>
{field (By field)}
<byte 2446>
bits:16 max_ttime_count Maximum transaction timeout count
{}
or dmax_ttime_count (Offset 208) DRAM Transaction Queue Max Transaction Time Count
<byte 2446>
ushort value As word
endunion dmax_ttime_count (Offset 208) DRAM Transaction Queue Max Transaction Time Count
<byte 2448>
union ddt_fifo_mode (Offset 20C) DRAM Transaction Queue Posted Transaction FIFO Mode
<byte 2448>
{field (By field)}
<byte 2448>
lbits:2 d0dpcptfifomode DMA Engine 0 Data Path channel DT_FIFO_MODE
lbits:2 rsvd6 Reserved
lbits:2 d0cpcptfifomode DMA Engine 0 CDB Pointer channel DT_FIFO_MODE
lbits:2 rsvd5 Reserved
lbits:2 d1dpcptfifomode DMA Engine 1 Data Path channel DT_FIFO_MODE
lbits:2 rsvd4 Reserved
lbits:2 d1cpcptfifomode DMA Engine 1 CDB Pointer channel DT_FIFO_MODE
lbits:2 rsvd3 Reserved
lbits:2 i2optfifomode I2O DT_FIFO_MODE
lbits:2 rsvd2 Reserved
lbits:2 ssptfifomode Secondary Slave DT_FIFO_MODE
lbits:2 rsvd1 Reserved
lbits:2 psptfifomode Primary Slave DT_FIFO_MODE
lbits:6 rsvd Reserved
{}
or ddt_fifo_mode (Offset 20C) DRAM Transaction Queue Posted Transaction FIFO Mode
<byte 2448>
ulong value As longword
endunion ddt_fifo_mode (Offset 20C) DRAM Transaction Queue Posted Transaction FIFO Mode
<byte 2452>
union dpt_fifo_mode (Offset 210) DRAM Transaction Queue Delayed Transaction FIFO Mode
<byte 2452>
{field (By field)}
<byte 2452>
lbits:2 d0dpcptfifomode DMA Engine 0 Data Path channel PT_FIFO_MODE
lbits:2 rsvd6 Reserved
lbits:2 d0cpcptfifomode DMA Engine 0 CDB Pointer channel PT_FIFO_MODE
lbits:2 rsvd5 Reserved
lbits:2 d1dpcptfifomode DMA Engine 1 Data Path channel PT_FIFO_MODE
lbits:2 rsvd4 Reserved
lbits:2 d1cpcptfifomode DMA Engine 1 CDB Pointer channel PT_FIFO_MODE
lbits:2 rsvd3 Reserved
lbits:2 i2optfifomode I2O PT_FIFO_MODE
lbits:2 rsvd2 Reserved
lbits:2 ssptfifomode Secondary Slave PT_FIFO_MODE
lbits:2 rsvd1 Reserved
lbits:2 psptfifomode Primary Slave PT_FIFO_MODE
lbits:6 rsvd Reserved
{}
or dpt_fifo_mode (Offset 210) DRAM Transaction Queue Delayed Transaction FIFO Mode
<byte 2452>
ulong value As longword
endunion dpt_fifo_mode (Offset 210) DRAM Transaction Queue Delayed Transaction FIFO Mode
<byte 2456>
{reserved214_21f[0] ((Offset 214-21F) Reserved)}
<byte 2456>
ulong value
{}
<byte 2460>
{reserved214_21f[1] ((Offset 214-21F) Reserved)}
<byte 2460>
ulong value
{}
<byte 2464>
{reserved214_21f[2] ((Offset 214-21F) Reserved)}
<byte 2464>
ulong value
{}
<byte 2468>
{reserved221_223[2] ((Offset 221-223) Reserved)}
<byte 2468>
utiny value
{}
<byte 2469>
{reserved221_223[1] ((Offset 221-223) Reserved)}
<byte 2469>
utiny value
{}
<byte 2470>
{reserved221_223[0] ((Offset 221-223) Reserved)}
<byte 2470>
utiny value
{}
<byte 2471>
union ptq_control (Offset 220) Primary PCI Transaction Queue Control
<byte 2471>
{field (By field)}
<byte 2471>
tbits:1 ewft Enable Write Flow Through
tbits:1 erft Enable Read Flow Through
tbits:1 etdt Enable Transaction Discard Timer
tbits:1 erc Enable Retry Counter
tbits:1 dr_pull_pw IOR, CFGRD, MR, MR1DW commands must pull posted write transactions from the Secondary Transaction Queue in the same manner as the MRLM_PULL_PW bit
tbits:1 mrlm_pull_pw Before MRL and MRM commands may complete on the Secondary PCI bus, they must pull all posted write transactions out of the Secondary Transaction Queue that originated on the Primary PCI bus prior to the MRL or MRM completing on the Primary PCI bus
tbits:2 rsvd Reserved
{}
or ptq_control (Offset 220) Primary PCI Transaction Queue Control
<byte 2471>
utiny value As byte
endunion ptq_control (Offset 220) Primary PCI Transaction Queue Control
<byte 2472>
union pwr_ft_threshold (Offset 227) Primary PCI Transaction Queue Write Flow Through Threshold
<byte 2472>
{field (By field)}
<byte 2472>
tbits:7 threshold Threshold
tbits:1 rsvd Reserved
{}
or pwr_ft_threshold (Offset 227) Primary PCI Transaction Queue Write Flow Through Threshold
<byte 2472>
utiny value As byte
endunion pwr_ft_threshold (Offset 227) Primary PCI Transaction Queue Write Flow Through Threshold
<byte 2473>
union prd_ft_threshold (Offset 226) Primary PCI Transaction Queue Read Flow Through Threshold
<byte 2473>
{field (By field)}
<byte 2473>
tbits:7 threshold Threshold
tbits:1 rsvd Reserved
{}
or prd_ft_threshold (Offset 226) Primary PCI Transaction Queue Read Flow Through Threshold
<byte 2473>
utiny value As byte
endunion prd_ft_threshold (Offset 226) Primary PCI Transaction Queue Read Flow Through Threshold
<byte 2474>
union pwr_threshold (Offset 225) Primary PCI Transaction Queue Write Threshold
<byte 2474>
{field (By field)}
<byte 2474>
tbits:7 threshold Threshold
tbits:1 rsvd Reserved
{}
or pwr_threshold (Offset 225) Primary PCI Transaction Queue Write Threshold
<byte 2474>
utiny value As byte
endunion pwr_threshold (Offset 225) Primary PCI Transaction Queue Write Threshold
<byte 2475>
union prd_threshold (Offset 224) Primary PCI Transaction Queue Read Threshold
<byte 2475>
{field (By field)}
<byte 2475>
tbits:7 threshold Threshold
tbits:1 rsvd Reserved
{}
or prd_threshold (Offset 224) Primary PCI Transaction Queue Read Threshold
<byte 2475>
utiny value As byte
endunion prd_threshold (Offset 224) Primary PCI Transaction Queue Read Threshold
<byte 2476>
union pmax_retry_count (Offset 22A) Primary PCI Transaction Queue Max Retry Count
<byte 2476>
{field (By field)}
<byte 2476>
bits:16 max_retry_count Maximum retry counter
{}
or pmax_retry_count (Offset 22A) Primary PCI Transaction Queue Max Retry Count
<byte 2476>
ushort value As word
endunion pmax_retry_count (Offset 22A) Primary PCI Transaction Queue Max Retry Count
<byte 2478>
union pmax_ttime_count (Offset 228) Primary PCI Transaction Queue Max Transaction Time Count
<byte 2478>
{field (By field)}
<byte 2478>
bits:16 max_ttime_count Maximum transaction timeout count
{}
or pmax_ttime_count (Offset 228) Primary PCI Transaction Queue Max Transaction Time Count
<byte 2478>
ushort value As word
endunion pmax_ttime_count (Offset 228) Primary PCI Transaction Queue Max Transaction Time Count
<byte 2480>
{reserved22c_23f[0] ((Offset 22C-23F) Reserved)}
<byte 2480>
ulong value
{}
<byte 2484>
{reserved22c_23f[1] ((Offset 22C-23F) Reserved)}
<byte 2484>
ulong value
{}
<byte 2488>
{reserved22c_23f[2] ((Offset 22C-23F) Reserved)}
<byte 2488>
ulong value
{}
<byte 2492>
{reserved22c_23f[3] ((Offset 22C-23F) Reserved)}
<byte 2492>
ulong value
{}
<byte 2496>
{reserved22c_23f[4] ((Offset 22C-23F) Reserved)}
<byte 2496>
ulong value
{}
<byte 2500>
{reserved241_243[2] ((Offset 241-243) Reserved)}
<byte 2500>
utiny value
{}
<byte 2501>
{reserved241_243[1] ((Offset 241-243) Reserved)}
<byte 2501>
utiny value
{}
<byte 2502>
{reserved241_243[0] ((Offset 241-243) Reserved)}
<byte 2502>
utiny value
{}
<byte 2503>
union stq_control (Offset 240) Secondary PCI Transaction Queue Control
<byte 2503>
{field (By field)}
<byte 2503>
tbits:1 ewft Enable Write Flow Through
tbits:1 erft Enable Read Flow Through
tbits:1 etdt Enable Transaction Discard Timer
tbits:1 erc Enable Retry Counter
tbits:1 dr_pull_pw IOR, CFGRD, MR, MR1DW commands must pull posted write transactions from the Primary Transaction Queue in the same manner as the MRLM_PULL_PW bit
tbits:1 mrlm_pull_pw Before MRL and MRM commands may complete on the Primary PCI bus, they must pull all posted write transactions out of the Primary Transaction Queue that originated on the Secondary PCI bus prior to the MRL or MRM completing on the Primary PCI bus
tbits:2 rsvd Reserved
{}
or stq_control (Offset 240) Secondary PCI Transaction Queue Control
<byte 2503>
utiny value As byte
endunion stq_control (Offset 240) Secondary PCI Transaction Queue Control
<byte 2504>
union swr_ft_threshold (Offset 247) Secondary PCI Transaction Queue Write Flow Through Threshold
<byte 2504>
{field (By field)}
<byte 2504>
tbits:7 threshold Threshold
tbits:1 rsvd Reserved
{}
or swr_ft_threshold (Offset 247) Secondary PCI Transaction Queue Write Flow Through Threshold
<byte 2504>
utiny value As byte
endunion swr_ft_threshold (Offset 247) Secondary PCI Transaction Queue Write Flow Through Threshold
<byte 2505>
union srd_ft_threshold (Offset 246) Secondary PCI Transaction Queue Read Flow Through Threshold
<byte 2505>
{field (By field)}
<byte 2505>
tbits:7 threshold Threshold
tbits:1 rsvd Reserved
{}
or srd_ft_threshold (Offset 246) Secondary PCI Transaction Queue Read Flow Through Threshold
<byte 2505>
utiny value As byte
endunion srd_ft_threshold (Offset 246) Secondary PCI Transaction Queue Read Flow Through Threshold
<byte 2506>
union swr_threshold (Offset 245) Secondary PCI Transaction Queue Write Threshold
<byte 2506>
{field (By field)}
<byte 2506>
tbits:7 threshold Threshold
tbits:1 rsvd Reserved
{}
or swr_threshold (Offset 245) Secondary PCI Transaction Queue Write Threshold
<byte 2506>
utiny value As byte
endunion swr_threshold (Offset 245) Secondary PCI Transaction Queue Write Threshold
<byte 2507>
union srd_threshold (Offset 244) Secondary PCI Transaction Queue Read Threshold
<byte 2507>
{field (By field)}
<byte 2507>
tbits:7 threshold Threshold
tbits:1 rsvd Reserved
{}
or srd_threshold (Offset 244) Secondary PCI Transaction Queue Read Threshold
<byte 2507>
utiny value As byte
endunion srd_threshold (Offset 244) Secondary PCI Transaction Queue Read Threshold
<byte 2508>
union smax_retry_count (Offset 24A) Secondary PCI Transaction Queue Max Retry Count
<byte 2508>
{field (By field)}
<byte 2508>
bits:16 max_retry_count Maximum retry counter
{}
or smax_retry_count (Offset 24A) Secondary PCI Transaction Queue Max Retry Count
<byte 2508>
ushort value As word
endunion smax_retry_count (Offset 24A) Secondary PCI Transaction Queue Max Retry Count
<byte 2510>
union smax_ttime_count (Offset 248) Secondary PCI Transaction Queue Max Transaction Time Count
<byte 2510>
{field (By field)}
<byte 2510>
bits:16 max_ttime_count Maximum transaction timeout count
{}
or smax_ttime_count (Offset 248) Secondary PCI Transaction Queue Max Transaction Time Count
<byte 2510>
ushort value As word
endunion smax_ttime_count (Offset 248) Secondary PCI Transaction Queue Max Transaction Time Count
<byte 2512>
{reserved24c_25f[0] ((Offset 24C-25F) Reserved)}
<byte 2512>
ulong value
{}
<byte 2516>
{reserved24c_25f[1] ((Offset 24C-25F) Reserved)}
<byte 2516>
ulong value
{}
<byte 2520>
{reserved24c_25f[2] ((Offset 24C-25F) Reserved)}
<byte 2520>
ulong value
{}
<byte 2524>
{reserved24c_25f[3] ((Offset 24C-25F) Reserved)}
<byte 2524>
ulong value
{}
<byte 2528>
{reserved24c_25f[4] ((Offset 24C-25F) Reserved)}
<byte 2528>
ulong value
{}
<byte 2532>
{reserved261_263[2] ((Offset 261-263) Reserved)}
<byte 2532>
utiny value
{}
<byte 2533>
{reserved261_263[1] ((Offset 261-263) Reserved)}
<byte 2533>
utiny value
{}
<byte 2534>
{reserved261_263[0] ((Offset 261-263) Reserved)}
<byte 2534>
utiny value
{}
<byte 2535>
union p_mr_profile (Offset 260) Primary Memory Read Profile
<byte 2535>
{field (By field)}
<byte 2535>
tbits:1 p_mr_profile_0 Profile 0
tbits:1 p_mr_profile_1 Profile 1
tbits:1 p_mr_profile_2 Profile 2
tbits:1 p_mr_profile_3 Profile 3
tbits:4 rsvd Reserved
{}
or p_mr_profile (Offset 260) Primary Memory Read Profile
<byte 2535>
utiny value As byte
endunion p_mr_profile (Offset 260) Primary Memory Read Profile
<byte 2536>
union p_mrl_profile (Offset 264) Primary Memory Read Line Profile
<byte 2536>
{field (By field)}
<byte 2536>
lbits:3 p_mrx_profile_0 Profile 0
lbits:1 rsvd4 Reserved
lbits:3 p_mrx_profile_1 Profile 1
lbits:1 rsvd3 Reserved
lbits:3 p_mrx_profile_2 Profile 2
lbits:1 rsvd2 Reserved
lbits:3 p_mrx_profile_3 Profile 3
lbits:1 rsvd1 Reserved
lbits:3 p_mrx_profile_d Profile Default
lbits:13 rsvd Reserved
{}
or p_mrl_profile (Offset 264) Primary Memory Read Line Profile
<byte 2536>
ulong value As longword
endunion p_mrl_profile (Offset 264) Primary Memory Read Line Profile
<byte 2540>
union p_mrm_profile (Offset 268) Primary Memory Multiple Profile
<byte 2540>
{field (By field)}
<byte 2540>
lbits:3 p_mrx_profile_0 Profile 0
lbits:1 rsvd4 Reserved
lbits:3 p_mrx_profile_1 Profile 1
lbits:1 rsvd3 Reserved
lbits:3 p_mrx_profile_2 Profile 2
lbits:1 rsvd2 Reserved
lbits:3 p_mrx_profile_3 Profile 3
lbits:1 rsvd1 Reserved
lbits:3 p_mrx_profile_d Profile Default
lbits:13 rsvd Reserved
{}
or p_mrm_profile (Offset 268) Primary Memory Multiple Profile
<byte 2540>
ulong value As longword
endunion p_mrm_profile (Offset 268) Primary Memory Multiple Profile
<byte 2544>
{reserved26c_26f ((Offset 26C-26F) Reserved)}
<byte 2544>
ulong value
{}
<byte 2548>
{reserved271_273[2] ((Offset 271-273) Reserved)}
<byte 2548>
utiny value
{}
<byte 2549>
{reserved271_273[1] ((Offset 271-273) Reserved)}
<byte 2549>
utiny value
{}
<byte 2550>
{reserved271_273[0] ((Offset 271-273) Reserved)}
<byte 2550>
utiny value
{}
<byte 2551>
union s_mr_profile (Offset 270) Secondary Memory Read Profile
<byte 2551>
{field (By field)}
<byte 2551>
tbits:1 s_mr_profile_0 Profile 0
tbits:1 s_mr_profile_1 Profile 1
tbits:1 s_mr_profile_2 Profile 2
tbits:1 s_mr_profile_3 Profile 3
tbits:1 s_mr_profile_4 Profile 4
tbits:1 s_mr_profile_5 Profile 5
tbits:2 rsvd Reserved
{}
or s_mr_profile (Offset 270) Secondary Memory Read Profile
<byte 2551>
utiny value As byte
endunion s_mr_profile (Offset 270) Secondary Memory Read Profile
<byte 2552>
union s_mrl_profile (Offset 274) Secondary Memory Read Line Profile
<byte 2552>
{field (By field)}
<byte 2552>
lbits:3 s_mrx_profile_0 Profile 0
lbits:1 rsvd6 Reserved
lbits:3 s_mrx_profile_1 Profile 1
lbits:1 rsvd5 Reserved
lbits:3 s_mrx_profile_2 Profile 2
lbits:1 rsvd4 Reserved
lbits:3 s_mrx_profile_3 Profile 3
lbits:1 rsvd3 Reserved
lbits:3 s_mrx_profile_4 Profile 4
lbits:1 rsvd2 Reserved
lbits:3 s_mrx_profile_5 Profile 5
lbits:1 rsvd1 Reserved
lbits:3 s_mrx_profile_d Profile Default
lbits:5 rsvd Reserved
{}
or s_mrl_profile (Offset 274) Secondary Memory Read Line Profile
<byte 2552>
ulong value As longword
endunion s_mrl_profile (Offset 274) Secondary Memory Read Line Profile
<byte 2556>
union s_mrm_profile (Offset 278) Secondary Memory Multiple Profile
<byte 2556>
{field (By field)}
<byte 2556>
lbits:3 s_mrx_profile_0 Profile 0
lbits:1 rsvd6 Reserved
lbits:3 s_mrx_profile_1 Profile 1
lbits:1 rsvd5 Reserved
lbits:3 s_mrx_profile_2 Profile 2
lbits:1 rsvd4 Reserved
lbits:3 s_mrx_profile_3 Profile 3
lbits:1 rsvd3 Reserved
lbits:3 s_mrx_profile_4 Profile 4
lbits:1 rsvd2 Reserved
lbits:3 s_mrx_profile_5 Profile 5
lbits:1 rsvd1 Reserved
lbits:3 s_mrx_profile_d Profile Default
lbits:5 rsvd Reserved
{}
or s_mrm_profile (Offset 278) Secondary Memory Multiple Profile
<byte 2556>
ulong value As longword
endunion s_mrm_profile (Offset 278) Secondary Memory Multiple Profile
<byte 2560>
{reserved27c_27f ((Offset 27C-27F) Reserved)}
<byte 2560>
ulong value
{}
<byte 2564>
union memory_timing (Offset 280) Memory Timing
<byte 2564>
{field (By field)}
<byte 2564>
lbits:1 s_data2pre Trdl - Last data input to precharge
lbits:2 s_rfsh2act Trc - Active command to active command (same bank) or Auto refresh to Active command
lbits:1 s_act2rw Trcd - Active command to column command
lbits:2 s_act2pre Tras - Active command to precharge command
lbits:2 s_rowpre Trp - Precharge command to active command
lbits:2 s_caslatency CL- Internal CAS latency
lbits:3 mrs_caslat CAS latency value programmed to the SDRAM mode register during MRS command
lbits:1 sdram_en Enable driving SDRAM signals
lbits:1 ecc_disable ECC Disable
lbits:1 d3_sref_en SDRAM will go to self refresh mode if detecting D0 to D3 (ACPI) transition and stay in self refresh mode until this bit is written 0
lbits:1 lpwrdwn_on SDRAM is in power down state
lbits:15 rsvd Reserved
{}
or memory_timing (Offset 280) Memory Timing
<byte 2564>
ulong value As longword
endunion memory_timing (Offset 280) Memory Timing
<byte 2568>
union configuration (Offset 284) Configuration
<byte 2568>
{field (By field)}
<byte 2568>
lbits:9 s_refrate Refresh rate count
lbits:1 s_refreshcnten Refresh counter enable
lbits:1 s_init_rfsh Refresh cycles continuously generated at Trc intervals
lbits:1 s_sdrammode Generate a Mode Register Set (MRS) cycle
lbits:1 s_sdraminit Start the initialization sequence by issuing the precharge all command (PREALL)
lbits:1 s_bnk_pre_mode Precharge option
lbits:1 s_wr_close Bank inactivate condition, close page after every write cycle
lbits:1 s_rd_close Bank inactivate condition, close page after every read cycle
lbits:1 reg_dimm Interface to all register banks
lbits:1 ecc80_en Enable 16 bit ECC
lbits:1 en_srfsh Enable self refresh function during power down mode
lbits:12 rfcntr Number of desired refresh cycles when s_init_rfsh is active
lbits:1 rf_done Number of refresh cycles just completed when s_init_rfsh is active
{}
or configuration (Offset 284) Configuration
<byte 2568>
ulong value As longword
endunion configuration (Offset 284) Configuration
<byte 2572>
union sdram_row_size (Offset 288) SDRAM Row Size
<byte 2572>
{field (By field)}
<byte 2572>
lbits:3 dimm0_row_size Row address bit for SDRAM in bank 0
lbits:3 dimm1_row_size Row address bit for SDRAM in bank 1
lbits:3 dimm2_row_size Row address bit for SDRAM in bank 2
lbits:3 dimm3_row_size Row address bit for SDRAM in bank 3
lbits:3 dimm4_row_size Row address bit for SDRAM in bank 4
lbits:3 dimm5_row_size Row address bit for SDRAM in bank 5
lbits:3 dimm6_row_size Row address bit for SDRAM in bank 6
lbits:3 dimm7_row_size Row address bit for SDRAM in bank 7
lbits:8 rsvd Reserved
{}
or sdram_row_size (Offset 288) SDRAM Row Size
<byte 2572>
ulong value As longword
endunion sdram_row_size (Offset 288) SDRAM Row Size
<byte 2576>
union sdram_column_size (Offset 28C) SDRAM Column Size
<byte 2576>
{field (By field)}
<byte 2576>
lbits:3 dimm0_col_size Column address bit for SDRAM in bank 0
lbits:3 dimm1_col_size Column address bit for SDRAM in bank 1
lbits:3 dimm2_col_size Column address bit for SDRAM in bank 2
lbits:3 dimm3_col_size Column address bit for SDRAM in bank 3
lbits:3 dimm4_col_size Column address bit for SDRAM in bank 4
lbits:3 dimm5_col_size Column address bit for SDRAM in bank 5
lbits:3 dimm6_col_size Column address bit for SDRAM in bank 6
lbits:3 dimm7_col_size Column address bit for SDRAM in bank 7
lbits:8 rsvd Reserved
{}
or sdram_column_size (Offset 28C) SDRAM Column Size
<byte 2576>
ulong value As longword
endunion sdram_column_size (Offset 28C) SDRAM Column Size
<byte 2580>
union start_address_bank01 (Offset 290) Start Address Bank 0-1
<byte 2580>
{field (By field)}
<byte 2580>
lbits:12 start_adr_bke Start address of even bank (0,2,4,6) in MB
lbits:1 rsvd1 Reserved
lbits:12 start_adr_bko Start address of odd bank (1,3,5,7) in MB
lbits:7 rsvd Reserved
{}
or start_address_bank01 (Offset 290) Start Address Bank 0-1
<byte 2580>
ulong value As longword
endunion start_address_bank01 (Offset 290) Start Address Bank 0-1
<byte 2584>
union start_address_bank23 (Offset 294) Start Address Bank 2-3
<byte 2584>
{field (By field)}
<byte 2584>
lbits:12 start_adr_bke Start address of even bank (0,2,4,6) in MB
lbits:1 rsvd1 Reserved
lbits:12 start_adr_bko Start address of odd bank (1,3,5,7) in MB
lbits:7 rsvd Reserved
{}
or start_address_bank23 (Offset 294) Start Address Bank 2-3
<byte 2584>
ulong value As longword
endunion start_address_bank23 (Offset 294) Start Address Bank 2-3
<byte 2588>
union start_address_bank45 (Offset 298) Start Address Bank 4-5
<byte 2588>
{field (By field)}
<byte 2588>
lbits:12 start_adr_bke Start address of even bank (0,2,4,6) in MB
lbits:1 rsvd1 Reserved
lbits:12 start_adr_bko Start address of odd bank (1,3,5,7) in MB
lbits:7 rsvd Reserved
{}
or start_address_bank45 (Offset 298) Start Address Bank 4-5
<byte 2588>
ulong value As longword
endunion start_address_bank45 (Offset 298) Start Address Bank 4-5
<byte 2592>
union start_address_bank67 (Offset 29C) Start Address Bank 6-7
<byte 2592>
{field (By field)}
<byte 2592>
lbits:12 start_adr_bke Start address of even bank (0,2,4,6) in MB
lbits:1 rsvd1 Reserved
lbits:12 start_adr_bko Start address of odd bank (1,3,5,7) in MB
lbits:7 rsvd Reserved
{}
or start_address_bank67 (Offset 29C) Start Address Bank 6-7
<byte 2592>
ulong value As longword
endunion start_address_bank67 (Offset 29C) Start Address Bank 6-7
<byte 2596>
union bank_size_01 (Offset 2A0) Bank Size 0-1
<byte 2596>
{field (By field)}
<byte 2596>
lbits:12 bke_size Size of even bank (0,2,4,6) in MB
lbits:1 rsvd1 Reserved
lbits:12 bko_size Size of odd bank (1,3,5,7) in MB
lbits:7 rsvd Reserved
{}
or bank_size_01 (Offset 2A0) Bank Size 0-1
<byte 2596>
ulong value As longword
endunion bank_size_01 (Offset 2A0) Bank Size 0-1
<byte 2600>
union bank_size_23 (Offset 2A4) Bank Size 2-3
<byte 2600>
{field (By field)}
<byte 2600>
lbits:12 bke_size Size of even bank (0,2,4,6) in MB
lbits:1 rsvd1 Reserved
lbits:12 bko_size Size of odd bank (1,3,5,7) in MB
lbits:7 rsvd Reserved
{}
or bank_size_23 (Offset 2A4) Bank Size 2-3
<byte 2600>
ulong value As longword
endunion bank_size_23 (Offset 2A4) Bank Size 2-3
<byte 2604>
union bank_size_45 (Offset 2A8) Bank Size 4-5
<byte 2604>
{field (By field)}
<byte 2604>
lbits:12 bke_size Size of even bank (0,2,4,6) in MB
lbits:1 rsvd1 Reserved
lbits:12 bko_size Size of odd bank (1,3,5,7) in MB
lbits:7 rsvd Reserved
{}
or bank_size_45 (Offset 2A8) Bank Size 4-5
<byte 2604>
ulong value As longword
endunion bank_size_45 (Offset 2A8) Bank Size 4-5
<byte 2608>
union bank_size_67 (Offset 2AC) Bank Size 6-7
<byte 2608>
{field (By field)}
<byte 2608>
lbits:12 bke_size Size of even bank (0,2,4,6) in MB
lbits:1 rsvd1 Reserved
lbits:12 bko_size Size of odd bank (1,3,5,7) in MB
lbits:7 rsvd Reserved
{}
or bank_size_67 (Offset 2AC) Bank Size 6-7
<byte 2608>
ulong value As longword
endunion bank_size_67 (Offset 2AC) Bank Size 6-7
<byte 2612>
union output_driver_strength (Offset 2B0) Output Driver Strength
<byte 2612>
{field (By field)}
<byte 2612>
lbits:3 driver_ras Driver strength for RAS output signal
lbits:3 driver_cas Driver strength for CAS output signal
lbits:3 driver_we Driver strength for WE output signal
lbits:3 driver_cke Driver strength for CKE output signal
lbits:3 driver_dqm Driver strength for DQM output signal
lbits:3 driver_adr Driver strength for ADDRESS output signal
lbits:3 driver_data Driver strength for DATA output signal
lbits:3 driver_cs Driver strength for Chip Select output signal
lbits:8 rsvd Reserved
{}
or output_driver_strength (Offset 2B0) Output Driver Strength
<byte 2612>
ulong value As longword
endunion output_driver_strength (Offset 2B0) Output Driver Strength
<byte 2616>
union ecc_error_status (Offset 2B4) ECC Error Status
<byte 2616>
{field (By field)}
<byte 2616>
lbits:1 cor_chkb_lchkb Correctable Check Bit Error in Lower Check Bit Byte occurred
lbits:1 cor_chkb_uchkb Correctable Check Bit Error in Upper Check Bit Byte occurred
lbits:1 cor_datao_b0 Correctable Data Error in Byte 0 of the data occurred
lbits:1 cor_datao_b1 Correctable Data Error in Byte 1 of the data occurred
lbits:1 cor_datao_b2 Correctable Data Error in Byte 2 of the data occurred
lbits:1 cor_datao_b3 Correctable Data Error in Byte 3 of the data occurred
lbits:1 cor_datao_b4 Correctable Data Error in Byte 4 of the data occurred
lbits:1 cor_datao_b5 Correctable Data Error in Byte 5 of the data occurred
lbits:1 cor_datao_b6 Correctable Data Error in Byte 6 of the data occurred
lbits:1 cor_datao_b7 Correctable Data Error in Byte 7 of the data occurred
lbits:1 unc_datao Uncorrectable Data Error Occurred
lbits:1 unc_addro Uncorrectable Address Error Occurred
lbits:1 cor_datad Correctable Data Error Detected
lbits:1 unc_datad Uncorrectable Data Error Detected
lbits:1 unc_addrd Uncorrectable Address Error Detected
lbits:1 inv_sdram_addr Invalid SDRAM Address Error Bit
lbits:16 sxtnb_ecc_syn 16 bit generated ECC syndrome that indicated the data error
{}
or ecc_error_status (Offset 2B4) ECC Error Status
<byte 2616>
ulong value As longword
endunion ecc_error_status (Offset 2B4) ECC Error Status
<byte 2620>
union ecc_address_error (Offset 2B8) ECC Address Error
<byte 2620>
{field (By field)}
<byte 2620>
lbits:3 cs Chip Select that was valid at the time of the ECC error
lbits:29 b31_3_addr Bits 31-3 of the address that an error occurred on
{}
or ecc_address_error (Offset 2B8) ECC Address Error
<byte 2620>
ulong value As longword
endunion ecc_address_error (Offset 2B8) ECC Address Error
<byte 2624>
union ecc_syndrome_preset (Offset 2BC) ECC Syndrome Preset/Correctable Error Counter
<byte 2624>
{field (By field)}
<byte 2624>
lbits:16 cecce_count Counts the correctable ECC Errors that have occurred
lbits:16 eccsynp Syndrome preset
{}
or ecc_syndrome_preset (Offset 2BC) ECC Syndrome Preset/Correctable Error Counter
<byte 2624>
ulong value As longword
endunion ecc_syndrome_preset (Offset 2BC) ECC Syndrome Preset/Correctable Error Counter
<byte 2628>
{reserved2c0_2ff[0] ((Offset 2C0-2FF) Reserved)}
<byte 2628>
ulong value
{}
<byte 2632>
{reserved2c0_2ff[1] ((Offset 2C0-2FF) Reserved)}
<byte 2632>
ulong value
{}
<byte 2636>
{reserved2c0_2ff[2] ((Offset 2C0-2FF) Reserved)}
<byte 2636>
ulong value
{}
<byte 2640>
{reserved2c0_2ff[3] ((Offset 2C0-2FF) Reserved)}
<byte 2640>
ulong value
{}
<byte 2644>
{reserved2c0_2ff[4] ((Offset 2C0-2FF) Reserved)}
<byte 2644>
ulong value
{}
<byte 2648>
{reserved2c0_2ff[5] ((Offset 2C0-2FF) Reserved)}
<byte 2648>
ulong value
{}
<byte 2652>
{reserved2c0_2ff[6] ((Offset 2C0-2FF) Reserved)}
<byte 2652>
ulong value
{}
<byte 2656>
{reserved2c0_2ff[7] ((Offset 2C0-2FF) Reserved)}
<byte 2656>
ulong value
{}
<byte 2660>
{reserved2c0_2ff[8] ((Offset 2C0-2FF) Reserved)}
<byte 2660>
ulong value
{}
<byte 2664>
{reserved2c0_2ff[9] ((Offset 2C0-2FF) Reserved)}
<byte 2664>
ulong value
{}
<byte 2668>
{reserved2c0_2ff[10] ((Offset 2C0-2FF) Reserved)}
<byte 2668>
ulong value
{}
<byte 2672>
{reserved2c0_2ff[11] ((Offset 2C0-2FF) Reserved)}
<byte 2672>
ulong value
{}
<byte 2676>
{reserved2c0_2ff[12] ((Offset 2C0-2FF) Reserved)}
<byte 2676>
ulong value
{}
<byte 2680>
{reserved2c0_2ff[13] ((Offset 2C0-2FF) Reserved)}
<byte 2680>
ulong value
{}
<byte 2684>
{reserved2c0_2ff[14] ((Offset 2C0-2FF) Reserved)}
<byte 2684>
ulong value
{}
<byte 2688>
{reserved2c0_2ff[15] ((Offset 2C0-2FF) Reserved)}
<byte 2688>
ulong value
{}
<byte 2692>
{pcifcgr ((Offset 300-3FF) PCI Configuration Registers)}
<byte 2692>
union devid (Offset x02) PCI Device ID
<byte 2692>
{field (By field)}
<byte 2692>
bits:16 id Vendor ID
{}
or devid (Offset x02) PCI Device ID
<byte 2692>
ushort value As word
endunion devid (Offset x02) PCI Device ID
<byte 2694>
union vendid (Offset x00) PCI Vendor ID Configuration
<byte 2694>
{field (By field)}
<byte 2694>
bits:16 id Vendor ID
{}
or vendid (Offset x00) PCI Vendor ID Configuration
<byte 2694>
ushort value As word
endunion vendid (Offset x00) PCI Vendor ID Configuration
<byte 2696>
union p_cfgstat (Offset x06) PCI Primary PCI Status
<byte 2696>
{field (By field)}
<byte 2696>
bits:4 rsvd Reserved
bits:1 cpl New Capabilities
bits:1 cap66mhz 66MHz Capable
bits:1 udfsup UDF Supported (read only, always returns 0)
bits:1 capfbbw Fast Back-to-Back Capable (read only, always returns 0)
bits:1 dperr Data Parity Error Detected
bits:2 devsel_time PCI_DEVSEL# response timing (read only, always returns 1)
bits:1 sgnltabrt Signaled Target Abort
bits:1 rcvdtabrt Received Target Abort
bits:1 rcvdmabrt Received Master Abort
bits:1 sgnlsyserr Signaled System Error
bits:1 perr Detected Parity Error
{}
or p_cfgstat (Offset x06) PCI Primary PCI Status
<byte 2696>
ushort value As word
endunion p_cfgstat (Offset x06) PCI Primary PCI Status
<byte 2698>
union cfgcmd (Offset x04) PCI Configuration Command
<byte 2698>
{field (By field)}
<byte 2698>
bits:1 io_access I/O Access Control
bits:1 mem_access Memory Access Control
bits:1 pcim_en PCI Master Enable
bits:1 scycle_en Special Cycle Enable (read only, always returns 0)
bits:1 memwinv Memory Write & Invalidate
bits:1 paltsnp_en Palette Snooping Enable (read only, always returns 0)
bits:1 perrrsp Parity Error Response
bits:1 waitcycctrl Wait Cycle Control
bits:1 serrx_en SERR# Enable
bits:1 fbbw_en Fast Back-to-Back Write enable (read only, always returns 0)
bits:6 rsvd Reserved
{}
or cfgcmd (Offset x04) PCI Configuration Command
<byte 2698>
ushort value As word
endunion cfgcmd (Offset x04) PCI Configuration Command
<byte 2700>
union clscode (Offset x09) PCI Class Code
<byte 2700>
{field (By field)}
<byte 2700>
tbits:8 baseclcode Base Class Code
<byte 2701>
tbits:8 subclcode Subclass Code
<byte 2702>
tbits:8 reglevpi Register Level Programming Interface
{}
or clscode (Offset x09) PCI Class Code
<byte 2700>
utiny[3] value As byte array
endunion clscode (Offset x09) PCI Class Code
<byte 2703>
union revid (Offset x08) PCI Revision ID
<byte 2703>
{field (By field)}
<byte 2703>
tbits:8 id Revision ID
{}
or revid (Offset x08) PCI Revision ID
<byte 2703>
utiny value As byte
endunion revid (Offset x08) PCI Revision ID
<byte 2704>
union bist (Offset x0F) PCI BIST
<byte 2704>
{field (By field)}
<byte 2704>
tbits:4 cc Completion Code
tbits:2 rsvd Reserved
tbits:1 selftest Self Test
tbits:1 supported BIST Supported
{}
or bist (Offset x0F) PCI BIST
<byte 2704>
utiny value As byte
endunion bist (Offset x0F) PCI BIST
<byte 2705>
union hdrtype (Offset x0E) PCI Header Type
<byte 2705>
{field (By field)}
<byte 2705>
tbits:8 type PCI header type (read only)
{}
or hdrtype (Offset x0E) PCI Header Type
<byte 2705>
utiny value As byte
endunion hdrtype (Offset x0E) PCI Header Type
<byte 2706>
union p_lattim (Offset x0D) PCI Primary PCI Latency Timer
<byte 2706>
{field (By field)}
<byte 2706>
tbits:8 tmr PCI latency timer
{}
or p_lattim (Offset x0D) PCI Primary PCI Latency Timer
<byte 2706>
utiny value As byte
endunion p_lattim (Offset x0D) PCI Primary PCI Latency Timer
<byte 2707>
union clssize (Offset x0C) PCI Cache Line Size
<byte 2707>
{field (By field)}
<byte 2707>
tbits:8 size PCI cache line size
{}
or clssize (Offset x0C) PCI Cache Line Size
<byte 2707>
utiny value As byte
endunion clssize (Offset x0C) PCI Cache Line Size
<byte 2708>
union p_i2o_base (Offset x10) Primary I2O Memory Base
<byte 2708>
{field (By field)}
<byte 2708>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:14 rsvd Reserved
lbits:14 baseaddr Base Address
{}
or p_i2o_base (Offset x10) Primary I2O Memory Base
<byte 2708>
ulong value As longword
endunion p_i2o_base (Offset x10) Primary I2O Memory Base
<byte 2712>
{reservedx14_x17 ((Offset x14) (Reserved))}
<byte 2712>
ulong value
{}
<byte 2716>
union s_lattim (Offset x1B) Secondary PCI Latency Timer
<byte 2716>
{field (By field)}
<byte 2716>
tbits:8 tmr PCI latency timer
{}
or s_lattim (Offset x1B) Secondary PCI Latency Timer
<byte 2716>
utiny value As byte
endunion s_lattim (Offset x1B) Secondary PCI Latency Timer
<byte 2717>
union sb_busnum (Offset x1A) Secondary Subordinate PCI Bus Number
<byte 2717>
{field (By field)}
<byte 2717>
tbits:8 bn PCI Bus Number
{}
or sb_busnum (Offset x1A) Secondary Subordinate PCI Bus Number
<byte 2717>
utiny value As byte
endunion sb_busnum (Offset x1A) Secondary Subordinate PCI Bus Number
<byte 2718>
union sc_busnum (Offset x19) Secondary PCI Bus Number
<byte 2718>
{field (By field)}
<byte 2718>
tbits:8 bn PCI Bus Number
{}
or sc_busnum (Offset x19) Secondary PCI Bus Number
<byte 2718>
utiny value As byte
endunion sc_busnum (Offset x19) Secondary PCI Bus Number
<byte 2719>
union p_busnum (Offset x18) Primary PCI Bus Number
<byte 2719>
{field (By field)}
<byte 2719>
tbits:8 bn PCI Bus Number
{}
or p_busnum (Offset x18) Primary PCI Bus Number
<byte 2719>
utiny value As byte
endunion p_busnum (Offset x18) Primary PCI Bus Number
<byte 2720>
union s_cfgstat (Offset x1E) PCI Secondary PCI Status
<byte 2720>
{field (By field)}
<byte 2720>
bits:4 rsvd Reserved
bits:1 cpl New Capabilities
bits:1 cap66mhz 66MHz Capable
bits:1 udfsup UDF Supported (read only, always returns 0)
bits:1 capfbbw Fast Back-to-Back Capable (read only, always returns 0)
bits:1 dperr Data Parity Error Detected
bits:2 devsel_time PCI_DEVSEL# response timing (read only, always returns 1)
bits:1 sgnltabrt Signaled Target Abort
bits:1 rcvdtabrt Received Target Abort
bits:1 rcvdmabrt Received Master Abort
bits:1 sgnlsyserr Signaled System Error
bits:1 perr Detected Parity Error
{}
or s_cfgstat (Offset x1E) PCI Secondary PCI Status
<byte 2720>
ushort value As word
endunion s_cfgstat (Offset x1E) PCI Secondary PCI Status
<byte 2722>
union io_liml (Offset x1D) Lower I/O Base Limit
<byte 2722>
{field (By field)}
<byte 2722>
tbits:4 ro Read only as 1
tbits:4 limitaddress Limit Address
{}
or io_liml (Offset x1D) Lower I/O Base Limit
<byte 2722>
utiny value As byte
endunion io_liml (Offset x1D) Lower I/O Base Limit
<byte 2723>
union io_basel (Offset x1C) Lower I/O Base Address
<byte 2723>
{field (By field)}
<byte 2723>
tbits:4 ro Read only as 1
tbits:4 address Bottom Address
{}
or io_basel (Offset x1C) Lower I/O Base Address
<byte 2723>
utiny value As byte
endunion io_basel (Offset x1C) Lower I/O Base Address
<byte 2724>
union p_pci_lim_1 (Offset x22) Primary PCI Memory Limit 1
<byte 2724>
{field (By field)}
<byte 2724>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or p_pci_lim_1 (Offset x22) Primary PCI Memory Limit 1
<byte 2724>
ushort value As word
endunion p_pci_lim_1 (Offset x22) Primary PCI Memory Limit 1
<byte 2726>
union p_pci_base_1 (Offset x20) Primary PCI Memory Base 1
<byte 2726>
{field (By field)}
<byte 2726>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or p_pci_base_1 (Offset x20) Primary PCI Memory Base 1
<byte 2726>
ushort value As word
endunion p_pci_base_1 (Offset x20) Primary PCI Memory Base 1
<byte 2728>
union p_pci_lim_3l (Offset x26) Primary PCI Memory Lower Limit 3
<byte 2728>
{field (By field)}
<byte 2728>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or p_pci_lim_3l (Offset x26) Primary PCI Memory Lower Limit 3
<byte 2728>
ushort value As word
endunion p_pci_lim_3l (Offset x26) Primary PCI Memory Lower Limit 3
<byte 2730>
union p_pci_base_3l (Offset x24) Primary PCI Memory Lower Base 3
<byte 2730>
{field (By field)}
<byte 2730>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or p_pci_base_3l (Offset x24) Primary PCI Memory Lower Base 3
<byte 2730>
ushort value As word
endunion p_pci_base_3l (Offset x24) Primary PCI Memory Lower Base 3
<byte 2732>
union p_pci_base_3u (Offset x28) Primary PCI Memory Upper Base 3
<byte 2732>
{field (By field)}
<byte 2732>
lbits:32 upperaddr Upper 32-bit Base Address
{}
or p_pci_base_3u (Offset x28) Primary PCI Memory Upper Base 3
<byte 2732>
ulong value As longword
endunion p_pci_base_3u (Offset x28) Primary PCI Memory Upper Base 3
<byte 2736>
union p_pci_lim_3u (Offset x2C) Primary PCI Memory Upper Limit 3
<byte 2736>
{field (By field)}
<byte 2736>
lbits:32 upperaddr Upper 32-bit Limit Address
{}
or p_pci_lim_3u (Offset x2C) Primary PCI Memory Upper Limit 3
<byte 2736>
ulong value As longword
endunion p_pci_lim_3u (Offset x2C) Primary PCI Memory Upper Limit 3
<byte 2740>
union io_limu (Offset x32) Upper I/O Base Limit
<byte 2740>
{field (By field)}
<byte 2740>
bits:16 upperaddr Upper 32-bit Limit Address
{}
or io_limu (Offset x32) Upper I/O Base Limit
<byte 2740>
ushort value As word
endunion io_limu (Offset x32) Upper I/O Base Limit
<byte 2742>
union io_baseu (Offset x30) Upper I/O Base Address
<byte 2742>
{field (By field)}
<byte 2742>
bits:16 upperaddr Upper 32-bit Address
{}
or io_baseu (Offset x30) Upper I/O Base Address
<byte 2742>
ushort value As word
endunion io_baseu (Offset x30) Upper I/O Base Address
<byte 2744>
{reservedx35_x37[2] ((Offset x35-x37) Reserved)}
<byte 2744>
utiny value
{}
<byte 2745>
{reservedx35_x37[1] ((Offset x35-x37) Reserved)}
<byte 2745>
utiny value
{}
<byte 2746>
{reservedx35_x37[0] ((Offset x35-x37) Reserved)}
<byte 2746>
utiny value
{}
<byte 2747>
union cap_ptr (Offset x34) Capabilities List Pointer
<byte 2747>
{field (By field)}
<byte 2747>
tbits:8 offset Offset to the next item in the capabilities linked list
{}
or cap_ptr (Offset x34) Capabilities List Pointer
<byte 2747>
utiny value As byte
endunion cap_ptr (Offset x34) Capabilities List Pointer
<byte 2748>
union p_rombase (Offset x38) Primary ROM Base Address
<byte 2748>
{field (By field)}
<byte 2748>
lbits:1 eromsd Enable ROM Space Decode
lbits:19 rsvd Reserved
lbits:12 baseaddr Base Address
{}
or p_rombase (Offset x38) Primary ROM Base Address
<byte 2748>
ulong value As longword
endunion p_rombase (Offset x38) Primary ROM Base Address
<byte 2752>
union brdgctr (Offset x3E) Bridge Control
<byte 2752>
{field (By field)}
<byte 2752>
bits:1 pere Parity Error Response Enable
bits:1 se SERR# Enable
bits:1 ie ISA Enable
bits:1 ve VGA Enable
bits:1 rsvd2 Reserved
bits:1 mam Master Abort Mode
bits:5 rsvd1 Reserved
bits:1 dtse Discard Timer SERR Enable
bits:4 rsvd Reserved
{}
or brdgctr (Offset x3E) Bridge Control
<byte 2752>
ushort value As word
endunion brdgctr (Offset x3E) Bridge Control
<byte 2754>
{reservedx3c_x3d ((Offset x3C-x3D) Reserved)}
<byte 2754>
ushort value
{}
<byte 2756>
union p_arbctr (Offset x42) Primary Arbiter Control
<byte 2756>
{field (By field)}
<byte 2756>
bits:1 a0 Agent 0
bits:1 a1 Agent 1
bits:1 a2 Agent 2
bits:1 a3 Agent 3
bits:1 a4 Agent 4
bits:1 a5 Agent 5
bits:1 a6 Agent 6
bits:8 rsvd Reserved
bits:1 exclusive Exclusive Access
{}
or p_arbctr (Offset x42) Primary Arbiter Control
<byte 2756>
ushort value As word
endunion p_arbctr (Offset x42) Primary Arbiter Control
<byte 2758>
union s_arbctr (Offset x40) Secondary Arbiter Control
<byte 2758>
{field (By field)}
<byte 2758>
bits:1 a0 Agent 0
bits:1 a1 Agent 1
bits:1 a2 Agent 2
bits:1 a3 Agent 3
bits:1 a4 Agent 4
bits:1 a5 Agent 5
bits:1 a6 Agent 6
bits:8 rsvd Reserved
bits:1 exclusive Exclusive Access
{}
or s_arbctr (Offset x40) Secondary Arbiter Control
<byte 2758>
ushort value As word
endunion s_arbctr (Offset x40) Secondary Arbiter Control
<byte 2760>
union pathctr (Offset x44) Path Control
<byte 2760>
{field (By field)}
<byte 2760>
lbits:1 ppcib1ede Primary PCI Base 1 Exclusive Decoding Enable
lbits:1 ppcib2ede Primary PCI Base 2 Exclusive Decoding Enable
lbits:1 ppcib3ede Primary PCI Base 3 Exclusive Decoding Enable
lbits:1 ppcib4ede Primary PCI Base 4 Exclusive Decoding Enable
lbits:1 pioede Primary I/O Exclusive Decoding Enable
lbits:1 rsvd1 Reserved
lbits:1 pxorde Primary XOR Decoding Enable
lbits:1 pwce Primary Wait Count Enable
lbits:8 pwc Primary Wait Count
lbits:1 spcib1ede Secondary PCI Base 1 Exclusive Decoding Enable
lbits:1 spcib2ede Secondary PCI Base 2 Exclusive Decoding Enable
lbits:1 spcib3ede Secondary PCI Base 3 Exclusive Decoding Enable
lbits:1 spcib4ede Secondary PCI Base 4 Exclusive Decoding Enable
lbits:2 rsvd Reserved
lbits:1 sxorde Secondary XOR Decoding Enable
lbits:1 swce Secondary Wait Count Enable
lbits:8 swc Secondary Wait Count
{}
or pathctr (Offset x44) Path Control
<byte 2760>
ulong value As longword
endunion pathctr (Offset x44) Path Control
<byte 2764>
union cfgctr (Offset x48) Configuration Control
<byte 2764>
{field (By field)}
<byte 2764>
lbits:1 bm Bridge Mode
lbits:1 rsvd2 Reserved
lbits:1 cv Configuration Valid
lbits:1 ncapd New Capabilities Disable
lbits:1 d2pmse D2 Power Management State Enable
lbits:5 rsvd1 Reserved
lbits:1 cvto Configuration Valid Timeout
lbits:1 sbus64 Attached Secondary PCI Bus Capable of 64-bit Operation
lbits:1 pbus64 Attached Primary PCI Bus Capable of 64-bit Operation
lbits:1 sm66en Attached Secondary PCI Bus Operating at 66 MHz
lbits:1 pm66en Attached Primary PCI Bus Operating at 66 MHz
lbits:17 rsvd Reserved
{}
or cfgctr (Offset x48) Configuration Control
<byte 2764>
ulong value As longword
endunion cfgctr (Offset x48) Configuration Control
<byte 2768>
union s_rombase (Offset x4C) Secondary ROM Base Address
<byte 2768>
{field (By field)}
<byte 2768>
lbits:1 eromsd Enable ROM Space Decode
lbits:19 rsvd Reserved
lbits:12 baseaddr Base Address
{}
or s_rombase (Offset x4C) Secondary ROM Base Address
<byte 2768>
ulong value As longword
endunion s_rombase (Offset x4C) Secondary ROM Base Address
<byte 2772>
union p_mctrl (Offset x53) Primary Master Control
<byte 2772>
{field (By field)}
<byte 2772>
tbits:1 ltdppm Latency Timer Disable
tbits:1 emrmmrlcecl Enable MRM and MRL Completion to End of Cache Line
tbits:1 pmrrde PCI Memory Read Round Down Enable
tbits:5 rsvd Reserved
{}
or p_mctrl (Offset x53) Primary Master Control
<byte 2772>
utiny value As byte
endunion p_mctrl (Offset x53) Primary Master Control
<byte 2773>
union s_mctrl (Offset x52) Secondary Master Control
<byte 2773>
{field (By field)}
<byte 2773>
tbits:1 ltdppm Latency Timer Disable
tbits:1 emrmmrlcecl Enable MRM and MRL Completion to End of Cache Line
tbits:1 pmrrde PCI Memory Read Round Down Enable
tbits:5 rsvd Reserved
{}
or s_mctrl (Offset x52) Secondary Master Control
<byte 2773>
utiny value As byte
endunion s_mctrl (Offset x52) Secondary Master Control
<byte 2774>
union debug (Offset x50) Debug/Test
<byte 2774>
{field (By field)}
<byte 2774>
bits:1 epcmps Enable Primary Configuration Mode, Primary Side
bits:1 et1ccrps Enable Type 1 Configuration Cycle Response, Primary Side
bits:1 epcmss Enable Primary Configuration Mode, Secondary Side
bits:1 et1ccrss Enable Type 1 Configuration Cycle Response, Secondary Side
bits:1 pmwi Primary MWI
bits:1 smwi Secondary MWI
bits:1 ppb64bd Primary PCI Bus 64-Bit Disable
bits:1 spb64bd Secondary PCI Bus 64-Bit Disable
bits:6 rsvd1 Reserved
bits:1 dsr DRAM Software Reset
bits:1 rsvd Reserved
{}
or debug (Offset x50) Debug/Test
<byte 2774>
ushort value As word
endunion debug (Offset x50) Debug/Test
<byte 2776>
union p_i2o_size (Offset x56) Primary I2O Size
<byte 2776>
{field (By field)}
<byte 2776>
bits:2 ro Read only as 0
bits:14 size Memory Range Size
{}
or p_i2o_size (Offset x56) Primary I2O Size
<byte 2776>
ushort value As word
endunion p_i2o_size (Offset x56) Primary I2O Size
<byte 2778>
union i2octr (Offset x54) I2O Control
<byte 2778>
{field (By field)}
<byte 2778>
bits:1 efspci Enable FIFOs in Secondary PCI
bits:1 mfspci Message Frames in Secondary PCI
bits:14 rsvd Reserved
{}
or i2octr (Offset x54) I2O Control
<byte 2778>
ushort value As word
endunion i2octr (Offset x54) I2O Control
<byte 2780>
union s_i2o_size (Offset x5A) Secondary I2O Size
<byte 2780>
{field (By field)}
<byte 2780>
bits:2 ro Read only as 0
bits:14 size Memory Range Size
{}
or s_i2o_size (Offset x5A) Secondary I2O Size
<byte 2780>
ushort value As word
endunion s_i2o_size (Offset x5A) Secondary I2O Size
<byte 2782>
union s_i2o_base (Offset x58) Secondary I2O Memory Base
<byte 2782>
{field (By field)}
<byte 2782>
bits:2 ro Read only as 0
bits:14 address 32-bit Base Address
{}
or s_i2o_base (Offset x58) Secondary I2O Memory Base
<byte 2782>
ushort value As word
endunion s_i2o_base (Offset x58) Secondary I2O Memory Base
<byte 2784>
union m_i2o_adr (Offset x5E) Message Frame Base
<byte 2784>
{field (By field)}
<byte 2784>
bits:2 ro Read only as 0
bits:14 address 32-bit Base Address
{}
or m_i2o_adr (Offset x5E) Message Frame Base
<byte 2784>
ushort value As word
endunion m_i2o_adr (Offset x5E) Message Frame Base
<byte 2786>
union f_i2o_adr (Offset x5C) FIFO Memory Base
<byte 2786>
{field (By field)}
<byte 2786>
bits:2 ro Read only as 0
bits:14 address 32-bit Base Address
{}
or f_i2o_adr (Offset x5C) FIFO Memory Base
<byte 2786>
ushort value As word
endunion f_i2o_adr (Offset x5C) FIFO Memory Base
<byte 2788>
union p_pci_size_2 (Offset x62) Primary PCI Memory Size
<byte 2788>
{field (By field)}
<byte 2788>
bits:4 ro Read only (probably as 4)
bits:12 size Memory Range Size
{}
or p_pci_size_2 (Offset x62) Primary PCI Memory Size
<byte 2788>
ushort value As word
endunion p_pci_size_2 (Offset x62) Primary PCI Memory Size
<byte 2790>
union p_pci_base_2 (Offset x60) Primary PCI Memory Base 2
<byte 2790>
{field (By field)}
<byte 2790>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or p_pci_base_2 (Offset x60) Primary PCI Memory Base 2
<byte 2790>
ushort value As word
endunion p_pci_base_2 (Offset x60) Primary PCI Memory Base 2
<byte 2792>
union p_pci_lim_4 (Offset x66) Primary PCI Memory Limit 4
<byte 2792>
{field (By field)}
<byte 2792>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or p_pci_lim_4 (Offset x66) Primary PCI Memory Limit 4
<byte 2792>
ushort value As word
endunion p_pci_lim_4 (Offset x66) Primary PCI Memory Limit 4
<byte 2794>
union p_pci_base_4l (Offset x64) Primary PCI Memory Lower Base 4
<byte 2794>
{field (By field)}
<byte 2794>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or p_pci_base_4l (Offset x64) Primary PCI Memory Lower Base 4
<byte 2794>
ushort value As word
endunion p_pci_base_4l (Offset x64) Primary PCI Memory Lower Base 4
<byte 2796>
union p_pci_base_4u (Offset x68) Primary PCI Memory Upper Base 4
<byte 2796>
{field (By field)}
<byte 2796>
lbits:32 upperaddr Upper 32-bit Base Address
{}
or p_pci_base_4u (Offset x68) Primary PCI Memory Upper Base 4
<byte 2796>
ulong value As longword
endunion p_pci_base_4u (Offset x68) Primary PCI Memory Upper Base 4
<byte 2800>
union s_pci_lim_1 (Offset x6E) Secondary PCI Memory Limit 1
<byte 2800>
{field (By field)}
<byte 2800>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or s_pci_lim_1 (Offset x6E) Secondary PCI Memory Limit 1
<byte 2800>
ushort value As word
endunion s_pci_lim_1 (Offset x6E) Secondary PCI Memory Limit 1
<byte 2802>
union s_pci_base_1 (Offset x6C) Secondary PCI Memory Base 1
<byte 2802>
{field (By field)}
<byte 2802>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or s_pci_base_1 (Offset x6C) Secondary PCI Memory Base 1
<byte 2802>
ushort value As word
endunion s_pci_base_1 (Offset x6C) Secondary PCI Memory Base 1
<byte 2804>
union s_pci_size_2 (Offset x72) Secondary PCI Memory Size 2
<byte 2804>
{field (By field)}
<byte 2804>
bits:4 ro Read only (probably as 4)
bits:12 size Memory Range Size
{}
or s_pci_size_2 (Offset x72) Secondary PCI Memory Size 2
<byte 2804>
ushort value As word
endunion s_pci_size_2 (Offset x72) Secondary PCI Memory Size 2
<byte 2806>
union s_pci_base_2 (Offset x70) Secondary PCI Memory Base 2
<byte 2806>
{field (By field)}
<byte 2806>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or s_pci_base_2 (Offset x70) Secondary PCI Memory Base 2
<byte 2806>
ushort value As word
endunion s_pci_base_2 (Offset x70) Secondary PCI Memory Base 2
<byte 2808>
union s_pci_lim_3l (Offset x76) Secondary PCI Memory Lower Limit 3
<byte 2808>
{field (By field)}
<byte 2808>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or s_pci_lim_3l (Offset x76) Secondary PCI Memory Lower Limit 3
<byte 2808>
ushort value As word
endunion s_pci_lim_3l (Offset x76) Secondary PCI Memory Lower Limit 3
<byte 2810>
union s_pci_base_3l (Offset x74) Secondary PCI Memory Lower Base 3
<byte 2810>
{field (By field)}
<byte 2810>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or s_pci_base_3l (Offset x74) Secondary PCI Memory Lower Base 3
<byte 2810>
ushort value As word
endunion s_pci_base_3l (Offset x74) Secondary PCI Memory Lower Base 3
<byte 2812>
union s_pci_base_3u (Offset x78) Secondary PCI Memory Upper Base 3
<byte 2812>
{field (By field)}
<byte 2812>
lbits:32 upperaddr Upper 32-bit Base Address
{}
or s_pci_base_3u (Offset x78) Secondary PCI Memory Upper Base 3
<byte 2812>
ulong value As longword
endunion s_pci_base_3u (Offset x78) Secondary PCI Memory Upper Base 3
<byte 2816>
union s_pci_lim_3u (Offset x7C) Secondary PCI Memory Upper Limit 3
<byte 2816>
{field (By field)}
<byte 2816>
lbits:32 upperaddr Upper 32-bit Limit Address
{}
or s_pci_lim_3u (Offset x7C) Secondary PCI Memory Upper Limit 3
<byte 2816>
ulong value As longword
endunion s_pci_lim_3u (Offset x7C) Secondary PCI Memory Upper Limit 3
<byte 2820>
union s_pci_lim_4l (Offset x82) Secondary PCI Memory Lower Limit 4
<byte 2820>
{field (By field)}
<byte 2820>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or s_pci_lim_4l (Offset x82) Secondary PCI Memory Lower Limit 4
<byte 2820>
ushort value As word
endunion s_pci_lim_4l (Offset x82) Secondary PCI Memory Lower Limit 4
<byte 2822>
union s_pci_base_4l (Offset x80) Secondary PCI Memory Lower Base 4
<byte 2822>
{field (By field)}
<byte 2822>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or s_pci_base_4l (Offset x80) Secondary PCI Memory Lower Base 4
<byte 2822>
ushort value As word
endunion s_pci_base_4l (Offset x80) Secondary PCI Memory Lower Base 4
<byte 2824>
union s_pci_base_4u (Offset x84) Secondary PCI Memory Upper Base 4
<byte 2824>
{field (By field)}
<byte 2824>
lbits:32 upperaddr Upper 32-bit Base Address
{}
or s_pci_base_4u (Offset x84) Secondary PCI Memory Upper Base 4
<byte 2824>
ulong value As longword
endunion s_pci_base_4u (Offset x84) Secondary PCI Memory Upper Base 4
<byte 2828>
union s_pci_tadr_1 (Offset x8A) Secondary PCI Translation 1
<byte 2828>
{field (By field)}
<byte 2828>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or s_pci_tadr_1 (Offset x8A) Secondary PCI Translation 1
<byte 2828>
ushort value As word
endunion s_pci_tadr_1 (Offset x8A) Secondary PCI Translation 1
<byte 2830>
union p_pci_tadr_1 (Offset x88) Primary PCI Translation 1
<byte 2830>
{field (By field)}
<byte 2830>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or p_pci_tadr_1 (Offset x88) Primary PCI Translation 1
<byte 2830>
ushort value As word
endunion p_pci_tadr_1 (Offset x88) Primary PCI Translation 1
<byte 2832>
union s_pci_tadr_2l (Offset x8E) Lower Secondary PCI Translation 2
<byte 2832>
{field (By field)}
<byte 2832>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or s_pci_tadr_2l (Offset x8E) Lower Secondary PCI Translation 2
<byte 2832>
ushort value As word
endunion s_pci_tadr_2l (Offset x8E) Lower Secondary PCI Translation 2
<byte 2834>
union p_pci_tadr_2l (Offset x8C) Lower Primary PCI Translation 2
<byte 2834>
{field (By field)}
<byte 2834>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or p_pci_tadr_2l (Offset x8C) Lower Primary PCI Translation 2
<byte 2834>
ushort value As word
endunion p_pci_tadr_2l (Offset x8C) Lower Primary PCI Translation 2
<byte 2836>
union p_pci_tadr_2u (Offset x90) Upper Primary PCI Translation 2
<byte 2836>
{field (By field)}
<byte 2836>
lbits:32 address Translation Address
{}
or p_pci_tadr_2u (Offset x90) Upper Primary PCI Translation 2
<byte 2836>
ulong value As longword
endunion p_pci_tadr_2u (Offset x90) Upper Primary PCI Translation 2
<byte 2840>
union s_pci_tadr_2u (Offset x94) Upper Secondary PCI Translation 2
<byte 2840>
{field (By field)}
<byte 2840>
lbits:32 address Translation Address
{}
or s_pci_tadr_2u (Offset x94) Upper Secondary PCI Translation 2
<byte 2840>
ulong value As longword
endunion s_pci_tadr_2u (Offset x94) Upper Secondary PCI Translation 2
<byte 2844>
union s_pci_tadr_3l (Offset x9A) Lower Secondary PCI Translater 3
<byte 2844>
{field (By field)}
<byte 2844>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or s_pci_tadr_3l (Offset x9A) Lower Secondary PCI Translater 3
<byte 2844>
ushort value As word
endunion s_pci_tadr_3l (Offset x9A) Lower Secondary PCI Translater 3
<byte 2846>
union p_pci_tadr_3l (Offset x98) Lower Primary PCI Translation 3
<byte 2846>
{field (By field)}
<byte 2846>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or p_pci_tadr_3l (Offset x98) Lower Primary PCI Translation 3
<byte 2846>
ushort value As word
endunion p_pci_tadr_3l (Offset x98) Lower Primary PCI Translation 3
<byte 2848>
union p_pci_tadr_3u (Offset x9C) Upper Primary PCI Translation 3
<byte 2848>
{field (By field)}
<byte 2848>
lbits:32 address Translation Address
{}
or p_pci_tadr_3u (Offset x9C) Upper Primary PCI Translation 3
<byte 2848>
ulong value As longword
endunion p_pci_tadr_3u (Offset x9C) Upper Primary PCI Translation 3
<byte 2852>
union s_pci_tadr_3u (Offset xA0) Upper Secondary PCI Translation 3
<byte 2852>
{field (By field)}
<byte 2852>
lbits:32 address Translation Address
{}
or s_pci_tadr_3u (Offset xA0) Upper Secondary PCI Translation 3
<byte 2852>
ulong value As longword
endunion s_pci_tadr_3u (Offset xA0) Upper Secondary PCI Translation 3
<byte 2856>
union s_dram_tadr_1 (Offset xA6) Secondary DRAM Translation 1
<byte 2856>
{field (By field)}
<byte 2856>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or s_dram_tadr_1 (Offset xA6) Secondary DRAM Translation 1
<byte 2856>
ushort value As word
endunion s_dram_tadr_1 (Offset xA6) Secondary DRAM Translation 1
<byte 2858>
union p_dram_tadr_1 (Offset xA4) Primary DRAM Translation 1
<byte 2858>
{field (By field)}
<byte 2858>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or p_dram_tadr_1 (Offset xA4) Primary DRAM Translation 1
<byte 2858>
ushort value As word
endunion p_dram_tadr_1 (Offset xA4) Primary DRAM Translation 1
<byte 2860>
union s_dram_tadr_2 (Offset xAA) Secondary DRAM Translation 2
<byte 2860>
{field (By field)}
<byte 2860>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or s_dram_tadr_2 (Offset xAA) Secondary DRAM Translation 2
<byte 2860>
ushort value As word
endunion s_dram_tadr_2 (Offset xAA) Secondary DRAM Translation 2
<byte 2862>
union p_dram_tadr_2 (Offset xA8) Primary DRAM Translation 2
<byte 2862>
{field (By field)}
<byte 2862>
bits:1 trans Enable Translation
bits:3 ro Read only as 3
bits:12 address Translation Address
{}
or p_dram_tadr_2 (Offset xA8) Primary DRAM Translation 2
<byte 2862>
ushort value As word
endunion p_dram_tadr_2 (Offset xA8) Primary DRAM Translation 2
<byte 2864>
union p_dram_size_1 (Offset xAE) Primary DRAM Size 1
<byte 2864>
{field (By field)}
<byte 2864>
bits:4 ro Read only (probably as 4)
bits:12 size Memory Range Size
{}
or p_dram_size_1 (Offset xAE) Primary DRAM Size 1
<byte 2864>
ushort value As word
endunion p_dram_size_1 (Offset xAE) Primary DRAM Size 1
<byte 2866>
union p_dram_base_1 (Offset xAC) Primary DRAM Memory Base 1
<byte 2866>
{field (By field)}
<byte 2866>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or p_dram_base_1 (Offset xAC) Primary DRAM Memory Base 1
<byte 2866>
ushort value As word
endunion p_dram_base_1 (Offset xAC) Primary DRAM Memory Base 1
<byte 2868>
union p_dram_lim_2 (Offset xB2) Primary DRAM Memory Limit 2
<byte 2868>
{field (By field)}
<byte 2868>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or p_dram_lim_2 (Offset xB2) Primary DRAM Memory Limit 2
<byte 2868>
ushort value As word
endunion p_dram_lim_2 (Offset xB2) Primary DRAM Memory Limit 2
<byte 2870>
union p_dram_base_2 (Offset xB0) Primary DRAM Memory Base 2
<byte 2870>
{field (By field)}
<byte 2870>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or p_dram_base_2 (Offset xB0) Primary DRAM Memory Base 2
<byte 2870>
ushort value As word
endunion p_dram_base_2 (Offset xB0) Primary DRAM Memory Base 2
<byte 2872>
union p_dram_size_3 (Offset xB6) Primary DRAM Size 3
<byte 2872>
{field (By field)}
<byte 2872>
bits:1 ro Read only as 1
bits:15 size Memory Range Size
{}
or p_dram_size_3 (Offset xB6) Primary DRAM Size 3
<byte 2872>
ushort value As word
endunion p_dram_size_3 (Offset xB6) Primary DRAM Size 3
<byte 2874>
union p_dram_base_3l (Offset xB4) Primary Lower DRAM Memory Base 3
<byte 2874>
{field (By field)}
<byte 2874>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or p_dram_base_3l (Offset xB4) Primary Lower DRAM Memory Base 3
<byte 2874>
ushort value As word
endunion p_dram_base_3l (Offset xB4) Primary Lower DRAM Memory Base 3
<byte 2876>
union p_dram_base_3u (Offset xB8) Primary Upper DRAM Memory Base 3
<byte 2876>
{field (By field)}
<byte 2876>
lbits:32 upperaddr Upper 32-bit Base Address
{}
or p_dram_base_3u (Offset xB8) Primary Upper DRAM Memory Base 3
<byte 2876>
ulong value As longword
endunion p_dram_base_3u (Offset xB8) Primary Upper DRAM Memory Base 3
<byte 2880>
union s_dram_size_1 (Offset xBE) Secondary DRAM Memory Size 1
<byte 2880>
{field (By field)}
<byte 2880>
bits:4 ro Read only (probably as 4)
bits:12 size Memory Range Size
{}
or s_dram_size_1 (Offset xBE) Secondary DRAM Memory Size 1
<byte 2880>
ushort value As word
endunion s_dram_size_1 (Offset xBE) Secondary DRAM Memory Size 1
<byte 2882>
union s_dram_base_1 (Offset xBC) Secondary DRAM Memory Base 1
<byte 2882>
{field (By field)}
<byte 2882>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or s_dram_base_1 (Offset xBC) Secondary DRAM Memory Base 1
<byte 2882>
ushort value As word
endunion s_dram_base_1 (Offset xBC) Secondary DRAM Memory Base 1
<byte 2884>
union s_dram_lim_2 (Offset xC2) Secondary DRAM Memory Limit 2
<byte 2884>
{field (By field)}
<byte 2884>
bits:4 ro Read only as 4
bits:12 upperaddr Upper 32-bit Limit Address
{}
or s_dram_lim_2 (Offset xC2) Secondary DRAM Memory Limit 2
<byte 2884>
ushort value As word
endunion s_dram_lim_2 (Offset xC2) Secondary DRAM Memory Limit 2
<byte 2886>
union s_dram_base_2 (Offset xC0) Secondary DRAM Memory Base 2
<byte 2886>
{field (By field)}
<byte 2886>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or s_dram_base_2 (Offset xC0) Secondary DRAM Memory Base 2
<byte 2886>
ushort value As word
endunion s_dram_base_2 (Offset xC0) Secondary DRAM Memory Base 2
<byte 2888>
union s_dram_size_3 (Offset xC6) Secondary DRAM Size 3
<byte 2888>
{field (By field)}
<byte 2888>
bits:1 ro Read only as 1
bits:15 size Memory Range Size
{}
or s_dram_size_3 (Offset xC6) Secondary DRAM Size 3
<byte 2888>
ushort value As word
endunion s_dram_size_3 (Offset xC6) Secondary DRAM Size 3
<byte 2890>
union s_dram_base_3l (Offset xC4) Secondary Lower DRAM Memory Base 3
<byte 2890>
{field (By field)}
<byte 2890>
bits:4 ro Read only as 4
bits:12 address 32-bit Base Address
{}
or s_dram_base_3l (Offset xC4) Secondary Lower DRAM Memory Base 3
<byte 2890>
ushort value As word
endunion s_dram_base_3l (Offset xC4) Secondary Lower DRAM Memory Base 3
<byte 2892>
union s_dram_base_3u (Offset xC8) Secondary Upper DRAM Memory Base 3
<byte 2892>
{field (By field)}
<byte 2892>
lbits:32 upperaddr Upper 32-bit Base Address
{}
or s_dram_base_3u (Offset xC8) Secondary Upper DRAM Memory Base 3
<byte 2892>
ulong value As longword
endunion s_dram_base_3u (Offset xC8) Secondary Upper DRAM Memory Base 3
<byte 2896>
union p_io_base (Offset xCC) Primary I/O Base
<byte 2896>
{field (By field)}
<byte 2896>
lbits:8 rsvd Reserved
lbits:24 address Base Address
{}
or p_io_base (Offset xCC) Primary I/O Base
<byte 2896>
ulong value As longword
endunion p_io_base (Offset xCC) Primary I/O Base
<byte 2900>
union p_xor_base (Offset xD0) Primary XOR Base
<byte 2900>
{field (By field)}
<byte 2900>
lbits:8 rsvd Reserved
lbits:24 address Base Address
{}
or p_xor_base (Offset xD0) Primary XOR Base
<byte 2900>
ulong value As longword
endunion p_xor_base (Offset xD0) Primary XOR Base
<byte 2904>
{reservedxd4_xd7 ((Offset xD4) Reserved)}
<byte 2904>
ulong value
{}
<byte 2908>
union s_xor_base (Offset xD8) Secondary XOR Base
<byte 2908>
{field (By field)}
<byte 2908>
lbits:8 rsvd Reserved
lbits:24 address Base Address
{}
or s_xor_base (Offset xD8) Secondary XOR Base
<byte 2908>
ulong value As longword
endunion s_xor_base (Offset xD8) Secondary XOR Base
<byte 2912>
union sid (Offset xDE) PCI Subsystem ID
<byte 2912>
{field (By field)}
<byte 2912>
bits:16 id Vendor ID
{}
or sid (Offset xDE) PCI Subsystem ID
<byte 2912>
ushort value As word
endunion sid (Offset xDE) PCI Subsystem ID
<byte 2914>
union svid (Offset xDC) PCI Subsystem Vendor ID
<byte 2914>
{field (By field)}
<byte 2914>
bits:16 id Vendor ID
{}
or svid (Offset xDC) PCI Subsystem Vendor ID
<byte 2914>
ushort value As word
endunion svid (Offset xDC) PCI Subsystem Vendor ID
<byte 2916>
union rom_tadr (Offset xE0) ROM Base Translation
<byte 2916>
{field (By field)}
<byte 2916>
lbits:1 ptrans Enable P_ROMBASE[31:20] Translation
lbits:1 strans Enable S_ROMBASE[31:20] Translation
lbits:18 rsvd Reserved
lbits:12 address Translation Address
{}
or rom_tadr (Offset xE0) ROM Base Translation
<byte 2916>
ulong value As longword
endunion rom_tadr (Offset xE0) ROM Base Translation
<byte 2920>
{reservedxe4_xef[0] ((Offset xE4-xEF) Reserved)}
<byte 2920>
ulong value
{}
<byte 2924>
{reservedxe4_xef[1] ((Offset xE4-xEF) Reserved)}
<byte 2924>
ulong value
{}
<byte 2928>
{reservedxe4_xef[2] ((Offset xE4-xEF) Reserved)}
<byte 2928>
ulong value
{}
<byte 2932>
union pm_cap (Offset xF2) Power Management Capabilities
<byte 2932>
{field (By field)}
<byte 2932>
bits:3 ver PCI Power Management Specification Version
bits:1 clk PME Clock
bits:1 aps Auxilliary Power Source
bits:1 dsi Device Specific Initialization
bits:3 rsvd Reserved
bits:1 d1 D1 Support
bits:1 d2 D2 Support
bits:5 pme PME Support
{}
or pm_cap (Offset xF2) Power Management Capabilities
<byte 2932>
ushort value As word
endunion pm_cap (Offset xF2) Power Management Capabilities
<byte 2934>
union next_cap_ptr_1 (Offset xF1) Next Capabilities Pointer 1
<byte 2934>
{field (By field)}
<byte 2934>
tbits:8 offset Offset to the next item in the capabilities linked list
{}
or next_cap_ptr_1 (Offset xF1) Next Capabilities Pointer 1
<byte 2934>
utiny value As byte
endunion next_cap_ptr_1 (Offset xF1) Next Capabilities Pointer 1
<byte 2935>
union pm_id (Offset xF0) Power Management Capabilities ID
<byte 2935>
{field (By field)}
<byte 2935>
tbits:8 cap_id Capability structure identifier
{}
or pm_id (Offset xF0) Power Management Capabilities ID
<byte 2935>
utiny value As byte
endunion pm_id (Offset xF0) Power Management Capabilities ID
<byte 2936>
union pm_data (Offset xF7) Power Management Data
<byte 2936>
{field (By field)}
<byte 2936>
tbits:8 data Power Management Data
{}
or pm_data (Offset xF7) Power Management Data
<byte 2936>
utiny value As byte
endunion pm_data (Offset xF7) Power Management Data
<byte 2937>
union pmcsr_bse (Offset xF6) PM CSR Bridge Support Extensions,
<byte 2937>
{field (By field)}
<byte 2937>
tbits:7 rsvd Reserved
tbits:1 control Bus Power/Clock Control Mechanism Support
{}
or pmcsr_bse (Offset xF6) PM CSR Bridge Support Extensions,
<byte 2937>
utiny value As byte
endunion pmcsr_bse (Offset xF6) PM CSR Bridge Support Extensions,
<byte 2938>
union pmcsr (Offset xF4) Power Management Control/Status
<byte 2938>
{field (By field)}
<byte 2938>
bits:2 pst Power State
bits:6 rsvd Reserved
bits:1 pen PME Enable
bits:4 sel Data Select
bits:2 scl Data Scale
bits:1 pme PME Status
{}
or pmcsr (Offset xF4) Power Management Control/Status
<byte 2938>
ushort value As word
endunion pmcsr (Offset xF4) Power Management Control/Status
<byte 2940>
union vpd_add (Offset xFA) Vital Product Data Address
<byte 2940>
{field (By field)}
<byte 2940>
bits:9 qaddr Vital Product Data Address
bits:6 qrsvd Reserved
bits:1 qvpdf VPD Flag
{}
or vpd_add (Offset xFA) Vital Product Data Address
<byte 2940>
ushort value As word
endunion vpd_add (Offset xFA) Vital Product Data Address
<byte 2942>
union next_cap_ptr_2 (Offset xF9) Next Capabilities Pointer 2
<byte 2942>
{field (By field)}
<byte 2942>
tbits:8 offset Offset to the next item in the capabilities linked list
{}
or next_cap_ptr_2 (Offset xF9) Next Capabilities Pointer 2
<byte 2942>
utiny value As byte
endunion next_cap_ptr_2 (Offset xF9) Next Capabilities Pointer 2
<byte 2943>
union vpd_id (Offset xF8) Vital Product Data Capabilities ID
<byte 2943>
{field (By field)}
<byte 2943>
tbits:8 cap_id Capability structure identifier
{}
or vpd_id (Offset xF8) Vital Product Data Capabilities ID
<byte 2943>
utiny value As byte
endunion vpd_id (Offset xF8) Vital Product Data Capabilities ID
<byte 2944>
union vpd_data (Offset xFC) Vital Product Data Data.
<byte 2944>
{field (By field)}
<byte 2944>
lbits:32 qdata VPD Data
{}
or vpd_data (Offset xFC) Vital Product Data Data.
<byte 2944>
ulong value As longword
endunion vpd_data (Offset xFC) Vital Product Data Data.
{}
{}
endunion csr Surge CSR Registers
{}
<byte 2948>
{g3_glue (G3 Glue register save area)}
<byte 2948>
union csr G3 Glue CSR Registers
<byte 2948>
ulong[85] csra G3 Glue CSR Registers As Longwords
or csr G3 Glue CSR Registers
<byte 2948>
{csr (G3 Glue CSR Registers By Field)}
<byte 2948>
union rev_cto (Offset 000) Revision/CPU Time Out
<byte 2948>
{field (By field)}
<byte 2948>
lbits:16 rsvd Reserved
lbits:8 ppc PowerPC transaction timeout down-counter value
lbits:4 rev Revision
lbits:3 rsvd1 Reserved
lbits:1 type Type
{}
or rev_cto (Offset 000) Revision/CPU Time Out
<byte 2948>
ulong value As longword
endunion rev_cto (Offset 000) Revision/CPU Time Out
<byte 2952>
{reserved04_07 ((Offset 004-007) Reserved)}
<byte 2952>
ulong value
{}
<byte 2956>
union ctl (Offset 008) Control
<byte 2956>
{field (By field)}
<byte 2956>
lbits:16 rsvd Reserved
lbits:1 anp Disable Near PCI bus parking on requester 0.
lbits:1 ang0 Allows NP_REQ<0> grants independent of ctl.andm, ctl.ands, ctl.andi, or ctl.and setting
lbits:1 and Disable Near PCI arbitration
lbits:1 andi Disable Near PCI arbitration while INT_L is asserted
lbits:1 ands Disable Near PCI arbitration while SMI_L is asserted
lbits:1 andm Disable Near PCI arbitration while MCP_REQ is asserted
lbits:1 ang1 Allow NP_REQ<1> grants independent of ctl.andm, ctl.ands, ctl.andi, or ctl.and setting
lbits:1 rsvda Reserved
lbits:1 afp Disable Far PCI bus parking on requester 0
lbits:1 afg0 Allow FP_REQ<0> grants independent of ctl.afdm, ctl.afds, ctl.afdi, or ctl.afd setting
lbits:1 afd Disable Far PCI arbitration
lbits:1 afdi Disable Far PCI arbitration while INT_L is asserted
lbits:1 afds Disable Far PCI arbitration while SMI_L is asserted
lbits:1 afdm Disable Far PCI arbitration while MCP_REQ is asserted
lbits:1 rsvdb Reserved
lbits:1 pwr_shtdwn_ena Power shutdown enable
{}
or ctl (Offset 008) Control
<byte 2956>
ulong value As longword
endunion ctl (Offset 008) Control
<byte 2960>
{reserved0c_0f ((Offset 00C-00F) Reserved)}
<byte 2960>
ulong value
{}
<byte 2964>
union ptmo (Offset 010) PCI Bus Time Out
<byte 2964>
{field (By field)}
<byte 2964>
lbits:16 rsvd Reserved
lbits:8 npci Near PCI transaction time out down-counter value
lbits:8 fpci Far PCI transaction time out down-counter value
{}
or ptmo (Offset 010) PCI Bus Time Out
<byte 2964>
ulong value As longword
endunion ptmo (Offset 010) PCI Bus Time Out
<byte 2968>
{reserved14_17 ((Offset 014-017) Reserved)}
<byte 2968>
ulong value
{}
<byte 2972>
union swd (Offset 018) System Watchdog Time Out
<byte 2972>
{field (By field)}
<byte 2972>
lbits:16 rsvd Reserved
lbits:16 swd System watchdog timeout down-counter value
{}
or swd (Offset 018) System Watchdog Time Out
<byte 2972>
ulong value As longword
endunion swd (Offset 018) System Watchdog Time Out
<byte 2976>
{reserved1c_1f ((Offset 01C-01F) Reserved)}
<byte 2976>
ulong value
{}
<byte 2980>
union acns (Offset 020) Arbiter Current Near Status
<byte 2980>
{field (By field)}
<byte 2980>
lbits:16 rsvd Reserved
lbits:3 win Encoded grantee of PCI transaction
lbits:1 rsvd1 Reserved
lbits:4 cmd Command of PCI transaction
lbits:8 addr Address of PCI transaction
{}
or acns (Offset 020) Arbiter Current Near Status
<byte 2980>
ulong value As longword
endunion acns (Offset 020) Arbiter Current Near Status
<byte 2984>
{reserved24_27 ((Offset 024-027) Reserved)}
<byte 2984>
ulong value
{}
<byte 2988>
union apns (Offset 028) Arbiter Previous Near Status
<byte 2988>
{field (By field)}
<byte 2988>
lbits:16 rsvd Reserved
lbits:3 win Encoded grantee of PCI transaction
lbits:1 rsvd1 Reserved
lbits:4 cmd Command of PCI transaction
lbits:8 addr Address of PCI transaction
{}
or apns (Offset 028) Arbiter Previous Near Status
<byte 2988>
ulong value As longword
endunion apns (Offset 028) Arbiter Previous Near Status
<byte 2992>
{reserved2c_2f ((Offset 02C-02F) Reserved)}
<byte 2992>
ulong value
{}
<byte 2996>
union acfs (Offset 030) Arbiter Current Far Status
<byte 2996>
{field (By field)}
<byte 2996>
lbits:16 rsvd Reserved
lbits:3 win Encoded grantee of PCI transaction
lbits:1 rsvd1 Reserved
lbits:4 cmd Command of PCI transaction
lbits:8 addr Address of PCI transaction
{}
or acfs (Offset 030) Arbiter Current Far Status
<byte 2996>
ulong value As longword
endunion acfs (Offset 030) Arbiter Current Far Status
<byte 3000>
{reserved34_37 ((Offset 034-037) Reserved)}
<byte 3000>
ulong value
{}
<byte 3004>
union apfs (Offset 038) Arbiter Previous Far Status
<byte 3004>
{field (By field)}
<byte 3004>
lbits:16 rsvd Reserved
lbits:3 win Encoded grantee of PCI transaction
lbits:1 rsvd1 Reserved
lbits:4 cmd Command of PCI transaction
lbits:8 addr Address of PCI transaction
{}
or apfs (Offset 038) Arbiter Previous Far Status
<byte 3004>
ulong value As longword
endunion apfs (Offset 038) Arbiter Previous Far Status
<byte 3008>
{reserved3c_3f ((Offset 03C-03F) Reserved)}
<byte 3008>
ulong value
{}
<byte 3012>
union u0ctl (Offset 040) UART 0 Control
<byte 3012>
{field (By field)}
<byte 3012>
lbits:16 rsvd Reserved
lbits:1 irdat Enables receive buffer register contains unread data interrupt
lbits:1 itdat Enable transmit hold register empty interrupt
lbits:1 irovr Enable read overflow interrupt
lbits:1 iistp Enable invalid stop bit interrupt
lbits:1 ibrk Enable UART break condition interrupt
lbits:1 rsvd5 Reserved
lbits:1 brk Enable UART break condition
lbits:1 lbck Enable UART loop back
lbits:8 brdiv Baud rate generator divisor
{}
or u0ctl (Offset 040) UART 0 Control
<byte 3012>
ulong value As longword
endunion u0ctl (Offset 040) UART 0 Control
<byte 3016>
{reserved44_47 ((Offset 044-047) Reserved)}
<byte 3016>
ulong value
{}
<byte 3020>
union u0buf (Offset 048) UART 0 Buffer
<byte 3020>
{field (By field)}
<byte 3020>
lbits:16 rsvd Reserved
lbits:8 tr_data Transmit and receive data holding register
lbits:1 rsvd2 Reserved
lbits:7 rsvd1 Reserved
{}
or u0buf (Offset 048) UART 0 Buffer
<byte 3020>
ulong value As longword
endunion u0buf (Offset 048) UART 0 Buffer
<byte 3024>
{reserved4c_4f ((Offset 04C-04F) Reserved)}
<byte 3024>
ulong value
{}
<byte 3028>
union u0is (Offset 050) UART 0 Interrupt Status
<byte 3028>
{field (By field)}
<byte 3028>
lbits:16 rsvd Reserved
lbits:1 rdat Receive buffer register has unread data
lbits:1 tdat Transmit hold register empty detected
lbits:1 rovr Read overflow detected
lbits:1 istp Invalid stop bit detected
lbits:1 brk Break condition detected
lbits:3 rsvd2 Reserved
lbits:8 rsvd1 Reserved
{}
or u0is (Offset 050) UART 0 Interrupt Status
<byte 3028>
ulong value As longword
endunion u0is (Offset 050) UART 0 Interrupt Status
<byte 3032>
{reserved54_57 ((Offset 054-057) Reserved)}
<byte 3032>
ulong value
{}
<byte 3036>
union scra (Offset 058) Scratch A
<byte 3036>
{field (By field)}
<byte 3036>
lbits:16 rsvd Reserved
lbits:16 value Scratch value
{}
or scra (Offset 058) Scratch A
<byte 3036>
ulong value As longword
endunion scra (Offset 058) Scratch A
<byte 3040>
{reserved5c_5f ((Offset 05C-05F) Reserved)}
<byte 3040>
ulong value
{}
<byte 3044>
{reserved60_63 ((Offset 060-063) Reserved)}
<byte 3044>
ulong value
{}
<byte 3048>
{reserved64_67 ((Offset 064-067) Reserved)}
<byte 3048>
ulong value
{}
<byte 3052>
{reserved68_6b ((Offset 068-06B) Reserved)}
<byte 3052>
ulong value
{}
<byte 3056>
{reserved6c_6f ((Offset 06C-06F) Reserved)}
<byte 3056>
ulong value
{}
<byte 3060>
{reserved70_73 ((Offset 070-073) Reserved)}
<byte 3060>
ulong value
{}
<byte 3064>
{reserved74_77 ((Offset 074-077) Reserved)}
<byte 3064>
ulong value
{}
<byte 3068>
union scrb (Offset 078) Scratch B
<byte 3068>
{field (By field)}
<byte 3068>
lbits:16 rsvd Reserved
lbits:16 value Scratch value
{}
or scrb (Offset 078) Scratch B
<byte 3068>
ulong value As longword
endunion scrb (Offset 078) Scratch B
<byte 3072>
{reserved7c_7f ((Offset 07C-07F) Reserved)}
<byte 3072>
ulong value
{}
<byte 3076>
union npis (Offset 080) Near PCI Interrupt Status
<byte 3076>
{field (By field)}
<byte 3076>
lbits:16 rsvd Reserved
lbits:1 tabt Target Abort
lbits:1 stop Extra Stop Error
lbits:1 r64 Bad Req64 Error
lbits:1 a64b Bad Ack64 Error B
lbits:1 a64a Bad Ack64 Error A
lbits:1 devsl Bad Devsel
lbits:1 trdy Bad TRdy
lbits:1 perr PERR assert
lbits:1 serr SERR assert
lbits:1 mabt Master Abort
lbits:1 iis IRdy ignore Stop
lbits:1 fis Frame ignore Stop
lbits:1 a64de Ack64 deassert early
lbits:1 r64de Req64 deassert early
lbits:1 gto PCI grant timeout down-counter expiration
lbits:1 pto PCI timeout down-counter expiration
{}
or npis (Offset 080) Near PCI Interrupt Status
<byte 3076>
ulong value As longword
endunion npis (Offset 080) Near PCI Interrupt Status
<byte 3080>
{reserved84_87 ((Offset 084-087) Reserved)}
<byte 3080>
ulong value
{}
<byte 3084>
union npie (Offset 088) Near PCI Interrupt Enable
<byte 3084>
{field (By field)}
<byte 3084>
lbits:16 rsvd Reserved
lbits:1 tabt Target Abort
lbits:1 stop Extra Stop Error
lbits:1 r64 Bad Req64 Error
lbits:1 a64b Bad Ack64 Error B
lbits:1 a64a Bad Ack64 Error A
lbits:1 devsl Bad Devsel
lbits:1 trdy Bad TRdy
lbits:1 perr PERR assert
lbits:1 serr SERR assert
lbits:1 mabt Master Abort
lbits:1 iis IRdy ignore Stop
lbits:1 fis Frame ignore Stop
lbits:1 a64de Ack64 deassert early
lbits:1 r64de Req64 deassert early
lbits:1 gto PCI grant timeout down-counter expiration
lbits:1 pto PCI timeout down-counter expiration
{}
or npie (Offset 088) Near PCI Interrupt Enable
<byte 3084>
ulong value As longword
endunion npie (Offset 088) Near PCI Interrupt Enable
<byte 3088>
{reserved8c_8f ((Offset 08C-08F) Reserved)}
<byte 3088>
ulong value
{}
<byte 3092>
union fpis (Offset 090) Far PCI Interrupt Status
<byte 3092>
{field (By field)}
<byte 3092>
lbits:16 rsvd Reserved
lbits:1 tabt Target Abort
lbits:1 stop Extra Stop Error
lbits:1 r64 Bad Req64 Error
lbits:1 a64b Bad Ack64 Error B
lbits:1 a64a Bad Ack64 Error A
lbits:1 devsl Bad Devsel
lbits:1 trdy Bad TRdy
lbits:1 perr PERR assert
lbits:1 serr SERR assert
lbits:1 mabt Master Abort
lbits:1 iis IRdy ignore Stop
lbits:1 fis Frame ignore Stop
lbits:1 a64de Ack64 deassert early
lbits:1 r64de Req64 deassert early
lbits:1 gto PCI grant timeout down-counter expiration
lbits:1 pto PCI timeout down-counter expiration
{}
or fpis (Offset 090) Far PCI Interrupt Status
<byte 3092>
ulong value As longword
endunion fpis (Offset 090) Far PCI Interrupt Status
<byte 3096>
{reserved94_97 ((Offset 094-097) Reserved)}
<byte 3096>
ulong value
{}
<byte 3100>
union fpie (Offset 098) Far PCI Interrupt Enable
<byte 3100>
{field (By field)}
<byte 3100>
lbits:16 rsvd Reserved
lbits:1 tabt Target Abort
lbits:1 stop Extra Stop Error
lbits:1 r64 Bad Req64 Error
lbits:1 a64b Bad Ack64 Error B
lbits:1 a64a Bad Ack64 Error A
lbits:1 devsl Bad Devsel
lbits:1 trdy Bad TRdy
lbits:1 perr PERR assert
lbits:1 serr SERR assert
lbits:1 mabt Master Abort
lbits:1 iis IRdy ignore Stop
lbits:1 fis Frame ignore Stop
lbits:1 a64de Ack64 deassert early
lbits:1 r64de Req64 deassert early
lbits:1 gto PCI grant timeout down-counter expiration
lbits:1 pto PCI timeout down-counter expiration
{}
or fpie (Offset 098) Far PCI Interrupt Enable
<byte 3100>
ulong value As longword
endunion fpie (Offset 098) Far PCI Interrupt Enable
<byte 3104>
{reserved9c_9f ((Offset 09C-09F) Reserved)}
<byte 3104>
ulong value
{}
<byte 3108>
union is (Offset 0A0) Interrupt Status
<byte 3108>
{field (By field)}
<byte 3108>
lbits:16 rsvd Reserved
lbits:1 iin7 Interrupt In 7 asserted
lbits:1 iin8 Interrupt In 8 asserted
lbits:1 iin9 Interrupt In 9 asserted
lbits:1 iin10 Interrupt In 10 asserted
lbits:1 iin11 Interrupt In 11 asserted
lbits:1 iin12 Interrupt In 12 asserted
lbits:1 iin13 Interrupt In 13 asserted
lbits:1 iin14 Interrupt In 14 asserted
lbits:1 iin15 Interrupt In 15 asserted
lbits:1 smic Multiplexed Interrupt Control interrupt
lbits:1 swd Watchdog down-counter expiration
lbits:1 ppcto PowerPC timeout down-counter expiration
lbits:1 npci Near PCI Error Logic error detect
lbits:1 fpci Far PCI Error Logic error detect
lbits:1 u0 UART interrupt pending
lbits:1 rsvd1 Reserved
{}
or is (Offset 0A0) Interrupt Status
<byte 3108>
ulong value As longword
endunion is (Offset 0A0) Interrupt Status
<byte 3112>
{reserveda4_a7 ((Offset 0A4-0A7) Reserved)}
<byte 3112>
ulong value
{}
<byte 3116>
union nie (Offset 0A8) Normal Interrupt Enable
<byte 3116>
{field (By field)}
<byte 3116>
lbits:16 rsvd Reserved
lbits:1 iin7 Interrupt In 7 asserted
lbits:1 iin8 Interrupt In 8 asserted
lbits:1 iin9 Interrupt In 9 asserted
lbits:1 iin10 Interrupt In 10 asserted
lbits:1 iin11 Interrupt In 11 asserted
lbits:1 iin12 Interrupt In 12 asserted
lbits:1 iin13 Interrupt In 13 asserted
lbits:1 iin14 Interrupt In 14 asserted
lbits:1 iin15 Interrupt In 15 asserted
lbits:1 smic Multiplexed Interrupt Control interrupt
lbits:1 swd Watchdog down-counter expiration
lbits:1 ppcto PowerPC timeout down-counter expiration
lbits:1 npci Near PCI Error Logic error detect
lbits:1 fpci Far PCI Error Logic error detect
lbits:1 u0 UART interrupt pending
lbits:1 rsvd1 Reserved
{}
or nie (Offset 0A8) Normal Interrupt Enable
<byte 3116>
ulong value As longword
endunion nie (Offset 0A8) Normal Interrupt Enable
<byte 3120>
{reservedac_af ((Offset 0AC-0AF) Reserved)}
<byte 3120>
ulong value
{}
<byte 3124>
union smie (Offset 0B0) System Machine Interrupt Enable
<byte 3124>
{field (By field)}
<byte 3124>
lbits:16 rsvd Reserved
lbits:1 iin7 Interrupt In 7 asserted
lbits:1 iin8 Interrupt In 8 asserted
lbits:1 iin9 Interrupt In 9 asserted
lbits:1 iin10 Interrupt In 10 asserted
lbits:1 iin11 Interrupt In 11 asserted
lbits:1 iin12 Interrupt In 12 asserted
lbits:1 iin13 Interrupt In 13 asserted
lbits:1 iin14 Interrupt In 14 asserted
lbits:1 iin15 Interrupt In 15 asserted
lbits:1 smic Multiplexed Interrupt Control interrupt
lbits:1 swd Watchdog down-counter expiration
lbits:1 ppcto PowerPC timeout down-counter expiration
lbits:1 npci Near PCI Error Logic error detect
lbits:1 fpci Far PCI Error Logic error detect
lbits:1 u0 UART interrupt pending
lbits:1 rsvd1 Reserved
{}
or smie (Offset 0B0) System Machine Interrupt Enable
<byte 3124>
ulong value As longword
endunion smie (Offset 0B0) System Machine Interrupt Enable
<byte 3128>
{reservedb4_b7 ((Offset 0B4-0B7) Reserved)}
<byte 3128>
ulong value
{}
<byte 3132>
union mcpe (Offset 0B8) Machine Check Enable
<byte 3132>
{field (By field)}
<byte 3132>
lbits:16 rsvd Reserved
lbits:1 iin7 Interrupt In 7 asserted
lbits:1 iin8 Interrupt In 8 asserted
lbits:1 iin9 Interrupt In 9 asserted
lbits:1 iin10 Interrupt In 10 asserted
lbits:1 iin11 Interrupt In 11 asserted
lbits:1 iin12 Interrupt In 12 asserted
lbits:1 iin13 Interrupt In 13 asserted
lbits:1 iin14 Interrupt In 14 asserted
lbits:1 iin15 Interrupt In 15 asserted
lbits:1 smic Multiplexed Interrupt Control interrupt
lbits:1 swd Watchdog down-counter expiration
lbits:1 ppcto PowerPC timeout down-counter expiration
lbits:1 npci Near PCI Error Logic error detect
lbits:1 fpci Far PCI Error Logic error detect
lbits:1 u0 UART interrupt pending
lbits:1 rsvd1 Reserved
{}
or mcpe (Offset 0B8) Machine Check Enable
<byte 3132>
ulong value As longword
endunion mcpe (Offset 0B8) Machine Check Enable
<byte 3136>
{reservedbc_bf ((Offset 0BC-0BF) Reserved)}
<byte 3136>
ulong value
{}
<byte 3140>
union auxo (Offset 0C0) Auxiliary Outputs
<byte 3140>
{field (By field)}
<byte 3140>
lbits:16 rsvd Reserved
lbits:1 pin0 Auxiliary Output pin 0 state
lbits:1 pin1 Auxiliary Output pin 1 state
lbits:1 pin2 Auxiliary Output pin 2 state
lbits:1 pin3 Auxiliary Output pin 3 state
lbits:1 pin4 Auxiliary Output pin 4 state
lbits:1 pin5 Auxiliary Output pin 5 state
lbits:1 pin6 Auxiliary Output pin 6 state
lbits:1 pin7 Auxiliary Output pin 7 state
lbits:8 rsvd1 Reserved
{}
or auxo (Offset 0C0) Auxiliary Outputs
<byte 3140>
ulong value As longword
endunion auxo (Offset 0C0) Auxiliary Outputs
<byte 3144>
{reservedc4_c7 ((Offset 0C4-0C7) Reserved)}
<byte 3144>
ulong value
{}
<byte 3148>
union gpouta (Offset 0C8) General Purpose Outputs A
<byte 3148>
{field (By field)}
<byte 3148>
lbits:16 rsvd Reserved
lbits:1 pin0 General purpose output pin 0
lbits:1 pin1 General purpose output pin 1
lbits:1 pin2 General purpose output pin 2
lbits:1 pin3 General purpose output pin 3
lbits:1 pin4 General purpose output pin 4
lbits:1 pin5 General purpose output pin 5
lbits:1 pin6 General purpose output pin 6
lbits:1 pin7 General purpose output pin 7
lbits:1 pin8 General purpose output pin 8
lbits:1 pin9 General purpose output pin 9
lbits:1 pin10 General purpose output pin 10
lbits:1 pin11 General purpose output pin 11
lbits:1 pin12 General purpose output pin 12
lbits:1 pin13 General purpose output pin 13
lbits:1 pin14 General purpose output pin 14
lbits:1 pin15 General purpose output pin 15
{}
or gpouta (Offset 0C8) General Purpose Outputs A
<byte 3148>
ulong value As longword
endunion gpouta (Offset 0C8) General Purpose Outputs A
<byte 3152>
{reservedcc_cf ((Offset 0CC-0CF) Reserved)}
<byte 3152>
ulong value
{}
<byte 3156>
union gpoutb (Offset 0D0) General Purpose Outputs B
<byte 3156>
{field (By field)}
<byte 3156>
lbits:16 rsvd Reserved
lbits:1 pin0 General purpose output pin 0
lbits:1 pin1 General purpose output pin 1
lbits:1 pin2 General purpose output pin 2
lbits:1 pin3 General purpose output pin 3
lbits:1 pin4 General purpose output pin 4
lbits:1 pin5 General purpose output pin 5
lbits:1 pin6 General purpose output pin 6
lbits:1 pin7 General purpose output pin 7
lbits:1 pin8 General purpose output pin 8
lbits:1 pin9 General purpose output pin 9
lbits:1 pin10 General purpose output pin 10
lbits:1 pin11 General purpose output pin 11
lbits:1 pin12 General purpose output pin 12
lbits:1 pin13 General purpose output pin 13
lbits:1 pin14 General purpose output pin 14
lbits:1 pin15 General purpose output pin 15
{}
or gpoutb (Offset 0D0) General Purpose Outputs B
<byte 3156>
ulong value As longword
endunion gpoutb (Offset 0D0) General Purpose Outputs B
<byte 3160>
{reservedd4_d7 ((Offset 0D4-0D7) Reserved)}
<byte 3160>
ulong value
{}
<byte 3164>
union gpoutc (Offset 0D8) General Purpose Outputs C
<byte 3164>
{field (By field)}
<byte 3164>
lbits:16 rsvd Reserved
lbits:1 pin0 General purpose output pin 0
lbits:1 pin1 General purpose output pin 1
lbits:1 pin2 General purpose output pin 2
lbits:1 pin3 General purpose output pin 3
lbits:1 pin4 General purpose output pin 4
lbits:1 pin5 General purpose output pin 5
lbits:1 pin6 General purpose output pin 6
lbits:1 pin7 General purpose output pin 7
lbits:1 pin8 General purpose output pin 8
lbits:1 pin9 General purpose output pin 9
lbits:1 pin10 General purpose output pin 10
lbits:1 pin11 General purpose output pin 11
lbits:1 pin12 General purpose output pin 12
lbits:1 pin13 General purpose output pin 13
lbits:1 pin14 General purpose output pin 14
lbits:1 pin15 General purpose output pin 15
{}
or gpoutc (Offset 0D8) General Purpose Outputs C
<byte 3164>
ulong value As longword
endunion gpoutc (Offset 0D8) General Purpose Outputs C
<byte 3168>
{reserveddc_df ((Offset 0DC-0DF) Reserved)}
<byte 3168>
ulong value
{}
<byte 3172>
union mic (Offset 0E0) Multiplexed Interrupt Control Status
<byte 3172>
{field (By field)}
<byte 3172>
lbits:16 rsvd Reserved
lbits:7 mii II pins 6:0
lbits:1 rsvd2 Reserved
lbits:7 mie MII bits 6:0 to be NORed into IS bit 9
lbits:1 rsvd1 Reserved
{}
or mic (Offset 0E0) Multiplexed Interrupt Control Status
<byte 3172>
ulong value As longword
endunion mic (Offset 0E0) Multiplexed Interrupt Control Status
<byte 3176>
{reservede4_e7 ((Offset 0E4-0E7) Reserved)}
<byte 3176>
ulong value
{}
<byte 3180>
union uere (Offset 0E8) Unexpected Error Reset Enable
<byte 3180>
{field (By field)}
<byte 3180>
lbits:16 rsvd Reserved
lbits:1 iin7 Interrupt In 7 asserted
lbits:1 iin8 Interrupt In 8 asserted
lbits:1 iin9 Interrupt In 9 asserted
lbits:1 iin10 Interrupt In 10 asserted
lbits:1 iin11 Interrupt In 11 asserted
lbits:1 iin12 Interrupt In 12 asserted
lbits:1 iin13 Interrupt In 13 asserted
lbits:1 iin14 Interrupt In 14 asserted
lbits:1 iin15 Interrupt In 15 asserted
lbits:1 smic Multiplexed Interrupt Control interrupt
lbits:1 swd Watchdog down-counter expiration
lbits:1 ppcto PowerPC timeout down-counter expiration
lbits:1 npci Near PCI Error Logic error detect
lbits:1 fpci Far PCI Error Logic error detect
lbits:1 u0 UART interrupt pending
lbits:1 rsvd1 Reserved
{}
or uere (Offset 0E8) Unexpected Error Reset Enable
<byte 3180>
ulong value As longword
endunion uere (Offset 0E8) Unexpected Error Reset Enable
<byte 3184>
{reservedec_ef ((Offset 0EC-0EF) Reserved)}
<byte 3184>
ulong value
{}
<byte 3188>
union onpci (Offset 0F0) Near PCI Outputs
<byte 3188>
{field (By field)}
<byte 3188>
lbits:16 rsvd Reserved
lbits:4 cbel Tri-state CBE
lbits:1 ad29 Tri-state AD29
lbits:1 ad30 Tri-state AD30
lbits:1 ad31 Tri-state AD31
lbits:1 serr Tri-state SERR
lbits:1 perr Tri-state PERR
lbits:1 stop Tri-state STOP
lbits:1 ack64 Tri-state ACK64
lbits:1 devsel Tri-state DevSel
lbits:1 trdy Tri-state TRDY
lbits:1 irdy Tri-state IRDY
lbits:1 frame Tri-state FRAME
lbits:1 req64 Tri-state REQ64
{}
or onpci (Offset 0F0) Near PCI Outputs
<byte 3188>
ulong value As longword
endunion onpci (Offset 0F0) Near PCI Outputs
<byte 3192>
{reservedf4_f7 ((Offset 0F4-0F7) Reserved)}
<byte 3192>
ulong value
{}
<byte 3196>
union ofpci (Offset 0F8) Far PCI Outputs
<byte 3196>
{field (By field)}
<byte 3196>
lbits:16 rsvd Reserved
lbits:1 iin7 Interrupt In 7 asserted
lbits:1 iin8 Interrupt In 8 asserted
lbits:1 iin9 Interrupt In 9 asserted
lbits:1 iin10 Interrupt In 10 asserted
lbits:1 iin11 Interrupt In 11 asserted
lbits:1 iin12 Interrupt In 12 asserted
lbits:1 iin13 Interrupt In 13 asserted
lbits:1 iin14 Interrupt In 14 asserted
lbits:1 iin15 Interrupt In 15 asserted
lbits:1 smic Multiplexed Interrupt Control interrupt
lbits:1 swd Watchdog down-counter expiration
lbits:1 ppcto PowerPC timeout down-counter expiration
lbits:1 npci Near PCI Error Logic error detect
lbits:1 fpci Far PCI Error Logic error detect
lbits:1 u0 UART interrupt pending
lbits:1 rsvd1 Reserved
{}
or ofpci (Offset 0F8) Far PCI Outputs
<byte 3196>
ulong value As longword
endunion ofpci (Offset 0F8) Far PCI Outputs
<byte 3200>
{reservedfc_ff ((Offset 0FC-0FF) Reserved)}
<byte 3200>
ulong value
{}
<byte 3204>
union arb0 (Offset 100) Arbiter Control 0
<byte 3204>
{field (By field)}
<byte 3204>
lbits:16 rsvd Reserved
lbits:16 control Arbitration control
{}
or arb0 (Offset 100) Arbiter Control 0
<byte 3204>
ulong value As longword
endunion arb0 (Offset 100) Arbiter Control 0
<byte 3208>
{reserved104_107 ((Offset 104-107) Reserved)}
<byte 3208>
ulong value
{}
<byte 3212>
union arb1 (Offset 108) Arbiter Control 1
<byte 3212>
{field (By field)}
<byte 3212>
lbits:16 rsvd Reserved
lbits:16 control Arbitration control
{}
or arb1 (Offset 108) Arbiter Control 1
<byte 3212>
ulong value As longword
endunion arb1 (Offset 108) Arbiter Control 1
<byte 3216>
{reserved10c_10f ((Offset 10C-10F) Reserved)}
<byte 3216>
ulong value
{}
<byte 3220>
union arb2 (Offset 110) Arbiter Control 2
<byte 3220>
{field (By field)}
<byte 3220>
lbits:16 rsvd Reserved
lbits:16 control Arbitration control
{}
or arb2 (Offset 110) Arbiter Control 2
<byte 3220>
ulong value As longword
endunion arb2 (Offset 110) Arbiter Control 2
<byte 3224>
{reserved114_117 ((Offset 114-117) Reserved)}
<byte 3224>
ulong value
{}
<byte 3228>
union arb3 (Offset 118) Arbiter Control 3
<byte 3228>
{field (By field)}
<byte 3228>
lbits:16 rsvd Reserved
lbits:16 control Arbitration control
{}
or arb3 (Offset 118) Arbiter Control 3
<byte 3228>
ulong value As longword
endunion arb3 (Offset 118) Arbiter Control 3
<byte 3232>
{reserved11c_11f ((Offset 11C-11F) Reserved)}
<byte 3232>
ulong value
{}
<byte 3236>
union arb4 (Offset 120) Arbiter Control 4
<byte 3236>
{field (By field)}
<byte 3236>
lbits:16 rsvd Reserved
lbits:16 control Arbitration control
{}
or arb4 (Offset 120) Arbiter Control 4
<byte 3236>
ulong value As longword
endunion arb4 (Offset 120) Arbiter Control 4
<byte 3240>
{reserved124_127 ((Offset 124-127) Reserved)}
<byte 3240>
ulong value
{}
<byte 3244>
union arb5 (Offset 128) Arbiter Control 5
<byte 3244>
{field (By field)}
<byte 3244>
lbits:16 rsvd Reserved
lbits:16 control Arbitration control
{}
or arb5 (Offset 128) Arbiter Control 5
<byte 3244>
ulong value As longword
endunion arb5 (Offset 128) Arbiter Control 5
<byte 3248>
{reserved12c_12f ((Offset 12C-12F) Reserved)}
<byte 3248>
ulong value
{}
<byte 3252>
union arb6 (Offset 130) Arbiter Control 6
<byte 3252>
{field (By field)}
<byte 3252>
lbits:16 rsvd Reserved
lbits:16 control Arbitration control
{}
or arb6 (Offset 130) Arbiter Control 6
<byte 3252>
ulong value As longword
endunion arb6 (Offset 130) Arbiter Control 6
<byte 3256>
{reserved134_137 ((Offset 134-137) Reserved)}
<byte 3256>
ulong value
{}
<byte 3260>
union arb7 (Offset 138) Arbiter Control 7
<byte 3260>
{field (By field)}
<byte 3260>
lbits:16 rsvd Reserved
lbits:16 control Arbitration control
{}
or arb7 (Offset 138) Arbiter Control 7
<byte 3260>
ulong value As longword
endunion arb7 (Offset 138) Arbiter Control 7
<byte 3264>
{reserved13c_13f ((Offset 13C-13F) Reserved)}
<byte 3264>
ulong value
{}
<byte 3268>
union arb8 (Offset 140) Arbiter Control 8
<byte 3268>
{field (By field)}
<byte 3268>
lbits:16 rsvd Reserved
lbits:16 control Arbitration control
{}
or arb8 (Offset 140) Arbiter Control 8
<byte 3268>
ulong value As longword
endunion arb8 (Offset 140) Arbiter Control 8
<byte 3272>
{reserved144_147 ((Offset 144-147) Reserved)}
<byte 3272>
ulong value
{}
<byte 3276>
union arb9 (Offset 148) Arbiter Control 9
<byte 3276>
{field (By field)}
<byte 3276>
lbits:16 rsvd Reserved
lbits:16 control Arbitration control
{}
or arb9 (Offset 148) Arbiter Control 9
<byte 3276>
ulong value As longword
endunion arb9 (Offset 148) Arbiter Control 9
<byte 3280>
{reserved14c_14f ((Offset 14C-14F) Reserved)}
<byte 3280>
ulong value
{}
<byte 3284>
union arba (Offset 150) Arbiter Control A
<byte 3284>
{field (By field)}
<byte 3284>
lbits:16 rsvd Reserved
lbits:16 control Arbitration control
{}
or arba (Offset 150) Arbiter Control A
<byte 3284>
ulong value As longword
endunion arba (Offset 150) Arbiter Control A
{}
endunion csr G3 Glue CSR Registers
{}
<byte 3288>
{toyclock (DS1557 4MEG NV Y2KC Timekeeping RAM)}
<byte 3288>
union alarm_minutes Alarm Minutes Union
<byte 3288>
utiny value Alarm Minutes as byte
or alarm_minutes Alarm Minutes Union
<byte 3288>
{bits (Alarm Minutes by field)}
<byte 3288>
tbits:4 minutes
tbits:3 ten_minutes
tbits:1 am2
{}
endunion alarm_minutes Alarm Minutes Union
<byte 3289>
union alarm_seconds Alarm Seconds Union
<byte 3289>
utiny value Alarm Seconds as byte
or alarm_seconds Alarm Seconds Union
<byte 3289>
{bits (Alarm Seconds by field)}
<byte 3289>
tbits:4 seconds
tbits:3 ten_seconds
tbits:1 am1
{}
endunion alarm_seconds Alarm Seconds Union
<byte 3290>
utiny unused
<byte 3291>
union flag Alarm Enable/Status and Battery Status Flags Union
<byte 3291>
utiny value Alarm Enable/Status and Battery Status Flags as byte
or flag Alarm Enable/Status and Battery Status Flags Union
<byte 3291>
{bits (Alarm Enable/Status and Battery Status Flags by field)}
<byte 3291>
tbits:4 unused2
tbits:1 bat_low
tbits:1 unused1
tbits:1 alarm
tbits:1 alarm_enable
{}
endunion flag Alarm Enable/Status and Battery Status Flags Union
<byte 3292>
union watchdog Watchdog Timer Control Flags Union
<byte 3292>
utiny value Watchdog Timer Control Flags as byte
or watchdog Watchdog Timer Control Flags Union
<byte 3292>
{bits (Watchdog Timer Control Flags by field)}
<byte 3292>
tbits:7 multiplier
tbits:1 steering_bit
{}
endunion watchdog Watchdog Timer Control Flags Union
<byte 3293>
union interrupts Alarm Interrupt Enables Union
<byte 3293>
utiny value Alarm Interrupt Enables as byte
or interrupts Alarm Interrupt Enables Union
<byte 3293>
{bits (Alarm Interrupt Enables by field)}
<byte 3293>
tbits:5 unused2
tbits:1 alarm_enable_in_bat
tbits:1 unused1
tbits:1 alarm_enable
{}
endunion interrupts Alarm Interrupt Enables Union
<byte 3294>
union alarm_date Alarm Date Union
<byte 3294>
utiny value Alarm Date as byte
or alarm_date Alarm Date Union
<byte 3294>
{bits (Alarm Date by field)}
<byte 3294>
tbits:4 date
tbits:2 ten_date
tbits:1 unused
tbits:1 am4
{}
endunion alarm_date Alarm Date Union
<byte 3295>
union alarm_hours Alarm Hours Union
<byte 3295>
utiny value Alarm Hours as byte
or alarm_hours Alarm Hours Union
<byte 3295>
{alarm_hours (Alarm Hours by field)}
<byte 3295>
tbits:4 hours
tbits:2 ten_hours
tbits:1 unused
tbits:1 am3
{}
endunion alarm_hours Alarm Hours Union
<byte 3296>
union hour Hour Union
<byte 3296>
utiny value Hour as byte
or hour Hour Union
<byte 3296>
{bits (Hour by field)}
<byte 3296>
tbits:6 hour
tbits:2 unused
{}
endunion hour Hour Union
<byte 3297>
union minutes Minutes Union
<byte 3297>
utiny value Minutes as byte
or minutes Minutes Union
<byte 3297>
{bits (Minutes by field)}
<byte 3297>
tbits:7 minutes
tbits:1 unused
{}
endunion minutes Minutes Union
<byte 3298>
union seconds Seconds/Oscillator Control Union
<byte 3298>
utiny value Seconds/Oscillator Control as byte
or seconds Seconds/Oscillator Control Union
<byte 3298>
{bits (Seconds/Oscillator Control by field)}
<byte 3298>
tbits:7 seconds
tbits:1 osc
{}
endunion seconds Seconds/Oscillator Control Union
<byte 3299>
union control TOY Control Flags/Century Union
<byte 3299>
utiny value TOY Control Flags/Century as byte
or control TOY Control Flags/Century Union
<byte 3299>
{bits (TOY Control Flags/Century by field)}
<byte 3299>
tbits:6 century
tbits:1 read_bit
tbits:1 write_bit
{}
endunion control TOY Control Flags/Century Union
<byte 3300>
utiny year Year as byte
<byte 3301>
union month Month Union
<byte 3301>
utiny value Month as byte
or month Month Union
<byte 3301>
{bits (Month by field)}
<byte 3301>
tbits:5 month
tbits:3 unused
{}
endunion month Month Union
<byte 3302>
union date Date Union
<byte 3302>
utiny value Date as byte
or date Date Union
<byte 3302>
{bits (Date by field)}
<byte 3302>
tbits:6 date
tbits:2 unused
{}
endunion date Date Union
<byte 3303>
union day Day Union
<byte 3303>
utiny value Day/Frequency Test as byte
or day Day Union
<byte 3303>
{bits (Day/Frequency Test by field)}
<byte 3303>
tbits:3 day
tbits:3 unused2
tbits:1 freq_test
tbits:1 unused1
{}
endunion day Day Union
{}
<byte 3304>
{st16c2552_uart[0] (ST16C2552 UART1/2 registers)}
<byte 3304>
utiny[3] pada Pad to longword
<byte 3307>
union rhrthr Receive Holding Register/Transmit Holding Register Union
<byte 3307>
utiny value Receive Holding Register (read only)/Transmit Holding Register (write only) as byte
or rhrthr Receive Holding Register/Transmit Holding Register Union
<byte 3307>
{rhr (Receive Holding Register (read only) by field)}
<byte 3307>
tbits:1 bit0 Receive Data Bit 0
tbits:1 bit1 Receive Data Bit 1
tbits:1 bit2 Receive Data Bit 2
tbits:1 bit3 Receive Data Bit 3
tbits:1 bit4 Receive Data Bit 4
tbits:1 bit5 Receive Data Bit 5
tbits:1 bit6 Receive Data Bit 6
tbits:1 bit7 Receive Data Bit 7
{}
or rhrthr Receive Holding Register/Transmit Holding Register Union
<byte 3307>
{thr (Transmit Holding Register (write only))}
<byte 3307>
tbits:1 bit0 Transmit Data Bit 0
tbits:1 bit1 Transmit Data Bit 1
tbits:1 bit2 Transmit Data Bit 2
tbits:1 bit3 Transmit Data Bit 3
tbits:1 bit4 Transmit Data Bit 4
tbits:1 bit5 Transmit Data Bit 5
tbits:1 bit6 Transmit Data Bit 6
tbits:1 bit7 Transmit Data Bit 7
{}
endunion rhrthr Receive Holding Register/Transmit Holding Register Union
<byte 3308>
ulong pada1 Longword skip
<byte 3312>
utiny[3] padb Pad to longword
<byte 3315>
union ier Interrupt Enable Register Union
<byte 3315>
utiny value Interrupt Enable Register (write only) as byte
or ier Interrupt Enable Register Union
<byte 3315>
{bits (Interrupt Enable Register (write only) by field)}
<byte 3315>
tbits:1 rhr Receive Holding Register
tbits:1 thri Transmit Holding Register Interrupt
tbits:1 rlsi Receive Line Status Interrupt
tbits:1 msi Modem Status Interrupt
tbits:4 rsvd Reserved
{}
endunion ier Interrupt Enable Register Union
<byte 3316>
ulong padb1 Longword skip
<byte 3320>
utiny[3] padc Pad to longword
<byte 3323>
union fcrisr FIFO Control Register/Interrupt Status Register Union
<byte 3323>
utiny value FIFO Control Register (write only)/Interrupt Status Register (read only) as byte
or fcrisr FIFO Control Register/Interrupt Status Register Union
<byte 3323>
{fcr (FIFO Control Register (write only) by field)}
<byte 3323>
tbits:1 fifoen FIFO Enable
tbits:1 rcvrfifor Receiver FIFO Reset
tbits:1 xmitfifor Transmit FIFO Reset
tbits:1 dmamodes DMA Mode Select
tbits:2 rsvd Reserved
tbits:2 rvcrtrigmsb Receive FIFO Interrup Trigger Level
{}
or fcrisr FIFO Control Register/Interrupt Status Register Union
<byte 3323>
{isr (Interrupt Status Register (read only) by field)}
<byte 3323>
tbits:1 intstatus Interrupt Status
tbits:1 intpri0 Interrupt Priority Bit 0
tbits:1 intpri1 Interrupt Priority Bit 1
tbits:1 intpri2 Interrupt Priority Bit 2
tbits:2 rsvd Reserved
tbits:2 fifosen FIFOs Enabled
{}
endunion fcrisr FIFO Control Register/Interrupt Status Register Union
<byte 3324>
ulong padc1 Longword skip
<byte 3328>
utiny[3] padd Pad to longword
<byte 3331>
union lcr Line Control Register Union
<byte 3331>
utiny value Line Control Register (write only) as byte
or lcr Line Control Register Union
<byte 3331>
{bits (Line Control Register (write only) by field)}
<byte 3331>
tbits:2 wordlength Word Length to be Transmitted
tbits:1 stopbits Length of Stop Bits
tbits:1 parityen Parity Enable
tbits:1 eventparity Even Parity
tbits:1 setparity Force Parity
tbits:1 setbreak Force Break
tbits:1 divlocken Divisor Lock Enable
{}
endunion lcr Line Control Register Union
<byte 3332>
ulong padd1 Longword skip
<byte 3336>
utiny[3] pade Pad to longword
<byte 3339>
union mcr Modem Control Register Union
<byte 3339>
utiny value Modem Control Register (write only) as byte
or mcr Modem Control Register Union
<byte 3339>
{bits (Modem Control Register (write only) by field)}
<byte 3339>
tbits:1 dtrnot Force -DTR to Zero
tbits:1 rtsnot Force -RTS to Zero
tbits:1 op1not Force -OP1 to Zero
tbits:1 opabnot Force -OPA/B to Zero
tbits:1 loopbacken Loopback Enable
tbits:3 rsvd Reserved
{}
endunion mcr Modem Control Register Union
<byte 3340>
ulong pade1 Longword skip
<byte 3344>
utiny[3] padf Pad to longword
<byte 3347>
union lsr Line Status Register Union
<byte 3347>
utiny value Line Status Register (read only) as byte
or lsr Line Status Register Union
<byte 3347>
{bits (Line Status Register (read only) by field)}
<byte 3347>
tbits:1 rdr Receive Data Ready
tbits:1 overrunerr Overrun Error
tbits:1 parityerr Parity Error
tbits:1 framingerr Framing Error
tbits:1 brkint Break Interrupt
tbits:1 thrempty Transmit Holding Register Empty
tbits:1 thrtsrempty Transmit Holding and Shift Registers Empty
tbits:1 es Error Summary
{}
endunion lsr Line Status Register Union
<byte 3348>
ulong padf1 Longword skip
<byte 3352>
utiny[3] padg Pad to longword
<byte 3355>
union msr Modem Status Register Union
<byte 3355>
utiny value Modem Status Register (read only) as byte
or msr Modem Status Register Union
<byte 3355>
{bits (Modem Status Register (read only) by field)}
<byte 3355>
tbits:1 ctsnotchanged -CTS Changed
tbits:1 dsrnotchanged -DSR Changed
tbits:1 rinotchanged -RI Changed
tbits:1 cdsnotchanged -CD Changed
tbits:1 cts CTS
tbits:1 dsr DSR
tbits:1 ri RI
tbits:1 cd CD
{}
endunion msr Modem Status Register Union
<byte 3356>
ulong padg1 Longword skip
<byte 3360>
utiny[3] padh Pad to longword
<byte 3363>
union spr Scratchpad Register Union
<byte 3363>
utiny value Scratchpad Register (read/write) as byte
or spr Scratchpad Register Union
<byte 3363>
{bits (Scratchpad Register (read/write) by field)}
<byte 3363>
tbits:1 bit0 Data Bit 0
tbits:1 bit1 Data Bit 1
tbits:1 bit2 Data Bit 2
tbits:1 bit3 Data Bit 3
tbits:1 bit4 Data Bit 4
tbits:1 bit5 Data Bit 5
tbits:1 bit6 Data Bit 6
tbits:1 bit7 Data Bit 7
{}
endunion spr Scratchpad Register Union
<byte 3364>
ulong padh1 Longword skip
{}
<byte 3368>
{st16c2552_uart[1] (ST16C2552 UART1/2 registers)}
<byte 3368>
utiny[3] pada Pad to longword
<byte 3371>
union rhrthr Receive Holding Register/Transmit Holding Register Union
<byte 3371>
utiny value Receive Holding Register (read only)/Transmit Holding Register (write only) as byte
or rhrthr Receive Holding Register/Transmit Holding Register Union
<byte 3371>
{rhr (Receive Holding Register (read only) by field)}
<byte 3371>
tbits:1 bit0 Receive Data Bit 0
tbits:1 bit1 Receive Data Bit 1
tbits:1 bit2 Receive Data Bit 2
tbits:1 bit3 Receive Data Bit 3
tbits:1 bit4 Receive Data Bit 4
tbits:1 bit5 Receive Data Bit 5
tbits:1 bit6 Receive Data Bit 6
tbits:1 bit7 Receive Data Bit 7
{}
or rhrthr Receive Holding Register/Transmit Holding Register Union
<byte 3371>
{thr (Transmit Holding Register (write only))}
<byte 3371>
tbits:1 bit0 Transmit Data Bit 0
tbits:1 bit1 Transmit Data Bit 1
tbits:1 bit2 Transmit Data Bit 2
tbits:1 bit3 Transmit Data Bit 3
tbits:1 bit4 Transmit Data Bit 4
tbits:1 bit5 Transmit Data Bit 5
tbits:1 bit6 Transmit Data Bit 6
tbits:1 bit7 Transmit Data Bit 7
{}
endunion rhrthr Receive Holding Register/Transmit Holding Register Union
<byte 3372>
ulong pada1 Longword skip
<byte 3376>
utiny[3] padb Pad to longword
<byte 3379>
union ier Interrupt Enable Register Union
<byte 3379>
utiny value Interrupt Enable Register (write only) as byte
or ier Interrupt Enable Register Union
<byte 3379>
{bits (Interrupt Enable Register (write only) by field)}
<byte 3379>
tbits:1 rhr Receive Holding Register
tbits:1 thri Transmit Holding Register Interrupt
tbits:1 rlsi Receive Line Status Interrupt
tbits:1 msi Modem Status Interrupt
tbits:4 rsvd Reserved
{}
endunion ier Interrupt Enable Register Union
<byte 3380>
ulong padb1 Longword skip
<byte 3384>
utiny[3] padc Pad to longword
<byte 3387>
union fcrisr FIFO Control Register/Interrupt Status Register Union
<byte 3387>
utiny value FIFO Control Register (write only)/Interrupt Status Register (read only) as byte
or fcrisr FIFO Control Register/Interrupt Status Register Union
<byte 3387>
{fcr (FIFO Control Register (write only) by field)}
<byte 3387>
tbits:1 fifoen FIFO Enable
tbits:1 rcvrfifor Receiver FIFO Reset
tbits:1 xmitfifor Transmit FIFO Reset
tbits:1 dmamodes DMA Mode Select
tbits:2 rsvd Reserved
tbits:2 rvcrtrigmsb Receive FIFO Interrup Trigger Level
{}
or fcrisr FIFO Control Register/Interrupt Status Register Union
<byte 3387>
{isr (Interrupt Status Register (read only) by field)}
<byte 3387>
tbits:1 intstatus Interrupt Status
tbits:1 intpri0 Interrupt Priority Bit 0
tbits:1 intpri1 Interrupt Priority Bit 1
tbits:1 intpri2 Interrupt Priority Bit 2
tbits:2 rsvd Reserved
tbits:2 fifosen FIFOs Enabled
{}
endunion fcrisr FIFO Control Register/Interrupt Status Register Union
<byte 3388>
ulong padc1 Longword skip
<byte 3392>
utiny[3] padd Pad to longword
<byte 3395>
union lcr Line Control Register Union
<byte 3395>
utiny value Line Control Register (write only) as byte
or lcr Line Control Register Union
<byte 3395>
{bits (Line Control Register (write only) by field)}
<byte 3395>
tbits:2 wordlength Word Length to be Transmitted
tbits:1 stopbits Length of Stop Bits
tbits:1 parityen Parity Enable
tbits:1 eventparity Even Parity
tbits:1 setparity Force Parity
tbits:1 setbreak Force Break
tbits:1 divlocken Divisor Lock Enable
{}
endunion lcr Line Control Register Union
<byte 3396>
ulong padd1 Longword skip
<byte 3400>
utiny[3] pade Pad to longword
<byte 3403>
union mcr Modem Control Register Union
<byte 3403>
utiny value Modem Control Register (write only) as byte
or mcr Modem Control Register Union
<byte 3403>
{bits (Modem Control Register (write only) by field)}
<byte 3403>
tbits:1 dtrnot Force -DTR to Zero
tbits:1 rtsnot Force -RTS to Zero
tbits:1 op1not Force -OP1 to Zero
tbits:1 opabnot Force -OPA/B to Zero
tbits:1 loopbacken Loopback Enable
tbits:3 rsvd Reserved
{}
endunion mcr Modem Control Register Union
<byte 3404>
ulong pade1 Longword skip
<byte 3408>
utiny[3] padf Pad to longword
<byte 3411>
union lsr Line Status Register Union
<byte 3411>
utiny value Line Status Register (read only) as byte
or lsr Line Status Register Union
<byte 3411>
{bits (Line Status Register (read only) by field)}
<byte 3411>
tbits:1 rdr Receive Data Ready
tbits:1 overrunerr Overrun Error
tbits:1 parityerr Parity Error
tbits:1 framingerr Framing Error
tbits:1 brkint Break Interrupt
tbits:1 thrempty Transmit Holding Register Empty
tbits:1 thrtsrempty Transmit Holding and Shift Registers Empty
tbits:1 es Error Summary
{}
endunion lsr Line Status Register Union
<byte 3412>
ulong padf1 Longword skip
<byte 3416>
utiny[3] padg Pad to longword
<byte 3419>
union msr Modem Status Register Union
<byte 3419>
utiny value Modem Status Register (read only) as byte
or msr Modem Status Register Union
<byte 3419>
{bits (Modem Status Register (read only) by field)}
<byte 3419>
tbits:1 ctsnotchanged -CTS Changed
tbits:1 dsrnotchanged -DSR Changed
tbits:1 rinotchanged -RI Changed
tbits:1 cdsnotchanged -CD Changed
tbits:1 cts CTS
tbits:1 dsr DSR
tbits:1 ri RI
tbits:1 cd CD
{}
endunion msr Modem Status Register Union
<byte 3420>
ulong padg1 Longword skip
<byte 3424>
utiny[3] padh Pad to longword
<byte 3427>
union spr Scratchpad Register Union
<byte 3427>
utiny value Scratchpad Register (read/write) as byte
or spr Scratchpad Register Union
<byte 3427>
{bits (Scratchpad Register (read/write) by field)}
<byte 3427>
tbits:1 bit0 Data Bit 0
tbits:1 bit1 Data Bit 1
tbits:1 bit2 Data Bit 2
tbits:1 bit3 Data Bit 3
tbits:1 bit4 Data Bit 4
tbits:1 bit5 Data Bit 5
tbits:1 bit6 Data Bit 6
tbits:1 bit7 Data Bit 7
{}
endunion spr Scratchpad Register Union
<byte 3428>
ulong padh1 Longword skip
{}
<byte 3432>
{tachyon (Tachyon XL register save area)}
<byte 3432>
union portcorr[0] Port Correlation
<byte 3432>
ulong portcorra Port Correlation As Longword
or portcorr[0] Port Correlation
<byte 3432>
{portcorr (Port Correlation By Field)}
<byte 3432>
utiny real_port Real hardware port number
<byte 3433>
utiny port_type Port type
<byte 3434>
ushort reserved Reserved
{}
endunion portcorr[0] Port Correlation
<byte 3436>
union portcorr[1] Port Correlation
<byte 3436>
ulong portcorra Port Correlation As Longword
or portcorr[1] Port Correlation
<byte 3436>
{portcorr (Port Correlation By Field)}
<byte 3436>
utiny real_port Real hardware port number
<byte 3437>
utiny port_type Port type
<byte 3438>
ushort reserved Reserved
{}
endunion portcorr[1] Port Correlation
<byte 3440>
union portcorr[2] Port Correlation
<byte 3440>
ulong portcorra Port Correlation As Longword
or portcorr[2] Port Correlation
<byte 3440>
{portcorr (Port Correlation By Field)}
<byte 3440>
utiny real_port Real hardware port number
<byte 3441>
utiny port_type Port type
<byte 3442>
ushort reserved Reserved
{}
endunion portcorr[2] Port Correlation
<byte 3444>
union portcorr[3] Port Correlation
<byte 3444>
ulong portcorra Port Correlation As Longword
or portcorr[3] Port Correlation
<byte 3444>
{portcorr (Port Correlation By Field)}
<byte 3444>
utiny real_port Real hardware port number
<byte 3445>
utiny port_type Port type
<byte 3446>
ushort reserved Reserved
{}
endunion portcorr[3] Port Correlation
<byte 3448>
union portcorr[4] Port Correlation
<byte 3448>
ulong portcorra Port Correlation As Longword
or portcorr[4] Port Correlation
<byte 3448>
{portcorr (Port Correlation By Field)}
<byte 3448>
utiny real_port Real hardware port number
<byte 3449>
utiny port_type Port type
<byte 3450>
ushort reserved Reserved
{}
endunion portcorr[4] Port Correlation
<byte 3452>
union portcorr[5] Port Correlation
<byte 3452>
ulong portcorra Port Correlation As Longword
or portcorr[5] Port Correlation
<byte 3452>
{portcorr (Port Correlation By Field)}
<byte 3452>
utiny real_port Real hardware port number
<byte 3453>
utiny port_type Port type
<byte 3454>
ushort reserved Reserved
{}
endunion portcorr[5] Port Correlation
<byte 3456>
union portcorr[6] Port Correlation
<byte 3456>
ulong portcorra Port Correlation As Longword
or portcorr[6] Port Correlation
<byte 3456>
{portcorr (Port Correlation By Field)}
<byte 3456>
utiny real_port Real hardware port number
<byte 3457>
utiny port_type Port type
<byte 3458>
ushort reserved Reserved
{}
endunion portcorr[6] Port Correlation
<byte 3460>
union pcicfg[0] Tachyon XL2 PCI Configuration Registers
<byte 3460>
ulong[24] pcicfga Tachyon XL2 PCI Configuration Registers As Longwords
or pcicfg[0] Tachyon XL2 PCI Configuration Registers
<byte 3460>
{pcicfg (Tachyon XL2 PCI Configuration Registers By Field)}
<byte 3460>
union pci_device_id (Offset 02) PCI Device ID
<byte 3460>
{field (By field)}
<byte 3460>
bits:16 id Vendor ID
{}
or pci_device_id (Offset 02) PCI Device ID
<byte 3460>
ushort value As word
endunion pci_device_id (Offset 02) PCI Device ID
<byte 3462>
union pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3462>
{field (By field)}
<byte 3462>
bits:16 id Vendor ID
{}
or pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3462>
ushort value As word
endunion pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3464>
union pci_status (Offset 06) PCI Status
<byte 3464>
{field (By field)}
<byte 3464>
bits:4 rsvd Reserved
bits:1 cpl New Capabilities
bits:1 cap66mhz 66MHz Capable
bits:1 udfsup UDF Supported (read only, always returns 0)
bits:1 capfbbw Fast Back-to-Back Capable (read only, always returns 0)
bits:1 dperr Data Parity Error Detected
bits:2 devsel_time PCI_DEVSEL# response timing (read only, always returns 1)
bits:1 sgnltabrt Signaled Target Abort
bits:1 rcvdtabrt Received Target Abort
bits:1 rcvdmabrt Received Master Abort
bits:1 sgnlsyserr Signaled System Error
bits:1 perr Detected Parity Error
{}
or pci_status (Offset 06) PCI Status
<byte 3464>
ushort value As word
endunion pci_status (Offset 06) PCI Status
<byte 3466>
union pci_cmd (Offset 04) PCI Command
<byte 3466>
{field (By field)}
<byte 3466>
bits:1 io_access I/O Access Control
bits:1 mem_access Memory Access Control
bits:1 pcim_en PCI Master Enable
bits:1 scycle_en Special Cycle Enable (read only, always returns 0)
bits:1 memwinv Memory Write & Invalidate
bits:1 paltsnp_en Palette Snooping Enable (read only, always returns 0)
bits:1 perrrsp Parity Error Response
bits:1 waitcycctrl Wait Cycle Control
bits:1 serrx_en SERR# Enable
bits:1 fbbw_en Fast Back-to-Back Write enable (read only, always returns 0)
bits:6 rsvd Reserved
{}
or pci_cmd (Offset 04) PCI Command
<byte 3466>
ushort value As word
endunion pci_cmd (Offset 04) PCI Command
<byte 3468>
union pci_class (Offset 09) PCI Class
<byte 3468>
{field (By field)}
<byte 3468>
tbits:8 baseclcode Base Class Code
<byte 3469>
tbits:8 subclcode Subclass Code
<byte 3470>
tbits:8 reglevpi Register Level Programming Interface
{}
or pci_class (Offset 09) PCI Class
<byte 3468>
utiny[3] value As byte array
endunion pci_class (Offset 09) PCI Class
<byte 3471>
union pci_revid (Offset 08) PCI Revision
<byte 3471>
{field (By field)}
<byte 3471>
tbits:2 minor Minor
tbits:3 major Major
tbits:3 res Reserved
{}
or pci_revid (Offset 08) PCI Revision
<byte 3471>
utiny value As byte
endunion pci_revid (Offset 08) PCI Revision
<byte 3472>
{pci_rsvd0f ((Offset 0F) Reserved)}
<byte 3472>
utiny value
{}
<byte 3473>
union pci_hdrtype (Offset 0E) PCI Header Type
<byte 3473>
{field (By field)}
<byte 3473>
tbits:8 type PCI header type (read only)
{}
or pci_hdrtype (Offset 0E) PCI Header Type
<byte 3473>
utiny value As byte
endunion pci_hdrtype (Offset 0E) PCI Header Type
<byte 3474>
union pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3474>
{field (By field)}
<byte 3474>
tbits:8 tmr PCI latency timer
{}
or pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3474>
utiny value As byte
endunion pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3475>
union pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3475>
{field (By field)}
<byte 3475>
tbits:8 size PCI cache line size
{}
or pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3475>
utiny value As byte
endunion pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3476>
{pci_rsvd10_13 ((Offset 10) Reserved)}
<byte 3476>
ulong value
{}
<byte 3480>
union pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3480>
{field (By field)}
<byte 3480>
lbits:1 memspace I/O Space Indicator
lbits:7 alwayszero Always read as zero
lbits:24 baseaddr Base Address
{}
or pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3480>
ulong value As longword
endunion pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3484>
union pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3484>
{field (By field)}
<byte 3484>
lbits:1 memspace I/O Space Indicator
lbits:7 alwayszero Always read as zero
lbits:24 baseaddr Base Address
{}
or pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3484>
ulong value As longword
endunion pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3488>
union pci_membase (Offset 1C) PCI Memory Base Address
<byte 3488>
{field (By field)}
<byte 3488>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:5 alwayszero Always read as zero
lbits:23 baseaddr Base Address
{}
or pci_membase (Offset 1C) PCI Memory Base Address
<byte 3488>
ulong value As longword
endunion pci_membase (Offset 1C) PCI Memory Base Address
<byte 3492>
union pci_rambase (Offset 20) PCI RAM Base Address
<byte 3492>
{field (By field)}
<byte 3492>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:13 alwayszero Always read as zero
lbits:15 baseaddr Base Address
{}
or pci_rambase (Offset 20) PCI RAM Base Address
<byte 3492>
ulong value As longword
endunion pci_rambase (Offset 20) PCI RAM Base Address
<byte 3496>
union pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3496>
{field (By field)}
<byte 3496>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:13 alwayszero Always read as zero
lbits:15 baseaddr Base Address
{}
or pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3496>
ulong value As longword
endunion pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3500>
{pci_rsrvd28_2b ((Offset 28) Reserved)}
<byte 3500>
ulong value
{}
<byte 3504>
union pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3504>
{field (By field)}
<byte 3504>
bits:16 id Vendor ID
{}
or pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3504>
ushort value As word
endunion pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3506>
union pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3506>
{field (By field)}
<byte 3506>
bits:16 id Vendor ID
{}
or pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3506>
ushort value As word
endunion pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3508>
union pci_rombase (Offset 30) PCI ROM Base Address
<byte 3508>
{field (By field)}
<byte 3508>
lbits:1 decode_en Decode enable
lbits:16 rsvd Reserved - always zero
lbits:15 address Address Decoding
{}
or pci_rombase (Offset 30) PCI ROM Base Address
<byte 3508>
ulong value As longword
endunion pci_rombase (Offset 30) PCI ROM Base Address
<byte 3512>
{pci_rsvd36_37 ((Offset 36) Reserved)}
<byte 3512>
ushort value
{}
<byte 3514>
{pci_rsvd35 ((Offset 35) Reserved)}
<byte 3514>
utiny value
{}
<byte 3515>
union pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3515>
{field (By field)}
<byte 3515>
tbits:8 offset Offset to the first item in the capabilities linked list
{}
or pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3515>
utiny value As byte
endunion pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3516>
{pci_rsvd38_3b ((Offset 38) Reserved)}
<byte 3516>
ulong value
{}
<byte 3520>
union pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 3520>
{field (By field)}
<byte 3520>
tbits:8 lat PCI Maximum Latentcy (read only)
{}
or pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 3520>
utiny value As byte
endunion pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 3521>
union pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 3521>
{field (By field)}
<byte 3521>
tbits:8 grant PCI Minimum Grant (read only)
{}
or pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 3521>
utiny value As byte
endunion pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 3522>
union pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 3522>
{field (By field)}
<byte 3522>
tbits:8 pin PCI Interrupt Pin (read only)
{}
or pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 3522>
utiny value As byte
endunion pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 3523>
union pci_int_line (Offset 3C) PCI Interrupt Line
<byte 3523>
{field (By field)}
<byte 3523>
tbits:8 line PCI Interrupt Line
{}
or pci_int_line (Offset 3C) PCI Interrupt Line
<byte 3523>
utiny value As byte
endunion pci_int_line (Offset 3C) PCI Interrupt Line
<byte 3524>
union pci_mctr (Offset 43) PCI Master Control
<byte 3524>
{field (By field)}
<byte 3524>
tbits:1 ecl Enable MRM and MRL Completion to Cache Line
tbits:1 rrd PCI Memory Read Round Down Enable
tbits:1 p64 PCI Present and Active
tbits:1 rae Memory Read Alignment Enable
tbits:1 wae Memory Write Alignment Enable
tbits:1 rbe PCI Read Burst Counter Enable
tbits:1 wbe PCI Write Burst Counter Enable
tbits:1 dlt Disable Latency Timer
{}
or pci_mctr (Offset 43) PCI Master Control
<byte 3524>
utiny value As byte
endunion pci_mctr (Offset 43) PCI Master Control
<byte 3525>
union pci_romctr (Offset 42) PCI ROM Control
<byte 3525>
{field (By field)}
<byte 3525>
tbits:1 vpp_en ROM VPP Enable
tbits:1 fla Flash Installed (read only)
tbits:1 rom ROM Installed (read only)
tbits:1 rm0 RAM 0 (read only); combination of RAM 2, RAM 1, and RAM 0 describe static RAM configuration: 000 - none, 001 - 128KB, 010 - 256KB, 011 - 512KB, 100 - 1MB, 101 - 2MB, 110 - reserved, 111 - reserved
tbits:1 rm1 RAM 1 (read only)
tbits:1 svl Subsystem VID Loaded (read only)
tbits:1 par External memory parity checking enabled (read only)
tbits:1 rm2 RAM 2 (read only)
{}
or pci_romctr (Offset 42) PCI ROM Control
<byte 3525>
utiny value As byte
endunion pci_romctr (Offset 42) PCI ROM Control
<byte 3526>
union pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 3526>
{field (By field)}
<byte 3526>
tbits:4 read_wait DMA read wait count
tbits:4 write_wait DMA write wait count
{}
or pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 3526>
utiny value As byte
endunion pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 3527>
union pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 3527>
{field (By field)}
<byte 3527>
tbits:4 read_burst PCI read burst count
tbits:4 write_burst PCI write burst count
{}
or pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 3527>
utiny value As byte
endunion pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 3528>
union pci_instat (Offset 47) PCI Interrupt Status
<byte 3528>
{field (By field)}
<byte 3528>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_instat (Offset 47) PCI Interrupt Status
<byte 3528>
utiny value As byte
endunion pci_instat (Offset 47) PCI Interrupt Status
<byte 3529>
union pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 3529>
{field (By field)}
<byte 3529>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 3529>
utiny value As byte
endunion pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 3530>
union pci_intpend (Offset 45) PCI Interrupt
<byte 3530>
{field (By field)}
<byte 3530>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_intpend (Offset 45) PCI Interrupt
<byte 3530>
utiny value As byte
endunion pci_intpend (Offset 45) PCI Interrupt
<byte 3531>
union pci_softrst (Offset 44) PCI Interface Reset Control
<byte 3531>
{field (By field)}
<byte 3531>
tbits:1 rst PCI Interface Soft Reset
tbits:1 dpe Reserved (must be zero)
tbits:1 rdd RAM/ROM Read Delayed Transaction Disabled
tbits:1 tad Target Abort Disable
tbits:4 rsvd Reserved (must be zero)
{}
or pci_softrst (Offset 44) PCI Interface Reset Control
<byte 3531>
utiny value As byte
endunion pci_softrst (Offset 44) PCI Interface Reset Control
<byte 3532>
{pci_rsvd48_4b ((Offset 48) Reserved)}
<byte 3532>
ulong value
{}
<byte 3536>
{pci_rsvd4c_4f ((Offset 4C) Reserved)}
<byte 3536>
ulong value
{}
<byte 3540>
union pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 3540>
{field (By field)}
<byte 3540>
bits:3 ver PCI Power Management Specification Version
bits:1 clk PME Clock
bits:1 aps Auxilliary Power Source
bits:1 dsi Device Specific Initialization
bits:3 rsvd Reserved
bits:1 d1 D1 Support
bits:1 d2 D2 Support
bits:5 pme PME Support
{}
or pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 3540>
ushort value As word
endunion pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 3542>
union pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 3542>
{field (By field)}
<byte 3542>
tbits:8 offset Offset to the first item in the capabilities linked list
{}
or pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 3542>
utiny value As byte
endunion pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 3543>
union pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 3543>
{field (By field)}
<byte 3543>
tbits:8 cap_id Capability structure identifier.
{}
or pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 3543>
utiny value As byte
endunion pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 3544>
{pci_rsvd56_57 ((Offset 56) Reserved)}
<byte 3544>
ushort value
{}
<byte 3546>
union pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 3546>
{field (By field)}
<byte 3546>
bits:2 pst Power State
bits:6 rsvd Reserved
bits:1 pen PME Enable
bits:4 sel Data Select
bits:2 scl Data Scale
bits:1 pme PME Status
{}
or pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 3546>
ushort value As word
endunion pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 3548>
union spiaddr (Offset 58) SPI RAM/ROM Address
<byte 3548>
{field (By field)}
<byte 3548>
lbits:1 sra SPI SRAM Access
lbits:10 rsvd Reserved
lbits:21 address RAM/ROM Address
{}
or spiaddr (Offset 58) SPI RAM/ROM Address
<byte 3548>
ulong value As longword
endunion spiaddr (Offset 58) SPI RAM/ROM Address
<byte 3552>
union spidata (Offset 5C) SPI RAM/ROM Data
<byte 3552>
union field By field
<byte 3552>
{ram (By field)}
<byte 3552>
lbits:32 data RAM data
{}
or field By field
<byte 3552>
{rom (By field)}
<byte 3552>
lbits:8 data ROM data
lbits:24 rsvd Reserved
{}
endunion field By field
or spidata (Offset 5C) SPI RAM/ROM Data
<byte 3552>
ulong value As longword
endunion spidata (Offset 5C) SPI RAM/ROM Data
{}
endunion pcicfg[0] Tachyon XL2 PCI Configuration Registers
<byte 3556>
union pcicfg[1] Tachyon XL2 PCI Configuration Registers
<byte 3556>
ulong[24] pcicfga Tachyon XL2 PCI Configuration Registers As Longwords
or pcicfg[1] Tachyon XL2 PCI Configuration Registers
<byte 3556>
{pcicfg (Tachyon XL2 PCI Configuration Registers By Field)}
<byte 3556>
union pci_device_id (Offset 02) PCI Device ID
<byte 3556>
{field (By field)}
<byte 3556>
bits:16 id Vendor ID
{}
or pci_device_id (Offset 02) PCI Device ID
<byte 3556>
ushort value As word
endunion pci_device_id (Offset 02) PCI Device ID
<byte 3558>
union pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3558>
{field (By field)}
<byte 3558>
bits:16 id Vendor ID
{}
or pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3558>
ushort value As word
endunion pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3560>
union pci_status (Offset 06) PCI Status
<byte 3560>
{field (By field)}
<byte 3560>
bits:4 rsvd Reserved
bits:1 cpl New Capabilities
bits:1 cap66mhz 66MHz Capable
bits:1 udfsup UDF Supported (read only, always returns 0)
bits:1 capfbbw Fast Back-to-Back Capable (read only, always returns 0)
bits:1 dperr Data Parity Error Detected
bits:2 devsel_time PCI_DEVSEL# response timing (read only, always returns 1)
bits:1 sgnltabrt Signaled Target Abort
bits:1 rcvdtabrt Received Target Abort
bits:1 rcvdmabrt Received Master Abort
bits:1 sgnlsyserr Signaled System Error
bits:1 perr Detected Parity Error
{}
or pci_status (Offset 06) PCI Status
<byte 3560>
ushort value As word
endunion pci_status (Offset 06) PCI Status
<byte 3562>
union pci_cmd (Offset 04) PCI Command
<byte 3562>
{field (By field)}
<byte 3562>
bits:1 io_access I/O Access Control
bits:1 mem_access Memory Access Control
bits:1 pcim_en PCI Master Enable
bits:1 scycle_en Special Cycle Enable (read only, always returns 0)
bits:1 memwinv Memory Write & Invalidate
bits:1 paltsnp_en Palette Snooping Enable (read only, always returns 0)
bits:1 perrrsp Parity Error Response
bits:1 waitcycctrl Wait Cycle Control
bits:1 serrx_en SERR# Enable
bits:1 fbbw_en Fast Back-to-Back Write enable (read only, always returns 0)
bits:6 rsvd Reserved
{}
or pci_cmd (Offset 04) PCI Command
<byte 3562>
ushort value As word
endunion pci_cmd (Offset 04) PCI Command
<byte 3564>
union pci_class (Offset 09) PCI Class
<byte 3564>
{field (By field)}
<byte 3564>
tbits:8 baseclcode Base Class Code
<byte 3565>
tbits:8 subclcode Subclass Code
<byte 3566>
tbits:8 reglevpi Register Level Programming Interface
{}
or pci_class (Offset 09) PCI Class
<byte 3564>
utiny[3] value As byte array
endunion pci_class (Offset 09) PCI Class
<byte 3567>
union pci_revid (Offset 08) PCI Revision
<byte 3567>
{field (By field)}
<byte 3567>
tbits:2 minor Minor
tbits:3 major Major
tbits:3 res Reserved
{}
or pci_revid (Offset 08) PCI Revision
<byte 3567>
utiny value As byte
endunion pci_revid (Offset 08) PCI Revision
<byte 3568>
{pci_rsvd0f ((Offset 0F) Reserved)}
<byte 3568>
utiny value
{}
<byte 3569>
union pci_hdrtype (Offset 0E) PCI Header Type
<byte 3569>
{field (By field)}
<byte 3569>
tbits:8 type PCI header type (read only)
{}
or pci_hdrtype (Offset 0E) PCI Header Type
<byte 3569>
utiny value As byte
endunion pci_hdrtype (Offset 0E) PCI Header Type
<byte 3570>
union pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3570>
{field (By field)}
<byte 3570>
tbits:8 tmr PCI latency timer
{}
or pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3570>
utiny value As byte
endunion pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3571>
union pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3571>
{field (By field)}
<byte 3571>
tbits:8 size PCI cache line size
{}
or pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3571>
utiny value As byte
endunion pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3572>
{pci_rsvd10_13 ((Offset 10) Reserved)}
<byte 3572>
ulong value
{}
<byte 3576>
union pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3576>
{field (By field)}
<byte 3576>
lbits:1 memspace I/O Space Indicator
lbits:7 alwayszero Always read as zero
lbits:24 baseaddr Base Address
{}
or pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3576>
ulong value As longword
endunion pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3580>
union pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3580>
{field (By field)}
<byte 3580>
lbits:1 memspace I/O Space Indicator
lbits:7 alwayszero Always read as zero
lbits:24 baseaddr Base Address
{}
or pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3580>
ulong value As longword
endunion pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3584>
union pci_membase (Offset 1C) PCI Memory Base Address
<byte 3584>
{field (By field)}
<byte 3584>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:5 alwayszero Always read as zero
lbits:23 baseaddr Base Address
{}
or pci_membase (Offset 1C) PCI Memory Base Address
<byte 3584>
ulong value As longword
endunion pci_membase (Offset 1C) PCI Memory Base Address
<byte 3588>
union pci_rambase (Offset 20) PCI RAM Base Address
<byte 3588>
{field (By field)}
<byte 3588>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:13 alwayszero Always read as zero
lbits:15 baseaddr Base Address
{}
or pci_rambase (Offset 20) PCI RAM Base Address
<byte 3588>
ulong value As longword
endunion pci_rambase (Offset 20) PCI RAM Base Address
<byte 3592>
union pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3592>
{field (By field)}
<byte 3592>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:13 alwayszero Always read as zero
lbits:15 baseaddr Base Address
{}
or pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3592>
ulong value As longword
endunion pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3596>
{pci_rsrvd28_2b ((Offset 28) Reserved)}
<byte 3596>
ulong value
{}
<byte 3600>
union pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3600>
{field (By field)}
<byte 3600>
bits:16 id Vendor ID
{}
or pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3600>
ushort value As word
endunion pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3602>
union pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3602>
{field (By field)}
<byte 3602>
bits:16 id Vendor ID
{}
or pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3602>
ushort value As word
endunion pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3604>
union pci_rombase (Offset 30) PCI ROM Base Address
<byte 3604>
{field (By field)}
<byte 3604>
lbits:1 decode_en Decode enable
lbits:16 rsvd Reserved - always zero
lbits:15 address Address Decoding
{}
or pci_rombase (Offset 30) PCI ROM Base Address
<byte 3604>
ulong value As longword
endunion pci_rombase (Offset 30) PCI ROM Base Address
<byte 3608>
{pci_rsvd36_37 ((Offset 36) Reserved)}
<byte 3608>
ushort value
{}
<byte 3610>
{pci_rsvd35 ((Offset 35) Reserved)}
<byte 3610>
utiny value
{}
<byte 3611>
union pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3611>
{field (By field)}
<byte 3611>
tbits:8 offset Offset to the first item in the capabilities linked list
{}
or pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3611>
utiny value As byte
endunion pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3612>
{pci_rsvd38_3b ((Offset 38) Reserved)}
<byte 3612>
ulong value
{}
<byte 3616>
union pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 3616>
{field (By field)}
<byte 3616>
tbits:8 lat PCI Maximum Latentcy (read only)
{}
or pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 3616>
utiny value As byte
endunion pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 3617>
union pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 3617>
{field (By field)}
<byte 3617>
tbits:8 grant PCI Minimum Grant (read only)
{}
or pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 3617>
utiny value As byte
endunion pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 3618>
union pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 3618>
{field (By field)}
<byte 3618>
tbits:8 pin PCI Interrupt Pin (read only)
{}
or pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 3618>
utiny value As byte
endunion pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 3619>
union pci_int_line (Offset 3C) PCI Interrupt Line
<byte 3619>
{field (By field)}
<byte 3619>
tbits:8 line PCI Interrupt Line
{}
or pci_int_line (Offset 3C) PCI Interrupt Line
<byte 3619>
utiny value As byte
endunion pci_int_line (Offset 3C) PCI Interrupt Line
<byte 3620>
union pci_mctr (Offset 43) PCI Master Control
<byte 3620>
{field (By field)}
<byte 3620>
tbits:1 ecl Enable MRM and MRL Completion to Cache Line
tbits:1 rrd PCI Memory Read Round Down Enable
tbits:1 p64 PCI Present and Active
tbits:1 rae Memory Read Alignment Enable
tbits:1 wae Memory Write Alignment Enable
tbits:1 rbe PCI Read Burst Counter Enable
tbits:1 wbe PCI Write Burst Counter Enable
tbits:1 dlt Disable Latency Timer
{}
or pci_mctr (Offset 43) PCI Master Control
<byte 3620>
utiny value As byte
endunion pci_mctr (Offset 43) PCI Master Control
<byte 3621>
union pci_romctr (Offset 42) PCI ROM Control
<byte 3621>
{field (By field)}
<byte 3621>
tbits:1 vpp_en ROM VPP Enable
tbits:1 fla Flash Installed (read only)
tbits:1 rom ROM Installed (read only)
tbits:1 rm0 RAM 0 (read only); combination of RAM 2, RAM 1, and RAM 0 describe static RAM configuration: 000 - none, 001 - 128KB, 010 - 256KB, 011 - 512KB, 100 - 1MB, 101 - 2MB, 110 - reserved, 111 - reserved
tbits:1 rm1 RAM 1 (read only)
tbits:1 svl Subsystem VID Loaded (read only)
tbits:1 par External memory parity checking enabled (read only)
tbits:1 rm2 RAM 2 (read only)
{}
or pci_romctr (Offset 42) PCI ROM Control
<byte 3621>
utiny value As byte
endunion pci_romctr (Offset 42) PCI ROM Control
<byte 3622>
union pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 3622>
{field (By field)}
<byte 3622>
tbits:4 read_wait DMA read wait count
tbits:4 write_wait DMA write wait count
{}
or pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 3622>
utiny value As byte
endunion pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 3623>
union pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 3623>
{field (By field)}
<byte 3623>
tbits:4 read_burst PCI read burst count
tbits:4 write_burst PCI write burst count
{}
or pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 3623>
utiny value As byte
endunion pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 3624>
union pci_instat (Offset 47) PCI Interrupt Status
<byte 3624>
{field (By field)}
<byte 3624>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_instat (Offset 47) PCI Interrupt Status
<byte 3624>
utiny value As byte
endunion pci_instat (Offset 47) PCI Interrupt Status
<byte 3625>
union pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 3625>
{field (By field)}
<byte 3625>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 3625>
utiny value As byte
endunion pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 3626>
union pci_intpend (Offset 45) PCI Interrupt
<byte 3626>
{field (By field)}
<byte 3626>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_intpend (Offset 45) PCI Interrupt
<byte 3626>
utiny value As byte
endunion pci_intpend (Offset 45) PCI Interrupt
<byte 3627>
union pci_softrst (Offset 44) PCI Interface Reset Control
<byte 3627>
{field (By field)}
<byte 3627>
tbits:1 rst PCI Interface Soft Reset
tbits:1 dpe Reserved (must be zero)
tbits:1 rdd RAM/ROM Read Delayed Transaction Disabled
tbits:1 tad Target Abort Disable
tbits:4 rsvd Reserved (must be zero)
{}
or pci_softrst (Offset 44) PCI Interface Reset Control
<byte 3627>
utiny value As byte
endunion pci_softrst (Offset 44) PCI Interface Reset Control
<byte 3628>
{pci_rsvd48_4b ((Offset 48) Reserved)}
<byte 3628>
ulong value
{}
<byte 3632>
{pci_rsvd4c_4f ((Offset 4C) Reserved)}
<byte 3632>
ulong value
{}
<byte 3636>
union pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 3636>
{field (By field)}
<byte 3636>
bits:3 ver PCI Power Management Specification Version
bits:1 clk PME Clock
bits:1 aps Auxilliary Power Source
bits:1 dsi Device Specific Initialization
bits:3 rsvd Reserved
bits:1 d1 D1 Support
bits:1 d2 D2 Support
bits:5 pme PME Support
{}
or pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 3636>
ushort value As word
endunion pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 3638>
union pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 3638>
{field (By field)}
<byte 3638>
tbits:8 offset Offset to the first item in the capabilities linked list
{}
or pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 3638>
utiny value As byte
endunion pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 3639>
union pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 3639>
{field (By field)}
<byte 3639>
tbits:8 cap_id Capability structure identifier.
{}
or pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 3639>
utiny value As byte
endunion pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 3640>
{pci_rsvd56_57 ((Offset 56) Reserved)}
<byte 3640>
ushort value
{}
<byte 3642>
union pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 3642>
{field (By field)}
<byte 3642>
bits:2 pst Power State
bits:6 rsvd Reserved
bits:1 pen PME Enable
bits:4 sel Data Select
bits:2 scl Data Scale
bits:1 pme PME Status
{}
or pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 3642>
ushort value As word
endunion pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 3644>
union spiaddr (Offset 58) SPI RAM/ROM Address
<byte 3644>
{field (By field)}
<byte 3644>
lbits:1 sra SPI SRAM Access
lbits:10 rsvd Reserved
lbits:21 address RAM/ROM Address
{}
or spiaddr (Offset 58) SPI RAM/ROM Address
<byte 3644>
ulong value As longword
endunion spiaddr (Offset 58) SPI RAM/ROM Address
<byte 3648>
union spidata (Offset 5C) SPI RAM/ROM Data
<byte 3648>
union field By field
<byte 3648>
{ram (By field)}
<byte 3648>
lbits:32 data RAM data
{}
or field By field
<byte 3648>
{rom (By field)}
<byte 3648>
lbits:8 data ROM data
lbits:24 rsvd Reserved
{}
endunion field By field
or spidata (Offset 5C) SPI RAM/ROM Data
<byte 3648>
ulong value As longword
endunion spidata (Offset 5C) SPI RAM/ROM Data
{}
endunion pcicfg[1] Tachyon XL2 PCI Configuration Registers
<byte 3652>
union pcicfg[2] Tachyon XL2 PCI Configuration Registers
<byte 3652>
ulong[24] pcicfga Tachyon XL2 PCI Configuration Registers As Longwords
or pcicfg[2] Tachyon XL2 PCI Configuration Registers
<byte 3652>
{pcicfg (Tachyon XL2 PCI Configuration Registers By Field)}
<byte 3652>
union pci_device_id (Offset 02) PCI Device ID
<byte 3652>
{field (By field)}
<byte 3652>
bits:16 id Vendor ID
{}
or pci_device_id (Offset 02) PCI Device ID
<byte 3652>
ushort value As word
endunion pci_device_id (Offset 02) PCI Device ID
<byte 3654>
union pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3654>
{field (By field)}
<byte 3654>
bits:16 id Vendor ID
{}
or pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3654>
ushort value As word
endunion pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3656>
union pci_status (Offset 06) PCI Status
<byte 3656>
{field (By field)}
<byte 3656>
bits:4 rsvd Reserved
bits:1 cpl New Capabilities
bits:1 cap66mhz 66MHz Capable
bits:1 udfsup UDF Supported (read only, always returns 0)
bits:1 capfbbw Fast Back-to-Back Capable (read only, always returns 0)
bits:1 dperr Data Parity Error Detected
bits:2 devsel_time PCI_DEVSEL# response timing (read only, always returns 1)
bits:1 sgnltabrt Signaled Target Abort
bits:1 rcvdtabrt Received Target Abort
bits:1 rcvdmabrt Received Master Abort
bits:1 sgnlsyserr Signaled System Error
bits:1 perr Detected Parity Error
{}
or pci_status (Offset 06) PCI Status
<byte 3656>
ushort value As word
endunion pci_status (Offset 06) PCI Status
<byte 3658>
union pci_cmd (Offset 04) PCI Command
<byte 3658>
{field (By field)}
<byte 3658>
bits:1 io_access I/O Access Control
bits:1 mem_access Memory Access Control
bits:1 pcim_en PCI Master Enable
bits:1 scycle_en Special Cycle Enable (read only, always returns 0)
bits:1 memwinv Memory Write & Invalidate
bits:1 paltsnp_en Palette Snooping Enable (read only, always returns 0)
bits:1 perrrsp Parity Error Response
bits:1 waitcycctrl Wait Cycle Control
bits:1 serrx_en SERR# Enable
bits:1 fbbw_en Fast Back-to-Back Write enable (read only, always returns 0)
bits:6 rsvd Reserved
{}
or pci_cmd (Offset 04) PCI Command
<byte 3658>
ushort value As word
endunion pci_cmd (Offset 04) PCI Command
<byte 3660>
union pci_class (Offset 09) PCI Class
<byte 3660>
{field (By field)}
<byte 3660>
tbits:8 baseclcode Base Class Code
<byte 3661>
tbits:8 subclcode Subclass Code
<byte 3662>
tbits:8 reglevpi Register Level Programming Interface
{}
or pci_class (Offset 09) PCI Class
<byte 3660>
utiny[3] value As byte array
endunion pci_class (Offset 09) PCI Class
<byte 3663>
union pci_revid (Offset 08) PCI Revision
<byte 3663>
{field (By field)}
<byte 3663>
tbits:2 minor Minor
tbits:3 major Major
tbits:3 res Reserved
{}
or pci_revid (Offset 08) PCI Revision
<byte 3663>
utiny value As byte
endunion pci_revid (Offset 08) PCI Revision
<byte 3664>
{pci_rsvd0f ((Offset 0F) Reserved)}
<byte 3664>
utiny value
{}
<byte 3665>
union pci_hdrtype (Offset 0E) PCI Header Type
<byte 3665>
{field (By field)}
<byte 3665>
tbits:8 type PCI header type (read only)
{}
or pci_hdrtype (Offset 0E) PCI Header Type
<byte 3665>
utiny value As byte
endunion pci_hdrtype (Offset 0E) PCI Header Type
<byte 3666>
union pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3666>
{field (By field)}
<byte 3666>
tbits:8 tmr PCI latency timer
{}
or pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3666>
utiny value As byte
endunion pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3667>
union pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3667>
{field (By field)}
<byte 3667>
tbits:8 size PCI cache line size
{}
or pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3667>
utiny value As byte
endunion pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3668>
{pci_rsvd10_13 ((Offset 10) Reserved)}
<byte 3668>
ulong value
{}
<byte 3672>
union pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3672>
{field (By field)}
<byte 3672>
lbits:1 memspace I/O Space Indicator
lbits:7 alwayszero Always read as zero
lbits:24 baseaddr Base Address
{}
or pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3672>
ulong value As longword
endunion pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3676>
union pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3676>
{field (By field)}
<byte 3676>
lbits:1 memspace I/O Space Indicator
lbits:7 alwayszero Always read as zero
lbits:24 baseaddr Base Address
{}
or pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3676>
ulong value As longword
endunion pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3680>
union pci_membase (Offset 1C) PCI Memory Base Address
<byte 3680>
{field (By field)}
<byte 3680>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:5 alwayszero Always read as zero
lbits:23 baseaddr Base Address
{}
or pci_membase (Offset 1C) PCI Memory Base Address
<byte 3680>
ulong value As longword
endunion pci_membase (Offset 1C) PCI Memory Base Address
<byte 3684>
union pci_rambase (Offset 20) PCI RAM Base Address
<byte 3684>
{field (By field)}
<byte 3684>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:13 alwayszero Always read as zero
lbits:15 baseaddr Base Address
{}
or pci_rambase (Offset 20) PCI RAM Base Address
<byte 3684>
ulong value As longword
endunion pci_rambase (Offset 20) PCI RAM Base Address
<byte 3688>
union pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3688>
{field (By field)}
<byte 3688>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:13 alwayszero Always read as zero
lbits:15 baseaddr Base Address
{}
or pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3688>
ulong value As longword
endunion pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3692>
{pci_rsrvd28_2b ((Offset 28) Reserved)}
<byte 3692>
ulong value
{}
<byte 3696>
union pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3696>
{field (By field)}
<byte 3696>
bits:16 id Vendor ID
{}
or pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3696>
ushort value As word
endunion pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3698>
union pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3698>
{field (By field)}
<byte 3698>
bits:16 id Vendor ID
{}
or pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3698>
ushort value As word
endunion pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3700>
union pci_rombase (Offset 30) PCI ROM Base Address
<byte 3700>
{field (By field)}
<byte 3700>
lbits:1 decode_en Decode enable
lbits:16 rsvd Reserved - always zero
lbits:15 address Address Decoding
{}
or pci_rombase (Offset 30) PCI ROM Base Address
<byte 3700>
ulong value As longword
endunion pci_rombase (Offset 30) PCI ROM Base Address
<byte 3704>
{pci_rsvd36_37 ((Offset 36) Reserved)}
<byte 3704>
ushort value
{}
<byte 3706>
{pci_rsvd35 ((Offset 35) Reserved)}
<byte 3706>
utiny value
{}
<byte 3707>
union pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3707>
{field (By field)}
<byte 3707>
tbits:8 offset Offset to the first item in the capabilities linked list
{}
or pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3707>
utiny value As byte
endunion pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3708>
{pci_rsvd38_3b ((Offset 38) Reserved)}
<byte 3708>
ulong value
{}
<byte 3712>
union pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 3712>
{field (By field)}
<byte 3712>
tbits:8 lat PCI Maximum Latentcy (read only)
{}
or pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 3712>
utiny value As byte
endunion pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 3713>
union pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 3713>
{field (By field)}
<byte 3713>
tbits:8 grant PCI Minimum Grant (read only)
{}
or pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 3713>
utiny value As byte
endunion pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 3714>
union pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 3714>
{field (By field)}
<byte 3714>
tbits:8 pin PCI Interrupt Pin (read only)
{}
or pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 3714>
utiny value As byte
endunion pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 3715>
union pci_int_line (Offset 3C) PCI Interrupt Line
<byte 3715>
{field (By field)}
<byte 3715>
tbits:8 line PCI Interrupt Line
{}
or pci_int_line (Offset 3C) PCI Interrupt Line
<byte 3715>
utiny value As byte
endunion pci_int_line (Offset 3C) PCI Interrupt Line
<byte 3716>
union pci_mctr (Offset 43) PCI Master Control
<byte 3716>
{field (By field)}
<byte 3716>
tbits:1 ecl Enable MRM and MRL Completion to Cache Line
tbits:1 rrd PCI Memory Read Round Down Enable
tbits:1 p64 PCI Present and Active
tbits:1 rae Memory Read Alignment Enable
tbits:1 wae Memory Write Alignment Enable
tbits:1 rbe PCI Read Burst Counter Enable
tbits:1 wbe PCI Write Burst Counter Enable
tbits:1 dlt Disable Latency Timer
{}
or pci_mctr (Offset 43) PCI Master Control
<byte 3716>
utiny value As byte
endunion pci_mctr (Offset 43) PCI Master Control
<byte 3717>
union pci_romctr (Offset 42) PCI ROM Control
<byte 3717>
{field (By field)}
<byte 3717>
tbits:1 vpp_en ROM VPP Enable
tbits:1 fla Flash Installed (read only)
tbits:1 rom ROM Installed (read only)
tbits:1 rm0 RAM 0 (read only); combination of RAM 2, RAM 1, and RAM 0 describe static RAM configuration: 000 - none, 001 - 128KB, 010 - 256KB, 011 - 512KB, 100 - 1MB, 101 - 2MB, 110 - reserved, 111 - reserved
tbits:1 rm1 RAM 1 (read only)
tbits:1 svl Subsystem VID Loaded (read only)
tbits:1 par External memory parity checking enabled (read only)
tbits:1 rm2 RAM 2 (read only)
{}
or pci_romctr (Offset 42) PCI ROM Control
<byte 3717>
utiny value As byte
endunion pci_romctr (Offset 42) PCI ROM Control
<byte 3718>
union pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 3718>
{field (By field)}
<byte 3718>
tbits:4 read_wait DMA read wait count
tbits:4 write_wait DMA write wait count
{}
or pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 3718>
utiny value As byte
endunion pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 3719>
union pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 3719>
{field (By field)}
<byte 3719>
tbits:4 read_burst PCI read burst count
tbits:4 write_burst PCI write burst count
{}
or pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 3719>
utiny value As byte
endunion pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 3720>
union pci_instat (Offset 47) PCI Interrupt Status
<byte 3720>
{field (By field)}
<byte 3720>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_instat (Offset 47) PCI Interrupt Status
<byte 3720>
utiny value As byte
endunion pci_instat (Offset 47) PCI Interrupt Status
<byte 3721>
union pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 3721>
{field (By field)}
<byte 3721>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 3721>
utiny value As byte
endunion pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 3722>
union pci_intpend (Offset 45) PCI Interrupt
<byte 3722>
{field (By field)}
<byte 3722>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_intpend (Offset 45) PCI Interrupt
<byte 3722>
utiny value As byte
endunion pci_intpend (Offset 45) PCI Interrupt
<byte 3723>
union pci_softrst (Offset 44) PCI Interface Reset Control
<byte 3723>
{field (By field)}
<byte 3723>
tbits:1 rst PCI Interface Soft Reset
tbits:1 dpe Reserved (must be zero)
tbits:1 rdd RAM/ROM Read Delayed Transaction Disabled
tbits:1 tad Target Abort Disable
tbits:4 rsvd Reserved (must be zero)
{}
or pci_softrst (Offset 44) PCI Interface Reset Control
<byte 3723>
utiny value As byte
endunion pci_softrst (Offset 44) PCI Interface Reset Control
<byte 3724>
{pci_rsvd48_4b ((Offset 48) Reserved)}
<byte 3724>
ulong value
{}
<byte 3728>
{pci_rsvd4c_4f ((Offset 4C) Reserved)}
<byte 3728>
ulong value
{}
<byte 3732>
union pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 3732>
{field (By field)}
<byte 3732>
bits:3 ver PCI Power Management Specification Version
bits:1 clk PME Clock
bits:1 aps Auxilliary Power Source
bits:1 dsi Device Specific Initialization
bits:3 rsvd Reserved
bits:1 d1 D1 Support
bits:1 d2 D2 Support
bits:5 pme PME Support
{}
or pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 3732>
ushort value As word
endunion pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 3734>
union pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 3734>
{field (By field)}
<byte 3734>
tbits:8 offset Offset to the first item in the capabilities linked list
{}
or pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 3734>
utiny value As byte
endunion pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 3735>
union pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 3735>
{field (By field)}
<byte 3735>
tbits:8 cap_id Capability structure identifier.
{}
or pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 3735>
utiny value As byte
endunion pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 3736>
{pci_rsvd56_57 ((Offset 56) Reserved)}
<byte 3736>
ushort value
{}
<byte 3738>
union pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 3738>
{field (By field)}
<byte 3738>
bits:2 pst Power State
bits:6 rsvd Reserved
bits:1 pen PME Enable
bits:4 sel Data Select
bits:2 scl Data Scale
bits:1 pme PME Status
{}
or pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 3738>
ushort value As word
endunion pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 3740>
union spiaddr (Offset 58) SPI RAM/ROM Address
<byte 3740>
{field (By field)}
<byte 3740>
lbits:1 sra SPI SRAM Access
lbits:10 rsvd Reserved
lbits:21 address RAM/ROM Address
{}
or spiaddr (Offset 58) SPI RAM/ROM Address
<byte 3740>
ulong value As longword
endunion spiaddr (Offset 58) SPI RAM/ROM Address
<byte 3744>
union spidata (Offset 5C) SPI RAM/ROM Data
<byte 3744>
union field By field
<byte 3744>
{ram (By field)}
<byte 3744>
lbits:32 data RAM data
{}
or field By field
<byte 3744>
{rom (By field)}
<byte 3744>
lbits:8 data ROM data
lbits:24 rsvd Reserved
{}
endunion field By field
or spidata (Offset 5C) SPI RAM/ROM Data
<byte 3744>
ulong value As longword
endunion spidata (Offset 5C) SPI RAM/ROM Data
{}
endunion pcicfg[2] Tachyon XL2 PCI Configuration Registers
<byte 3748>
union pcicfg[3] Tachyon XL2 PCI Configuration Registers
<byte 3748>
ulong[24] pcicfga Tachyon XL2 PCI Configuration Registers As Longwords
or pcicfg[3] Tachyon XL2 PCI Configuration Registers
<byte 3748>
{pcicfg (Tachyon XL2 PCI Configuration Registers By Field)}
<byte 3748>
union pci_device_id (Offset 02) PCI Device ID
<byte 3748>
{field (By field)}
<byte 3748>
bits:16 id Vendor ID
{}
or pci_device_id (Offset 02) PCI Device ID
<byte 3748>
ushort value As word
endunion pci_device_id (Offset 02) PCI Device ID
<byte 3750>
union pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3750>
{field (By field)}
<byte 3750>
bits:16 id Vendor ID
{}
or pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3750>
ushort value As word
endunion pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3752>
union pci_status (Offset 06) PCI Status
<byte 3752>
{field (By field)}
<byte 3752>
bits:4 rsvd Reserved
bits:1 cpl New Capabilities
bits:1 cap66mhz 66MHz Capable
bits:1 udfsup UDF Supported (read only, always returns 0)
bits:1 capfbbw Fast Back-to-Back Capable (read only, always returns 0)
bits:1 dperr Data Parity Error Detected
bits:2 devsel_time PCI_DEVSEL# response timing (read only, always returns 1)
bits:1 sgnltabrt Signaled Target Abort
bits:1 rcvdtabrt Received Target Abort
bits:1 rcvdmabrt Received Master Abort
bits:1 sgnlsyserr Signaled System Error
bits:1 perr Detected Parity Error
{}
or pci_status (Offset 06) PCI Status
<byte 3752>
ushort value As word
endunion pci_status (Offset 06) PCI Status
<byte 3754>
union pci_cmd (Offset 04) PCI Command
<byte 3754>
{field (By field)}
<byte 3754>
bits:1 io_access I/O Access Control
bits:1 mem_access Memory Access Control
bits:1 pcim_en PCI Master Enable
bits:1 scycle_en Special Cycle Enable (read only, always returns 0)
bits:1 memwinv Memory Write & Invalidate
bits:1 paltsnp_en Palette Snooping Enable (read only, always returns 0)
bits:1 perrrsp Parity Error Response
bits:1 waitcycctrl Wait Cycle Control
bits:1 serrx_en SERR# Enable
bits:1 fbbw_en Fast Back-to-Back Write enable (read only, always returns 0)
bits:6 rsvd Reserved
{}
or pci_cmd (Offset 04) PCI Command
<byte 3754>
ushort value As word
endunion pci_cmd (Offset 04) PCI Command
<byte 3756>
union pci_class (Offset 09) PCI Class
<byte 3756>
{field (By field)}
<byte 3756>
tbits:8 baseclcode Base Class Code
<byte 3757>
tbits:8 subclcode Subclass Code
<byte 3758>
tbits:8 reglevpi Register Level Programming Interface
{}
or pci_class (Offset 09) PCI Class
<byte 3756>
utiny[3] value As byte array
endunion pci_class (Offset 09) PCI Class
<byte 3759>
union pci_revid (Offset 08) PCI Revision
<byte 3759>
{field (By field)}
<byte 3759>
tbits:2 minor Minor
tbits:3 major Major
tbits:3 res Reserved
{}
or pci_revid (Offset 08) PCI Revision
<byte 3759>
utiny value As byte
endunion pci_revid (Offset 08) PCI Revision
<byte 3760>
{pci_rsvd0f ((Offset 0F) Reserved)}
<byte 3760>
utiny value
{}
<byte 3761>
union pci_hdrtype (Offset 0E) PCI Header Type
<byte 3761>
{field (By field)}
<byte 3761>
tbits:8 type PCI header type (read only)
{}
or pci_hdrtype (Offset 0E) PCI Header Type
<byte 3761>
utiny value As byte
endunion pci_hdrtype (Offset 0E) PCI Header Type
<byte 3762>
union pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3762>
{field (By field)}
<byte 3762>
tbits:8 tmr PCI latency timer
{}
or pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3762>
utiny value As byte
endunion pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3763>
union pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3763>
{field (By field)}
<byte 3763>
tbits:8 size PCI cache line size
{}
or pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3763>
utiny value As byte
endunion pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3764>
{pci_rsvd10_13 ((Offset 10) Reserved)}
<byte 3764>
ulong value
{}
<byte 3768>
union pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3768>
{field (By field)}
<byte 3768>
lbits:1 memspace I/O Space Indicator
lbits:7 alwayszero Always read as zero
lbits:24 baseaddr Base Address
{}
or pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3768>
ulong value As longword
endunion pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3772>
union pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3772>
{field (By field)}
<byte 3772>
lbits:1 memspace I/O Space Indicator
lbits:7 alwayszero Always read as zero
lbits:24 baseaddr Base Address
{}
or pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3772>
ulong value As longword
endunion pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3776>
union pci_membase (Offset 1C) PCI Memory Base Address
<byte 3776>
{field (By field)}
<byte 3776>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:5 alwayszero Always read as zero
lbits:23 baseaddr Base Address
{}
or pci_membase (Offset 1C) PCI Memory Base Address
<byte 3776>
ulong value As longword
endunion pci_membase (Offset 1C) PCI Memory Base Address
<byte 3780>
union pci_rambase (Offset 20) PCI RAM Base Address
<byte 3780>
{field (By field)}
<byte 3780>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:13 alwayszero Always read as zero
lbits:15 baseaddr Base Address
{}
or pci_rambase (Offset 20) PCI RAM Base Address
<byte 3780>
ulong value As longword
endunion pci_rambase (Offset 20) PCI RAM Base Address
<byte 3784>
union pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3784>
{field (By field)}
<byte 3784>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:13 alwayszero Always read as zero
lbits:15 baseaddr Base Address
{}
or pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3784>
ulong value As longword
endunion pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3788>
{pci_rsrvd28_2b ((Offset 28) Reserved)}
<byte 3788>
ulong value
{}
<byte 3792>
union pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3792>
{field (By field)}
<byte 3792>
bits:16 id Vendor ID
{}
or pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3792>
ushort value As word
endunion pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3794>
union pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3794>
{field (By field)}
<byte 3794>
bits:16 id Vendor ID
{}
or pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3794>
ushort value As word
endunion pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3796>
union pci_rombase (Offset 30) PCI ROM Base Address
<byte 3796>
{field (By field)}
<byte 3796>
lbits:1 decode_en Decode enable
lbits:16 rsvd Reserved - always zero
lbits:15 address Address Decoding
{}
or pci_rombase (Offset 30) PCI ROM Base Address
<byte 3796>
ulong value As longword
endunion pci_rombase (Offset 30) PCI ROM Base Address
<byte 3800>
{pci_rsvd36_37 ((Offset 36) Reserved)}
<byte 3800>
ushort value
{}
<byte 3802>
{pci_rsvd35 ((Offset 35) Reserved)}
<byte 3802>
utiny value
{}
<byte 3803>
union pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3803>
{field (By field)}
<byte 3803>
tbits:8 offset Offset to the first item in the capabilities linked list
{}
or pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3803>
utiny value As byte
endunion pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3804>
{pci_rsvd38_3b ((Offset 38) Reserved)}
<byte 3804>
ulong value
{}
<byte 3808>
union pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 3808>
{field (By field)}
<byte 3808>
tbits:8 lat PCI Maximum Latentcy (read only)
{}
or pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 3808>
utiny value As byte
endunion pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 3809>
union pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 3809>
{field (By field)}
<byte 3809>
tbits:8 grant PCI Minimum Grant (read only)
{}
or pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 3809>
utiny value As byte
endunion pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 3810>
union pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 3810>
{field (By field)}
<byte 3810>
tbits:8 pin PCI Interrupt Pin (read only)
{}
or pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 3810>
utiny value As byte
endunion pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 3811>
union pci_int_line (Offset 3C) PCI Interrupt Line
<byte 3811>
{field (By field)}
<byte 3811>
tbits:8 line PCI Interrupt Line
{}
or pci_int_line (Offset 3C) PCI Interrupt Line
<byte 3811>
utiny value As byte
endunion pci_int_line (Offset 3C) PCI Interrupt Line
<byte 3812>
union pci_mctr (Offset 43) PCI Master Control
<byte 3812>
{field (By field)}
<byte 3812>
tbits:1 ecl Enable MRM and MRL Completion to Cache Line
tbits:1 rrd PCI Memory Read Round Down Enable
tbits:1 p64 PCI Present and Active
tbits:1 rae Memory Read Alignment Enable
tbits:1 wae Memory Write Alignment Enable
tbits:1 rbe PCI Read Burst Counter Enable
tbits:1 wbe PCI Write Burst Counter Enable
tbits:1 dlt Disable Latency Timer
{}
or pci_mctr (Offset 43) PCI Master Control
<byte 3812>
utiny value As byte
endunion pci_mctr (Offset 43) PCI Master Control
<byte 3813>
union pci_romctr (Offset 42) PCI ROM Control
<byte 3813>
{field (By field)}
<byte 3813>
tbits:1 vpp_en ROM VPP Enable
tbits:1 fla Flash Installed (read only)
tbits:1 rom ROM Installed (read only)
tbits:1 rm0 RAM 0 (read only); combination of RAM 2, RAM 1, and RAM 0 describe static RAM configuration: 000 - none, 001 - 128KB, 010 - 256KB, 011 - 512KB, 100 - 1MB, 101 - 2MB, 110 - reserved, 111 - reserved
tbits:1 rm1 RAM 1 (read only)
tbits:1 svl Subsystem VID Loaded (read only)
tbits:1 par External memory parity checking enabled (read only)
tbits:1 rm2 RAM 2 (read only)
{}
or pci_romctr (Offset 42) PCI ROM Control
<byte 3813>
utiny value As byte
endunion pci_romctr (Offset 42) PCI ROM Control
<byte 3814>
union pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 3814>
{field (By field)}
<byte 3814>
tbits:4 read_wait DMA read wait count
tbits:4 write_wait DMA write wait count
{}
or pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 3814>
utiny value As byte
endunion pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 3815>
union pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 3815>
{field (By field)}
<byte 3815>
tbits:4 read_burst PCI read burst count
tbits:4 write_burst PCI write burst count
{}
or pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 3815>
utiny value As byte
endunion pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 3816>
union pci_instat (Offset 47) PCI Interrupt Status
<byte 3816>
{field (By field)}
<byte 3816>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_instat (Offset 47) PCI Interrupt Status
<byte 3816>
utiny value As byte
endunion pci_instat (Offset 47) PCI Interrupt Status
<byte 3817>
union pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 3817>
{field (By field)}
<byte 3817>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 3817>
utiny value As byte
endunion pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 3818>
union pci_intpend (Offset 45) PCI Interrupt
<byte 3818>
{field (By field)}
<byte 3818>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_intpend (Offset 45) PCI Interrupt
<byte 3818>
utiny value As byte
endunion pci_intpend (Offset 45) PCI Interrupt
<byte 3819>
union pci_softrst (Offset 44) PCI Interface Reset Control
<byte 3819>
{field (By field)}
<byte 3819>
tbits:1 rst PCI Interface Soft Reset
tbits:1 dpe Reserved (must be zero)
tbits:1 rdd RAM/ROM Read Delayed Transaction Disabled
tbits:1 tad Target Abort Disable
tbits:4 rsvd Reserved (must be zero)
{}
or pci_softrst (Offset 44) PCI Interface Reset Control
<byte 3819>
utiny value As byte
endunion pci_softrst (Offset 44) PCI Interface Reset Control
<byte 3820>
{pci_rsvd48_4b ((Offset 48) Reserved)}
<byte 3820>
ulong value
{}
<byte 3824>
{pci_rsvd4c_4f ((Offset 4C) Reserved)}
<byte 3824>
ulong value
{}
<byte 3828>
union pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 3828>
{field (By field)}
<byte 3828>
bits:3 ver PCI Power Management Specification Version
bits:1 clk PME Clock
bits:1 aps Auxilliary Power Source
bits:1 dsi Device Specific Initialization
bits:3 rsvd Reserved
bits:1 d1 D1 Support
bits:1 d2 D2 Support
bits:5 pme PME Support
{}
or pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 3828>
ushort value As word
endunion pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 3830>
union pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 3830>
{field (By field)}
<byte 3830>
tbits:8 offset Offset to the first item in the capabilities linked list
{}
or pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 3830>
utiny value As byte
endunion pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 3831>
union pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 3831>
{field (By field)}
<byte 3831>
tbits:8 cap_id Capability structure identifier.
{}
or pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 3831>
utiny value As byte
endunion pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 3832>
{pci_rsvd56_57 ((Offset 56) Reserved)}
<byte 3832>
ushort value
{}
<byte 3834>
union pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 3834>
{field (By field)}
<byte 3834>
bits:2 pst Power State
bits:6 rsvd Reserved
bits:1 pen PME Enable
bits:4 sel Data Select
bits:2 scl Data Scale
bits:1 pme PME Status
{}
or pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 3834>
ushort value As word
endunion pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 3836>
union spiaddr (Offset 58) SPI RAM/ROM Address
<byte 3836>
{field (By field)}
<byte 3836>
lbits:1 sra SPI SRAM Access
lbits:10 rsvd Reserved
lbits:21 address RAM/ROM Address
{}
or spiaddr (Offset 58) SPI RAM/ROM Address
<byte 3836>
ulong value As longword
endunion spiaddr (Offset 58) SPI RAM/ROM Address
<byte 3840>
union spidata (Offset 5C) SPI RAM/ROM Data
<byte 3840>
union field By field
<byte 3840>
{ram (By field)}
<byte 3840>
lbits:32 data RAM data
{}
or field By field
<byte 3840>
{rom (By field)}
<byte 3840>
lbits:8 data ROM data
lbits:24 rsvd Reserved
{}
endunion field By field
or spidata (Offset 5C) SPI RAM/ROM Data
<byte 3840>
ulong value As longword
endunion spidata (Offset 5C) SPI RAM/ROM Data
{}
endunion pcicfg[3] Tachyon XL2 PCI Configuration Registers
<byte 3844>
union pcicfg[4] Tachyon XL2 PCI Configuration Registers
<byte 3844>
ulong[24] pcicfga Tachyon XL2 PCI Configuration Registers As Longwords
or pcicfg[4] Tachyon XL2 PCI Configuration Registers
<byte 3844>
{pcicfg (Tachyon XL2 PCI Configuration Registers By Field)}
<byte 3844>
union pci_device_id (Offset 02) PCI Device ID
<byte 3844>
{field (By field)}
<byte 3844>
bits:16 id Vendor ID
{}
or pci_device_id (Offset 02) PCI Device ID
<byte 3844>
ushort value As word
endunion pci_device_id (Offset 02) PCI Device ID
<byte 3846>
union pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3846>
{field (By field)}
<byte 3846>
bits:16 id Vendor ID
{}
or pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3846>
ushort value As word
endunion pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3848>
union pci_status (Offset 06) PCI Status
<byte 3848>
{field (By field)}
<byte 3848>
bits:4 rsvd Reserved
bits:1 cpl New Capabilities
bits:1 cap66mhz 66MHz Capable
bits:1 udfsup UDF Supported (read only, always returns 0)
bits:1 capfbbw Fast Back-to-Back Capable (read only, always returns 0)
bits:1 dperr Data Parity Error Detected
bits:2 devsel_time PCI_DEVSEL# response timing (read only, always returns 1)
bits:1 sgnltabrt Signaled Target Abort
bits:1 rcvdtabrt Received Target Abort
bits:1 rcvdmabrt Received Master Abort
bits:1 sgnlsyserr Signaled System Error
bits:1 perr Detected Parity Error
{}
or pci_status (Offset 06) PCI Status
<byte 3848>
ushort value As word
endunion pci_status (Offset 06) PCI Status
<byte 3850>
union pci_cmd (Offset 04) PCI Command
<byte 3850>
{field (By field)}
<byte 3850>
bits:1 io_access I/O Access Control
bits:1 mem_access Memory Access Control
bits:1 pcim_en PCI Master Enable
bits:1 scycle_en Special Cycle Enable (read only, always returns 0)
bits:1 memwinv Memory Write & Invalidate
bits:1 paltsnp_en Palette Snooping Enable (read only, always returns 0)
bits:1 perrrsp Parity Error Response
bits:1 waitcycctrl Wait Cycle Control
bits:1 serrx_en SERR# Enable
bits:1 fbbw_en Fast Back-to-Back Write enable (read only, always returns 0)
bits:6 rsvd Reserved
{}
or pci_cmd (Offset 04) PCI Command
<byte 3850>
ushort value As word
endunion pci_cmd (Offset 04) PCI Command
<byte 3852>
union pci_class (Offset 09) PCI Class
<byte 3852>
{field (By field)}
<byte 3852>
tbits:8 baseclcode Base Class Code
<byte 3853>
tbits:8 subclcode Subclass Code
<byte 3854>
tbits:8 reglevpi Register Level Programming Interface
{}
or pci_class (Offset 09) PCI Class
<byte 3852>
utiny[3] value As byte array
endunion pci_class (Offset 09) PCI Class
<byte 3855>
union pci_revid (Offset 08) PCI Revision
<byte 3855>
{field (By field)}
<byte 3855>
tbits:2 minor Minor
tbits:3 major Major
tbits:3 res Reserved
{}
or pci_revid (Offset 08) PCI Revision
<byte 3855>
utiny value As byte
endunion pci_revid (Offset 08) PCI Revision
<byte 3856>
{pci_rsvd0f ((Offset 0F) Reserved)}
<byte 3856>
utiny value
{}
<byte 3857>
union pci_hdrtype (Offset 0E) PCI Header Type
<byte 3857>
{field (By field)}
<byte 3857>
tbits:8 type PCI header type (read only)
{}
or pci_hdrtype (Offset 0E) PCI Header Type
<byte 3857>
utiny value As byte
endunion pci_hdrtype (Offset 0E) PCI Header Type
<byte 3858>
union pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3858>
{field (By field)}
<byte 3858>
tbits:8 tmr PCI latency timer
{}
or pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3858>
utiny value As byte
endunion pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3859>
union pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3859>
{field (By field)}
<byte 3859>
tbits:8 size PCI cache line size
{}
or pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3859>
utiny value As byte
endunion pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3860>
{pci_rsvd10_13 ((Offset 10) Reserved)}
<byte 3860>
ulong value
{}
<byte 3864>
union pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3864>
{field (By field)}
<byte 3864>
lbits:1 memspace I/O Space Indicator
lbits:7 alwayszero Always read as zero
lbits:24 baseaddr Base Address
{}
or pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3864>
ulong value As longword
endunion pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3868>
union pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3868>
{field (By field)}
<byte 3868>
lbits:1 memspace I/O Space Indicator
lbits:7 alwayszero Always read as zero
lbits:24 baseaddr Base Address
{}
or pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3868>
ulong value As longword
endunion pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3872>
union pci_membase (Offset 1C) PCI Memory Base Address
<byte 3872>
{field (By field)}
<byte 3872>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:5 alwayszero Always read as zero
lbits:23 baseaddr Base Address
{}
or pci_membase (Offset 1C) PCI Memory Base Address
<byte 3872>
ulong value As longword
endunion pci_membase (Offset 1C) PCI Memory Base Address
<byte 3876>
union pci_rambase (Offset 20) PCI RAM Base Address
<byte 3876>
{field (By field)}
<byte 3876>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:13 alwayszero Always read as zero
lbits:15 baseaddr Base Address
{}
or pci_rambase (Offset 20) PCI RAM Base Address
<byte 3876>
ulong value As longword
endunion pci_rambase (Offset 20) PCI RAM Base Address
<byte 3880>
union pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3880>
{field (By field)}
<byte 3880>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:13 alwayszero Always read as zero
lbits:15 baseaddr Base Address
{}
or pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3880>
ulong value As longword
endunion pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3884>
{pci_rsrvd28_2b ((Offset 28) Reserved)}
<byte 3884>
ulong value
{}
<byte 3888>
union pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3888>
{field (By field)}
<byte 3888>
bits:16 id Vendor ID
{}
or pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3888>
ushort value As word
endunion pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3890>
union pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3890>
{field (By field)}
<byte 3890>
bits:16 id Vendor ID
{}
or pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3890>
ushort value As word
endunion pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3892>
union pci_rombase (Offset 30) PCI ROM Base Address
<byte 3892>
{field (By field)}
<byte 3892>
lbits:1 decode_en Decode enable
lbits:16 rsvd Reserved - always zero
lbits:15 address Address Decoding
{}
or pci_rombase (Offset 30) PCI ROM Base Address
<byte 3892>
ulong value As longword
endunion pci_rombase (Offset 30) PCI ROM Base Address
<byte 3896>
{pci_rsvd36_37 ((Offset 36) Reserved)}
<byte 3896>
ushort value
{}
<byte 3898>
{pci_rsvd35 ((Offset 35) Reserved)}
<byte 3898>
utiny value
{}
<byte 3899>
union pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3899>
{field (By field)}
<byte 3899>
tbits:8 offset Offset to the first item in the capabilities linked list
{}
or pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3899>
utiny value As byte
endunion pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3900>
{pci_rsvd38_3b ((Offset 38) Reserved)}
<byte 3900>
ulong value
{}
<byte 3904>
union pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 3904>
{field (By field)}
<byte 3904>
tbits:8 lat PCI Maximum Latentcy (read only)
{}
or pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 3904>
utiny value As byte
endunion pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 3905>
union pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 3905>
{field (By field)}
<byte 3905>
tbits:8 grant PCI Minimum Grant (read only)
{}
or pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 3905>
utiny value As byte
endunion pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 3906>
union pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 3906>
{field (By field)}
<byte 3906>
tbits:8 pin PCI Interrupt Pin (read only)
{}
or pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 3906>
utiny value As byte
endunion pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 3907>
union pci_int_line (Offset 3C) PCI Interrupt Line
<byte 3907>
{field (By field)}
<byte 3907>
tbits:8 line PCI Interrupt Line
{}
or pci_int_line (Offset 3C) PCI Interrupt Line
<byte 3907>
utiny value As byte
endunion pci_int_line (Offset 3C) PCI Interrupt Line
<byte 3908>
union pci_mctr (Offset 43) PCI Master Control
<byte 3908>
{field (By field)}
<byte 3908>
tbits:1 ecl Enable MRM and MRL Completion to Cache Line
tbits:1 rrd PCI Memory Read Round Down Enable
tbits:1 p64 PCI Present and Active
tbits:1 rae Memory Read Alignment Enable
tbits:1 wae Memory Write Alignment Enable
tbits:1 rbe PCI Read Burst Counter Enable
tbits:1 wbe PCI Write Burst Counter Enable
tbits:1 dlt Disable Latency Timer
{}
or pci_mctr (Offset 43) PCI Master Control
<byte 3908>
utiny value As byte
endunion pci_mctr (Offset 43) PCI Master Control
<byte 3909>
union pci_romctr (Offset 42) PCI ROM Control
<byte 3909>
{field (By field)}
<byte 3909>
tbits:1 vpp_en ROM VPP Enable
tbits:1 fla Flash Installed (read only)
tbits:1 rom ROM Installed (read only)
tbits:1 rm0 RAM 0 (read only); combination of RAM 2, RAM 1, and RAM 0 describe static RAM configuration: 000 - none, 001 - 128KB, 010 - 256KB, 011 - 512KB, 100 - 1MB, 101 - 2MB, 110 - reserved, 111 - reserved
tbits:1 rm1 RAM 1 (read only)
tbits:1 svl Subsystem VID Loaded (read only)
tbits:1 par External memory parity checking enabled (read only)
tbits:1 rm2 RAM 2 (read only)
{}
or pci_romctr (Offset 42) PCI ROM Control
<byte 3909>
utiny value As byte
endunion pci_romctr (Offset 42) PCI ROM Control
<byte 3910>
union pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 3910>
{field (By field)}
<byte 3910>
tbits:4 read_wait DMA read wait count
tbits:4 write_wait DMA write wait count
{}
or pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 3910>
utiny value As byte
endunion pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 3911>
union pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 3911>
{field (By field)}
<byte 3911>
tbits:4 read_burst PCI read burst count
tbits:4 write_burst PCI write burst count
{}
or pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 3911>
utiny value As byte
endunion pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 3912>
union pci_instat (Offset 47) PCI Interrupt Status
<byte 3912>
{field (By field)}
<byte 3912>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_instat (Offset 47) PCI Interrupt Status
<byte 3912>
utiny value As byte
endunion pci_instat (Offset 47) PCI Interrupt Status
<byte 3913>
union pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 3913>
{field (By field)}
<byte 3913>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 3913>
utiny value As byte
endunion pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 3914>
union pci_intpend (Offset 45) PCI Interrupt
<byte 3914>
{field (By field)}
<byte 3914>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_intpend (Offset 45) PCI Interrupt
<byte 3914>
utiny value As byte
endunion pci_intpend (Offset 45) PCI Interrupt
<byte 3915>
union pci_softrst (Offset 44) PCI Interface Reset Control
<byte 3915>
{field (By field)}
<byte 3915>
tbits:1 rst PCI Interface Soft Reset
tbits:1 dpe Reserved (must be zero)
tbits:1 rdd RAM/ROM Read Delayed Transaction Disabled
tbits:1 tad Target Abort Disable
tbits:4 rsvd Reserved (must be zero)
{}
or pci_softrst (Offset 44) PCI Interface Reset Control
<byte 3915>
utiny value As byte
endunion pci_softrst (Offset 44) PCI Interface Reset Control
<byte 3916>
{pci_rsvd48_4b ((Offset 48) Reserved)}
<byte 3916>
ulong value
{}
<byte 3920>
{pci_rsvd4c_4f ((Offset 4C) Reserved)}
<byte 3920>
ulong value
{}
<byte 3924>
union pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 3924>
{field (By field)}
<byte 3924>
bits:3 ver PCI Power Management Specification Version
bits:1 clk PME Clock
bits:1 aps Auxilliary Power Source
bits:1 dsi Device Specific Initialization
bits:3 rsvd Reserved
bits:1 d1 D1 Support
bits:1 d2 D2 Support
bits:5 pme PME Support
{}
or pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 3924>
ushort value As word
endunion pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 3926>
union pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 3926>
{field (By field)}
<byte 3926>
tbits:8 offset Offset to the first item in the capabilities linked list
{}
or pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 3926>
utiny value As byte
endunion pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 3927>
union pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 3927>
{field (By field)}
<byte 3927>
tbits:8 cap_id Capability structure identifier.
{}
or pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 3927>
utiny value As byte
endunion pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 3928>
{pci_rsvd56_57 ((Offset 56) Reserved)}
<byte 3928>
ushort value
{}
<byte 3930>
union pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 3930>
{field (By field)}
<byte 3930>
bits:2 pst Power State
bits:6 rsvd Reserved
bits:1 pen PME Enable
bits:4 sel Data Select
bits:2 scl Data Scale
bits:1 pme PME Status
{}
or pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 3930>
ushort value As word
endunion pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 3932>
union spiaddr (Offset 58) SPI RAM/ROM Address
<byte 3932>
{field (By field)}
<byte 3932>
lbits:1 sra SPI SRAM Access
lbits:10 rsvd Reserved
lbits:21 address RAM/ROM Address
{}
or spiaddr (Offset 58) SPI RAM/ROM Address
<byte 3932>
ulong value As longword
endunion spiaddr (Offset 58) SPI RAM/ROM Address
<byte 3936>
union spidata (Offset 5C) SPI RAM/ROM Data
<byte 3936>
union field By field
<byte 3936>
{ram (By field)}
<byte 3936>
lbits:32 data RAM data
{}
or field By field
<byte 3936>
{rom (By field)}
<byte 3936>
lbits:8 data ROM data
lbits:24 rsvd Reserved
{}
endunion field By field
or spidata (Offset 5C) SPI RAM/ROM Data
<byte 3936>
ulong value As longword
endunion spidata (Offset 5C) SPI RAM/ROM Data
{}
endunion pcicfg[4] Tachyon XL2 PCI Configuration Registers
<byte 3940>
union pcicfg[5] Tachyon XL2 PCI Configuration Registers
<byte 3940>
ulong[24] pcicfga Tachyon XL2 PCI Configuration Registers As Longwords
or pcicfg[5] Tachyon XL2 PCI Configuration Registers
<byte 3940>
{pcicfg (Tachyon XL2 PCI Configuration Registers By Field)}
<byte 3940>
union pci_device_id (Offset 02) PCI Device ID
<byte 3940>
{field (By field)}
<byte 3940>
bits:16 id Vendor ID
{}
or pci_device_id (Offset 02) PCI Device ID
<byte 3940>
ushort value As word
endunion pci_device_id (Offset 02) PCI Device ID
<byte 3942>
union pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3942>
{field (By field)}
<byte 3942>
bits:16 id Vendor ID
{}
or pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3942>
ushort value As word
endunion pci_vendor_id (Offset 00) PCI Vendor ID
<byte 3944>
union pci_status (Offset 06) PCI Status
<byte 3944>
{field (By field)}
<byte 3944>
bits:4 rsvd Reserved
bits:1 cpl New Capabilities
bits:1 cap66mhz 66MHz Capable
bits:1 udfsup UDF Supported (read only, always returns 0)
bits:1 capfbbw Fast Back-to-Back Capable (read only, always returns 0)
bits:1 dperr Data Parity Error Detected
bits:2 devsel_time PCI_DEVSEL# response timing (read only, always returns 1)
bits:1 sgnltabrt Signaled Target Abort
bits:1 rcvdtabrt Received Target Abort
bits:1 rcvdmabrt Received Master Abort
bits:1 sgnlsyserr Signaled System Error
bits:1 perr Detected Parity Error
{}
or pci_status (Offset 06) PCI Status
<byte 3944>
ushort value As word
endunion pci_status (Offset 06) PCI Status
<byte 3946>
union pci_cmd (Offset 04) PCI Command
<byte 3946>
{field (By field)}
<byte 3946>
bits:1 io_access I/O Access Control
bits:1 mem_access Memory Access Control
bits:1 pcim_en PCI Master Enable
bits:1 scycle_en Special Cycle Enable (read only, always returns 0)
bits:1 memwinv Memory Write & Invalidate
bits:1 paltsnp_en Palette Snooping Enable (read only, always returns 0)
bits:1 perrrsp Parity Error Response
bits:1 waitcycctrl Wait Cycle Control
bits:1 serrx_en SERR# Enable
bits:1 fbbw_en Fast Back-to-Back Write enable (read only, always returns 0)
bits:6 rsvd Reserved
{}
or pci_cmd (Offset 04) PCI Command
<byte 3946>
ushort value As word
endunion pci_cmd (Offset 04) PCI Command
<byte 3948>
union pci_class (Offset 09) PCI Class
<byte 3948>
{field (By field)}
<byte 3948>
tbits:8 baseclcode Base Class Code
<byte 3949>
tbits:8 subclcode Subclass Code
<byte 3950>
tbits:8 reglevpi Register Level Programming Interface
{}
or pci_class (Offset 09) PCI Class
<byte 3948>
utiny[3] value As byte array
endunion pci_class (Offset 09) PCI Class
<byte 3951>
union pci_revid (Offset 08) PCI Revision
<byte 3951>
{field (By field)}
<byte 3951>
tbits:2 minor Minor
tbits:3 major Major
tbits:3 res Reserved
{}
or pci_revid (Offset 08) PCI Revision
<byte 3951>
utiny value As byte
endunion pci_revid (Offset 08) PCI Revision
<byte 3952>
{pci_rsvd0f ((Offset 0F) Reserved)}
<byte 3952>
utiny value
{}
<byte 3953>
union pci_hdrtype (Offset 0E) PCI Header Type
<byte 3953>
{field (By field)}
<byte 3953>
tbits:8 type PCI header type (read only)
{}
or pci_hdrtype (Offset 0E) PCI Header Type
<byte 3953>
utiny value As byte
endunion pci_hdrtype (Offset 0E) PCI Header Type
<byte 3954>
union pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3954>
{field (By field)}
<byte 3954>
tbits:8 tmr PCI latency timer
{}
or pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3954>
utiny value As byte
endunion pci_lattmr (Offset 0D) PCI Latency Timer
<byte 3955>
union pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3955>
{field (By field)}
<byte 3955>
tbits:8 size PCI cache line size
{}
or pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3955>
utiny value As byte
endunion pci_clsize (Offset 0C) PCI Cache Line Size
<byte 3956>
{pci_rsvd10_13 ((Offset 10) Reserved)}
<byte 3956>
ulong value
{}
<byte 3960>
union pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3960>
{field (By field)}
<byte 3960>
lbits:1 memspace I/O Space Indicator
lbits:7 alwayszero Always read as zero
lbits:24 baseaddr Base Address
{}
or pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3960>
ulong value As longword
endunion pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 3964>
union pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3964>
{field (By field)}
<byte 3964>
lbits:1 memspace I/O Space Indicator
lbits:7 alwayszero Always read as zero
lbits:24 baseaddr Base Address
{}
or pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3964>
ulong value As longword
endunion pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 3968>
union pci_membase (Offset 1C) PCI Memory Base Address
<byte 3968>
{field (By field)}
<byte 3968>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:5 alwayszero Always read as zero
lbits:23 baseaddr Base Address
{}
or pci_membase (Offset 1C) PCI Memory Base Address
<byte 3968>
ulong value As longword
endunion pci_membase (Offset 1C) PCI Memory Base Address
<byte 3972>
union pci_rambase (Offset 20) PCI RAM Base Address
<byte 3972>
{field (By field)}
<byte 3972>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:13 alwayszero Always read as zero
lbits:15 baseaddr Base Address
{}
or pci_rambase (Offset 20) PCI RAM Base Address
<byte 3972>
ulong value As longword
endunion pci_rambase (Offset 20) PCI RAM Base Address
<byte 3976>
union pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3976>
{field (By field)}
<byte 3976>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:13 alwayszero Always read as zero
lbits:15 baseaddr Base Address
{}
or pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3976>
ulong value As longword
endunion pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 3980>
{pci_rsrvd28_2b ((Offset 28) Reserved)}
<byte 3980>
ulong value
{}
<byte 3984>
union pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3984>
{field (By field)}
<byte 3984>
bits:16 id Vendor ID
{}
or pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3984>
ushort value As word
endunion pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 3986>
union pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3986>
{field (By field)}
<byte 3986>
bits:16 id Vendor ID
{}
or pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3986>
ushort value As word
endunion pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 3988>
union pci_rombase (Offset 30) PCI ROM Base Address
<byte 3988>
{field (By field)}
<byte 3988>
lbits:1 decode_en Decode enable
lbits:16 rsvd Reserved - always zero
lbits:15 address Address Decoding
{}
or pci_rombase (Offset 30) PCI ROM Base Address
<byte 3988>
ulong value As longword
endunion pci_rombase (Offset 30) PCI ROM Base Address
<byte 3992>
{pci_rsvd36_37 ((Offset 36) Reserved)}
<byte 3992>
ushort value
{}
<byte 3994>
{pci_rsvd35 ((Offset 35) Reserved)}
<byte 3994>
utiny value
{}
<byte 3995>
union pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3995>
{field (By field)}
<byte 3995>
tbits:8 offset Offset to the first item in the capabilities linked list
{}
or pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3995>
utiny value As byte
endunion pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 3996>
{pci_rsvd38_3b ((Offset 38) Reserved)}
<byte 3996>
ulong value
{}
<byte 4000>
union pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 4000>
{field (By field)}
<byte 4000>
tbits:8 lat PCI Maximum Latentcy (read only)
{}
or pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 4000>
utiny value As byte
endunion pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 4001>
union pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 4001>
{field (By field)}
<byte 4001>
tbits:8 grant PCI Minimum Grant (read only)
{}
or pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 4001>
utiny value As byte
endunion pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 4002>
union pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 4002>
{field (By field)}
<byte 4002>
tbits:8 pin PCI Interrupt Pin (read only)
{}
or pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 4002>
utiny value As byte
endunion pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 4003>
union pci_int_line (Offset 3C) PCI Interrupt Line
<byte 4003>
{field (By field)}
<byte 4003>
tbits:8 line PCI Interrupt Line
{}
or pci_int_line (Offset 3C) PCI Interrupt Line
<byte 4003>
utiny value As byte
endunion pci_int_line (Offset 3C) PCI Interrupt Line
<byte 4004>
union pci_mctr (Offset 43) PCI Master Control
<byte 4004>
{field (By field)}
<byte 4004>
tbits:1 ecl Enable MRM and MRL Completion to Cache Line
tbits:1 rrd PCI Memory Read Round Down Enable
tbits:1 p64 PCI Present and Active
tbits:1 rae Memory Read Alignment Enable
tbits:1 wae Memory Write Alignment Enable
tbits:1 rbe PCI Read Burst Counter Enable
tbits:1 wbe PCI Write Burst Counter Enable
tbits:1 dlt Disable Latency Timer
{}
or pci_mctr (Offset 43) PCI Master Control
<byte 4004>
utiny value As byte
endunion pci_mctr (Offset 43) PCI Master Control
<byte 4005>
union pci_romctr (Offset 42) PCI ROM Control
<byte 4005>
{field (By field)}
<byte 4005>
tbits:1 vpp_en ROM VPP Enable
tbits:1 fla Flash Installed (read only)
tbits:1 rom ROM Installed (read only)
tbits:1 rm0 RAM 0 (read only); combination of RAM 2, RAM 1, and RAM 0 describe static RAM configuration: 000 - none, 001 - 128KB, 010 - 256KB, 011 - 512KB, 100 - 1MB, 101 - 2MB, 110 - reserved, 111 - reserved
tbits:1 rm1 RAM 1 (read only)
tbits:1 svl Subsystem VID Loaded (read only)
tbits:1 par External memory parity checking enabled (read only)
tbits:1 rm2 RAM 2 (read only)
{}
or pci_romctr (Offset 42) PCI ROM Control
<byte 4005>
utiny value As byte
endunion pci_romctr (Offset 42) PCI ROM Control
<byte 4006>
union pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 4006>
{field (By field)}
<byte 4006>
tbits:4 read_wait DMA read wait count
tbits:4 write_wait DMA write wait count
{}
or pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 4006>
utiny value As byte
endunion pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 4007>
union pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 4007>
{field (By field)}
<byte 4007>
tbits:4 read_burst PCI read burst count
tbits:4 write_burst PCI write burst count
{}
or pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 4007>
utiny value As byte
endunion pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 4008>
union pci_instat (Offset 47) PCI Interrupt Status
<byte 4008>
{field (By field)}
<byte 4008>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_instat (Offset 47) PCI Interrupt Status
<byte 4008>
utiny value As byte
endunion pci_instat (Offset 47) PCI Interrupt Status
<byte 4009>
union pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 4009>
{field (By field)}
<byte 4009>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 4009>
utiny value As byte
endunion pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 4010>
union pci_intpend (Offset 45) PCI Interrupt
<byte 4010>
{field (By field)}
<byte 4010>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_intpend (Offset 45) PCI Interrupt
<byte 4010>
utiny value As byte
endunion pci_intpend (Offset 45) PCI Interrupt
<byte 4011>
union pci_softrst (Offset 44) PCI Interface Reset Control
<byte 4011>
{field (By field)}
<byte 4011>
tbits:1 rst PCI Interface Soft Reset
tbits:1 dpe Reserved (must be zero)
tbits:1 rdd RAM/ROM Read Delayed Transaction Disabled
tbits:1 tad Target Abort Disable
tbits:4 rsvd Reserved (must be zero)
{}
or pci_softrst (Offset 44) PCI Interface Reset Control
<byte 4011>
utiny value As byte
endunion pci_softrst (Offset 44) PCI Interface Reset Control
<byte 4012>
{pci_rsvd48_4b ((Offset 48) Reserved)}
<byte 4012>
ulong value
{}
<byte 4016>
{pci_rsvd4c_4f ((Offset 4C) Reserved)}
<byte 4016>
ulong value
{}
<byte 4020>
union pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 4020>
{field (By field)}
<byte 4020>
bits:3 ver PCI Power Management Specification Version
bits:1 clk PME Clock
bits:1 aps Auxilliary Power Source
bits:1 dsi Device Specific Initialization
bits:3 rsvd Reserved
bits:1 d1 D1 Support
bits:1 d2 D2 Support
bits:5 pme PME Support
{}
or pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 4020>
ushort value As word
endunion pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 4022>
union pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 4022>
{field (By field)}
<byte 4022>
tbits:8 offset Offset to the first item in the capabilities linked list
{}
or pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 4022>
utiny value As byte
endunion pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 4023>
union pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 4023>
{field (By field)}
<byte 4023>
tbits:8 cap_id Capability structure identifier.
{}
or pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 4023>
utiny value As byte
endunion pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 4024>
{pci_rsvd56_57 ((Offset 56) Reserved)}
<byte 4024>
ushort value
{}
<byte 4026>
union pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 4026>
{field (By field)}
<byte 4026>
bits:2 pst Power State
bits:6 rsvd Reserved
bits:1 pen PME Enable
bits:4 sel Data Select
bits:2 scl Data Scale
bits:1 pme PME Status
{}
or pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 4026>
ushort value As word
endunion pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 4028>
union spiaddr (Offset 58) SPI RAM/ROM Address
<byte 4028>
{field (By field)}
<byte 4028>
lbits:1 sra SPI SRAM Access
lbits:10 rsvd Reserved
lbits:21 address RAM/ROM Address
{}
or spiaddr (Offset 58) SPI RAM/ROM Address
<byte 4028>
ulong value As longword
endunion spiaddr (Offset 58) SPI RAM/ROM Address
<byte 4032>
union spidata (Offset 5C) SPI RAM/ROM Data
<byte 4032>
union field By field
<byte 4032>
{ram (By field)}
<byte 4032>
lbits:32 data RAM data
{}
or field By field
<byte 4032>
{rom (By field)}
<byte 4032>
lbits:8 data ROM data
lbits:24 rsvd Reserved
{}
endunion field By field
or spidata (Offset 5C) SPI RAM/ROM Data
<byte 4032>
ulong value As longword
endunion spidata (Offset 5C) SPI RAM/ROM Data
{}
endunion pcicfg[5] Tachyon XL2 PCI Configuration Registers
<byte 4036>
union pcicfg[6] Tachyon XL2 PCI Configuration Registers
<byte 4036>
ulong[24] pcicfga Tachyon XL2 PCI Configuration Registers As Longwords
or pcicfg[6] Tachyon XL2 PCI Configuration Registers
<byte 4036>
{pcicfg (Tachyon XL2 PCI Configuration Registers By Field)}
<byte 4036>
union pci_device_id (Offset 02) PCI Device ID
<byte 4036>
{field (By field)}
<byte 4036>
bits:16 id Vendor ID
{}
or pci_device_id (Offset 02) PCI Device ID
<byte 4036>
ushort value As word
endunion pci_device_id (Offset 02) PCI Device ID
<byte 4038>
union pci_vendor_id (Offset 00) PCI Vendor ID
<byte 4038>
{field (By field)}
<byte 4038>
bits:16 id Vendor ID
{}
or pci_vendor_id (Offset 00) PCI Vendor ID
<byte 4038>
ushort value As word
endunion pci_vendor_id (Offset 00) PCI Vendor ID
<byte 4040>
union pci_status (Offset 06) PCI Status
<byte 4040>
{field (By field)}
<byte 4040>
bits:4 rsvd Reserved
bits:1 cpl New Capabilities
bits:1 cap66mhz 66MHz Capable
bits:1 udfsup UDF Supported (read only, always returns 0)
bits:1 capfbbw Fast Back-to-Back Capable (read only, always returns 0)
bits:1 dperr Data Parity Error Detected
bits:2 devsel_time PCI_DEVSEL# response timing (read only, always returns 1)
bits:1 sgnltabrt Signaled Target Abort
bits:1 rcvdtabrt Received Target Abort
bits:1 rcvdmabrt Received Master Abort
bits:1 sgnlsyserr Signaled System Error
bits:1 perr Detected Parity Error
{}
or pci_status (Offset 06) PCI Status
<byte 4040>
ushort value As word
endunion pci_status (Offset 06) PCI Status
<byte 4042>
union pci_cmd (Offset 04) PCI Command
<byte 4042>
{field (By field)}
<byte 4042>
bits:1 io_access I/O Access Control
bits:1 mem_access Memory Access Control
bits:1 pcim_en PCI Master Enable
bits:1 scycle_en Special Cycle Enable (read only, always returns 0)
bits:1 memwinv Memory Write & Invalidate
bits:1 paltsnp_en Palette Snooping Enable (read only, always returns 0)
bits:1 perrrsp Parity Error Response
bits:1 waitcycctrl Wait Cycle Control
bits:1 serrx_en SERR# Enable
bits:1 fbbw_en Fast Back-to-Back Write enable (read only, always returns 0)
bits:6 rsvd Reserved
{}
or pci_cmd (Offset 04) PCI Command
<byte 4042>
ushort value As word
endunion pci_cmd (Offset 04) PCI Command
<byte 4044>
union pci_class (Offset 09) PCI Class
<byte 4044>
{field (By field)}
<byte 4044>
tbits:8 baseclcode Base Class Code
<byte 4045>
tbits:8 subclcode Subclass Code
<byte 4046>
tbits:8 reglevpi Register Level Programming Interface
{}
or pci_class (Offset 09) PCI Class
<byte 4044>
utiny[3] value As byte array
endunion pci_class (Offset 09) PCI Class
<byte 4047>
union pci_revid (Offset 08) PCI Revision
<byte 4047>
{field (By field)}
<byte 4047>
tbits:2 minor Minor
tbits:3 major Major
tbits:3 res Reserved
{}
or pci_revid (Offset 08) PCI Revision
<byte 4047>
utiny value As byte
endunion pci_revid (Offset 08) PCI Revision
<byte 4048>
{pci_rsvd0f ((Offset 0F) Reserved)}
<byte 4048>
utiny value
{}
<byte 4049>
union pci_hdrtype (Offset 0E) PCI Header Type
<byte 4049>
{field (By field)}
<byte 4049>
tbits:8 type PCI header type (read only)
{}
or pci_hdrtype (Offset 0E) PCI Header Type
<byte 4049>
utiny value As byte
endunion pci_hdrtype (Offset 0E) PCI Header Type
<byte 4050>
union pci_lattmr (Offset 0D) PCI Latency Timer
<byte 4050>
{field (By field)}
<byte 4050>
tbits:8 tmr PCI latency timer
{}
or pci_lattmr (Offset 0D) PCI Latency Timer
<byte 4050>
utiny value As byte
endunion pci_lattmr (Offset 0D) PCI Latency Timer
<byte 4051>
union pci_clsize (Offset 0C) PCI Cache Line Size
<byte 4051>
{field (By field)}
<byte 4051>
tbits:8 size PCI cache line size
{}
or pci_clsize (Offset 0C) PCI Cache Line Size
<byte 4051>
utiny value As byte
endunion pci_clsize (Offset 0C) PCI Cache Line Size
<byte 4052>
{pci_rsvd10_13 ((Offset 10) Reserved)}
<byte 4052>
ulong value
{}
<byte 4056>
union pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 4056>
{field (By field)}
<byte 4056>
lbits:1 memspace I/O Space Indicator
lbits:7 alwayszero Always read as zero
lbits:24 baseaddr Base Address
{}
or pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 4056>
ulong value As longword
endunion pci_iobasel (Offset 14) PCI Lower I/O Base Address
<byte 4060>
union pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 4060>
{field (By field)}
<byte 4060>
lbits:1 memspace I/O Space Indicator
lbits:7 alwayszero Always read as zero
lbits:24 baseaddr Base Address
{}
or pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 4060>
ulong value As longword
endunion pci_iobaseu (Offset 18) PCI Upper I/O Base Address
<byte 4064>
union pci_membase (Offset 1C) PCI Memory Base Address
<byte 4064>
{field (By field)}
<byte 4064>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:5 alwayszero Always read as zero
lbits:23 baseaddr Base Address
{}
or pci_membase (Offset 1C) PCI Memory Base Address
<byte 4064>
ulong value As longword
endunion pci_membase (Offset 1C) PCI Memory Base Address
<byte 4068>
union pci_rambase (Offset 20) PCI RAM Base Address
<byte 4068>
{field (By field)}
<byte 4068>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:13 alwayszero Always read as zero
lbits:15 baseaddr Base Address
{}
or pci_rambase (Offset 20) PCI RAM Base Address
<byte 4068>
ulong value As longword
endunion pci_rambase (Offset 20) PCI RAM Base Address
<byte 4072>
union pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 4072>
{field (By field)}
<byte 4072>
lbits:1 memspace Memory Space Indicator
lbits:2 loctype Location Type
lbits:1 prefetch Prefetchable
lbits:13 alwayszero Always read as zero
lbits:15 baseaddr Base Address
{}
or pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 4072>
ulong value As longword
endunion pci_srombase (Offset 24) PCI ROM Alternate Base Address
<byte 4076>
{pci_rsrvd28_2b ((Offset 28) Reserved)}
<byte 4076>
ulong value
{}
<byte 4080>
union pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 4080>
{field (By field)}
<byte 4080>
bits:16 id Vendor ID
{}
or pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 4080>
ushort value As word
endunion pci_subsys_id (Offset 2E) PCI Subsystem ID
<byte 4082>
union pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 4082>
{field (By field)}
<byte 4082>
bits:16 id Vendor ID
{}
or pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 4082>
ushort value As word
endunion pci_ssvdor_id (Offset 2C) PCI Subsystem Vendor ID
<byte 4084>
union pci_rombase (Offset 30) PCI ROM Base Address
<byte 4084>
{field (By field)}
<byte 4084>
lbits:1 decode_en Decode enable
lbits:16 rsvd Reserved - always zero
lbits:15 address Address Decoding
{}
or pci_rombase (Offset 30) PCI ROM Base Address
<byte 4084>
ulong value As longword
endunion pci_rombase (Offset 30) PCI ROM Base Address
<byte 4088>
{pci_rsvd36_37 ((Offset 36) Reserved)}
<byte 4088>
ushort value
{}
<byte 4090>
{pci_rsvd35 ((Offset 35) Reserved)}
<byte 4090>
utiny value
{}
<byte 4091>
union pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 4091>
{field (By field)}
<byte 4091>
tbits:8 offset Offset to the first item in the capabilities linked list
{}
or pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 4091>
utiny value As byte
endunion pci_cap_ptr (Offset 34) PCI Capabilities Pointer
<byte 4092>
{pci_rsvd38_3b ((Offset 38) Reserved)}
<byte 4092>
ulong value
{}
<byte 4096>
union pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 4096>
{field (By field)}
<byte 4096>
tbits:8 lat PCI Maximum Latentcy (read only)
{}
or pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 4096>
utiny value As byte
endunion pci_max_lat (Offset 3F) PCI Maximum Latentcy
<byte 4097>
union pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 4097>
{field (By field)}
<byte 4097>
tbits:8 grant PCI Minimum Grant (read only)
{}
or pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 4097>
utiny value As byte
endunion pci_min_gnt (Offset 3E) PCI Minimum Grant
<byte 4098>
union pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 4098>
{field (By field)}
<byte 4098>
tbits:8 pin PCI Interrupt Pin (read only)
{}
or pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 4098>
utiny value As byte
endunion pci_int_pin (Offset 3D) PCI Interrupt Pin
<byte 4099>
union pci_int_line (Offset 3C) PCI Interrupt Line
<byte 4099>
{field (By field)}
<byte 4099>
tbits:8 line PCI Interrupt Line
{}
or pci_int_line (Offset 3C) PCI Interrupt Line
<byte 4099>
utiny value As byte
endunion pci_int_line (Offset 3C) PCI Interrupt Line
<byte 4100>
union pci_mctr (Offset 43) PCI Master Control
<byte 4100>
{field (By field)}
<byte 4100>
tbits:1 ecl Enable MRM and MRL Completion to Cache Line
tbits:1 rrd PCI Memory Read Round Down Enable
tbits:1 p64 PCI Present and Active
tbits:1 rae Memory Read Alignment Enable
tbits:1 wae Memory Write Alignment Enable
tbits:1 rbe PCI Read Burst Counter Enable
tbits:1 wbe PCI Write Burst Counter Enable
tbits:1 dlt Disable Latency Timer
{}
or pci_mctr (Offset 43) PCI Master Control
<byte 4100>
utiny value As byte
endunion pci_mctr (Offset 43) PCI Master Control
<byte 4101>
union pci_romctr (Offset 42) PCI ROM Control
<byte 4101>
{field (By field)}
<byte 4101>
tbits:1 vpp_en ROM VPP Enable
tbits:1 fla Flash Installed (read only)
tbits:1 rom ROM Installed (read only)
tbits:1 rm0 RAM 0 (read only); combination of RAM 2, RAM 1, and RAM 0 describe static RAM configuration: 000 - none, 001 - 128KB, 010 - 256KB, 011 - 512KB, 100 - 1MB, 101 - 2MB, 110 - reserved, 111 - reserved
tbits:1 rm1 RAM 1 (read only)
tbits:1 svl Subsystem VID Loaded (read only)
tbits:1 par External memory parity checking enabled (read only)
tbits:1 rm2 RAM 2 (read only)
{}
or pci_romctr (Offset 42) PCI ROM Control
<byte 4101>
utiny value As byte
endunion pci_romctr (Offset 42) PCI ROM Control
<byte 4102>
union pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 4102>
{field (By field)}
<byte 4102>
tbits:4 read_wait DMA read wait count
tbits:4 write_wait DMA write wait count
{}
or pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 4102>
utiny value As byte
endunion pci_waitctr (Offset 41) PCI Master Wait Count Control
<byte 4103>
union pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 4103>
{field (By field)}
<byte 4103>
tbits:4 read_burst PCI read burst count
tbits:4 write_burst PCI write burst count
{}
or pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 4103>
utiny value As byte
endunion pci_brstctr (Offset 40) PCI Master Burst Count Control
<byte 4104>
union pci_instat (Offset 47) PCI Interrupt Status
<byte 4104>
{field (By field)}
<byte 4104>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_instat (Offset 47) PCI Interrupt Status
<byte 4104>
utiny value As byte
endunion pci_instat (Offset 47) PCI Interrupt Status
<byte 4105>
union pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 4105>
{field (By field)}
<byte 4105>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 4105>
utiny value As byte
endunion pci_inten (Offset 46) PCI Interrupt Enable Pending
<byte 4106>
union pci_intpend (Offset 45) PCI Interrupt
<byte 4106>
{field (By field)}
<byte 4106>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or pci_intpend (Offset 45) PCI Interrupt
<byte 4106>
utiny value As byte
endunion pci_intpend (Offset 45) PCI Interrupt
<byte 4107>
union pci_softrst (Offset 44) PCI Interface Reset Control
<byte 4107>
{field (By field)}
<byte 4107>
tbits:1 rst PCI Interface Soft Reset
tbits:1 dpe Reserved (must be zero)
tbits:1 rdd RAM/ROM Read Delayed Transaction Disabled
tbits:1 tad Target Abort Disable
tbits:4 rsvd Reserved (must be zero)
{}
or pci_softrst (Offset 44) PCI Interface Reset Control
<byte 4107>
utiny value As byte
endunion pci_softrst (Offset 44) PCI Interface Reset Control
<byte 4108>
{pci_rsvd48_4b ((Offset 48) Reserved)}
<byte 4108>
ulong value
{}
<byte 4112>
{pci_rsvd4c_4f ((Offset 4C) Reserved)}
<byte 4112>
ulong value
{}
<byte 4116>
union pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 4116>
{field (By field)}
<byte 4116>
bits:3 ver PCI Power Management Specification Version
bits:1 clk PME Clock
bits:1 aps Auxilliary Power Source
bits:1 dsi Device Specific Initialization
bits:3 rsvd Reserved
bits:1 d1 D1 Support
bits:1 d2 D2 Support
bits:5 pme PME Support
{}
or pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 4116>
ushort value As word
endunion pci_pmc (Offset 52) PCI Power Management Capabilities
<byte 4118>
union pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 4118>
{field (By field)}
<byte 4118>
tbits:8 offset Offset to the first item in the capabilities linked list
{}
or pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 4118>
utiny value As byte
endunion pci_cap_nextp (Offset 51) PCI Capabilities Pointer
<byte 4119>
union pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 4119>
{field (By field)}
<byte 4119>
tbits:8 cap_id Capability structure identifier.
{}
or pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 4119>
utiny value As byte
endunion pci_cap_id (Offset 50) PCI Capabilities Identifier
<byte 4120>
{pci_rsvd56_57 ((Offset 56) Reserved)}
<byte 4120>
ushort value
{}
<byte 4122>
union pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 4122>
{field (By field)}
<byte 4122>
bits:2 pst Power State
bits:6 rsvd Reserved
bits:1 pen PME Enable
bits:4 sel Data Select
bits:2 scl Data Scale
bits:1 pme PME Status
{}
or pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 4122>
ushort value As word
endunion pci_pmcs (Offset 54) PCI Power Management Control and Status
<byte 4124>
union spiaddr (Offset 58) SPI RAM/ROM Address
<byte 4124>
{field (By field)}
<byte 4124>
lbits:1 sra SPI SRAM Access
lbits:10 rsvd Reserved
lbits:21 address RAM/ROM Address
{}
or spiaddr (Offset 58) SPI RAM/ROM Address
<byte 4124>
ulong value As longword
endunion spiaddr (Offset 58) SPI RAM/ROM Address
<byte 4128>
union spidata (Offset 5C) SPI RAM/ROM Data
<byte 4128>
union field By field
<byte 4128>
{ram (By field)}
<byte 4128>
lbits:32 data RAM data
{}
or field By field
<byte 4128>
{rom (By field)}
<byte 4128>
lbits:8 data ROM data
lbits:24 rsvd Reserved
{}
endunion field By field
or spidata (Offset 5C) SPI RAM/ROM Data
<byte 4128>
ulong value As longword
endunion spidata (Offset 5C) SPI RAM/ROM Data
{}
endunion pcicfg[6] Tachyon XL2 PCI Configuration Registers
<byte 4132>
union csr[0] Tachyon XL2 CSR Registers
<byte 4132>
ulong[128] csra Tachyon XL2 CSR Registers As Longwords
or csr[0] Tachyon XL2 CSR Registers
<byte 4132>
{csr (Tachyon XL2 CSR Registers By Field)}
<byte 4132>
union erq_base (Offset 000) ERQ Base (write only)
<byte 4132>
{field (By field)}
<byte 4132>
lbits:32 address ERQ Base Address
{}
or erq_base (Offset 000) ERQ Base (write only)
<byte 4132>
ulong value As longword
endunion erq_base (Offset 000) ERQ Base (write only)
<byte 4136>
union erq_len (Offset 004) ERQ Length (write only)
<byte 4136>
{field (By field)}
<byte 4136>
lbits:12 length ERQ Length
lbits:20 reserved Reserved
{}
or erq_len (Offset 004) ERQ Length (write only)
<byte 4136>
ulong value As longword
endunion erq_len (Offset 004) ERQ Length (write only)
<byte 4140>
union erq_prod (Offset 008) ERQ Producer Index
<byte 4140>
{field (By field)}
<byte 4140>
lbits:12 index ERQ Producer Index
lbits:20 reserved Reserved
{}
or erq_prod (Offset 008) ERQ Producer Index
<byte 4140>
ulong value As longword
endunion erq_prod (Offset 008) ERQ Producer Index
<byte 4144>
union erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 4144>
{field (By field)}
<byte 4144>
lbits:32 address ERQ Consumer Index Address
{}
or erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 4144>
ulong value As longword
endunion erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 4148>
union erq_cons (Offset 010) ERQ Consumer Index
<byte 4148>
{field (By field)}
<byte 4148>
lbits:12 index ERQ Consumer Index
lbits:20 reserved Reserved
{}
or erq_cons (Offset 010) ERQ Consumer Index
<byte 4148>
ulong value As longword
endunion erq_cons (Offset 010) ERQ Consumer Index
<byte 4152>
{rsvd1[0] ((Offset 014-04F) Reserved)}
<byte 4152>
ulong value
{}
<byte 4156>
{rsvd1[1] ((Offset 014-04F) Reserved)}
<byte 4156>
ulong value
{}
<byte 4160>
{rsvd1[2] ((Offset 014-04F) Reserved)}
<byte 4160>
ulong value
{}
<byte 4164>
{rsvd1[3] ((Offset 014-04F) Reserved)}
<byte 4164>
ulong value
{}
<byte 4168>
{rsvd1[4] ((Offset 014-04F) Reserved)}
<byte 4168>
ulong value
{}
<byte 4172>
{rsvd1[5] ((Offset 014-04F) Reserved)}
<byte 4172>
ulong value
{}
<byte 4176>
{rsvd1[6] ((Offset 014-04F) Reserved)}
<byte 4176>
ulong value
{}
<byte 4180>
{rsvd1[7] ((Offset 014-04F) Reserved)}
<byte 4180>
ulong value
{}
<byte 4184>
{rsvd1[8] ((Offset 014-04F) Reserved)}
<byte 4184>
ulong value
{}
<byte 4188>
{rsvd1[9] ((Offset 014-04F) Reserved)}
<byte 4188>
ulong value
{}
<byte 4192>
{rsvd1[10] ((Offset 014-04F) Reserved)}
<byte 4192>
ulong value
{}
<byte 4196>
{rsvd1[11] ((Offset 014-04F) Reserved)}
<byte 4196>
ulong value
{}
<byte 4200>
{rsvd1[12] ((Offset 014-04F) Reserved)}
<byte 4200>
ulong value
{}
<byte 4204>
{rsvd1[13] ((Offset 014-04F) Reserved)}
<byte 4204>
ulong value
{}
<byte 4208>
{rsvd1[14] ((Offset 014-04F) Reserved)}
<byte 4208>
ulong value
{}
<byte 4212>
union sfq_base (Offset 050) SFQ Base (write only)
<byte 4212>
{field (By field)}
<byte 4212>
lbits:32 address SFQ Base Address
{}
or sfq_base (Offset 050) SFQ Base (write only)
<byte 4212>
ulong value As longword
endunion sfq_base (Offset 050) SFQ Base (write only)
<byte 4216>
union sfq_len (Offset 054) SFQ Length (write only)
<byte 4216>
{field (By field)}
<byte 4216>
lbits:12 length SFQ Length
lbits:20 reserved Reserved
{}
or sfq_len (Offset 054) SFQ Length (write only)
<byte 4216>
ulong value As longword
endunion sfq_len (Offset 054) SFQ Length (write only)
<byte 4220>
union sfq_cons (Offset 058) SFQ Consumer Index
<byte 4220>
{field (By field)}
<byte 4220>
lbits:12 index SFQ Consumer Index
lbits:20 reserved Reserved
{}
or sfq_cons (Offset 058) SFQ Consumer Index
<byte 4220>
ulong value As longword
endunion sfq_cons (Offset 058) SFQ Consumer Index
<byte 4224>
{rsvd2[0] ((Offset 05C-07B) Reserved)}
<byte 4224>
ulong value
{}
<byte 4228>
{rsvd2[1] ((Offset 05C-07B) Reserved)}
<byte 4228>
ulong value
{}
<byte 4232>
{rsvd2[2] ((Offset 05C-07B) Reserved)}
<byte 4232>
ulong value
{}
<byte 4236>
{rsvd2[3] ((Offset 05C-07B) Reserved)}
<byte 4236>
ulong value
{}
<byte 4240>
{rsvd2[4] ((Offset 05C-07B) Reserved)}
<byte 4240>
ulong value
{}
<byte 4244>
{rsvd2[5] ((Offset 05C-07B) Reserved)}
<byte 4244>
ulong value
{}
<byte 4248>
{rsvd2[6] ((Offset 05C-07B) Reserved)}
<byte 4248>
ulong value
{}
<byte 4252>
{rsvd2[7] ((Offset 05C-07B) Reserved)}
<byte 4252>
ulong value
{}
<byte 4256>
union int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 4256>
{field (By field)}
<byte 4256>
lbits:4 timer Interrupt Timer Value
lbits:3 reserved Reserved
lbits:1 ihf Interrupt when IMQ Half Full
lbits:24 reserved1 Reserved
{}
or int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 4256>
ulong value As longword
endunion int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 4260>
union imq_base (Offset 080) IMQ Base (write only)
<byte 4260>
{field (By field)}
<byte 4260>
lbits:32 address IMQ Base Address
{}
or imq_base (Offset 080) IMQ Base (write only)
<byte 4260>
ulong value As longword
endunion imq_base (Offset 080) IMQ Base (write only)
<byte 4264>
union imq_len (Offset 084) IMQ Length (write only)
<byte 4264>
{field (By field)}
<byte 4264>
lbits:12 length IMQ Length
lbits:20 reserved Reserved
{}
or imq_len (Offset 084) IMQ Length (write only)
<byte 4264>
ulong value As longword
endunion imq_len (Offset 084) IMQ Length (write only)
<byte 4268>
union imq_cons (Offset 088) IMQ Consumer Index
<byte 4268>
{field (By field)}
<byte 4268>
lbits:12 index IMQ Consumer Index
lbits:20 reserved Reserved
{}
or imq_cons (Offset 088) IMQ Consumer Index
<byte 4268>
ulong value As longword
endunion imq_cons (Offset 088) IMQ Consumer Index
<byte 4272>
union imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 4272>
{field (By field)}
<byte 4272>
lbits:32 address IMQ Producer Index Address
{}
or imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 4272>
ulong value As longword
endunion imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 4276>
{rsvd3[0] ((Offset 090-0FC) Reserved)}
<byte 4276>
ulong value
{}
<byte 4280>
{rsvd3[1] ((Offset 090-0FC) Reserved)}
<byte 4280>
ulong value
{}
<byte 4284>
{rsvd3[2] ((Offset 090-0FC) Reserved)}
<byte 4284>
ulong value
{}
<byte 4288>
{rsvd3[3] ((Offset 090-0FC) Reserved)}
<byte 4288>
ulong value
{}
<byte 4292>
{rsvd3[4] ((Offset 090-0FC) Reserved)}
<byte 4292>
ulong value
{}
<byte 4296>
{rsvd3[5] ((Offset 090-0FC) Reserved)}
<byte 4296>
ulong value
{}
<byte 4300>
{rsvd3[6] ((Offset 090-0FC) Reserved)}
<byte 4300>
ulong value
{}
<byte 4304>
{rsvd3[7] ((Offset 090-0FC) Reserved)}
<byte 4304>
ulong value
{}
<byte 4308>
{rsvd3[8] ((Offset 090-0FC) Reserved)}
<byte 4308>
ulong value
{}
<byte 4312>
{rsvd3[9] ((Offset 090-0FC) Reserved)}
<byte 4312>
ulong value
{}
<byte 4316>
{rsvd3[10] ((Offset 090-0FC) Reserved)}
<byte 4316>
ulong value
{}
<byte 4320>
{rsvd3[11] ((Offset 090-0FC) Reserved)}
<byte 4320>
ulong value
{}
<byte 4324>
{rsvd3[12] ((Offset 090-0FC) Reserved)}
<byte 4324>
ulong value
{}
<byte 4328>
{rsvd3[13] ((Offset 090-0FC) Reserved)}
<byte 4328>
ulong value
{}
<byte 4332>
{rsvd3[14] ((Offset 090-0FC) Reserved)}
<byte 4332>
ulong value
{}
<byte 4336>
{rsvd3[15] ((Offset 090-0FC) Reserved)}
<byte 4336>
ulong value
{}
<byte 4340>
{rsvd3[16] ((Offset 090-0FC) Reserved)}
<byte 4340>
ulong value
{}
<byte 4344>
{rsvd3[17] ((Offset 090-0FC) Reserved)}
<byte 4344>
ulong value
{}
<byte 4348>
{rsvd3[18] ((Offset 090-0FC) Reserved)}
<byte 4348>
ulong value
{}
<byte 4352>
{rsvd3[19] ((Offset 090-0FC) Reserved)}
<byte 4352>
ulong value
{}
<byte 4356>
{rsvd3[20] ((Offset 090-0FC) Reserved)}
<byte 4356>
ulong value
{}
<byte 4360>
{rsvd3[21] ((Offset 090-0FC) Reserved)}
<byte 4360>
ulong value
{}
<byte 4364>
{rsvd3[22] ((Offset 090-0FC) Reserved)}
<byte 4364>
ulong value
{}
<byte 4368>
{rsvd3[23] ((Offset 090-0FC) Reserved)}
<byte 4368>
ulong value
{}
<byte 4372>
{rsvd3[24] ((Offset 090-0FC) Reserved)}
<byte 4372>
ulong value
{}
<byte 4376>
{rsvd3[25] ((Offset 090-0FC) Reserved)}
<byte 4376>
ulong value
{}
<byte 4380>
{rsvd3[26] ((Offset 090-0FC) Reserved)}
<byte 4380>
ulong value
{}
<byte 4384>
{rsvd3[27] ((Offset 090-0FC) Reserved)}
<byte 4384>
ulong value
{}
<byte 4388>
union fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 4388>
{field (By field)}
<byte 4388>
lbits:1 x50 50 Ohms Termination Enable
lbits:2 xtr Termination Receive
lbits:2 xtt Termination Transmit
lbits:3 xta Transmitter Amplitude
lbits:1 xwb Wrapback
lbits:1 reserved Reserved
lbits:1 txo Transmitter Off
lbits:1 reserved1 Reserved
lbits:1 xlp Loopback
lbits:2 xem Output Emphasis
lbits:1 reserved2 Reserved
lbits:2 xrz Receiver Zero Adjust
lbits:2 xrp Receiver Pole Adjust
lbits:2 xtz Transmitter Zero Adjust
lbits:2 xtp Transmitter Pole Adjust
lbits:2 rxs Receiver Speed
lbits:2 txs Transmitter Speed
lbits:1 ean Enable Auto Speed Negotiation
lbits:1 xlr Force iTR to lock reference clock
lbits:1 asp Auto Speed Negotiation in Progress
lbits:1 xcv Type of Transceiver
{}
or fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 4388>
ulong value As longword
endunion fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 4392>
union fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 4392>
{field (By field)}
<byte 4392>
lbits:4 psm Port State Machine
lbits:4 lsm Loop State Machine
lbits:1 ldn Link Down
lbits:1 lup Link Up
lbits:1 es Elastic Store Error
lbits:1 ce Credit Error
lbits:1 lf Link Failure
lbits:1 lg Login Required
lbits:1 ptx Primitive Transmitted
lbits:1 prx Primitive Received
lbits:1 ba Bad AL_PA
lbits:1 lpf LIPf
lbits:1 sto State Time-out
lbits:1 ols OLS/NOS Received
lbits:1 lpb Loop Port Bypass (LPB) Primitive Sequence Received
lbits:1 lpe Loop Port Enable (LPE) Primitive Sequence Received
lbits:1 drs Directed LIP Sequence Received
lbits:1 reserved Reserved
lbits:1 ls Loss of Signal
lbits:1 os Out of Synchronization
lbits:1 flt Link Fault
lbits:1 reserved1 Reserved
lbits:1 byp Node Bypassed
lbits:1 np Non-Participating
lbits:1 tp Transmit Parity Error
lbits:1 lp Loop
{}
or fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 4392>
ulong value As longword
endunion fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 4396>
{rsvd3a[0] ((Offset 108-13F) Reserved)}
<byte 4396>
ulong value
{}
<byte 4400>
{rsvd3a[1] ((Offset 108-13F) Reserved)}
<byte 4400>
ulong value
{}
<byte 4404>
{rsvd3a[2] ((Offset 108-13F) Reserved)}
<byte 4404>
ulong value
{}
<byte 4408>
{rsvd3a[3] ((Offset 108-13F) Reserved)}
<byte 4408>
ulong value
{}
<byte 4412>
{rsvd3a[4] ((Offset 108-13F) Reserved)}
<byte 4412>
ulong value
{}
<byte 4416>
{rsvd3a[5] ((Offset 108-13F) Reserved)}
<byte 4416>
ulong value
{}
<byte 4420>
{rsvd3a[6] ((Offset 108-13F) Reserved)}
<byte 4420>
ulong value
{}
<byte 4424>
{rsvd3a[7] ((Offset 108-13F) Reserved)}
<byte 4424>
ulong value
{}
<byte 4428>
{rsvd3a[8] ((Offset 108-13F) Reserved)}
<byte 4428>
ulong value
{}
<byte 4432>
{rsvd3a[9] ((Offset 108-13F) Reserved)}
<byte 4432>
ulong value
{}
<byte 4436>
{rsvd3a[10] ((Offset 108-13F) Reserved)}
<byte 4436>
ulong value
{}
<byte 4440>
{rsvd3a[11] ((Offset 108-13F) Reserved)}
<byte 4440>
ulong value
{}
<byte 4444>
{rsvd3a[12] ((Offset 108-13F) Reserved)}
<byte 4444>
ulong value
{}
<byte 4448>
{rsvd3a[13] ((Offset 108-13F) Reserved)}
<byte 4448>
ulong value
{}
<byte 4452>
union sest_base (Offset 140) SEST Base (write only)
<byte 4452>
{field (By field)}
<byte 4452>
lbits:32 address SEST Base Address
{}
or sest_base (Offset 140) SEST Base (write only)
<byte 4452>
ulong value As longword
endunion sest_base (Offset 140) SEST Base (write only)
<byte 4456>
union sest_len (Offset 144) SEST Length (write only)
<byte 4456>
{field (By field)}
<byte 4456>
lbits:16 length SEST Length
lbits:16 reserved Reserved
{}
or sest_len (Offset 144) SEST Length (write only)
<byte 4456>
ulong value As longword
endunion sest_len (Offset 144) SEST Length (write only)
<byte 4460>
{rsvd4 ((Offset 148) Reserved)}
<byte 4460>
ulong value
{}
<byte 4464>
union scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 4464>
{field (By field)}
<byte 4464>
lbits:16 tail Tail
lbits:16 head Head
{}
or scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 4464>
ulong value As longword
endunion scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 4468>
union spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 4468>
{field (By field)}
<byte 4468>
lbits:1 sra SPI SRAM Access
lbits:10 rsvd Reserved
lbits:21 address RAM/ROM Address
{}
or spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 4468>
ulong value As longword
endunion spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 4472>
union spidata (Offset 154) SPI RAM/ROM Data
<byte 4472>
union field By field
<byte 4472>
{ram (By field)}
<byte 4472>
lbits:32 data RAM data
{}
or field By field
<byte 4472>
{rom (By field)}
<byte 4472>
lbits:8 data ROM data
lbits:24 rsvd Reserved
{}
endunion field By field
or spidata (Offset 154) SPI RAM/ROM Data
<byte 4472>
ulong value As longword
endunion spidata (Offset 154) SPI RAM/ROM Data
<byte 4476>
{rsvd5[0] ((Offset 158-15C) Reserved)}
<byte 4476>
ulong value
{}
<byte 4480>
{rsvd5[1] ((Offset 158-15C) Reserved)}
<byte 4480>
ulong value
{}
<byte 4484>
union int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 4484>
{field (By field)}
<byte 4484>
lbits:32 address Interrupt Message Address
{}
or int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 4484>
ulong value As longword
endunion int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 4488>
union int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 4488>
{field (By field)}
<byte 4488>
lbits:32 value Interrupt Message Value
{}
or int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 4488>
ulong value As longword
endunion int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 4492>
union sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 4492>
{field (By field)}
<byte 4492>
lbits:8 length SGL Page Length
lbits:24 reserved Reserved
{}
or sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 4492>
ulong value As longword
endunion sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 4496>
union my_id (Offset 16C) My ID
<byte 4496>
{field (By field)}
<byte 4496>
lbits:24 id My ID
lbits:8 reserved Reserved
{}
or my_id (Offset 16C) My ID
<byte 4496>
ulong value As longword
endunion my_id (Offset 16C) My ID
<byte 4500>
union gpio (Offset 170) General Purpose I/O
<byte 4500>
{field (By field)}
<byte 4500>
lbits:1 gc0 General Purpose Control 0
lbits:1 gc1 General Purpose Control 1
lbits:1 gc2 General Purpose Control 2
lbits:1 gc3 General Purpose Control 3
lbits:1 gc4 General Purpose Control 4
lbits:1 gc5 General Purpose Control 5
lbits:1 gc6 General Purpose Control 6
lbits:1 gc7 General Purpose Control 7
lbits:8 reserved Reserved
lbits:1 gp0 General Purpose I/O 0
lbits:1 gp1 General Purpose I/O 1
lbits:1 gp2 General Purpose I/O 2
lbits:1 gp3 General Purpose I/O 3
lbits:1 gp4 General Purpose Input 4
lbits:1 gp5 General Purpose I/O 5
lbits:1 gp6 General Purpose I/O 6
lbits:1 gp7 General Purpose I/O 7
lbits:8 reserved1 Reserved
{}
or gpio (Offset 170) General Purpose I/O
<byte 4500>
ulong value As longword
endunion gpio (Offset 170) General Purpose I/O
<byte 4504>
{rsvd6[0] ((Offset 174-17F) Reserved)}
<byte 4504>
ulong value
{}
<byte 4508>
{rsvd6[1] ((Offset 174-17F) Reserved)}
<byte 4508>
ulong value
{}
<byte 4512>
{rsvd6[2] ((Offset 174-17F) Reserved)}
<byte 4512>
ulong value
{}
<byte 4516>
union tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 4516>
{field (By field)}
<byte 4516>
lbits:9 pfs Programmable Frame Size
lbits:15 reserved Reserved
lbits:8 esi_range Exchange_ID Signaled Interrupt Range
{}
or tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 4516>
ulong value As longword
endunion tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 4520>
union tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 4520>
{field (By field)}
<byte 4520>
lbits:1 fad FCP Assist Disable
lbits:1 ino In Order
lbits:1 dof Discard OOO FCP Frames
lbits:1 fua FCP Unassisted ACK Enable
lbits:1 ime Interrupt Message Enable
lbits:1 fab Fabric
lbits:1 sic S_ID Copy Enable
lbits:1 eqs Equal Service
lbits:1 reserved Reserved
lbits:1 cae Concurrent Access Enable
lbits:14 reserved1 Reserved
lbits:1 fc2 FCP Class 2 Reassembly Enable
lbits:1 reserved2 Reserved
lbits:1 sdf Save Discarded Frames
lbits:1 rde Response Detect Enable
lbits:1 dam Default ACK Model
lbits:3 reserved3 Reserved
{}
or tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 4520>
ulong value As longword
endunion tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 4524>
union tach_control (Offset 188) Tachyon XL2 Control
<byte 4524>
{field (By field)}
<byte 4524>
lbits:1 gc0 General Purpose Control 0
lbits:1 gc1 General Purpose Control 1
lbits:1 gc2 General Purpose Control 2
lbits:1 gc3 General Purpose Control 3
lbits:1 gc4 General Purpose Control 4
lbits:3 reserved Reserved
lbits:1 feq Freeze ERQ
lbits:1 ffa Freeze FCP Assists
lbits:2 reserved1 Reserved
lbits:1 fis Freeze Inbound FCP Assists When Frame Placed in SFQ
lbits:1 fib Freeze Inbound FCP Assists
lbits:2 reserved2 Reserved
lbits:1 req Resume ERQ
lbits:1 rif Resume Inbound FCP Assists
lbits:1 rof Resume Outbound FCP Assists
lbits:12 reserved3 Reserved
lbits:1 crs Core Reset
{}
or tach_control (Offset 188) Tachyon XL2 Control
<byte 4524>
ulong value As longword
endunion tach_control (Offset 188) Tachyon XL2 Control
<byte 4528>
union tach_status (Offset 18C) Tachyon XL2 Status
<byte 4528>
{field (By field)}
<byte 4528>
lbits:1 gp0 General Purpose I/O 0
lbits:1 gp1 General Purpose I/O 1
lbits:1 gp2 General Purpose I/O 2
lbits:1 gp3 General Purpose I/O 3
lbits:1 gp4 General Purpose Input 4
lbits:5 revid Device Revision ID
lbits:1 ipe Inbound Parity Error
lbits:1 ope Outbound Parity Error
lbits:4 reserved Reserved
lbits:1 eqf ERQ Frozen
lbits:1 iff Inbound FCP Assists Frozen
lbits:1 off Outbound FCP Assists Frozen
lbits:6 reserved1 Reserved
lbits:1 m66 66 Mhz Enabled
lbits:1 ile Inbound Link Control FIFO Empty
lbits:1 ole Outbound Link Control List Empty
lbits:1 ife Inbound FIFO Empty
lbits:1 ofe Outbound FIFO Empty
lbits:1 imf IMQ Full
lbits:1 ssf SFQ Full
{}
or tach_status (Offset 18C) Tachyon XL2 Status
<byte 4528>
ulong value As longword
endunion tach_status (Offset 18C) Tachyon XL2 Status
<byte 4532>
{rsvd7 ((Offset 190) Reserved)}
<byte 4532>
ulong value
{}
<byte 4536>
union hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 4536>
{field (By field)}
<byte 4536>
lbits:12 length Frame Length
lbits:7 reserved Reserved
lbits:12 upper_addr Frame Upper Address
lbits:1 reserved1 Reserved
{}
or hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 4536>
ulong value As longword
endunion hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 4540>
union hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 4540>
{field (By field)}
<byte 4540>
lbits:12 length Frame Length
lbits:7 reserved Reserved
lbits:12 upper_addr Frame Upper Address
lbits:1 reserved1 Reserved
{}
or hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 4540>
ulong value As longword
endunion hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 4544>
union inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 4544>
{field (By field)}
<byte 4544>
lbits:24 reserved Reserved
lbits:8 sest_lru_count SEST LRU Count
{}
or inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 4544>
ulong value As longword
endunion inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 4548>
union inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 4548>
{field (By field)}
<byte 4548>
lbits:8 discd_frames Discarded Frame Count
lbits:24 reserved Reserved
{}
or inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 4548>
ulong value As longword
endunion inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 4552>
union ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 4552>
{field (By field)}
<byte 4552>
lbits:28 threshold EE_Credit Zero Timer Threshold
lbits:4 reserved Reserved
{}
or ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 4552>
ulong value As longword
endunion ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 4556>
union up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 4556>
{field (By field)}
<byte 4556>
lbits:13 reserved Reserved
lbits:19 upper_addr Upper Data Address
{}
or up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 4556>
ulong value As longword
endunion up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 4560>
union up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 4560>
{field (By field)}
<byte 4560>
lbits:32 upper_addr Upper Control Address
{}
or up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 4560>
ulong value As longword
endunion up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 4564>
union dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 4564>
{field (By field)}
<byte 4564>
lbits:1 ef AL_PA 0xEF DHD Login Information
lbits:1 e8 AL_PA 0xE8 DHD Login Information
lbits:1 e4 AL_PA 0xE4 DHD Login Information
lbits:1 e2 AL_PA 0xE2 DHD Login Information
lbits:1 e1 AL_PA 0xE1 DHD Login Information
lbits:1 e0 AL_PA 0xE0 DHD Login Information
lbits:1 dc AL_PA 0xDC DHD Login Information
lbits:1 da AL_PA 0xDA DHD Login Information
lbits:1 d9 AL_PA 0xD9 DHD Login Information
lbits:1 d6 AL_PA 0xD6 DHD Login Information
lbits:1 d5 AL_PA 0xD5 DHD Login Information
lbits:1 d4 AL_PA 0xD4 DHD Login Information
lbits:1 d3 AL_PA 0xD3 DHD Login Information
lbits:1 d2 AL_PA 0xD2 DHD Login Information
lbits:1 d1 AL_PA 0xD1 DHD Login Information
lbits:1 ce AL_PA 0xCE DHD Login Information
lbits:1 cd AL_PA 0xCD DHD Login Information
lbits:1 cc AL_PA 0xCC DHD Login Information
lbits:1 cb AL_PA 0xCB DHD Login Information
lbits:1 ca AL_PA 0xCA DHD Login Information
lbits:1 c9 AL_PA 0xC9 DHD Login Information
lbits:1 c7 AL_PA 0xC7 DHD Login Information
lbits:1 c6 AL_PA 0xC6 DHD Login Information
lbits:1 c5 AL_PA 0xC5 DHD Login Information
lbits:1 c3 AL_PA 0xC3 DHD Login Information
lbits:1 bc AL_PA 0xBC DHD Login Information
lbits:1 ba AL_PA 0xBA DHD Login Information
lbits:1 b9 AL_PA 0xB9 DHD Login Information
lbits:1 b6 AL_PA 0xB6 DHD Login Information
lbits:1 b5 AL_PA 0xB5 DHD Login Information
lbits:1 b4 AL_PA 0xB4 DHD Login Information
lbits:1 b3 AL_PA 0xB3 DHD Login Information
{}
or dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 4564>
ulong value As longword
endunion dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 4568>
union dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 4568>
{field (By field)}
<byte 4568>
lbits:1 alpab2 AL_PA 0xB2 DHD Login Information
lbits:1 alpab1 AL_PA 0xB1 DHD Login Information
lbits:1 alpaae AL_PA 0xAE DHD Login Information
lbits:1 alpaad AL_PA 0xAD DHD Login Information
lbits:1 alpaac AL_PA 0xAC DHD Login Information
lbits:1 alpaab AL_PA 0xAB DHD Login Information
lbits:1 alpaaa AL_PA 0xAA DHD Login Information
lbits:1 alpaa9 AL_PA 0xA9 DHD Login Information
lbits:1 alpaa7 AL_PA 0xA7 DHD Login Information
lbits:1 alpaa6 AL_PA 0xA6 DHD Login Information
lbits:1 alpaa5 AL_PA 0xA5 DHD Login Information
lbits:1 alpaa3 AL_PA 0xA3 DHD Login Information
lbits:1 alpa9f AL_PA 0x9F DHD Login Information
lbits:1 alpa9e AL_PA 0x9E DHD Login Information
lbits:1 alpa9d AL_PA 0x9D DHD Login Information
lbits:1 alpa9b AL_PA 0x9B DHD Login Information
lbits:1 alpa98 AL_PA 0x98 DHD Login Information
lbits:1 alpa97 AL_PA 0x97 DHD Login Information
lbits:1 alpa90 AL_PA 0x90 DHD Login Information
lbits:1 alpa8f AL_PA 0x8F DHD Login Information
lbits:1 alpa88 AL_PA 0x88 DHD Login Information
lbits:1 alpa84 AL_PA 0x84 DHD Login Information
lbits:1 alpa82 AL_PA 0x82 DHD Login Information
lbits:1 alpa81 AL_PA 0x81 DHD Login Information
lbits:1 alpa80 AL_PA 0x80 DHD Login Information
lbits:1 alpa7c AL_PA 0x7C DHD Login Information
lbits:1 alpa7a AL_PA 0x7A DHD Login Information
lbits:1 alpa79 AL_PA 0x79 DHD Login Information
lbits:1 alpa76 AL_PA 0x76 DHD Login Information
lbits:1 alpa75 AL_PA 0x75 DHD Login Information
lbits:1 alpa74 AL_PA 0x74 DHD Login Information
lbits:1 alpa73 AL_PA 0x73 DHD Login Information
{}
or dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 4568>
ulong value As longword
endunion dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 4572>
union dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 4572>
{field (By field)}
<byte 4572>
lbits:1 alpa72 AL_PA 0x72 DHD Login Information
lbits:1 alpa71 AL_PA 0x71 DHD Login Information
lbits:1 alpa6e AL_PA 0x6E DHD Login Information
lbits:1 alpa6d AL_PA 0x6D DHD Login Information
lbits:1 alpa6c AL_PA 0x6C DHD Login Information
lbits:1 alpa6b AL_PA 0x6B DHD Login Information
lbits:1 alpa6a AL_PA 0x6A DHD Login Information
lbits:1 alpa69 AL_PA 0x69 DHD Login Information
lbits:1 alpa67 AL_PA 0x67 DHD Login Information
lbits:1 alpa66 AL_PA 0x66 DHD Login Information
lbits:1 alpa65 AL_PA 0x65 DHD Login Information
lbits:1 alpa63 AL_PA 0x63 DHD Login Information
lbits:1 alpa5c AL_PA 0x5C DHD Login Information
lbits:1 alpa5a AL_PA 0x5A DHD Login Information
lbits:1 alpa59 AL_PA 0x59 DHD Login Information
lbits:1 alpa56 AL_PA 0x56 DHD Login Information
lbits:1 alpa55 AL_PA 0x55 DHD Login Information
lbits:1 alpa54 AL_PA 0x54 DHD Login Information
lbits:1 alpa53 AL_PA 0x53 DHD Login Information
lbits:1 alpa52 AL_PA 0x52 DHD Login Information
lbits:1 alpa51 AL_PA 0x51 DHD Login Information
lbits:1 alpa4e AL_PA 0x4E DHD Login Information
lbits:1 alpa4d AL_PA 0x4D DHD Login Information
lbits:1 alpa4c AL_PA 0x4C DHD Login Information
lbits:1 alpa4b AL_PA 0x4B DHD Login Information
lbits:1 alpa4a AL_PA 0x4A DHD Login Information
lbits:1 alpa49 AL_PA 0x49 DHD Login Information
lbits:1 alpa47 AL_PA 0x47 DHD Login Information
lbits:1 alpa46 AL_PA 0x46 DHD Login Information
lbits:1 alpa45 AL_PA 0x45 DHD Login Information
lbits:1 alpa43 AL_PA 0x43 DHD Login Information
lbits:1 alpa3c AL_PA 0x3C DHD Login Information
{}
or dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 4572>
ulong value As longword
endunion dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 4576>
union dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 4576>
{field (By field)}
<byte 4576>
lbits:1 alpa3a AL_PA 0x3A DHD Login Information
lbits:1 alpa39 AL_PA 0x39 DHD Login Information
lbits:1 alpa36 AL_PA 0x36 DHD Login Information
lbits:1 alpa35 AL_PA 0x35 DHD Login Information
lbits:1 alpa34 AL_PA 0x34 DHD Login Information
lbits:1 alpa33 AL_PA 0x33 DHD Login Information
lbits:1 alpa32 AL_PA 0x32 DHD Login Information
lbits:1 alpa31 AL_PA 0x31 DHD Login Information
lbits:1 alpa2e AL_PA 0x2E DHD Login Information
lbits:1 alpa2d AL_PA 0x2D DHD Login Information
lbits:1 alpa2c AL_PA 0x2C DHD Login Information
lbits:1 alpa2b AL_PA 0x2B DHD Login Information
lbits:1 alpa2a AL_PA 0x2A DHD Login Information
lbits:1 alpa29 AL_PA 0x29 DHD Login Information
lbits:1 alpa27 AL_PA 0x27 DHD Login Information
lbits:1 alpa26 AL_PA 0x26 DHD Login Information
lbits:1 alpa25 AL_PA 0x25 DHD Login Information
lbits:1 alpa23 AL_PA 0x23 DHD Login Information
lbits:1 alpa1f AL_PA 0x1F DHD Login Information
lbits:1 alpa1e AL_PA 0x1E DHD Login Information
lbits:1 alpa1d AL_PA 0x1D DHD Login Information
lbits:1 alpa1b AL_PA 0x1B DHD Login Information
lbits:1 alpa18 AL_PA 0x18 DHD Login Information
lbits:1 alpa17 AL_PA 0x17 DHD Login Information
lbits:1 alpa10 AL_PA 0x10 DHD Login Information
lbits:1 alpa0f AL_PA 0x0F DHD Login Information
lbits:1 alpa08 AL_PA 0x08 DHD Login Information
lbits:1 alpa04 AL_PA 0x04 DHD Login Information
lbits:1 alpa02 AL_PA 0x02 DHD Login Information
lbits:1 alpa01 AL_PA 0x01 DHD Login Information
lbits:1 alpa00 AL_PA 0x00 DHD Login Information
lbits:1 reserved Reserved
{}
or dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 4576>
ulong value As longword
endunion dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 4580>
union fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 4580>
{field (By field)}
<byte 4580>
lbits:1 bli Bypass Loop Initialization
lbits:1 reserved Reserved
lbits:1 enp Enable N_Port Mode
lbits:1 lr Login Required
lbits:1 inif Initialize as Fabric
lbits:1 rf Respond to Fabric Address
lbits:1 blm Bypass Loop Map
lbits:1 sa Acquire Soft Address
lbits:1 ha Acquire Hard Address
lbits:1 aq Acquire Previously Acquired Address
lbits:1 fa Acquire Fabric Aquired Address
lbits:1 td Timer Disable
lbits:1 sap Skip Arbitration Phase
lbits:1 elb External Loopback/Pad Loopback
lbits:1 ilb Internal loopback
lbits:1 npi Initialize as N_Port
lbits:8 bb_credit BB_Credit
lbits:8 al_pa Desired AL_PA
{}
or fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 4580>
ulong value As longword
endunion fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 4584>
union fm_control (Offset 1C4) Frame Manager Control
<byte 4584>
{field (By field)}
<byte 4584>
lbits:3 cmd State Machine Command
lbits:1 cl Close Loop Request
lbits:1 ipe Initiate Port Enable
lbits:1 sp Send Prim_Reg
lbits:1 sq Primitive Sequence
lbits:1 sas Start Auto-Speed Negotiation
lbits:24 reserved Reserved
{}
or fm_control (Offset 1C4) Frame Manager Control
<byte 4584>
ulong value As longword
endunion fm_control (Offset 1C4) Frame Manager Control
<byte 4588>
union fm_status (Offset 1C8) Frame Manager Status
<byte 4588>
{field (By field)}
<byte 4588>
lbits:4 psm Port State Machine
lbits:4 lsm Loop State Machine
lbits:1 ldn Link Down
lbits:1 lup Link Up
lbits:1 es Elastic Store Error
lbits:1 ce Credit Error
lbits:1 lf Link Failure
lbits:1 lg Login Required
lbits:1 ptx Primitive Transmitted
lbits:1 prx Primitive Received
lbits:1 ba Bad AL_PA
lbits:1 lpf LIPf
lbits:1 sto State Time-out
lbits:1 ols OLS/NOS Received
lbits:1 lpb Loop Port Bypass (LPB) Primitive Sequence Received
lbits:1 lpe Loop Port Enable (LPE) Primitive Sequence Received
lbits:1 drs Directed LIP Sequence Received
lbits:1 reserved Reserved
lbits:1 ls Loss of Signal
lbits:1 os Out of Synchronization
lbits:1 flt Link Fault
lbits:1 reserved1 Reserved
lbits:1 byp Node Bypassed
lbits:1 np Non-Participating
lbits:1 tp Transmit Parity Error
lbits:1 lp Loop
{}
or fm_status (Offset 1C8) Frame Manager Status
<byte 4588>
ulong value As longword
endunion fm_status (Offset 1C8) Frame Manager Status
<byte 4592>
union fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 4592>
{field (By field)}
<byte 4592>
lbits:16 ed_tov Error Detect Time-Out
lbits:9 rt_tov Receiver Transmitter Time-Out
lbits:7 reserved Reserved
{}
or fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 4592>
ulong value As longword
endunion fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 4596>
union fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 4596>
{field (By field)}
<byte 4596>
lbits:8 link_fail Link Fail Count
lbits:8 loss_of_sync Loss of Synchronization Count
lbits:8 bad_rx_char Bad Received Character Count
lbits:8 loss_of_signal Loss of Signal Count
{}
or fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 4596>
ulong value As longword
endunion fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 4600>
union fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 4600>
{field (By field)}
<byte 4600>
lbits:8 proto_er Protocol Error Count
lbits:8 bad_crc Bad CRC Count
lbits:8 dis_frm Discarded Frames
lbits:8 rx_eofa Received EOFa
{}
or fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 4600>
ulong value As longword
endunion fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 4604>
union fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 4604>
{field (By field)}
<byte 4604>
lbits:9 al_time Arbitrated Loop Time-Out
lbits:7 reserved Reserved
lbits:16 lp_tov Loop Time-Out
{}
or fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 4604>
ulong value As longword
endunion fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 4608>
union fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 4608>
{field (By field)}
<byte 4608>
lbits:24 bb0_timer BB_Credit Timer
lbits:8 reserved Reserved
{}
or fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 4608>
ulong value As longword
endunion fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 4612>
union fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 4612>
{field (By field)}
<byte 4612>
lbits:32 wwn World Wide Name
{}
or fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 4612>
ulong value As longword
endunion fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 4616>
union fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 4616>
{field (By field)}
<byte 4616>
lbits:32 wwn World Wide Name
{}
or fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 4616>
ulong value As longword
endunion fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 4620>
union fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 4620>
{field (By field)}
<byte 4620>
lbits:8 lipf_alpa AL_PA of Most Recent LIPf Received
lbits:8 bad_alpa AL_PA of Most Recent OPN Sent and Returned Without Being Accepted
lbits:8 acq_alpa AL_PA Acquired During Loop Initialization
lbits:8 reserved Reserved
{}
or fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 4620>
ulong value As longword
endunion fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 4624>
union fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 4624>
{field (By field)}
<byte 4624>
lbits:24 prim_value Primitive to be Sent
lbits:8 reserved Reserved
{}
or fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 4624>
ulong value As longword
endunion fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 4628>
union fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 4628>
{field (By field)}
<byte 4628>
lbits:8 exp_frm Expired Frames
lbits:24 reserved Reserved
{}
or fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 4628>
ulong value As longword
endunion fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 4632>
union fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 4632>
{field (By field)}
<byte 4632>
lbits:1 dac Disable Auto Close
lbits:2 nbc Non-zero Login BB_Credit
lbits:1 eei Enable ERR_INIT
lbits:1 icb Ignore Close Bit
lbits:2 atv Arbitration Threshold Value
lbits:1 gde Garbage Deletion Enable
lbits:8 laa Lowest Allowable AL_PA
lbits:8 reserved Reserved
lbits:1 reserved1 Reserved
lbits:1 prm Promiscuous Mode
lbits:1 wpe Wait For Port Enable
lbits:1 fmh Force Monitor State With Hard Address
lbits:1 fmn Force Monitor Non-participating State
lbits:1 dlm Disable Loop Master
lbits:1 dsa Disable Soft Address Selection
lbits:1 ilp Ignore LPB/LPE Primitive Sequences
{}
or fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 4632>
ulong value As longword
endunion fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 4636>
union pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 4636>
{field (By field)}
<byte 4636>
union brstctr PCI Master Burst Count Control
<byte 4636>
{field (By field)}
<byte 4636>
tbits:4 read_burst PCI read burst count
tbits:4 write_burst PCI write burst count
{}
or brstctr PCI Master Burst Count Control
<byte 4636>
utiny value As byte
endunion brstctr PCI Master Burst Count Control
<byte 4637>
union waitctr PCI Master Wait Count Control
<byte 4637>
{field (By field)}
<byte 4637>
tbits:4 read_wait DMA read wait count
tbits:4 write_wait DMA write wait count
{}
or waitctr PCI Master Wait Count Control
<byte 4637>
utiny value As byte
endunion waitctr PCI Master Wait Count Control
<byte 4638>
union romctr PCI ROM Control
<byte 4638>
{field (By field)}
<byte 4638>
tbits:1 vpp_en ROM VPP Enable
tbits:1 fla Flash Installed (read only)
tbits:1 rom ROM Installed (read only)
tbits:1 rm0 RAM 0 (read only); combination of RAM 2, RAM 1, and RAM 0 describe static RAM configuration: 000 - none, 001 - 128KB, 010 - 256KB, 011 - 512KB, 100 - 1MB, 101 - 2MB, 110 - reserved, 111 - reserved
tbits:1 rm1 RAM 1 (read only)
tbits:1 svl Subsystem VID Loaded (read only)
tbits:1 par External memory parity checking enabled (read only)
tbits:1 rm2 RAM 2 (read only)
{}
or romctr PCI ROM Control
<byte 4638>
utiny value As byte
endunion romctr PCI ROM Control
<byte 4639>
union mctr PCI Master Control
<byte 4639>
{field (By field)}
<byte 4639>
tbits:1 ecl Enable MRM and MRL Completion to Cache Line
tbits:1 rrd PCI Memory Read Round Down Enable
tbits:1 p64 PCI Present and Active
tbits:1 rae Memory Read Alignment Enable
tbits:1 wae Memory Write Alignment Enable
tbits:1 rbe PCI Read Burst Counter Enable
tbits:1 wbe PCI Write Burst Counter Enable
tbits:1 dlt Disable Latency Timer
{}
or mctr PCI Master Control
<byte 4639>
utiny value As byte
endunion mctr PCI Master Control
{}
or pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 4636>
ulong value As longword
endunion pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 4640>
union pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
<byte 4640>
{field (By field)}
<byte 4640>
union softrst PCI Interface Reset Control
<byte 4640>
{field (By field)}
<byte 4640>
tbits:1 rst PCI Interface Soft Reset
tbits:1 dpe Reserved (must be zero)
tbits:1 rdd RAM/ROM Read Delayed Transaction Disabled
tbits:1 tad Target Abort Disable
tbits:4 rsvd Reserved (must be zero)
{}
or softrst PCI Interface Reset Control
<byte 4640>
utiny value As byte
endunion softrst PCI Interface Reset Control
<byte 4641>
union intpend PCI Interrupt Pending
<byte 4641>
{field (By field)}
<byte 4641>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or intpend PCI Interrupt Pending
<byte 4641>
utiny value As byte
endunion intpend PCI Interrupt Pending
<byte 4642>
union inten PCI Interrupt Enable
<byte 4642>
{field (By field)}
<byte 4642>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or inten PCI Interrupt Enable
<byte 4642>
utiny value As byte
endunion inten PCI Interrupt Enable
<byte 4643>
union intstat PCI Interrupt Status
<byte 4643>
{field (By field)}
<byte 4643>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or intstat PCI Interrupt Status
<byte 4643>
utiny value As byte
endunion intstat PCI Interrupt Status
{}
or pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
<byte 4640>
ulong value As longword
endunion pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
{}
endunion csr[0] Tachyon XL2 CSR Registers
<byte 4644>
union csr[1] Tachyon XL2 CSR Registers
<byte 4644>
ulong[128] csra Tachyon XL2 CSR Registers As Longwords
or csr[1] Tachyon XL2 CSR Registers
<byte 4644>
{csr (Tachyon XL2 CSR Registers By Field)}
<byte 4644>
union erq_base (Offset 000) ERQ Base (write only)
<byte 4644>
{field (By field)}
<byte 4644>
lbits:32 address ERQ Base Address
{}
or erq_base (Offset 000) ERQ Base (write only)
<byte 4644>
ulong value As longword
endunion erq_base (Offset 000) ERQ Base (write only)
<byte 4648>
union erq_len (Offset 004) ERQ Length (write only)
<byte 4648>
{field (By field)}
<byte 4648>
lbits:12 length ERQ Length
lbits:20 reserved Reserved
{}
or erq_len (Offset 004) ERQ Length (write only)
<byte 4648>
ulong value As longword
endunion erq_len (Offset 004) ERQ Length (write only)
<byte 4652>
union erq_prod (Offset 008) ERQ Producer Index
<byte 4652>
{field (By field)}
<byte 4652>
lbits:12 index ERQ Producer Index
lbits:20 reserved Reserved
{}
or erq_prod (Offset 008) ERQ Producer Index
<byte 4652>
ulong value As longword
endunion erq_prod (Offset 008) ERQ Producer Index
<byte 4656>
union erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 4656>
{field (By field)}
<byte 4656>
lbits:32 address ERQ Consumer Index Address
{}
or erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 4656>
ulong value As longword
endunion erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 4660>
union erq_cons (Offset 010) ERQ Consumer Index
<byte 4660>
{field (By field)}
<byte 4660>
lbits:12 index ERQ Consumer Index
lbits:20 reserved Reserved
{}
or erq_cons (Offset 010) ERQ Consumer Index
<byte 4660>
ulong value As longword
endunion erq_cons (Offset 010) ERQ Consumer Index
<byte 4664>
{rsvd1[0] ((Offset 014-04F) Reserved)}
<byte 4664>
ulong value
{}
<byte 4668>
{rsvd1[1] ((Offset 014-04F) Reserved)}
<byte 4668>
ulong value
{}
<byte 4672>
{rsvd1[2] ((Offset 014-04F) Reserved)}
<byte 4672>
ulong value
{}
<byte 4676>
{rsvd1[3] ((Offset 014-04F) Reserved)}
<byte 4676>
ulong value
{}
<byte 4680>
{rsvd1[4] ((Offset 014-04F) Reserved)}
<byte 4680>
ulong value
{}
<byte 4684>
{rsvd1[5] ((Offset 014-04F) Reserved)}
<byte 4684>
ulong value
{}
<byte 4688>
{rsvd1[6] ((Offset 014-04F) Reserved)}
<byte 4688>
ulong value
{}
<byte 4692>
{rsvd1[7] ((Offset 014-04F) Reserved)}
<byte 4692>
ulong value
{}
<byte 4696>
{rsvd1[8] ((Offset 014-04F) Reserved)}
<byte 4696>
ulong value
{}
<byte 4700>
{rsvd1[9] ((Offset 014-04F) Reserved)}
<byte 4700>
ulong value
{}
<byte 4704>
{rsvd1[10] ((Offset 014-04F) Reserved)}
<byte 4704>
ulong value
{}
<byte 4708>
{rsvd1[11] ((Offset 014-04F) Reserved)}
<byte 4708>
ulong value
{}
<byte 4712>
{rsvd1[12] ((Offset 014-04F) Reserved)}
<byte 4712>
ulong value
{}
<byte 4716>
{rsvd1[13] ((Offset 014-04F) Reserved)}
<byte 4716>
ulong value
{}
<byte 4720>
{rsvd1[14] ((Offset 014-04F) Reserved)}
<byte 4720>
ulong value
{}
<byte 4724>
union sfq_base (Offset 050) SFQ Base (write only)
<byte 4724>
{field (By field)}
<byte 4724>
lbits:32 address SFQ Base Address
{}
or sfq_base (Offset 050) SFQ Base (write only)
<byte 4724>
ulong value As longword
endunion sfq_base (Offset 050) SFQ Base (write only)
<byte 4728>
union sfq_len (Offset 054) SFQ Length (write only)
<byte 4728>
{field (By field)}
<byte 4728>
lbits:12 length SFQ Length
lbits:20 reserved Reserved
{}
or sfq_len (Offset 054) SFQ Length (write only)
<byte 4728>
ulong value As longword
endunion sfq_len (Offset 054) SFQ Length (write only)
<byte 4732>
union sfq_cons (Offset 058) SFQ Consumer Index
<byte 4732>
{field (By field)}
<byte 4732>
lbits:12 index SFQ Consumer Index
lbits:20 reserved Reserved
{}
or sfq_cons (Offset 058) SFQ Consumer Index
<byte 4732>
ulong value As longword
endunion sfq_cons (Offset 058) SFQ Consumer Index
<byte 4736>
{rsvd2[0] ((Offset 05C-07B) Reserved)}
<byte 4736>
ulong value
{}
<byte 4740>
{rsvd2[1] ((Offset 05C-07B) Reserved)}
<byte 4740>
ulong value
{}
<byte 4744>
{rsvd2[2] ((Offset 05C-07B) Reserved)}
<byte 4744>
ulong value
{}
<byte 4748>
{rsvd2[3] ((Offset 05C-07B) Reserved)}
<byte 4748>
ulong value
{}
<byte 4752>
{rsvd2[4] ((Offset 05C-07B) Reserved)}
<byte 4752>
ulong value
{}
<byte 4756>
{rsvd2[5] ((Offset 05C-07B) Reserved)}
<byte 4756>
ulong value
{}
<byte 4760>
{rsvd2[6] ((Offset 05C-07B) Reserved)}
<byte 4760>
ulong value
{}
<byte 4764>
{rsvd2[7] ((Offset 05C-07B) Reserved)}
<byte 4764>
ulong value
{}
<byte 4768>
union int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 4768>
{field (By field)}
<byte 4768>
lbits:4 timer Interrupt Timer Value
lbits:3 reserved Reserved
lbits:1 ihf Interrupt when IMQ Half Full
lbits:24 reserved1 Reserved
{}
or int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 4768>
ulong value As longword
endunion int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 4772>
union imq_base (Offset 080) IMQ Base (write only)
<byte 4772>
{field (By field)}
<byte 4772>
lbits:32 address IMQ Base Address
{}
or imq_base (Offset 080) IMQ Base (write only)
<byte 4772>
ulong value As longword
endunion imq_base (Offset 080) IMQ Base (write only)
<byte 4776>
union imq_len (Offset 084) IMQ Length (write only)
<byte 4776>
{field (By field)}
<byte 4776>
lbits:12 length IMQ Length
lbits:20 reserved Reserved
{}
or imq_len (Offset 084) IMQ Length (write only)
<byte 4776>
ulong value As longword
endunion imq_len (Offset 084) IMQ Length (write only)
<byte 4780>
union imq_cons (Offset 088) IMQ Consumer Index
<byte 4780>
{field (By field)}
<byte 4780>
lbits:12 index IMQ Consumer Index
lbits:20 reserved Reserved
{}
or imq_cons (Offset 088) IMQ Consumer Index
<byte 4780>
ulong value As longword
endunion imq_cons (Offset 088) IMQ Consumer Index
<byte 4784>
union imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 4784>
{field (By field)}
<byte 4784>
lbits:32 address IMQ Producer Index Address
{}
or imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 4784>
ulong value As longword
endunion imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 4788>
{rsvd3[0] ((Offset 090-0FC) Reserved)}
<byte 4788>
ulong value
{}
<byte 4792>
{rsvd3[1] ((Offset 090-0FC) Reserved)}
<byte 4792>
ulong value
{}
<byte 4796>
{rsvd3[2] ((Offset 090-0FC) Reserved)}
<byte 4796>
ulong value
{}
<byte 4800>
{rsvd3[3] ((Offset 090-0FC) Reserved)}
<byte 4800>
ulong value
{}
<byte 4804>
{rsvd3[4] ((Offset 090-0FC) Reserved)}
<byte 4804>
ulong value
{}
<byte 4808>
{rsvd3[5] ((Offset 090-0FC) Reserved)}
<byte 4808>
ulong value
{}
<byte 4812>
{rsvd3[6] ((Offset 090-0FC) Reserved)}
<byte 4812>
ulong value
{}
<byte 4816>
{rsvd3[7] ((Offset 090-0FC) Reserved)}
<byte 4816>
ulong value
{}
<byte 4820>
{rsvd3[8] ((Offset 090-0FC) Reserved)}
<byte 4820>
ulong value
{}
<byte 4824>
{rsvd3[9] ((Offset 090-0FC) Reserved)}
<byte 4824>
ulong value
{}
<byte 4828>
{rsvd3[10] ((Offset 090-0FC) Reserved)}
<byte 4828>
ulong value
{}
<byte 4832>
{rsvd3[11] ((Offset 090-0FC) Reserved)}
<byte 4832>
ulong value
{}
<byte 4836>
{rsvd3[12] ((Offset 090-0FC) Reserved)}
<byte 4836>
ulong value
{}
<byte 4840>
{rsvd3[13] ((Offset 090-0FC) Reserved)}
<byte 4840>
ulong value
{}
<byte 4844>
{rsvd3[14] ((Offset 090-0FC) Reserved)}
<byte 4844>
ulong value
{}
<byte 4848>
{rsvd3[15] ((Offset 090-0FC) Reserved)}
<byte 4848>
ulong value
{}
<byte 4852>
{rsvd3[16] ((Offset 090-0FC) Reserved)}
<byte 4852>
ulong value
{}
<byte 4856>
{rsvd3[17] ((Offset 090-0FC) Reserved)}
<byte 4856>
ulong value
{}
<byte 4860>
{rsvd3[18] ((Offset 090-0FC) Reserved)}
<byte 4860>
ulong value
{}
<byte 4864>
{rsvd3[19] ((Offset 090-0FC) Reserved)}
<byte 4864>
ulong value
{}
<byte 4868>
{rsvd3[20] ((Offset 090-0FC) Reserved)}
<byte 4868>
ulong value
{}
<byte 4872>
{rsvd3[21] ((Offset 090-0FC) Reserved)}
<byte 4872>
ulong value
{}
<byte 4876>
{rsvd3[22] ((Offset 090-0FC) Reserved)}
<byte 4876>
ulong value
{}
<byte 4880>
{rsvd3[23] ((Offset 090-0FC) Reserved)}
<byte 4880>
ulong value
{}
<byte 4884>
{rsvd3[24] ((Offset 090-0FC) Reserved)}
<byte 4884>
ulong value
{}
<byte 4888>
{rsvd3[25] ((Offset 090-0FC) Reserved)}
<byte 4888>
ulong value
{}
<byte 4892>
{rsvd3[26] ((Offset 090-0FC) Reserved)}
<byte 4892>
ulong value
{}
<byte 4896>
{rsvd3[27] ((Offset 090-0FC) Reserved)}
<byte 4896>
ulong value
{}
<byte 4900>
union fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 4900>
{field (By field)}
<byte 4900>
lbits:1 x50 50 Ohms Termination Enable
lbits:2 xtr Termination Receive
lbits:2 xtt Termination Transmit
lbits:3 xta Transmitter Amplitude
lbits:1 xwb Wrapback
lbits:1 reserved Reserved
lbits:1 txo Transmitter Off
lbits:1 reserved1 Reserved
lbits:1 xlp Loopback
lbits:2 xem Output Emphasis
lbits:1 reserved2 Reserved
lbits:2 xrz Receiver Zero Adjust
lbits:2 xrp Receiver Pole Adjust
lbits:2 xtz Transmitter Zero Adjust
lbits:2 xtp Transmitter Pole Adjust
lbits:2 rxs Receiver Speed
lbits:2 txs Transmitter Speed
lbits:1 ean Enable Auto Speed Negotiation
lbits:1 xlr Force iTR to lock reference clock
lbits:1 asp Auto Speed Negotiation in Progress
lbits:1 xcv Type of Transceiver
{}
or fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 4900>
ulong value As longword
endunion fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 4904>
union fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 4904>
{field (By field)}
<byte 4904>
lbits:4 psm Port State Machine
lbits:4 lsm Loop State Machine
lbits:1 ldn Link Down
lbits:1 lup Link Up
lbits:1 es Elastic Store Error
lbits:1 ce Credit Error
lbits:1 lf Link Failure
lbits:1 lg Login Required
lbits:1 ptx Primitive Transmitted
lbits:1 prx Primitive Received
lbits:1 ba Bad AL_PA
lbits:1 lpf LIPf
lbits:1 sto State Time-out
lbits:1 ols OLS/NOS Received
lbits:1 lpb Loop Port Bypass (LPB) Primitive Sequence Received
lbits:1 lpe Loop Port Enable (LPE) Primitive Sequence Received
lbits:1 drs Directed LIP Sequence Received
lbits:1 reserved Reserved
lbits:1 ls Loss of Signal
lbits:1 os Out of Synchronization
lbits:1 flt Link Fault
lbits:1 reserved1 Reserved
lbits:1 byp Node Bypassed
lbits:1 np Non-Participating
lbits:1 tp Transmit Parity Error
lbits:1 lp Loop
{}
or fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 4904>
ulong value As longword
endunion fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 4908>
{rsvd3a[0] ((Offset 108-13F) Reserved)}
<byte 4908>
ulong value
{}
<byte 4912>
{rsvd3a[1] ((Offset 108-13F) Reserved)}
<byte 4912>
ulong value
{}
<byte 4916>
{rsvd3a[2] ((Offset 108-13F) Reserved)}
<byte 4916>
ulong value
{}
<byte 4920>
{rsvd3a[3] ((Offset 108-13F) Reserved)}
<byte 4920>
ulong value
{}
<byte 4924>
{rsvd3a[4] ((Offset 108-13F) Reserved)}
<byte 4924>
ulong value
{}
<byte 4928>
{rsvd3a[5] ((Offset 108-13F) Reserved)}
<byte 4928>
ulong value
{}
<byte 4932>
{rsvd3a[6] ((Offset 108-13F) Reserved)}
<byte 4932>
ulong value
{}
<byte 4936>
{rsvd3a[7] ((Offset 108-13F) Reserved)}
<byte 4936>
ulong value
{}
<byte 4940>
{rsvd3a[8] ((Offset 108-13F) Reserved)}
<byte 4940>
ulong value
{}
<byte 4944>
{rsvd3a[9] ((Offset 108-13F) Reserved)}
<byte 4944>
ulong value
{}
<byte 4948>
{rsvd3a[10] ((Offset 108-13F) Reserved)}
<byte 4948>
ulong value
{}
<byte 4952>
{rsvd3a[11] ((Offset 108-13F) Reserved)}
<byte 4952>
ulong value
{}
<byte 4956>
{rsvd3a[12] ((Offset 108-13F) Reserved)}
<byte 4956>
ulong value
{}
<byte 4960>
{rsvd3a[13] ((Offset 108-13F) Reserved)}
<byte 4960>
ulong value
{}
<byte 4964>
union sest_base (Offset 140) SEST Base (write only)
<byte 4964>
{field (By field)}
<byte 4964>
lbits:32 address SEST Base Address
{}
or sest_base (Offset 140) SEST Base (write only)
<byte 4964>
ulong value As longword
endunion sest_base (Offset 140) SEST Base (write only)
<byte 4968>
union sest_len (Offset 144) SEST Length (write only)
<byte 4968>
{field (By field)}
<byte 4968>
lbits:16 length SEST Length
lbits:16 reserved Reserved
{}
or sest_len (Offset 144) SEST Length (write only)
<byte 4968>
ulong value As longword
endunion sest_len (Offset 144) SEST Length (write only)
<byte 4972>
{rsvd4 ((Offset 148) Reserved)}
<byte 4972>
ulong value
{}
<byte 4976>
union scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 4976>
{field (By field)}
<byte 4976>
lbits:16 tail Tail
lbits:16 head Head
{}
or scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 4976>
ulong value As longword
endunion scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 4980>
union spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 4980>
{field (By field)}
<byte 4980>
lbits:1 sra SPI SRAM Access
lbits:10 rsvd Reserved
lbits:21 address RAM/ROM Address
{}
or spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 4980>
ulong value As longword
endunion spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 4984>
union spidata (Offset 154) SPI RAM/ROM Data
<byte 4984>
union field By field
<byte 4984>
{ram (By field)}
<byte 4984>
lbits:32 data RAM data
{}
or field By field
<byte 4984>
{rom (By field)}
<byte 4984>
lbits:8 data ROM data
lbits:24 rsvd Reserved
{}
endunion field By field
or spidata (Offset 154) SPI RAM/ROM Data
<byte 4984>
ulong value As longword
endunion spidata (Offset 154) SPI RAM/ROM Data
<byte 4988>
{rsvd5[0] ((Offset 158-15C) Reserved)}
<byte 4988>
ulong value
{}
<byte 4992>
{rsvd5[1] ((Offset 158-15C) Reserved)}
<byte 4992>
ulong value
{}
<byte 4996>
union int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 4996>
{field (By field)}
<byte 4996>
lbits:32 address Interrupt Message Address
{}
or int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 4996>
ulong value As longword
endunion int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 5000>
union int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 5000>
{field (By field)}
<byte 5000>
lbits:32 value Interrupt Message Value
{}
or int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 5000>
ulong value As longword
endunion int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 5004>
union sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 5004>
{field (By field)}
<byte 5004>
lbits:8 length SGL Page Length
lbits:24 reserved Reserved
{}
or sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 5004>
ulong value As longword
endunion sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 5008>
union my_id (Offset 16C) My ID
<byte 5008>
{field (By field)}
<byte 5008>
lbits:24 id My ID
lbits:8 reserved Reserved
{}
or my_id (Offset 16C) My ID
<byte 5008>
ulong value As longword
endunion my_id (Offset 16C) My ID
<byte 5012>
union gpio (Offset 170) General Purpose I/O
<byte 5012>
{field (By field)}
<byte 5012>
lbits:1 gc0 General Purpose Control 0
lbits:1 gc1 General Purpose Control 1
lbits:1 gc2 General Purpose Control 2
lbits:1 gc3 General Purpose Control 3
lbits:1 gc4 General Purpose Control 4
lbits:1 gc5 General Purpose Control 5
lbits:1 gc6 General Purpose Control 6
lbits:1 gc7 General Purpose Control 7
lbits:8 reserved Reserved
lbits:1 gp0 General Purpose I/O 0
lbits:1 gp1 General Purpose I/O 1
lbits:1 gp2 General Purpose I/O 2
lbits:1 gp3 General Purpose I/O 3
lbits:1 gp4 General Purpose Input 4
lbits:1 gp5 General Purpose I/O 5
lbits:1 gp6 General Purpose I/O 6
lbits:1 gp7 General Purpose I/O 7
lbits:8 reserved1 Reserved
{}
or gpio (Offset 170) General Purpose I/O
<byte 5012>
ulong value As longword
endunion gpio (Offset 170) General Purpose I/O
<byte 5016>
{rsvd6[0] ((Offset 174-17F) Reserved)}
<byte 5016>
ulong value
{}
<byte 5020>
{rsvd6[1] ((Offset 174-17F) Reserved)}
<byte 5020>
ulong value
{}
<byte 5024>
{rsvd6[2] ((Offset 174-17F) Reserved)}
<byte 5024>
ulong value
{}
<byte 5028>
union tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 5028>
{field (By field)}
<byte 5028>
lbits:9 pfs Programmable Frame Size
lbits:15 reserved Reserved
lbits:8 esi_range Exchange_ID Signaled Interrupt Range
{}
or tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 5028>
ulong value As longword
endunion tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 5032>
union tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 5032>
{field (By field)}
<byte 5032>
lbits:1 fad FCP Assist Disable
lbits:1 ino In Order
lbits:1 dof Discard OOO FCP Frames
lbits:1 fua FCP Unassisted ACK Enable
lbits:1 ime Interrupt Message Enable
lbits:1 fab Fabric
lbits:1 sic S_ID Copy Enable
lbits:1 eqs Equal Service
lbits:1 reserved Reserved
lbits:1 cae Concurrent Access Enable
lbits:14 reserved1 Reserved
lbits:1 fc2 FCP Class 2 Reassembly Enable
lbits:1 reserved2 Reserved
lbits:1 sdf Save Discarded Frames
lbits:1 rde Response Detect Enable
lbits:1 dam Default ACK Model
lbits:3 reserved3 Reserved
{}
or tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 5032>
ulong value As longword
endunion tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 5036>
union tach_control (Offset 188) Tachyon XL2 Control
<byte 5036>
{field (By field)}
<byte 5036>
lbits:1 gc0 General Purpose Control 0
lbits:1 gc1 General Purpose Control 1
lbits:1 gc2 General Purpose Control 2
lbits:1 gc3 General Purpose Control 3
lbits:1 gc4 General Purpose Control 4
lbits:3 reserved Reserved
lbits:1 feq Freeze ERQ
lbits:1 ffa Freeze FCP Assists
lbits:2 reserved1 Reserved
lbits:1 fis Freeze Inbound FCP Assists When Frame Placed in SFQ
lbits:1 fib Freeze Inbound FCP Assists
lbits:2 reserved2 Reserved
lbits:1 req Resume ERQ
lbits:1 rif Resume Inbound FCP Assists
lbits:1 rof Resume Outbound FCP Assists
lbits:12 reserved3 Reserved
lbits:1 crs Core Reset
{}
or tach_control (Offset 188) Tachyon XL2 Control
<byte 5036>
ulong value As longword
endunion tach_control (Offset 188) Tachyon XL2 Control
<byte 5040>
union tach_status (Offset 18C) Tachyon XL2 Status
<byte 5040>
{field (By field)}
<byte 5040>
lbits:1 gp0 General Purpose I/O 0
lbits:1 gp1 General Purpose I/O 1
lbits:1 gp2 General Purpose I/O 2
lbits:1 gp3 General Purpose I/O 3
lbits:1 gp4 General Purpose Input 4
lbits:5 revid Device Revision ID
lbits:1 ipe Inbound Parity Error
lbits:1 ope Outbound Parity Error
lbits:4 reserved Reserved
lbits:1 eqf ERQ Frozen
lbits:1 iff Inbound FCP Assists Frozen
lbits:1 off Outbound FCP Assists Frozen
lbits:6 reserved1 Reserved
lbits:1 m66 66 Mhz Enabled
lbits:1 ile Inbound Link Control FIFO Empty
lbits:1 ole Outbound Link Control List Empty
lbits:1 ife Inbound FIFO Empty
lbits:1 ofe Outbound FIFO Empty
lbits:1 imf IMQ Full
lbits:1 ssf SFQ Full
{}
or tach_status (Offset 18C) Tachyon XL2 Status
<byte 5040>
ulong value As longword
endunion tach_status (Offset 18C) Tachyon XL2 Status
<byte 5044>
{rsvd7 ((Offset 190) Reserved)}
<byte 5044>
ulong value
{}
<byte 5048>
union hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 5048>
{field (By field)}
<byte 5048>
lbits:12 length Frame Length
lbits:7 reserved Reserved
lbits:12 upper_addr Frame Upper Address
lbits:1 reserved1 Reserved
{}
or hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 5048>
ulong value As longword
endunion hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 5052>
union hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 5052>
{field (By field)}
<byte 5052>
lbits:12 length Frame Length
lbits:7 reserved Reserved
lbits:12 upper_addr Frame Upper Address
lbits:1 reserved1 Reserved
{}
or hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 5052>
ulong value As longword
endunion hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 5056>
union inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 5056>
{field (By field)}
<byte 5056>
lbits:24 reserved Reserved
lbits:8 sest_lru_count SEST LRU Count
{}
or inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 5056>
ulong value As longword
endunion inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 5060>
union inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 5060>
{field (By field)}
<byte 5060>
lbits:8 discd_frames Discarded Frame Count
lbits:24 reserved Reserved
{}
or inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 5060>
ulong value As longword
endunion inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 5064>
union ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 5064>
{field (By field)}
<byte 5064>
lbits:28 threshold EE_Credit Zero Timer Threshold
lbits:4 reserved Reserved
{}
or ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 5064>
ulong value As longword
endunion ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 5068>
union up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 5068>
{field (By field)}
<byte 5068>
lbits:13 reserved Reserved
lbits:19 upper_addr Upper Data Address
{}
or up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 5068>
ulong value As longword
endunion up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 5072>
union up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 5072>
{field (By field)}
<byte 5072>
lbits:32 upper_addr Upper Control Address
{}
or up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 5072>
ulong value As longword
endunion up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 5076>
union dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 5076>
{field (By field)}
<byte 5076>
lbits:1 ef AL_PA 0xEF DHD Login Information
lbits:1 e8 AL_PA 0xE8 DHD Login Information
lbits:1 e4 AL_PA 0xE4 DHD Login Information
lbits:1 e2 AL_PA 0xE2 DHD Login Information
lbits:1 e1 AL_PA 0xE1 DHD Login Information
lbits:1 e0 AL_PA 0xE0 DHD Login Information
lbits:1 dc AL_PA 0xDC DHD Login Information
lbits:1 da AL_PA 0xDA DHD Login Information
lbits:1 d9 AL_PA 0xD9 DHD Login Information
lbits:1 d6 AL_PA 0xD6 DHD Login Information
lbits:1 d5 AL_PA 0xD5 DHD Login Information
lbits:1 d4 AL_PA 0xD4 DHD Login Information
lbits:1 d3 AL_PA 0xD3 DHD Login Information
lbits:1 d2 AL_PA 0xD2 DHD Login Information
lbits:1 d1 AL_PA 0xD1 DHD Login Information
lbits:1 ce AL_PA 0xCE DHD Login Information
lbits:1 cd AL_PA 0xCD DHD Login Information
lbits:1 cc AL_PA 0xCC DHD Login Information
lbits:1 cb AL_PA 0xCB DHD Login Information
lbits:1 ca AL_PA 0xCA DHD Login Information
lbits:1 c9 AL_PA 0xC9 DHD Login Information
lbits:1 c7 AL_PA 0xC7 DHD Login Information
lbits:1 c6 AL_PA 0xC6 DHD Login Information
lbits:1 c5 AL_PA 0xC5 DHD Login Information
lbits:1 c3 AL_PA 0xC3 DHD Login Information
lbits:1 bc AL_PA 0xBC DHD Login Information
lbits:1 ba AL_PA 0xBA DHD Login Information
lbits:1 b9 AL_PA 0xB9 DHD Login Information
lbits:1 b6 AL_PA 0xB6 DHD Login Information
lbits:1 b5 AL_PA 0xB5 DHD Login Information
lbits:1 b4 AL_PA 0xB4 DHD Login Information
lbits:1 b3 AL_PA 0xB3 DHD Login Information
{}
or dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 5076>
ulong value As longword
endunion dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 5080>
union dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 5080>
{field (By field)}
<byte 5080>
lbits:1 alpab2 AL_PA 0xB2 DHD Login Information
lbits:1 alpab1 AL_PA 0xB1 DHD Login Information
lbits:1 alpaae AL_PA 0xAE DHD Login Information
lbits:1 alpaad AL_PA 0xAD DHD Login Information
lbits:1 alpaac AL_PA 0xAC DHD Login Information
lbits:1 alpaab AL_PA 0xAB DHD Login Information
lbits:1 alpaaa AL_PA 0xAA DHD Login Information
lbits:1 alpaa9 AL_PA 0xA9 DHD Login Information
lbits:1 alpaa7 AL_PA 0xA7 DHD Login Information
lbits:1 alpaa6 AL_PA 0xA6 DHD Login Information
lbits:1 alpaa5 AL_PA 0xA5 DHD Login Information
lbits:1 alpaa3 AL_PA 0xA3 DHD Login Information
lbits:1 alpa9f AL_PA 0x9F DHD Login Information
lbits:1 alpa9e AL_PA 0x9E DHD Login Information
lbits:1 alpa9d AL_PA 0x9D DHD Login Information
lbits:1 alpa9b AL_PA 0x9B DHD Login Information
lbits:1 alpa98 AL_PA 0x98 DHD Login Information
lbits:1 alpa97 AL_PA 0x97 DHD Login Information
lbits:1 alpa90 AL_PA 0x90 DHD Login Information
lbits:1 alpa8f AL_PA 0x8F DHD Login Information
lbits:1 alpa88 AL_PA 0x88 DHD Login Information
lbits:1 alpa84 AL_PA 0x84 DHD Login Information
lbits:1 alpa82 AL_PA 0x82 DHD Login Information
lbits:1 alpa81 AL_PA 0x81 DHD Login Information
lbits:1 alpa80 AL_PA 0x80 DHD Login Information
lbits:1 alpa7c AL_PA 0x7C DHD Login Information
lbits:1 alpa7a AL_PA 0x7A DHD Login Information
lbits:1 alpa79 AL_PA 0x79 DHD Login Information
lbits:1 alpa76 AL_PA 0x76 DHD Login Information
lbits:1 alpa75 AL_PA 0x75 DHD Login Information
lbits:1 alpa74 AL_PA 0x74 DHD Login Information
lbits:1 alpa73 AL_PA 0x73 DHD Login Information
{}
or dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 5080>
ulong value As longword
endunion dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 5084>
union dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 5084>
{field (By field)}
<byte 5084>
lbits:1 alpa72 AL_PA 0x72 DHD Login Information
lbits:1 alpa71 AL_PA 0x71 DHD Login Information
lbits:1 alpa6e AL_PA 0x6E DHD Login Information
lbits:1 alpa6d AL_PA 0x6D DHD Login Information
lbits:1 alpa6c AL_PA 0x6C DHD Login Information
lbits:1 alpa6b AL_PA 0x6B DHD Login Information
lbits:1 alpa6a AL_PA 0x6A DHD Login Information
lbits:1 alpa69 AL_PA 0x69 DHD Login Information
lbits:1 alpa67 AL_PA 0x67 DHD Login Information
lbits:1 alpa66 AL_PA 0x66 DHD Login Information
lbits:1 alpa65 AL_PA 0x65 DHD Login Information
lbits:1 alpa63 AL_PA 0x63 DHD Login Information
lbits:1 alpa5c AL_PA 0x5C DHD Login Information
lbits:1 alpa5a AL_PA 0x5A DHD Login Information
lbits:1 alpa59 AL_PA 0x59 DHD Login Information
lbits:1 alpa56 AL_PA 0x56 DHD Login Information
lbits:1 alpa55 AL_PA 0x55 DHD Login Information
lbits:1 alpa54 AL_PA 0x54 DHD Login Information
lbits:1 alpa53 AL_PA 0x53 DHD Login Information
lbits:1 alpa52 AL_PA 0x52 DHD Login Information
lbits:1 alpa51 AL_PA 0x51 DHD Login Information
lbits:1 alpa4e AL_PA 0x4E DHD Login Information
lbits:1 alpa4d AL_PA 0x4D DHD Login Information
lbits:1 alpa4c AL_PA 0x4C DHD Login Information
lbits:1 alpa4b AL_PA 0x4B DHD Login Information
lbits:1 alpa4a AL_PA 0x4A DHD Login Information
lbits:1 alpa49 AL_PA 0x49 DHD Login Information
lbits:1 alpa47 AL_PA 0x47 DHD Login Information
lbits:1 alpa46 AL_PA 0x46 DHD Login Information
lbits:1 alpa45 AL_PA 0x45 DHD Login Information
lbits:1 alpa43 AL_PA 0x43 DHD Login Information
lbits:1 alpa3c AL_PA 0x3C DHD Login Information
{}
or dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 5084>
ulong value As longword
endunion dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 5088>
union dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 5088>
{field (By field)}
<byte 5088>
lbits:1 alpa3a AL_PA 0x3A DHD Login Information
lbits:1 alpa39 AL_PA 0x39 DHD Login Information
lbits:1 alpa36 AL_PA 0x36 DHD Login Information
lbits:1 alpa35 AL_PA 0x35 DHD Login Information
lbits:1 alpa34 AL_PA 0x34 DHD Login Information
lbits:1 alpa33 AL_PA 0x33 DHD Login Information
lbits:1 alpa32 AL_PA 0x32 DHD Login Information
lbits:1 alpa31 AL_PA 0x31 DHD Login Information
lbits:1 alpa2e AL_PA 0x2E DHD Login Information
lbits:1 alpa2d AL_PA 0x2D DHD Login Information
lbits:1 alpa2c AL_PA 0x2C DHD Login Information
lbits:1 alpa2b AL_PA 0x2B DHD Login Information
lbits:1 alpa2a AL_PA 0x2A DHD Login Information
lbits:1 alpa29 AL_PA 0x29 DHD Login Information
lbits:1 alpa27 AL_PA 0x27 DHD Login Information
lbits:1 alpa26 AL_PA 0x26 DHD Login Information
lbits:1 alpa25 AL_PA 0x25 DHD Login Information
lbits:1 alpa23 AL_PA 0x23 DHD Login Information
lbits:1 alpa1f AL_PA 0x1F DHD Login Information
lbits:1 alpa1e AL_PA 0x1E DHD Login Information
lbits:1 alpa1d AL_PA 0x1D DHD Login Information
lbits:1 alpa1b AL_PA 0x1B DHD Login Information
lbits:1 alpa18 AL_PA 0x18 DHD Login Information
lbits:1 alpa17 AL_PA 0x17 DHD Login Information
lbits:1 alpa10 AL_PA 0x10 DHD Login Information
lbits:1 alpa0f AL_PA 0x0F DHD Login Information
lbits:1 alpa08 AL_PA 0x08 DHD Login Information
lbits:1 alpa04 AL_PA 0x04 DHD Login Information
lbits:1 alpa02 AL_PA 0x02 DHD Login Information
lbits:1 alpa01 AL_PA 0x01 DHD Login Information
lbits:1 alpa00 AL_PA 0x00 DHD Login Information
lbits:1 reserved Reserved
{}
or dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 5088>
ulong value As longword
endunion dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 5092>
union fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 5092>
{field (By field)}
<byte 5092>
lbits:1 bli Bypass Loop Initialization
lbits:1 reserved Reserved
lbits:1 enp Enable N_Port Mode
lbits:1 lr Login Required
lbits:1 inif Initialize as Fabric
lbits:1 rf Respond to Fabric Address
lbits:1 blm Bypass Loop Map
lbits:1 sa Acquire Soft Address
lbits:1 ha Acquire Hard Address
lbits:1 aq Acquire Previously Acquired Address
lbits:1 fa Acquire Fabric Aquired Address
lbits:1 td Timer Disable
lbits:1 sap Skip Arbitration Phase
lbits:1 elb External Loopback/Pad Loopback
lbits:1 ilb Internal loopback
lbits:1 npi Initialize as N_Port
lbits:8 bb_credit BB_Credit
lbits:8 al_pa Desired AL_PA
{}
or fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 5092>
ulong value As longword
endunion fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 5096>
union fm_control (Offset 1C4) Frame Manager Control
<byte 5096>
{field (By field)}
<byte 5096>
lbits:3 cmd State Machine Command
lbits:1 cl Close Loop Request
lbits:1 ipe Initiate Port Enable
lbits:1 sp Send Prim_Reg
lbits:1 sq Primitive Sequence
lbits:1 sas Start Auto-Speed Negotiation
lbits:24 reserved Reserved
{}
or fm_control (Offset 1C4) Frame Manager Control
<byte 5096>
ulong value As longword
endunion fm_control (Offset 1C4) Frame Manager Control
<byte 5100>
union fm_status (Offset 1C8) Frame Manager Status
<byte 5100>
{field (By field)}
<byte 5100>
lbits:4 psm Port State Machine
lbits:4 lsm Loop State Machine
lbits:1 ldn Link Down
lbits:1 lup Link Up
lbits:1 es Elastic Store Error
lbits:1 ce Credit Error
lbits:1 lf Link Failure
lbits:1 lg Login Required
lbits:1 ptx Primitive Transmitted
lbits:1 prx Primitive Received
lbits:1 ba Bad AL_PA
lbits:1 lpf LIPf
lbits:1 sto State Time-out
lbits:1 ols OLS/NOS Received
lbits:1 lpb Loop Port Bypass (LPB) Primitive Sequence Received
lbits:1 lpe Loop Port Enable (LPE) Primitive Sequence Received
lbits:1 drs Directed LIP Sequence Received
lbits:1 reserved Reserved
lbits:1 ls Loss of Signal
lbits:1 os Out of Synchronization
lbits:1 flt Link Fault
lbits:1 reserved1 Reserved
lbits:1 byp Node Bypassed
lbits:1 np Non-Participating
lbits:1 tp Transmit Parity Error
lbits:1 lp Loop
{}
or fm_status (Offset 1C8) Frame Manager Status
<byte 5100>
ulong value As longword
endunion fm_status (Offset 1C8) Frame Manager Status
<byte 5104>
union fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 5104>
{field (By field)}
<byte 5104>
lbits:16 ed_tov Error Detect Time-Out
lbits:9 rt_tov Receiver Transmitter Time-Out
lbits:7 reserved Reserved
{}
or fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 5104>
ulong value As longword
endunion fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 5108>
union fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 5108>
{field (By field)}
<byte 5108>
lbits:8 link_fail Link Fail Count
lbits:8 loss_of_sync Loss of Synchronization Count
lbits:8 bad_rx_char Bad Received Character Count
lbits:8 loss_of_signal Loss of Signal Count
{}
or fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 5108>
ulong value As longword
endunion fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 5112>
union fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 5112>
{field (By field)}
<byte 5112>
lbits:8 proto_er Protocol Error Count
lbits:8 bad_crc Bad CRC Count
lbits:8 dis_frm Discarded Frames
lbits:8 rx_eofa Received EOFa
{}
or fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 5112>
ulong value As longword
endunion fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 5116>
union fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 5116>
{field (By field)}
<byte 5116>
lbits:9 al_time Arbitrated Loop Time-Out
lbits:7 reserved Reserved
lbits:16 lp_tov Loop Time-Out
{}
or fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 5116>
ulong value As longword
endunion fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 5120>
union fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 5120>
{field (By field)}
<byte 5120>
lbits:24 bb0_timer BB_Credit Timer
lbits:8 reserved Reserved
{}
or fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 5120>
ulong value As longword
endunion fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 5124>
union fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 5124>
{field (By field)}
<byte 5124>
lbits:32 wwn World Wide Name
{}
or fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 5124>
ulong value As longword
endunion fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 5128>
union fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 5128>
{field (By field)}
<byte 5128>
lbits:32 wwn World Wide Name
{}
or fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 5128>
ulong value As longword
endunion fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 5132>
union fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 5132>
{field (By field)}
<byte 5132>
lbits:8 lipf_alpa AL_PA of Most Recent LIPf Received
lbits:8 bad_alpa AL_PA of Most Recent OPN Sent and Returned Without Being Accepted
lbits:8 acq_alpa AL_PA Acquired During Loop Initialization
lbits:8 reserved Reserved
{}
or fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 5132>
ulong value As longword
endunion fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 5136>
union fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 5136>
{field (By field)}
<byte 5136>
lbits:24 prim_value Primitive to be Sent
lbits:8 reserved Reserved
{}
or fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 5136>
ulong value As longword
endunion fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 5140>
union fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 5140>
{field (By field)}
<byte 5140>
lbits:8 exp_frm Expired Frames
lbits:24 reserved Reserved
{}
or fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 5140>
ulong value As longword
endunion fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 5144>
union fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 5144>
{field (By field)}
<byte 5144>
lbits:1 dac Disable Auto Close
lbits:2 nbc Non-zero Login BB_Credit
lbits:1 eei Enable ERR_INIT
lbits:1 icb Ignore Close Bit
lbits:2 atv Arbitration Threshold Value
lbits:1 gde Garbage Deletion Enable
lbits:8 laa Lowest Allowable AL_PA
lbits:8 reserved Reserved
lbits:1 reserved1 Reserved
lbits:1 prm Promiscuous Mode
lbits:1 wpe Wait For Port Enable
lbits:1 fmh Force Monitor State With Hard Address
lbits:1 fmn Force Monitor Non-participating State
lbits:1 dlm Disable Loop Master
lbits:1 dsa Disable Soft Address Selection
lbits:1 ilp Ignore LPB/LPE Primitive Sequences
{}
or fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 5144>
ulong value As longword
endunion fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 5148>
union pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 5148>
{field (By field)}
<byte 5148>
union brstctr PCI Master Burst Count Control
<byte 5148>
{field (By field)}
<byte 5148>
tbits:4 read_burst PCI read burst count
tbits:4 write_burst PCI write burst count
{}
or brstctr PCI Master Burst Count Control
<byte 5148>
utiny value As byte
endunion brstctr PCI Master Burst Count Control
<byte 5149>
union waitctr PCI Master Wait Count Control
<byte 5149>
{field (By field)}
<byte 5149>
tbits:4 read_wait DMA read wait count
tbits:4 write_wait DMA write wait count
{}
or waitctr PCI Master Wait Count Control
<byte 5149>
utiny value As byte
endunion waitctr PCI Master Wait Count Control
<byte 5150>
union romctr PCI ROM Control
<byte 5150>
{field (By field)}
<byte 5150>
tbits:1 vpp_en ROM VPP Enable
tbits:1 fla Flash Installed (read only)
tbits:1 rom ROM Installed (read only)
tbits:1 rm0 RAM 0 (read only); combination of RAM 2, RAM 1, and RAM 0 describe static RAM configuration: 000 - none, 001 - 128KB, 010 - 256KB, 011 - 512KB, 100 - 1MB, 101 - 2MB, 110 - reserved, 111 - reserved
tbits:1 rm1 RAM 1 (read only)
tbits:1 svl Subsystem VID Loaded (read only)
tbits:1 par External memory parity checking enabled (read only)
tbits:1 rm2 RAM 2 (read only)
{}
or romctr PCI ROM Control
<byte 5150>
utiny value As byte
endunion romctr PCI ROM Control
<byte 5151>
union mctr PCI Master Control
<byte 5151>
{field (By field)}
<byte 5151>
tbits:1 ecl Enable MRM and MRL Completion to Cache Line
tbits:1 rrd PCI Memory Read Round Down Enable
tbits:1 p64 PCI Present and Active
tbits:1 rae Memory Read Alignment Enable
tbits:1 wae Memory Write Alignment Enable
tbits:1 rbe PCI Read Burst Counter Enable
tbits:1 wbe PCI Write Burst Counter Enable
tbits:1 dlt Disable Latency Timer
{}
or mctr PCI Master Control
<byte 5151>
utiny value As byte
endunion mctr PCI Master Control
{}
or pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 5148>
ulong value As longword
endunion pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 5152>
union pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
<byte 5152>
{field (By field)}
<byte 5152>
union softrst PCI Interface Reset Control
<byte 5152>
{field (By field)}
<byte 5152>
tbits:1 rst PCI Interface Soft Reset
tbits:1 dpe Reserved (must be zero)
tbits:1 rdd RAM/ROM Read Delayed Transaction Disabled
tbits:1 tad Target Abort Disable
tbits:4 rsvd Reserved (must be zero)
{}
or softrst PCI Interface Reset Control
<byte 5152>
utiny value As byte
endunion softrst PCI Interface Reset Control
<byte 5153>
union intpend PCI Interrupt Pending
<byte 5153>
{field (By field)}
<byte 5153>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or intpend PCI Interrupt Pending
<byte 5153>
utiny value As byte
endunion intpend PCI Interrupt Pending
<byte 5154>
union inten PCI Interrupt Enable
<byte 5154>
{field (By field)}
<byte 5154>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or inten PCI Interrupt Enable
<byte 5154>
utiny value As byte
endunion inten PCI Interrupt Enable
<byte 5155>
union intstat PCI Interrupt Status
<byte 5155>
{field (By field)}
<byte 5155>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or intstat PCI Interrupt Status
<byte 5155>
utiny value As byte
endunion intstat PCI Interrupt Status
{}
or pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
<byte 5152>
ulong value As longword
endunion pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
{}
endunion csr[1] Tachyon XL2 CSR Registers
<byte 5156>
union csr[2] Tachyon XL2 CSR Registers
<byte 5156>
ulong[128] csra Tachyon XL2 CSR Registers As Longwords
or csr[2] Tachyon XL2 CSR Registers
<byte 5156>
{csr (Tachyon XL2 CSR Registers By Field)}
<byte 5156>
union erq_base (Offset 000) ERQ Base (write only)
<byte 5156>
{field (By field)}
<byte 5156>
lbits:32 address ERQ Base Address
{}
or erq_base (Offset 000) ERQ Base (write only)
<byte 5156>
ulong value As longword
endunion erq_base (Offset 000) ERQ Base (write only)
<byte 5160>
union erq_len (Offset 004) ERQ Length (write only)
<byte 5160>
{field (By field)}
<byte 5160>
lbits:12 length ERQ Length
lbits:20 reserved Reserved
{}
or erq_len (Offset 004) ERQ Length (write only)
<byte 5160>
ulong value As longword
endunion erq_len (Offset 004) ERQ Length (write only)
<byte 5164>
union erq_prod (Offset 008) ERQ Producer Index
<byte 5164>
{field (By field)}
<byte 5164>
lbits:12 index ERQ Producer Index
lbits:20 reserved Reserved
{}
or erq_prod (Offset 008) ERQ Producer Index
<byte 5164>
ulong value As longword
endunion erq_prod (Offset 008) ERQ Producer Index
<byte 5168>
union erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 5168>
{field (By field)}
<byte 5168>
lbits:32 address ERQ Consumer Index Address
{}
or erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 5168>
ulong value As longword
endunion erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 5172>
union erq_cons (Offset 010) ERQ Consumer Index
<byte 5172>
{field (By field)}
<byte 5172>
lbits:12 index ERQ Consumer Index
lbits:20 reserved Reserved
{}
or erq_cons (Offset 010) ERQ Consumer Index
<byte 5172>
ulong value As longword
endunion erq_cons (Offset 010) ERQ Consumer Index
<byte 5176>
{rsvd1[0] ((Offset 014-04F) Reserved)}
<byte 5176>
ulong value
{}
<byte 5180>
{rsvd1[1] ((Offset 014-04F) Reserved)}
<byte 5180>
ulong value
{}
<byte 5184>
{rsvd1[2] ((Offset 014-04F) Reserved)}
<byte 5184>
ulong value
{}
<byte 5188>
{rsvd1[3] ((Offset 014-04F) Reserved)}
<byte 5188>
ulong value
{}
<byte 5192>
{rsvd1[4] ((Offset 014-04F) Reserved)}
<byte 5192>
ulong value
{}
<byte 5196>
{rsvd1[5] ((Offset 014-04F) Reserved)}
<byte 5196>
ulong value
{}
<byte 5200>
{rsvd1[6] ((Offset 014-04F) Reserved)}
<byte 5200>
ulong value
{}
<byte 5204>
{rsvd1[7] ((Offset 014-04F) Reserved)}
<byte 5204>
ulong value
{}
<byte 5208>
{rsvd1[8] ((Offset 014-04F) Reserved)}
<byte 5208>
ulong value
{}
<byte 5212>
{rsvd1[9] ((Offset 014-04F) Reserved)}
<byte 5212>
ulong value
{}
<byte 5216>
{rsvd1[10] ((Offset 014-04F) Reserved)}
<byte 5216>
ulong value
{}
<byte 5220>
{rsvd1[11] ((Offset 014-04F) Reserved)}
<byte 5220>
ulong value
{}
<byte 5224>
{rsvd1[12] ((Offset 014-04F) Reserved)}
<byte 5224>
ulong value
{}
<byte 5228>
{rsvd1[13] ((Offset 014-04F) Reserved)}
<byte 5228>
ulong value
{}
<byte 5232>
{rsvd1[14] ((Offset 014-04F) Reserved)}
<byte 5232>
ulong value
{}
<byte 5236>
union sfq_base (Offset 050) SFQ Base (write only)
<byte 5236>
{field (By field)}
<byte 5236>
lbits:32 address SFQ Base Address
{}
or sfq_base (Offset 050) SFQ Base (write only)
<byte 5236>
ulong value As longword
endunion sfq_base (Offset 050) SFQ Base (write only)
<byte 5240>
union sfq_len (Offset 054) SFQ Length (write only)
<byte 5240>
{field (By field)}
<byte 5240>
lbits:12 length SFQ Length
lbits:20 reserved Reserved
{}
or sfq_len (Offset 054) SFQ Length (write only)
<byte 5240>
ulong value As longword
endunion sfq_len (Offset 054) SFQ Length (write only)
<byte 5244>
union sfq_cons (Offset 058) SFQ Consumer Index
<byte 5244>
{field (By field)}
<byte 5244>
lbits:12 index SFQ Consumer Index
lbits:20 reserved Reserved
{}
or sfq_cons (Offset 058) SFQ Consumer Index
<byte 5244>
ulong value As longword
endunion sfq_cons (Offset 058) SFQ Consumer Index
<byte 5248>
{rsvd2[0] ((Offset 05C-07B) Reserved)}
<byte 5248>
ulong value
{}
<byte 5252>
{rsvd2[1] ((Offset 05C-07B) Reserved)}
<byte 5252>
ulong value
{}
<byte 5256>
{rsvd2[2] ((Offset 05C-07B) Reserved)}
<byte 5256>
ulong value
{}
<byte 5260>
{rsvd2[3] ((Offset 05C-07B) Reserved)}
<byte 5260>
ulong value
{}
<byte 5264>
{rsvd2[4] ((Offset 05C-07B) Reserved)}
<byte 5264>
ulong value
{}
<byte 5268>
{rsvd2[5] ((Offset 05C-07B) Reserved)}
<byte 5268>
ulong value
{}
<byte 5272>
{rsvd2[6] ((Offset 05C-07B) Reserved)}
<byte 5272>
ulong value
{}
<byte 5276>
{rsvd2[7] ((Offset 05C-07B) Reserved)}
<byte 5276>
ulong value
{}
<byte 5280>
union int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 5280>
{field (By field)}
<byte 5280>
lbits:4 timer Interrupt Timer Value
lbits:3 reserved Reserved
lbits:1 ihf Interrupt when IMQ Half Full
lbits:24 reserved1 Reserved
{}
or int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 5280>
ulong value As longword
endunion int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 5284>
union imq_base (Offset 080) IMQ Base (write only)
<byte 5284>
{field (By field)}
<byte 5284>
lbits:32 address IMQ Base Address
{}
or imq_base (Offset 080) IMQ Base (write only)
<byte 5284>
ulong value As longword
endunion imq_base (Offset 080) IMQ Base (write only)
<byte 5288>
union imq_len (Offset 084) IMQ Length (write only)
<byte 5288>
{field (By field)}
<byte 5288>
lbits:12 length IMQ Length
lbits:20 reserved Reserved
{}
or imq_len (Offset 084) IMQ Length (write only)
<byte 5288>
ulong value As longword
endunion imq_len (Offset 084) IMQ Length (write only)
<byte 5292>
union imq_cons (Offset 088) IMQ Consumer Index
<byte 5292>
{field (By field)}
<byte 5292>
lbits:12 index IMQ Consumer Index
lbits:20 reserved Reserved
{}
or imq_cons (Offset 088) IMQ Consumer Index
<byte 5292>
ulong value As longword
endunion imq_cons (Offset 088) IMQ Consumer Index
<byte 5296>
union imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 5296>
{field (By field)}
<byte 5296>
lbits:32 address IMQ Producer Index Address
{}
or imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 5296>
ulong value As longword
endunion imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 5300>
{rsvd3[0] ((Offset 090-0FC) Reserved)}
<byte 5300>
ulong value
{}
<byte 5304>
{rsvd3[1] ((Offset 090-0FC) Reserved)}
<byte 5304>
ulong value
{}
<byte 5308>
{rsvd3[2] ((Offset 090-0FC) Reserved)}
<byte 5308>
ulong value
{}
<byte 5312>
{rsvd3[3] ((Offset 090-0FC) Reserved)}
<byte 5312>
ulong value
{}
<byte 5316>
{rsvd3[4] ((Offset 090-0FC) Reserved)}
<byte 5316>
ulong value
{}
<byte 5320>
{rsvd3[5] ((Offset 090-0FC) Reserved)}
<byte 5320>
ulong value
{}
<byte 5324>
{rsvd3[6] ((Offset 090-0FC) Reserved)}
<byte 5324>
ulong value
{}
<byte 5328>
{rsvd3[7] ((Offset 090-0FC) Reserved)}
<byte 5328>
ulong value
{}
<byte 5332>
{rsvd3[8] ((Offset 090-0FC) Reserved)}
<byte 5332>
ulong value
{}
<byte 5336>
{rsvd3[9] ((Offset 090-0FC) Reserved)}
<byte 5336>
ulong value
{}
<byte 5340>
{rsvd3[10] ((Offset 090-0FC) Reserved)}
<byte 5340>
ulong value
{}
<byte 5344>
{rsvd3[11] ((Offset 090-0FC) Reserved)}
<byte 5344>
ulong value
{}
<byte 5348>
{rsvd3[12] ((Offset 090-0FC) Reserved)}
<byte 5348>
ulong value
{}
<byte 5352>
{rsvd3[13] ((Offset 090-0FC) Reserved)}
<byte 5352>
ulong value
{}
<byte 5356>
{rsvd3[14] ((Offset 090-0FC) Reserved)}
<byte 5356>
ulong value
{}
<byte 5360>
{rsvd3[15] ((Offset 090-0FC) Reserved)}
<byte 5360>
ulong value
{}
<byte 5364>
{rsvd3[16] ((Offset 090-0FC) Reserved)}
<byte 5364>
ulong value
{}
<byte 5368>
{rsvd3[17] ((Offset 090-0FC) Reserved)}
<byte 5368>
ulong value
{}
<byte 5372>
{rsvd3[18] ((Offset 090-0FC) Reserved)}
<byte 5372>
ulong value
{}
<byte 5376>
{rsvd3[19] ((Offset 090-0FC) Reserved)}
<byte 5376>
ulong value
{}
<byte 5380>
{rsvd3[20] ((Offset 090-0FC) Reserved)}
<byte 5380>
ulong value
{}
<byte 5384>
{rsvd3[21] ((Offset 090-0FC) Reserved)}
<byte 5384>
ulong value
{}
<byte 5388>
{rsvd3[22] ((Offset 090-0FC) Reserved)}
<byte 5388>
ulong value
{}
<byte 5392>
{rsvd3[23] ((Offset 090-0FC) Reserved)}
<byte 5392>
ulong value
{}
<byte 5396>
{rsvd3[24] ((Offset 090-0FC) Reserved)}
<byte 5396>
ulong value
{}
<byte 5400>
{rsvd3[25] ((Offset 090-0FC) Reserved)}
<byte 5400>
ulong value
{}
<byte 5404>
{rsvd3[26] ((Offset 090-0FC) Reserved)}
<byte 5404>
ulong value
{}
<byte 5408>
{rsvd3[27] ((Offset 090-0FC) Reserved)}
<byte 5408>
ulong value
{}
<byte 5412>
union fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 5412>
{field (By field)}
<byte 5412>
lbits:1 x50 50 Ohms Termination Enable
lbits:2 xtr Termination Receive
lbits:2 xtt Termination Transmit
lbits:3 xta Transmitter Amplitude
lbits:1 xwb Wrapback
lbits:1 reserved Reserved
lbits:1 txo Transmitter Off
lbits:1 reserved1 Reserved
lbits:1 xlp Loopback
lbits:2 xem Output Emphasis
lbits:1 reserved2 Reserved
lbits:2 xrz Receiver Zero Adjust
lbits:2 xrp Receiver Pole Adjust
lbits:2 xtz Transmitter Zero Adjust
lbits:2 xtp Transmitter Pole Adjust
lbits:2 rxs Receiver Speed
lbits:2 txs Transmitter Speed
lbits:1 ean Enable Auto Speed Negotiation
lbits:1 xlr Force iTR to lock reference clock
lbits:1 asp Auto Speed Negotiation in Progress
lbits:1 xcv Type of Transceiver
{}
or fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 5412>
ulong value As longword
endunion fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 5416>
union fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 5416>
{field (By field)}
<byte 5416>
lbits:4 psm Port State Machine
lbits:4 lsm Loop State Machine
lbits:1 ldn Link Down
lbits:1 lup Link Up
lbits:1 es Elastic Store Error
lbits:1 ce Credit Error
lbits:1 lf Link Failure
lbits:1 lg Login Required
lbits:1 ptx Primitive Transmitted
lbits:1 prx Primitive Received
lbits:1 ba Bad AL_PA
lbits:1 lpf LIPf
lbits:1 sto State Time-out
lbits:1 ols OLS/NOS Received
lbits:1 lpb Loop Port Bypass (LPB) Primitive Sequence Received
lbits:1 lpe Loop Port Enable (LPE) Primitive Sequence Received
lbits:1 drs Directed LIP Sequence Received
lbits:1 reserved Reserved
lbits:1 ls Loss of Signal
lbits:1 os Out of Synchronization
lbits:1 flt Link Fault
lbits:1 reserved1 Reserved
lbits:1 byp Node Bypassed
lbits:1 np Non-Participating
lbits:1 tp Transmit Parity Error
lbits:1 lp Loop
{}
or fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 5416>
ulong value As longword
endunion fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 5420>
{rsvd3a[0] ((Offset 108-13F) Reserved)}
<byte 5420>
ulong value
{}
<byte 5424>
{rsvd3a[1] ((Offset 108-13F) Reserved)}
<byte 5424>
ulong value
{}
<byte 5428>
{rsvd3a[2] ((Offset 108-13F) Reserved)}
<byte 5428>
ulong value
{}
<byte 5432>
{rsvd3a[3] ((Offset 108-13F) Reserved)}
<byte 5432>
ulong value
{}
<byte 5436>
{rsvd3a[4] ((Offset 108-13F) Reserved)}
<byte 5436>
ulong value
{}
<byte 5440>
{rsvd3a[5] ((Offset 108-13F) Reserved)}
<byte 5440>
ulong value
{}
<byte 5444>
{rsvd3a[6] ((Offset 108-13F) Reserved)}
<byte 5444>
ulong value
{}
<byte 5448>
{rsvd3a[7] ((Offset 108-13F) Reserved)}
<byte 5448>
ulong value
{}
<byte 5452>
{rsvd3a[8] ((Offset 108-13F) Reserved)}
<byte 5452>
ulong value
{}
<byte 5456>
{rsvd3a[9] ((Offset 108-13F) Reserved)}
<byte 5456>
ulong value
{}
<byte 5460>
{rsvd3a[10] ((Offset 108-13F) Reserved)}
<byte 5460>
ulong value
{}
<byte 5464>
{rsvd3a[11] ((Offset 108-13F) Reserved)}
<byte 5464>
ulong value
{}
<byte 5468>
{rsvd3a[12] ((Offset 108-13F) Reserved)}
<byte 5468>
ulong value
{}
<byte 5472>
{rsvd3a[13] ((Offset 108-13F) Reserved)}
<byte 5472>
ulong value
{}
<byte 5476>
union sest_base (Offset 140) SEST Base (write only)
<byte 5476>
{field (By field)}
<byte 5476>
lbits:32 address SEST Base Address
{}
or sest_base (Offset 140) SEST Base (write only)
<byte 5476>
ulong value As longword
endunion sest_base (Offset 140) SEST Base (write only)
<byte 5480>
union sest_len (Offset 144) SEST Length (write only)
<byte 5480>
{field (By field)}
<byte 5480>
lbits:16 length SEST Length
lbits:16 reserved Reserved
{}
or sest_len (Offset 144) SEST Length (write only)
<byte 5480>
ulong value As longword
endunion sest_len (Offset 144) SEST Length (write only)
<byte 5484>
{rsvd4 ((Offset 148) Reserved)}
<byte 5484>
ulong value
{}
<byte 5488>
union scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 5488>
{field (By field)}
<byte 5488>
lbits:16 tail Tail
lbits:16 head Head
{}
or scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 5488>
ulong value As longword
endunion scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 5492>
union spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 5492>
{field (By field)}
<byte 5492>
lbits:1 sra SPI SRAM Access
lbits:10 rsvd Reserved
lbits:21 address RAM/ROM Address
{}
or spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 5492>
ulong value As longword
endunion spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 5496>
union spidata (Offset 154) SPI RAM/ROM Data
<byte 5496>
union field By field
<byte 5496>
{ram (By field)}
<byte 5496>
lbits:32 data RAM data
{}
or field By field
<byte 5496>
{rom (By field)}
<byte 5496>
lbits:8 data ROM data
lbits:24 rsvd Reserved
{}
endunion field By field
or spidata (Offset 154) SPI RAM/ROM Data
<byte 5496>
ulong value As longword
endunion spidata (Offset 154) SPI RAM/ROM Data
<byte 5500>
{rsvd5[0] ((Offset 158-15C) Reserved)}
<byte 5500>
ulong value
{}
<byte 5504>
{rsvd5[1] ((Offset 158-15C) Reserved)}
<byte 5504>
ulong value
{}
<byte 5508>
union int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 5508>
{field (By field)}
<byte 5508>
lbits:32 address Interrupt Message Address
{}
or int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 5508>
ulong value As longword
endunion int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 5512>
union int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 5512>
{field (By field)}
<byte 5512>
lbits:32 value Interrupt Message Value
{}
or int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 5512>
ulong value As longword
endunion int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 5516>
union sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 5516>
{field (By field)}
<byte 5516>
lbits:8 length SGL Page Length
lbits:24 reserved Reserved
{}
or sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 5516>
ulong value As longword
endunion sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 5520>
union my_id (Offset 16C) My ID
<byte 5520>
{field (By field)}
<byte 5520>
lbits:24 id My ID
lbits:8 reserved Reserved
{}
or my_id (Offset 16C) My ID
<byte 5520>
ulong value As longword
endunion my_id (Offset 16C) My ID
<byte 5524>
union gpio (Offset 170) General Purpose I/O
<byte 5524>
{field (By field)}
<byte 5524>
lbits:1 gc0 General Purpose Control 0
lbits:1 gc1 General Purpose Control 1
lbits:1 gc2 General Purpose Control 2
lbits:1 gc3 General Purpose Control 3
lbits:1 gc4 General Purpose Control 4
lbits:1 gc5 General Purpose Control 5
lbits:1 gc6 General Purpose Control 6
lbits:1 gc7 General Purpose Control 7
lbits:8 reserved Reserved
lbits:1 gp0 General Purpose I/O 0
lbits:1 gp1 General Purpose I/O 1
lbits:1 gp2 General Purpose I/O 2
lbits:1 gp3 General Purpose I/O 3
lbits:1 gp4 General Purpose Input 4
lbits:1 gp5 General Purpose I/O 5
lbits:1 gp6 General Purpose I/O 6
lbits:1 gp7 General Purpose I/O 7
lbits:8 reserved1 Reserved
{}
or gpio (Offset 170) General Purpose I/O
<byte 5524>
ulong value As longword
endunion gpio (Offset 170) General Purpose I/O
<byte 5528>
{rsvd6[0] ((Offset 174-17F) Reserved)}
<byte 5528>
ulong value
{}
<byte 5532>
{rsvd6[1] ((Offset 174-17F) Reserved)}
<byte 5532>
ulong value
{}
<byte 5536>
{rsvd6[2] ((Offset 174-17F) Reserved)}
<byte 5536>
ulong value
{}
<byte 5540>
union tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 5540>
{field (By field)}
<byte 5540>
lbits:9 pfs Programmable Frame Size
lbits:15 reserved Reserved
lbits:8 esi_range Exchange_ID Signaled Interrupt Range
{}
or tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 5540>
ulong value As longword
endunion tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 5544>
union tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 5544>
{field (By field)}
<byte 5544>
lbits:1 fad FCP Assist Disable
lbits:1 ino In Order
lbits:1 dof Discard OOO FCP Frames
lbits:1 fua FCP Unassisted ACK Enable
lbits:1 ime Interrupt Message Enable
lbits:1 fab Fabric
lbits:1 sic S_ID Copy Enable
lbits:1 eqs Equal Service
lbits:1 reserved Reserved
lbits:1 cae Concurrent Access Enable
lbits:14 reserved1 Reserved
lbits:1 fc2 FCP Class 2 Reassembly Enable
lbits:1 reserved2 Reserved
lbits:1 sdf Save Discarded Frames
lbits:1 rde Response Detect Enable
lbits:1 dam Default ACK Model
lbits:3 reserved3 Reserved
{}
or tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 5544>
ulong value As longword
endunion tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 5548>
union tach_control (Offset 188) Tachyon XL2 Control
<byte 5548>
{field (By field)}
<byte 5548>
lbits:1 gc0 General Purpose Control 0
lbits:1 gc1 General Purpose Control 1
lbits:1 gc2 General Purpose Control 2
lbits:1 gc3 General Purpose Control 3
lbits:1 gc4 General Purpose Control 4
lbits:3 reserved Reserved
lbits:1 feq Freeze ERQ
lbits:1 ffa Freeze FCP Assists
lbits:2 reserved1 Reserved
lbits:1 fis Freeze Inbound FCP Assists When Frame Placed in SFQ
lbits:1 fib Freeze Inbound FCP Assists
lbits:2 reserved2 Reserved
lbits:1 req Resume ERQ
lbits:1 rif Resume Inbound FCP Assists
lbits:1 rof Resume Outbound FCP Assists
lbits:12 reserved3 Reserved
lbits:1 crs Core Reset
{}
or tach_control (Offset 188) Tachyon XL2 Control
<byte 5548>
ulong value As longword
endunion tach_control (Offset 188) Tachyon XL2 Control
<byte 5552>
union tach_status (Offset 18C) Tachyon XL2 Status
<byte 5552>
{field (By field)}
<byte 5552>
lbits:1 gp0 General Purpose I/O 0
lbits:1 gp1 General Purpose I/O 1
lbits:1 gp2 General Purpose I/O 2
lbits:1 gp3 General Purpose I/O 3
lbits:1 gp4 General Purpose Input 4
lbits:5 revid Device Revision ID
lbits:1 ipe Inbound Parity Error
lbits:1 ope Outbound Parity Error
lbits:4 reserved Reserved
lbits:1 eqf ERQ Frozen
lbits:1 iff Inbound FCP Assists Frozen
lbits:1 off Outbound FCP Assists Frozen
lbits:6 reserved1 Reserved
lbits:1 m66 66 Mhz Enabled
lbits:1 ile Inbound Link Control FIFO Empty
lbits:1 ole Outbound Link Control List Empty
lbits:1 ife Inbound FIFO Empty
lbits:1 ofe Outbound FIFO Empty
lbits:1 imf IMQ Full
lbits:1 ssf SFQ Full
{}
or tach_status (Offset 18C) Tachyon XL2 Status
<byte 5552>
ulong value As longword
endunion tach_status (Offset 18C) Tachyon XL2 Status
<byte 5556>
{rsvd7 ((Offset 190) Reserved)}
<byte 5556>
ulong value
{}
<byte 5560>
union hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 5560>
{field (By field)}
<byte 5560>
lbits:12 length Frame Length
lbits:7 reserved Reserved
lbits:12 upper_addr Frame Upper Address
lbits:1 reserved1 Reserved
{}
or hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 5560>
ulong value As longword
endunion hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 5564>
union hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 5564>
{field (By field)}
<byte 5564>
lbits:12 length Frame Length
lbits:7 reserved Reserved
lbits:12 upper_addr Frame Upper Address
lbits:1 reserved1 Reserved
{}
or hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 5564>
ulong value As longword
endunion hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 5568>
union inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 5568>
{field (By field)}
<byte 5568>
lbits:24 reserved Reserved
lbits:8 sest_lru_count SEST LRU Count
{}
or inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 5568>
ulong value As longword
endunion inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 5572>
union inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 5572>
{field (By field)}
<byte 5572>
lbits:8 discd_frames Discarded Frame Count
lbits:24 reserved Reserved
{}
or inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 5572>
ulong value As longword
endunion inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 5576>
union ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 5576>
{field (By field)}
<byte 5576>
lbits:28 threshold EE_Credit Zero Timer Threshold
lbits:4 reserved Reserved
{}
or ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 5576>
ulong value As longword
endunion ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 5580>
union up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 5580>
{field (By field)}
<byte 5580>
lbits:13 reserved Reserved
lbits:19 upper_addr Upper Data Address
{}
or up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 5580>
ulong value As longword
endunion up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 5584>
union up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 5584>
{field (By field)}
<byte 5584>
lbits:32 upper_addr Upper Control Address
{}
or up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 5584>
ulong value As longword
endunion up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 5588>
union dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 5588>
{field (By field)}
<byte 5588>
lbits:1 ef AL_PA 0xEF DHD Login Information
lbits:1 e8 AL_PA 0xE8 DHD Login Information
lbits:1 e4 AL_PA 0xE4 DHD Login Information
lbits:1 e2 AL_PA 0xE2 DHD Login Information
lbits:1 e1 AL_PA 0xE1 DHD Login Information
lbits:1 e0 AL_PA 0xE0 DHD Login Information
lbits:1 dc AL_PA 0xDC DHD Login Information
lbits:1 da AL_PA 0xDA DHD Login Information
lbits:1 d9 AL_PA 0xD9 DHD Login Information
lbits:1 d6 AL_PA 0xD6 DHD Login Information
lbits:1 d5 AL_PA 0xD5 DHD Login Information
lbits:1 d4 AL_PA 0xD4 DHD Login Information
lbits:1 d3 AL_PA 0xD3 DHD Login Information
lbits:1 d2 AL_PA 0xD2 DHD Login Information
lbits:1 d1 AL_PA 0xD1 DHD Login Information
lbits:1 ce AL_PA 0xCE DHD Login Information
lbits:1 cd AL_PA 0xCD DHD Login Information
lbits:1 cc AL_PA 0xCC DHD Login Information
lbits:1 cb AL_PA 0xCB DHD Login Information
lbits:1 ca AL_PA 0xCA DHD Login Information
lbits:1 c9 AL_PA 0xC9 DHD Login Information
lbits:1 c7 AL_PA 0xC7 DHD Login Information
lbits:1 c6 AL_PA 0xC6 DHD Login Information
lbits:1 c5 AL_PA 0xC5 DHD Login Information
lbits:1 c3 AL_PA 0xC3 DHD Login Information
lbits:1 bc AL_PA 0xBC DHD Login Information
lbits:1 ba AL_PA 0xBA DHD Login Information
lbits:1 b9 AL_PA 0xB9 DHD Login Information
lbits:1 b6 AL_PA 0xB6 DHD Login Information
lbits:1 b5 AL_PA 0xB5 DHD Login Information
lbits:1 b4 AL_PA 0xB4 DHD Login Information
lbits:1 b3 AL_PA 0xB3 DHD Login Information
{}
or dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 5588>
ulong value As longword
endunion dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 5592>
union dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 5592>
{field (By field)}
<byte 5592>
lbits:1 alpab2 AL_PA 0xB2 DHD Login Information
lbits:1 alpab1 AL_PA 0xB1 DHD Login Information
lbits:1 alpaae AL_PA 0xAE DHD Login Information
lbits:1 alpaad AL_PA 0xAD DHD Login Information
lbits:1 alpaac AL_PA 0xAC DHD Login Information
lbits:1 alpaab AL_PA 0xAB DHD Login Information
lbits:1 alpaaa AL_PA 0xAA DHD Login Information
lbits:1 alpaa9 AL_PA 0xA9 DHD Login Information
lbits:1 alpaa7 AL_PA 0xA7 DHD Login Information
lbits:1 alpaa6 AL_PA 0xA6 DHD Login Information
lbits:1 alpaa5 AL_PA 0xA5 DHD Login Information
lbits:1 alpaa3 AL_PA 0xA3 DHD Login Information
lbits:1 alpa9f AL_PA 0x9F DHD Login Information
lbits:1 alpa9e AL_PA 0x9E DHD Login Information
lbits:1 alpa9d AL_PA 0x9D DHD Login Information
lbits:1 alpa9b AL_PA 0x9B DHD Login Information
lbits:1 alpa98 AL_PA 0x98 DHD Login Information
lbits:1 alpa97 AL_PA 0x97 DHD Login Information
lbits:1 alpa90 AL_PA 0x90 DHD Login Information
lbits:1 alpa8f AL_PA 0x8F DHD Login Information
lbits:1 alpa88 AL_PA 0x88 DHD Login Information
lbits:1 alpa84 AL_PA 0x84 DHD Login Information
lbits:1 alpa82 AL_PA 0x82 DHD Login Information
lbits:1 alpa81 AL_PA 0x81 DHD Login Information
lbits:1 alpa80 AL_PA 0x80 DHD Login Information
lbits:1 alpa7c AL_PA 0x7C DHD Login Information
lbits:1 alpa7a AL_PA 0x7A DHD Login Information
lbits:1 alpa79 AL_PA 0x79 DHD Login Information
lbits:1 alpa76 AL_PA 0x76 DHD Login Information
lbits:1 alpa75 AL_PA 0x75 DHD Login Information
lbits:1 alpa74 AL_PA 0x74 DHD Login Information
lbits:1 alpa73 AL_PA 0x73 DHD Login Information
{}
or dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 5592>
ulong value As longword
endunion dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 5596>
union dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 5596>
{field (By field)}
<byte 5596>
lbits:1 alpa72 AL_PA 0x72 DHD Login Information
lbits:1 alpa71 AL_PA 0x71 DHD Login Information
lbits:1 alpa6e AL_PA 0x6E DHD Login Information
lbits:1 alpa6d AL_PA 0x6D DHD Login Information
lbits:1 alpa6c AL_PA 0x6C DHD Login Information
lbits:1 alpa6b AL_PA 0x6B DHD Login Information
lbits:1 alpa6a AL_PA 0x6A DHD Login Information
lbits:1 alpa69 AL_PA 0x69 DHD Login Information
lbits:1 alpa67 AL_PA 0x67 DHD Login Information
lbits:1 alpa66 AL_PA 0x66 DHD Login Information
lbits:1 alpa65 AL_PA 0x65 DHD Login Information
lbits:1 alpa63 AL_PA 0x63 DHD Login Information
lbits:1 alpa5c AL_PA 0x5C DHD Login Information
lbits:1 alpa5a AL_PA 0x5A DHD Login Information
lbits:1 alpa59 AL_PA 0x59 DHD Login Information
lbits:1 alpa56 AL_PA 0x56 DHD Login Information
lbits:1 alpa55 AL_PA 0x55 DHD Login Information
lbits:1 alpa54 AL_PA 0x54 DHD Login Information
lbits:1 alpa53 AL_PA 0x53 DHD Login Information
lbits:1 alpa52 AL_PA 0x52 DHD Login Information
lbits:1 alpa51 AL_PA 0x51 DHD Login Information
lbits:1 alpa4e AL_PA 0x4E DHD Login Information
lbits:1 alpa4d AL_PA 0x4D DHD Login Information
lbits:1 alpa4c AL_PA 0x4C DHD Login Information
lbits:1 alpa4b AL_PA 0x4B DHD Login Information
lbits:1 alpa4a AL_PA 0x4A DHD Login Information
lbits:1 alpa49 AL_PA 0x49 DHD Login Information
lbits:1 alpa47 AL_PA 0x47 DHD Login Information
lbits:1 alpa46 AL_PA 0x46 DHD Login Information
lbits:1 alpa45 AL_PA 0x45 DHD Login Information
lbits:1 alpa43 AL_PA 0x43 DHD Login Information
lbits:1 alpa3c AL_PA 0x3C DHD Login Information
{}
or dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 5596>
ulong value As longword
endunion dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 5600>
union dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 5600>
{field (By field)}
<byte 5600>
lbits:1 alpa3a AL_PA 0x3A DHD Login Information
lbits:1 alpa39 AL_PA 0x39 DHD Login Information
lbits:1 alpa36 AL_PA 0x36 DHD Login Information
lbits:1 alpa35 AL_PA 0x35 DHD Login Information
lbits:1 alpa34 AL_PA 0x34 DHD Login Information
lbits:1 alpa33 AL_PA 0x33 DHD Login Information
lbits:1 alpa32 AL_PA 0x32 DHD Login Information
lbits:1 alpa31 AL_PA 0x31 DHD Login Information
lbits:1 alpa2e AL_PA 0x2E DHD Login Information
lbits:1 alpa2d AL_PA 0x2D DHD Login Information
lbits:1 alpa2c AL_PA 0x2C DHD Login Information
lbits:1 alpa2b AL_PA 0x2B DHD Login Information
lbits:1 alpa2a AL_PA 0x2A DHD Login Information
lbits:1 alpa29 AL_PA 0x29 DHD Login Information
lbits:1 alpa27 AL_PA 0x27 DHD Login Information
lbits:1 alpa26 AL_PA 0x26 DHD Login Information
lbits:1 alpa25 AL_PA 0x25 DHD Login Information
lbits:1 alpa23 AL_PA 0x23 DHD Login Information
lbits:1 alpa1f AL_PA 0x1F DHD Login Information
lbits:1 alpa1e AL_PA 0x1E DHD Login Information
lbits:1 alpa1d AL_PA 0x1D DHD Login Information
lbits:1 alpa1b AL_PA 0x1B DHD Login Information
lbits:1 alpa18 AL_PA 0x18 DHD Login Information
lbits:1 alpa17 AL_PA 0x17 DHD Login Information
lbits:1 alpa10 AL_PA 0x10 DHD Login Information
lbits:1 alpa0f AL_PA 0x0F DHD Login Information
lbits:1 alpa08 AL_PA 0x08 DHD Login Information
lbits:1 alpa04 AL_PA 0x04 DHD Login Information
lbits:1 alpa02 AL_PA 0x02 DHD Login Information
lbits:1 alpa01 AL_PA 0x01 DHD Login Information
lbits:1 alpa00 AL_PA 0x00 DHD Login Information
lbits:1 reserved Reserved
{}
or dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 5600>
ulong value As longword
endunion dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 5604>
union fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 5604>
{field (By field)}
<byte 5604>
lbits:1 bli Bypass Loop Initialization
lbits:1 reserved Reserved
lbits:1 enp Enable N_Port Mode
lbits:1 lr Login Required
lbits:1 inif Initialize as Fabric
lbits:1 rf Respond to Fabric Address
lbits:1 blm Bypass Loop Map
lbits:1 sa Acquire Soft Address
lbits:1 ha Acquire Hard Address
lbits:1 aq Acquire Previously Acquired Address
lbits:1 fa Acquire Fabric Aquired Address
lbits:1 td Timer Disable
lbits:1 sap Skip Arbitration Phase
lbits:1 elb External Loopback/Pad Loopback
lbits:1 ilb Internal loopback
lbits:1 npi Initialize as N_Port
lbits:8 bb_credit BB_Credit
lbits:8 al_pa Desired AL_PA
{}
or fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 5604>
ulong value As longword
endunion fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 5608>
union fm_control (Offset 1C4) Frame Manager Control
<byte 5608>
{field (By field)}
<byte 5608>
lbits:3 cmd State Machine Command
lbits:1 cl Close Loop Request
lbits:1 ipe Initiate Port Enable
lbits:1 sp Send Prim_Reg
lbits:1 sq Primitive Sequence
lbits:1 sas Start Auto-Speed Negotiation
lbits:24 reserved Reserved
{}
or fm_control (Offset 1C4) Frame Manager Control
<byte 5608>
ulong value As longword
endunion fm_control (Offset 1C4) Frame Manager Control
<byte 5612>
union fm_status (Offset 1C8) Frame Manager Status
<byte 5612>
{field (By field)}
<byte 5612>
lbits:4 psm Port State Machine
lbits:4 lsm Loop State Machine
lbits:1 ldn Link Down
lbits:1 lup Link Up
lbits:1 es Elastic Store Error
lbits:1 ce Credit Error
lbits:1 lf Link Failure
lbits:1 lg Login Required
lbits:1 ptx Primitive Transmitted
lbits:1 prx Primitive Received
lbits:1 ba Bad AL_PA
lbits:1 lpf LIPf
lbits:1 sto State Time-out
lbits:1 ols OLS/NOS Received
lbits:1 lpb Loop Port Bypass (LPB) Primitive Sequence Received
lbits:1 lpe Loop Port Enable (LPE) Primitive Sequence Received
lbits:1 drs Directed LIP Sequence Received
lbits:1 reserved Reserved
lbits:1 ls Loss of Signal
lbits:1 os Out of Synchronization
lbits:1 flt Link Fault
lbits:1 reserved1 Reserved
lbits:1 byp Node Bypassed
lbits:1 np Non-Participating
lbits:1 tp Transmit Parity Error
lbits:1 lp Loop
{}
or fm_status (Offset 1C8) Frame Manager Status
<byte 5612>
ulong value As longword
endunion fm_status (Offset 1C8) Frame Manager Status
<byte 5616>
union fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 5616>
{field (By field)}
<byte 5616>
lbits:16 ed_tov Error Detect Time-Out
lbits:9 rt_tov Receiver Transmitter Time-Out
lbits:7 reserved Reserved
{}
or fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 5616>
ulong value As longword
endunion fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 5620>
union fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 5620>
{field (By field)}
<byte 5620>
lbits:8 link_fail Link Fail Count
lbits:8 loss_of_sync Loss of Synchronization Count
lbits:8 bad_rx_char Bad Received Character Count
lbits:8 loss_of_signal Loss of Signal Count
{}
or fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 5620>
ulong value As longword
endunion fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 5624>
union fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 5624>
{field (By field)}
<byte 5624>
lbits:8 proto_er Protocol Error Count
lbits:8 bad_crc Bad CRC Count
lbits:8 dis_frm Discarded Frames
lbits:8 rx_eofa Received EOFa
{}
or fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 5624>
ulong value As longword
endunion fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 5628>
union fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 5628>
{field (By field)}
<byte 5628>
lbits:9 al_time Arbitrated Loop Time-Out
lbits:7 reserved Reserved
lbits:16 lp_tov Loop Time-Out
{}
or fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 5628>
ulong value As longword
endunion fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 5632>
union fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 5632>
{field (By field)}
<byte 5632>
lbits:24 bb0_timer BB_Credit Timer
lbits:8 reserved Reserved
{}
or fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 5632>
ulong value As longword
endunion fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 5636>
union fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 5636>
{field (By field)}
<byte 5636>
lbits:32 wwn World Wide Name
{}
or fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 5636>
ulong value As longword
endunion fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 5640>
union fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 5640>
{field (By field)}
<byte 5640>
lbits:32 wwn World Wide Name
{}
or fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 5640>
ulong value As longword
endunion fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 5644>
union fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 5644>
{field (By field)}
<byte 5644>
lbits:8 lipf_alpa AL_PA of Most Recent LIPf Received
lbits:8 bad_alpa AL_PA of Most Recent OPN Sent and Returned Without Being Accepted
lbits:8 acq_alpa AL_PA Acquired During Loop Initialization
lbits:8 reserved Reserved
{}
or fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 5644>
ulong value As longword
endunion fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 5648>
union fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 5648>
{field (By field)}
<byte 5648>
lbits:24 prim_value Primitive to be Sent
lbits:8 reserved Reserved
{}
or fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 5648>
ulong value As longword
endunion fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 5652>
union fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 5652>
{field (By field)}
<byte 5652>
lbits:8 exp_frm Expired Frames
lbits:24 reserved Reserved
{}
or fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 5652>
ulong value As longword
endunion fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 5656>
union fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 5656>
{field (By field)}
<byte 5656>
lbits:1 dac Disable Auto Close
lbits:2 nbc Non-zero Login BB_Credit
lbits:1 eei Enable ERR_INIT
lbits:1 icb Ignore Close Bit
lbits:2 atv Arbitration Threshold Value
lbits:1 gde Garbage Deletion Enable
lbits:8 laa Lowest Allowable AL_PA
lbits:8 reserved Reserved
lbits:1 reserved1 Reserved
lbits:1 prm Promiscuous Mode
lbits:1 wpe Wait For Port Enable
lbits:1 fmh Force Monitor State With Hard Address
lbits:1 fmn Force Monitor Non-participating State
lbits:1 dlm Disable Loop Master
lbits:1 dsa Disable Soft Address Selection
lbits:1 ilp Ignore LPB/LPE Primitive Sequences
{}
or fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 5656>
ulong value As longword
endunion fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 5660>
union pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 5660>
{field (By field)}
<byte 5660>
union brstctr PCI Master Burst Count Control
<byte 5660>
{field (By field)}
<byte 5660>
tbits:4 read_burst PCI read burst count
tbits:4 write_burst PCI write burst count
{}
or brstctr PCI Master Burst Count Control
<byte 5660>
utiny value As byte
endunion brstctr PCI Master Burst Count Control
<byte 5661>
union waitctr PCI Master Wait Count Control
<byte 5661>
{field (By field)}
<byte 5661>
tbits:4 read_wait DMA read wait count
tbits:4 write_wait DMA write wait count
{}
or waitctr PCI Master Wait Count Control
<byte 5661>
utiny value As byte
endunion waitctr PCI Master Wait Count Control
<byte 5662>
union romctr PCI ROM Control
<byte 5662>
{field (By field)}
<byte 5662>
tbits:1 vpp_en ROM VPP Enable
tbits:1 fla Flash Installed (read only)
tbits:1 rom ROM Installed (read only)
tbits:1 rm0 RAM 0 (read only); combination of RAM 2, RAM 1, and RAM 0 describe static RAM configuration: 000 - none, 001 - 128KB, 010 - 256KB, 011 - 512KB, 100 - 1MB, 101 - 2MB, 110 - reserved, 111 - reserved
tbits:1 rm1 RAM 1 (read only)
tbits:1 svl Subsystem VID Loaded (read only)
tbits:1 par External memory parity checking enabled (read only)
tbits:1 rm2 RAM 2 (read only)
{}
or romctr PCI ROM Control
<byte 5662>
utiny value As byte
endunion romctr PCI ROM Control
<byte 5663>
union mctr PCI Master Control
<byte 5663>
{field (By field)}
<byte 5663>
tbits:1 ecl Enable MRM and MRL Completion to Cache Line
tbits:1 rrd PCI Memory Read Round Down Enable
tbits:1 p64 PCI Present and Active
tbits:1 rae Memory Read Alignment Enable
tbits:1 wae Memory Write Alignment Enable
tbits:1 rbe PCI Read Burst Counter Enable
tbits:1 wbe PCI Write Burst Counter Enable
tbits:1 dlt Disable Latency Timer
{}
or mctr PCI Master Control
<byte 5663>
utiny value As byte
endunion mctr PCI Master Control
{}
or pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 5660>
ulong value As longword
endunion pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 5664>
union pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
<byte 5664>
{field (By field)}
<byte 5664>
union softrst PCI Interface Reset Control
<byte 5664>
{field (By field)}
<byte 5664>
tbits:1 rst PCI Interface Soft Reset
tbits:1 dpe Reserved (must be zero)
tbits:1 rdd RAM/ROM Read Delayed Transaction Disabled
tbits:1 tad Target Abort Disable
tbits:4 rsvd Reserved (must be zero)
{}
or softrst PCI Interface Reset Control
<byte 5664>
utiny value As byte
endunion softrst PCI Interface Reset Control
<byte 5665>
union intpend PCI Interrupt Pending
<byte 5665>
{field (By field)}
<byte 5665>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or intpend PCI Interrupt Pending
<byte 5665>
utiny value As byte
endunion intpend PCI Interrupt Pending
<byte 5666>
union inten PCI Interrupt Enable
<byte 5666>
{field (By field)}
<byte 5666>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or inten PCI Interrupt Enable
<byte 5666>
utiny value As byte
endunion inten PCI Interrupt Enable
<byte 5667>
union intstat PCI Interrupt Status
<byte 5667>
{field (By field)}
<byte 5667>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or intstat PCI Interrupt Status
<byte 5667>
utiny value As byte
endunion intstat PCI Interrupt Status
{}
or pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
<byte 5664>
ulong value As longword
endunion pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
{}
endunion csr[2] Tachyon XL2 CSR Registers
<byte 5668>
union csr[3] Tachyon XL2 CSR Registers
<byte 5668>
ulong[128] csra Tachyon XL2 CSR Registers As Longwords
or csr[3] Tachyon XL2 CSR Registers
<byte 5668>
{csr (Tachyon XL2 CSR Registers By Field)}
<byte 5668>
union erq_base (Offset 000) ERQ Base (write only)
<byte 5668>
{field (By field)}
<byte 5668>
lbits:32 address ERQ Base Address
{}
or erq_base (Offset 000) ERQ Base (write only)
<byte 5668>
ulong value As longword
endunion erq_base (Offset 000) ERQ Base (write only)
<byte 5672>
union erq_len (Offset 004) ERQ Length (write only)
<byte 5672>
{field (By field)}
<byte 5672>
lbits:12 length ERQ Length
lbits:20 reserved Reserved
{}
or erq_len (Offset 004) ERQ Length (write only)
<byte 5672>
ulong value As longword
endunion erq_len (Offset 004) ERQ Length (write only)
<byte 5676>
union erq_prod (Offset 008) ERQ Producer Index
<byte 5676>
{field (By field)}
<byte 5676>
lbits:12 index ERQ Producer Index
lbits:20 reserved Reserved
{}
or erq_prod (Offset 008) ERQ Producer Index
<byte 5676>
ulong value As longword
endunion erq_prod (Offset 008) ERQ Producer Index
<byte 5680>
union erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 5680>
{field (By field)}
<byte 5680>
lbits:32 address ERQ Consumer Index Address
{}
or erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 5680>
ulong value As longword
endunion erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 5684>
union erq_cons (Offset 010) ERQ Consumer Index
<byte 5684>
{field (By field)}
<byte 5684>
lbits:12 index ERQ Consumer Index
lbits:20 reserved Reserved
{}
or erq_cons (Offset 010) ERQ Consumer Index
<byte 5684>
ulong value As longword
endunion erq_cons (Offset 010) ERQ Consumer Index
<byte 5688>
{rsvd1[0] ((Offset 014-04F) Reserved)}
<byte 5688>
ulong value
{}
<byte 5692>
{rsvd1[1] ((Offset 014-04F) Reserved)}
<byte 5692>
ulong value
{}
<byte 5696>
{rsvd1[2] ((Offset 014-04F) Reserved)}
<byte 5696>
ulong value
{}
<byte 5700>
{rsvd1[3] ((Offset 014-04F) Reserved)}
<byte 5700>
ulong value
{}
<byte 5704>
{rsvd1[4] ((Offset 014-04F) Reserved)}
<byte 5704>
ulong value
{}
<byte 5708>
{rsvd1[5] ((Offset 014-04F) Reserved)}
<byte 5708>
ulong value
{}
<byte 5712>
{rsvd1[6] ((Offset 014-04F) Reserved)}
<byte 5712>
ulong value
{}
<byte 5716>
{rsvd1[7] ((Offset 014-04F) Reserved)}
<byte 5716>
ulong value
{}
<byte 5720>
{rsvd1[8] ((Offset 014-04F) Reserved)}
<byte 5720>
ulong value
{}
<byte 5724>
{rsvd1[9] ((Offset 014-04F) Reserved)}
<byte 5724>
ulong value
{}
<byte 5728>
{rsvd1[10] ((Offset 014-04F) Reserved)}
<byte 5728>
ulong value
{}
<byte 5732>
{rsvd1[11] ((Offset 014-04F) Reserved)}
<byte 5732>
ulong value
{}
<byte 5736>
{rsvd1[12] ((Offset 014-04F) Reserved)}
<byte 5736>
ulong value
{}
<byte 5740>
{rsvd1[13] ((Offset 014-04F) Reserved)}
<byte 5740>
ulong value
{}
<byte 5744>
{rsvd1[14] ((Offset 014-04F) Reserved)}
<byte 5744>
ulong value
{}
<byte 5748>
union sfq_base (Offset 050) SFQ Base (write only)
<byte 5748>
{field (By field)}
<byte 5748>
lbits:32 address SFQ Base Address
{}
or sfq_base (Offset 050) SFQ Base (write only)
<byte 5748>
ulong value As longword
endunion sfq_base (Offset 050) SFQ Base (write only)
<byte 5752>
union sfq_len (Offset 054) SFQ Length (write only)
<byte 5752>
{field (By field)}
<byte 5752>
lbits:12 length SFQ Length
lbits:20 reserved Reserved
{}
or sfq_len (Offset 054) SFQ Length (write only)
<byte 5752>
ulong value As longword
endunion sfq_len (Offset 054) SFQ Length (write only)
<byte 5756>
union sfq_cons (Offset 058) SFQ Consumer Index
<byte 5756>
{field (By field)}
<byte 5756>
lbits:12 index SFQ Consumer Index
lbits:20 reserved Reserved
{}
or sfq_cons (Offset 058) SFQ Consumer Index
<byte 5756>
ulong value As longword
endunion sfq_cons (Offset 058) SFQ Consumer Index
<byte 5760>
{rsvd2[0] ((Offset 05C-07B) Reserved)}
<byte 5760>
ulong value
{}
<byte 5764>
{rsvd2[1] ((Offset 05C-07B) Reserved)}
<byte 5764>
ulong value
{}
<byte 5768>
{rsvd2[2] ((Offset 05C-07B) Reserved)}
<byte 5768>
ulong value
{}
<byte 5772>
{rsvd2[3] ((Offset 05C-07B) Reserved)}
<byte 5772>
ulong value
{}
<byte 5776>
{rsvd2[4] ((Offset 05C-07B) Reserved)}
<byte 5776>
ulong value
{}
<byte 5780>
{rsvd2[5] ((Offset 05C-07B) Reserved)}
<byte 5780>
ulong value
{}
<byte 5784>
{rsvd2[6] ((Offset 05C-07B) Reserved)}
<byte 5784>
ulong value
{}
<byte 5788>
{rsvd2[7] ((Offset 05C-07B) Reserved)}
<byte 5788>
ulong value
{}
<byte 5792>
union int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 5792>
{field (By field)}
<byte 5792>
lbits:4 timer Interrupt Timer Value
lbits:3 reserved Reserved
lbits:1 ihf Interrupt when IMQ Half Full
lbits:24 reserved1 Reserved
{}
or int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 5792>
ulong value As longword
endunion int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 5796>
union imq_base (Offset 080) IMQ Base (write only)
<byte 5796>
{field (By field)}
<byte 5796>
lbits:32 address IMQ Base Address
{}
or imq_base (Offset 080) IMQ Base (write only)
<byte 5796>
ulong value As longword
endunion imq_base (Offset 080) IMQ Base (write only)
<byte 5800>
union imq_len (Offset 084) IMQ Length (write only)
<byte 5800>
{field (By field)}
<byte 5800>
lbits:12 length IMQ Length
lbits:20 reserved Reserved
{}
or imq_len (Offset 084) IMQ Length (write only)
<byte 5800>
ulong value As longword
endunion imq_len (Offset 084) IMQ Length (write only)
<byte 5804>
union imq_cons (Offset 088) IMQ Consumer Index
<byte 5804>
{field (By field)}
<byte 5804>
lbits:12 index IMQ Consumer Index
lbits:20 reserved Reserved
{}
or imq_cons (Offset 088) IMQ Consumer Index
<byte 5804>
ulong value As longword
endunion imq_cons (Offset 088) IMQ Consumer Index
<byte 5808>
union imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 5808>
{field (By field)}
<byte 5808>
lbits:32 address IMQ Producer Index Address
{}
or imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 5808>
ulong value As longword
endunion imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 5812>
{rsvd3[0] ((Offset 090-0FC) Reserved)}
<byte 5812>
ulong value
{}
<byte 5816>
{rsvd3[1] ((Offset 090-0FC) Reserved)}
<byte 5816>
ulong value
{}
<byte 5820>
{rsvd3[2] ((Offset 090-0FC) Reserved)}
<byte 5820>
ulong value
{}
<byte 5824>
{rsvd3[3] ((Offset 090-0FC) Reserved)}
<byte 5824>
ulong value
{}
<byte 5828>
{rsvd3[4] ((Offset 090-0FC) Reserved)}
<byte 5828>
ulong value
{}
<byte 5832>
{rsvd3[5] ((Offset 090-0FC) Reserved)}
<byte 5832>
ulong value
{}
<byte 5836>
{rsvd3[6] ((Offset 090-0FC) Reserved)}
<byte 5836>
ulong value
{}
<byte 5840>
{rsvd3[7] ((Offset 090-0FC) Reserved)}
<byte 5840>
ulong value
{}
<byte 5844>
{rsvd3[8] ((Offset 090-0FC) Reserved)}
<byte 5844>
ulong value
{}
<byte 5848>
{rsvd3[9] ((Offset 090-0FC) Reserved)}
<byte 5848>
ulong value
{}
<byte 5852>
{rsvd3[10] ((Offset 090-0FC) Reserved)}
<byte 5852>
ulong value
{}
<byte 5856>
{rsvd3[11] ((Offset 090-0FC) Reserved)}
<byte 5856>
ulong value
{}
<byte 5860>
{rsvd3[12] ((Offset 090-0FC) Reserved)}
<byte 5860>
ulong value
{}
<byte 5864>
{rsvd3[13] ((Offset 090-0FC) Reserved)}
<byte 5864>
ulong value
{}
<byte 5868>
{rsvd3[14] ((Offset 090-0FC) Reserved)}
<byte 5868>
ulong value
{}
<byte 5872>
{rsvd3[15] ((Offset 090-0FC) Reserved)}
<byte 5872>
ulong value
{}
<byte 5876>
{rsvd3[16] ((Offset 090-0FC) Reserved)}
<byte 5876>
ulong value
{}
<byte 5880>
{rsvd3[17] ((Offset 090-0FC) Reserved)}
<byte 5880>
ulong value
{}
<byte 5884>
{rsvd3[18] ((Offset 090-0FC) Reserved)}
<byte 5884>
ulong value
{}
<byte 5888>
{rsvd3[19] ((Offset 090-0FC) Reserved)}
<byte 5888>
ulong value
{}
<byte 5892>
{rsvd3[20] ((Offset 090-0FC) Reserved)}
<byte 5892>
ulong value
{}
<byte 5896>
{rsvd3[21] ((Offset 090-0FC) Reserved)}
<byte 5896>
ulong value
{}
<byte 5900>
{rsvd3[22] ((Offset 090-0FC) Reserved)}
<byte 5900>
ulong value
{}
<byte 5904>
{rsvd3[23] ((Offset 090-0FC) Reserved)}
<byte 5904>
ulong value
{}
<byte 5908>
{rsvd3[24] ((Offset 090-0FC) Reserved)}
<byte 5908>
ulong value
{}
<byte 5912>
{rsvd3[25] ((Offset 090-0FC) Reserved)}
<byte 5912>
ulong value
{}
<byte 5916>
{rsvd3[26] ((Offset 090-0FC) Reserved)}
<byte 5916>
ulong value
{}
<byte 5920>
{rsvd3[27] ((Offset 090-0FC) Reserved)}
<byte 5920>
ulong value
{}
<byte 5924>
union fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 5924>
{field (By field)}
<byte 5924>
lbits:1 x50 50 Ohms Termination Enable
lbits:2 xtr Termination Receive
lbits:2 xtt Termination Transmit
lbits:3 xta Transmitter Amplitude
lbits:1 xwb Wrapback
lbits:1 reserved Reserved
lbits:1 txo Transmitter Off
lbits:1 reserved1 Reserved
lbits:1 xlp Loopback
lbits:2 xem Output Emphasis
lbits:1 reserved2 Reserved
lbits:2 xrz Receiver Zero Adjust
lbits:2 xrp Receiver Pole Adjust
lbits:2 xtz Transmitter Zero Adjust
lbits:2 xtp Transmitter Pole Adjust
lbits:2 rxs Receiver Speed
lbits:2 txs Transmitter Speed
lbits:1 ean Enable Auto Speed Negotiation
lbits:1 xlr Force iTR to lock reference clock
lbits:1 asp Auto Speed Negotiation in Progress
lbits:1 xcv Type of Transceiver
{}
or fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 5924>
ulong value As longword
endunion fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 5928>
union fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 5928>
{field (By field)}
<byte 5928>
lbits:4 psm Port State Machine
lbits:4 lsm Loop State Machine
lbits:1 ldn Link Down
lbits:1 lup Link Up
lbits:1 es Elastic Store Error
lbits:1 ce Credit Error
lbits:1 lf Link Failure
lbits:1 lg Login Required
lbits:1 ptx Primitive Transmitted
lbits:1 prx Primitive Received
lbits:1 ba Bad AL_PA
lbits:1 lpf LIPf
lbits:1 sto State Time-out
lbits:1 ols OLS/NOS Received
lbits:1 lpb Loop Port Bypass (LPB) Primitive Sequence Received
lbits:1 lpe Loop Port Enable (LPE) Primitive Sequence Received
lbits:1 drs Directed LIP Sequence Received
lbits:1 reserved Reserved
lbits:1 ls Loss of Signal
lbits:1 os Out of Synchronization
lbits:1 flt Link Fault
lbits:1 reserved1 Reserved
lbits:1 byp Node Bypassed
lbits:1 np Non-Participating
lbits:1 tp Transmit Parity Error
lbits:1 lp Loop
{}
or fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 5928>
ulong value As longword
endunion fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 5932>
{rsvd3a[0] ((Offset 108-13F) Reserved)}
<byte 5932>
ulong value
{}
<byte 5936>
{rsvd3a[1] ((Offset 108-13F) Reserved)}
<byte 5936>
ulong value
{}
<byte 5940>
{rsvd3a[2] ((Offset 108-13F) Reserved)}
<byte 5940>
ulong value
{}
<byte 5944>
{rsvd3a[3] ((Offset 108-13F) Reserved)}
<byte 5944>
ulong value
{}
<byte 5948>
{rsvd3a[4] ((Offset 108-13F) Reserved)}
<byte 5948>
ulong value
{}
<byte 5952>
{rsvd3a[5] ((Offset 108-13F) Reserved)}
<byte 5952>
ulong value
{}
<byte 5956>
{rsvd3a[6] ((Offset 108-13F) Reserved)}
<byte 5956>
ulong value
{}
<byte 5960>
{rsvd3a[7] ((Offset 108-13F) Reserved)}
<byte 5960>
ulong value
{}
<byte 5964>
{rsvd3a[8] ((Offset 108-13F) Reserved)}
<byte 5964>
ulong value
{}
<byte 5968>
{rsvd3a[9] ((Offset 108-13F) Reserved)}
<byte 5968>
ulong value
{}
<byte 5972>
{rsvd3a[10] ((Offset 108-13F) Reserved)}
<byte 5972>
ulong value
{}
<byte 5976>
{rsvd3a[11] ((Offset 108-13F) Reserved)}
<byte 5976>
ulong value
{}
<byte 5980>
{rsvd3a[12] ((Offset 108-13F) Reserved)}
<byte 5980>
ulong value
{}
<byte 5984>
{rsvd3a[13] ((Offset 108-13F) Reserved)}
<byte 5984>
ulong value
{}
<byte 5988>
union sest_base (Offset 140) SEST Base (write only)
<byte 5988>
{field (By field)}
<byte 5988>
lbits:32 address SEST Base Address
{}
or sest_base (Offset 140) SEST Base (write only)
<byte 5988>
ulong value As longword
endunion sest_base (Offset 140) SEST Base (write only)
<byte 5992>
union sest_len (Offset 144) SEST Length (write only)
<byte 5992>
{field (By field)}
<byte 5992>
lbits:16 length SEST Length
lbits:16 reserved Reserved
{}
or sest_len (Offset 144) SEST Length (write only)
<byte 5992>
ulong value As longword
endunion sest_len (Offset 144) SEST Length (write only)
<byte 5996>
{rsvd4 ((Offset 148) Reserved)}
<byte 5996>
ulong value
{}
<byte 6000>
union scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 6000>
{field (By field)}
<byte 6000>
lbits:16 tail Tail
lbits:16 head Head
{}
or scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 6000>
ulong value As longword
endunion scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 6004>
union spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 6004>
{field (By field)}
<byte 6004>
lbits:1 sra SPI SRAM Access
lbits:10 rsvd Reserved
lbits:21 address RAM/ROM Address
{}
or spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 6004>
ulong value As longword
endunion spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 6008>
union spidata (Offset 154) SPI RAM/ROM Data
<byte 6008>
union field By field
<byte 6008>
{ram (By field)}
<byte 6008>
lbits:32 data RAM data
{}
or field By field
<byte 6008>
{rom (By field)}
<byte 6008>
lbits:8 data ROM data
lbits:24 rsvd Reserved
{}
endunion field By field
or spidata (Offset 154) SPI RAM/ROM Data
<byte 6008>
ulong value As longword
endunion spidata (Offset 154) SPI RAM/ROM Data
<byte 6012>
{rsvd5[0] ((Offset 158-15C) Reserved)}
<byte 6012>
ulong value
{}
<byte 6016>
{rsvd5[1] ((Offset 158-15C) Reserved)}
<byte 6016>
ulong value
{}
<byte 6020>
union int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 6020>
{field (By field)}
<byte 6020>
lbits:32 address Interrupt Message Address
{}
or int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 6020>
ulong value As longword
endunion int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 6024>
union int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 6024>
{field (By field)}
<byte 6024>
lbits:32 value Interrupt Message Value
{}
or int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 6024>
ulong value As longword
endunion int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 6028>
union sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 6028>
{field (By field)}
<byte 6028>
lbits:8 length SGL Page Length
lbits:24 reserved Reserved
{}
or sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 6028>
ulong value As longword
endunion sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 6032>
union my_id (Offset 16C) My ID
<byte 6032>
{field (By field)}
<byte 6032>
lbits:24 id My ID
lbits:8 reserved Reserved
{}
or my_id (Offset 16C) My ID
<byte 6032>
ulong value As longword
endunion my_id (Offset 16C) My ID
<byte 6036>
union gpio (Offset 170) General Purpose I/O
<byte 6036>
{field (By field)}
<byte 6036>
lbits:1 gc0 General Purpose Control 0
lbits:1 gc1 General Purpose Control 1
lbits:1 gc2 General Purpose Control 2
lbits:1 gc3 General Purpose Control 3
lbits:1 gc4 General Purpose Control 4
lbits:1 gc5 General Purpose Control 5
lbits:1 gc6 General Purpose Control 6
lbits:1 gc7 General Purpose Control 7
lbits:8 reserved Reserved
lbits:1 gp0 General Purpose I/O 0
lbits:1 gp1 General Purpose I/O 1
lbits:1 gp2 General Purpose I/O 2
lbits:1 gp3 General Purpose I/O 3
lbits:1 gp4 General Purpose Input 4
lbits:1 gp5 General Purpose I/O 5
lbits:1 gp6 General Purpose I/O 6
lbits:1 gp7 General Purpose I/O 7
lbits:8 reserved1 Reserved
{}
or gpio (Offset 170) General Purpose I/O
<byte 6036>
ulong value As longword
endunion gpio (Offset 170) General Purpose I/O
<byte 6040>
{rsvd6[0] ((Offset 174-17F) Reserved)}
<byte 6040>
ulong value
{}
<byte 6044>
{rsvd6[1] ((Offset 174-17F) Reserved)}
<byte 6044>
ulong value
{}
<byte 6048>
{rsvd6[2] ((Offset 174-17F) Reserved)}
<byte 6048>
ulong value
{}
<byte 6052>
union tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 6052>
{field (By field)}
<byte 6052>
lbits:9 pfs Programmable Frame Size
lbits:15 reserved Reserved
lbits:8 esi_range Exchange_ID Signaled Interrupt Range
{}
or tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 6052>
ulong value As longword
endunion tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 6056>
union tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 6056>
{field (By field)}
<byte 6056>
lbits:1 fad FCP Assist Disable
lbits:1 ino In Order
lbits:1 dof Discard OOO FCP Frames
lbits:1 fua FCP Unassisted ACK Enable
lbits:1 ime Interrupt Message Enable
lbits:1 fab Fabric
lbits:1 sic S_ID Copy Enable
lbits:1 eqs Equal Service
lbits:1 reserved Reserved
lbits:1 cae Concurrent Access Enable
lbits:14 reserved1 Reserved
lbits:1 fc2 FCP Class 2 Reassembly Enable
lbits:1 reserved2 Reserved
lbits:1 sdf Save Discarded Frames
lbits:1 rde Response Detect Enable
lbits:1 dam Default ACK Model
lbits:3 reserved3 Reserved
{}
or tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 6056>
ulong value As longword
endunion tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 6060>
union tach_control (Offset 188) Tachyon XL2 Control
<byte 6060>
{field (By field)}
<byte 6060>
lbits:1 gc0 General Purpose Control 0
lbits:1 gc1 General Purpose Control 1
lbits:1 gc2 General Purpose Control 2
lbits:1 gc3 General Purpose Control 3
lbits:1 gc4 General Purpose Control 4
lbits:3 reserved Reserved
lbits:1 feq Freeze ERQ
lbits:1 ffa Freeze FCP Assists
lbits:2 reserved1 Reserved
lbits:1 fis Freeze Inbound FCP Assists When Frame Placed in SFQ
lbits:1 fib Freeze Inbound FCP Assists
lbits:2 reserved2 Reserved
lbits:1 req Resume ERQ
lbits:1 rif Resume Inbound FCP Assists
lbits:1 rof Resume Outbound FCP Assists
lbits:12 reserved3 Reserved
lbits:1 crs Core Reset
{}
or tach_control (Offset 188) Tachyon XL2 Control
<byte 6060>
ulong value As longword
endunion tach_control (Offset 188) Tachyon XL2 Control
<byte 6064>
union tach_status (Offset 18C) Tachyon XL2 Status
<byte 6064>
{field (By field)}
<byte 6064>
lbits:1 gp0 General Purpose I/O 0
lbits:1 gp1 General Purpose I/O 1
lbits:1 gp2 General Purpose I/O 2
lbits:1 gp3 General Purpose I/O 3
lbits:1 gp4 General Purpose Input 4
lbits:5 revid Device Revision ID
lbits:1 ipe Inbound Parity Error
lbits:1 ope Outbound Parity Error
lbits:4 reserved Reserved
lbits:1 eqf ERQ Frozen
lbits:1 iff Inbound FCP Assists Frozen
lbits:1 off Outbound FCP Assists Frozen
lbits:6 reserved1 Reserved
lbits:1 m66 66 Mhz Enabled
lbits:1 ile Inbound Link Control FIFO Empty
lbits:1 ole Outbound Link Control List Empty
lbits:1 ife Inbound FIFO Empty
lbits:1 ofe Outbound FIFO Empty
lbits:1 imf IMQ Full
lbits:1 ssf SFQ Full
{}
or tach_status (Offset 18C) Tachyon XL2 Status
<byte 6064>
ulong value As longword
endunion tach_status (Offset 18C) Tachyon XL2 Status
<byte 6068>
{rsvd7 ((Offset 190) Reserved)}
<byte 6068>
ulong value
{}
<byte 6072>
union hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 6072>
{field (By field)}
<byte 6072>
lbits:12 length Frame Length
lbits:7 reserved Reserved
lbits:12 upper_addr Frame Upper Address
lbits:1 reserved1 Reserved
{}
or hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 6072>
ulong value As longword
endunion hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 6076>
union hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 6076>
{field (By field)}
<byte 6076>
lbits:12 length Frame Length
lbits:7 reserved Reserved
lbits:12 upper_addr Frame Upper Address
lbits:1 reserved1 Reserved
{}
or hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 6076>
ulong value As longword
endunion hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 6080>
union inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 6080>
{field (By field)}
<byte 6080>
lbits:24 reserved Reserved
lbits:8 sest_lru_count SEST LRU Count
{}
or inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 6080>
ulong value As longword
endunion inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 6084>
union inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 6084>
{field (By field)}
<byte 6084>
lbits:8 discd_frames Discarded Frame Count
lbits:24 reserved Reserved
{}
or inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 6084>
ulong value As longword
endunion inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 6088>
union ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 6088>
{field (By field)}
<byte 6088>
lbits:28 threshold EE_Credit Zero Timer Threshold
lbits:4 reserved Reserved
{}
or ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 6088>
ulong value As longword
endunion ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 6092>
union up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 6092>
{field (By field)}
<byte 6092>
lbits:13 reserved Reserved
lbits:19 upper_addr Upper Data Address
{}
or up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 6092>
ulong value As longword
endunion up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 6096>
union up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 6096>
{field (By field)}
<byte 6096>
lbits:32 upper_addr Upper Control Address
{}
or up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 6096>
ulong value As longword
endunion up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 6100>
union dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 6100>
{field (By field)}
<byte 6100>
lbits:1 ef AL_PA 0xEF DHD Login Information
lbits:1 e8 AL_PA 0xE8 DHD Login Information
lbits:1 e4 AL_PA 0xE4 DHD Login Information
lbits:1 e2 AL_PA 0xE2 DHD Login Information
lbits:1 e1 AL_PA 0xE1 DHD Login Information
lbits:1 e0 AL_PA 0xE0 DHD Login Information
lbits:1 dc AL_PA 0xDC DHD Login Information
lbits:1 da AL_PA 0xDA DHD Login Information
lbits:1 d9 AL_PA 0xD9 DHD Login Information
lbits:1 d6 AL_PA 0xD6 DHD Login Information
lbits:1 d5 AL_PA 0xD5 DHD Login Information
lbits:1 d4 AL_PA 0xD4 DHD Login Information
lbits:1 d3 AL_PA 0xD3 DHD Login Information
lbits:1 d2 AL_PA 0xD2 DHD Login Information
lbits:1 d1 AL_PA 0xD1 DHD Login Information
lbits:1 ce AL_PA 0xCE DHD Login Information
lbits:1 cd AL_PA 0xCD DHD Login Information
lbits:1 cc AL_PA 0xCC DHD Login Information
lbits:1 cb AL_PA 0xCB DHD Login Information
lbits:1 ca AL_PA 0xCA DHD Login Information
lbits:1 c9 AL_PA 0xC9 DHD Login Information
lbits:1 c7 AL_PA 0xC7 DHD Login Information
lbits:1 c6 AL_PA 0xC6 DHD Login Information
lbits:1 c5 AL_PA 0xC5 DHD Login Information
lbits:1 c3 AL_PA 0xC3 DHD Login Information
lbits:1 bc AL_PA 0xBC DHD Login Information
lbits:1 ba AL_PA 0xBA DHD Login Information
lbits:1 b9 AL_PA 0xB9 DHD Login Information
lbits:1 b6 AL_PA 0xB6 DHD Login Information
lbits:1 b5 AL_PA 0xB5 DHD Login Information
lbits:1 b4 AL_PA 0xB4 DHD Login Information
lbits:1 b3 AL_PA 0xB3 DHD Login Information
{}
or dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 6100>
ulong value As longword
endunion dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 6104>
union dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 6104>
{field (By field)}
<byte 6104>
lbits:1 alpab2 AL_PA 0xB2 DHD Login Information
lbits:1 alpab1 AL_PA 0xB1 DHD Login Information
lbits:1 alpaae AL_PA 0xAE DHD Login Information
lbits:1 alpaad AL_PA 0xAD DHD Login Information
lbits:1 alpaac AL_PA 0xAC DHD Login Information
lbits:1 alpaab AL_PA 0xAB DHD Login Information
lbits:1 alpaaa AL_PA 0xAA DHD Login Information
lbits:1 alpaa9 AL_PA 0xA9 DHD Login Information
lbits:1 alpaa7 AL_PA 0xA7 DHD Login Information
lbits:1 alpaa6 AL_PA 0xA6 DHD Login Information
lbits:1 alpaa5 AL_PA 0xA5 DHD Login Information
lbits:1 alpaa3 AL_PA 0xA3 DHD Login Information
lbits:1 alpa9f AL_PA 0x9F DHD Login Information
lbits:1 alpa9e AL_PA 0x9E DHD Login Information
lbits:1 alpa9d AL_PA 0x9D DHD Login Information
lbits:1 alpa9b AL_PA 0x9B DHD Login Information
lbits:1 alpa98 AL_PA 0x98 DHD Login Information
lbits:1 alpa97 AL_PA 0x97 DHD Login Information
lbits:1 alpa90 AL_PA 0x90 DHD Login Information
lbits:1 alpa8f AL_PA 0x8F DHD Login Information
lbits:1 alpa88 AL_PA 0x88 DHD Login Information
lbits:1 alpa84 AL_PA 0x84 DHD Login Information
lbits:1 alpa82 AL_PA 0x82 DHD Login Information
lbits:1 alpa81 AL_PA 0x81 DHD Login Information
lbits:1 alpa80 AL_PA 0x80 DHD Login Information
lbits:1 alpa7c AL_PA 0x7C DHD Login Information
lbits:1 alpa7a AL_PA 0x7A DHD Login Information
lbits:1 alpa79 AL_PA 0x79 DHD Login Information
lbits:1 alpa76 AL_PA 0x76 DHD Login Information
lbits:1 alpa75 AL_PA 0x75 DHD Login Information
lbits:1 alpa74 AL_PA 0x74 DHD Login Information
lbits:1 alpa73 AL_PA 0x73 DHD Login Information
{}
or dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 6104>
ulong value As longword
endunion dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 6108>
union dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 6108>
{field (By field)}
<byte 6108>
lbits:1 alpa72 AL_PA 0x72 DHD Login Information
lbits:1 alpa71 AL_PA 0x71 DHD Login Information
lbits:1 alpa6e AL_PA 0x6E DHD Login Information
lbits:1 alpa6d AL_PA 0x6D DHD Login Information
lbits:1 alpa6c AL_PA 0x6C DHD Login Information
lbits:1 alpa6b AL_PA 0x6B DHD Login Information
lbits:1 alpa6a AL_PA 0x6A DHD Login Information
lbits:1 alpa69 AL_PA 0x69 DHD Login Information
lbits:1 alpa67 AL_PA 0x67 DHD Login Information
lbits:1 alpa66 AL_PA 0x66 DHD Login Information
lbits:1 alpa65 AL_PA 0x65 DHD Login Information
lbits:1 alpa63 AL_PA 0x63 DHD Login Information
lbits:1 alpa5c AL_PA 0x5C DHD Login Information
lbits:1 alpa5a AL_PA 0x5A DHD Login Information
lbits:1 alpa59 AL_PA 0x59 DHD Login Information
lbits:1 alpa56 AL_PA 0x56 DHD Login Information
lbits:1 alpa55 AL_PA 0x55 DHD Login Information
lbits:1 alpa54 AL_PA 0x54 DHD Login Information
lbits:1 alpa53 AL_PA 0x53 DHD Login Information
lbits:1 alpa52 AL_PA 0x52 DHD Login Information
lbits:1 alpa51 AL_PA 0x51 DHD Login Information
lbits:1 alpa4e AL_PA 0x4E DHD Login Information
lbits:1 alpa4d AL_PA 0x4D DHD Login Information
lbits:1 alpa4c AL_PA 0x4C DHD Login Information
lbits:1 alpa4b AL_PA 0x4B DHD Login Information
lbits:1 alpa4a AL_PA 0x4A DHD Login Information
lbits:1 alpa49 AL_PA 0x49 DHD Login Information
lbits:1 alpa47 AL_PA 0x47 DHD Login Information
lbits:1 alpa46 AL_PA 0x46 DHD Login Information
lbits:1 alpa45 AL_PA 0x45 DHD Login Information
lbits:1 alpa43 AL_PA 0x43 DHD Login Information
lbits:1 alpa3c AL_PA 0x3C DHD Login Information
{}
or dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 6108>
ulong value As longword
endunion dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 6112>
union dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 6112>
{field (By field)}
<byte 6112>
lbits:1 alpa3a AL_PA 0x3A DHD Login Information
lbits:1 alpa39 AL_PA 0x39 DHD Login Information
lbits:1 alpa36 AL_PA 0x36 DHD Login Information
lbits:1 alpa35 AL_PA 0x35 DHD Login Information
lbits:1 alpa34 AL_PA 0x34 DHD Login Information
lbits:1 alpa33 AL_PA 0x33 DHD Login Information
lbits:1 alpa32 AL_PA 0x32 DHD Login Information
lbits:1 alpa31 AL_PA 0x31 DHD Login Information
lbits:1 alpa2e AL_PA 0x2E DHD Login Information
lbits:1 alpa2d AL_PA 0x2D DHD Login Information
lbits:1 alpa2c AL_PA 0x2C DHD Login Information
lbits:1 alpa2b AL_PA 0x2B DHD Login Information
lbits:1 alpa2a AL_PA 0x2A DHD Login Information
lbits:1 alpa29 AL_PA 0x29 DHD Login Information
lbits:1 alpa27 AL_PA 0x27 DHD Login Information
lbits:1 alpa26 AL_PA 0x26 DHD Login Information
lbits:1 alpa25 AL_PA 0x25 DHD Login Information
lbits:1 alpa23 AL_PA 0x23 DHD Login Information
lbits:1 alpa1f AL_PA 0x1F DHD Login Information
lbits:1 alpa1e AL_PA 0x1E DHD Login Information
lbits:1 alpa1d AL_PA 0x1D DHD Login Information
lbits:1 alpa1b AL_PA 0x1B DHD Login Information
lbits:1 alpa18 AL_PA 0x18 DHD Login Information
lbits:1 alpa17 AL_PA 0x17 DHD Login Information
lbits:1 alpa10 AL_PA 0x10 DHD Login Information
lbits:1 alpa0f AL_PA 0x0F DHD Login Information
lbits:1 alpa08 AL_PA 0x08 DHD Login Information
lbits:1 alpa04 AL_PA 0x04 DHD Login Information
lbits:1 alpa02 AL_PA 0x02 DHD Login Information
lbits:1 alpa01 AL_PA 0x01 DHD Login Information
lbits:1 alpa00 AL_PA 0x00 DHD Login Information
lbits:1 reserved Reserved
{}
or dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 6112>
ulong value As longword
endunion dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 6116>
union fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 6116>
{field (By field)}
<byte 6116>
lbits:1 bli Bypass Loop Initialization
lbits:1 reserved Reserved
lbits:1 enp Enable N_Port Mode
lbits:1 lr Login Required
lbits:1 inif Initialize as Fabric
lbits:1 rf Respond to Fabric Address
lbits:1 blm Bypass Loop Map
lbits:1 sa Acquire Soft Address
lbits:1 ha Acquire Hard Address
lbits:1 aq Acquire Previously Acquired Address
lbits:1 fa Acquire Fabric Aquired Address
lbits:1 td Timer Disable
lbits:1 sap Skip Arbitration Phase
lbits:1 elb External Loopback/Pad Loopback
lbits:1 ilb Internal loopback
lbits:1 npi Initialize as N_Port
lbits:8 bb_credit BB_Credit
lbits:8 al_pa Desired AL_PA
{}
or fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 6116>
ulong value As longword
endunion fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 6120>
union fm_control (Offset 1C4) Frame Manager Control
<byte 6120>
{field (By field)}
<byte 6120>
lbits:3 cmd State Machine Command
lbits:1 cl Close Loop Request
lbits:1 ipe Initiate Port Enable
lbits:1 sp Send Prim_Reg
lbits:1 sq Primitive Sequence
lbits:1 sas Start Auto-Speed Negotiation
lbits:24 reserved Reserved
{}
or fm_control (Offset 1C4) Frame Manager Control
<byte 6120>
ulong value As longword
endunion fm_control (Offset 1C4) Frame Manager Control
<byte 6124>
union fm_status (Offset 1C8) Frame Manager Status
<byte 6124>
{field (By field)}
<byte 6124>
lbits:4 psm Port State Machine
lbits:4 lsm Loop State Machine
lbits:1 ldn Link Down
lbits:1 lup Link Up
lbits:1 es Elastic Store Error
lbits:1 ce Credit Error
lbits:1 lf Link Failure
lbits:1 lg Login Required
lbits:1 ptx Primitive Transmitted
lbits:1 prx Primitive Received
lbits:1 ba Bad AL_PA
lbits:1 lpf LIPf
lbits:1 sto State Time-out
lbits:1 ols OLS/NOS Received
lbits:1 lpb Loop Port Bypass (LPB) Primitive Sequence Received
lbits:1 lpe Loop Port Enable (LPE) Primitive Sequence Received
lbits:1 drs Directed LIP Sequence Received
lbits:1 reserved Reserved
lbits:1 ls Loss of Signal
lbits:1 os Out of Synchronization
lbits:1 flt Link Fault
lbits:1 reserved1 Reserved
lbits:1 byp Node Bypassed
lbits:1 np Non-Participating
lbits:1 tp Transmit Parity Error
lbits:1 lp Loop
{}
or fm_status (Offset 1C8) Frame Manager Status
<byte 6124>
ulong value As longword
endunion fm_status (Offset 1C8) Frame Manager Status
<byte 6128>
union fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 6128>
{field (By field)}
<byte 6128>
lbits:16 ed_tov Error Detect Time-Out
lbits:9 rt_tov Receiver Transmitter Time-Out
lbits:7 reserved Reserved
{}
or fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 6128>
ulong value As longword
endunion fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 6132>
union fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 6132>
{field (By field)}
<byte 6132>
lbits:8 link_fail Link Fail Count
lbits:8 loss_of_sync Loss of Synchronization Count
lbits:8 bad_rx_char Bad Received Character Count
lbits:8 loss_of_signal Loss of Signal Count
{}
or fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 6132>
ulong value As longword
endunion fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 6136>
union fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 6136>
{field (By field)}
<byte 6136>
lbits:8 proto_er Protocol Error Count
lbits:8 bad_crc Bad CRC Count
lbits:8 dis_frm Discarded Frames
lbits:8 rx_eofa Received EOFa
{}
or fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 6136>
ulong value As longword
endunion fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 6140>
union fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 6140>
{field (By field)}
<byte 6140>
lbits:9 al_time Arbitrated Loop Time-Out
lbits:7 reserved Reserved
lbits:16 lp_tov Loop Time-Out
{}
or fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 6140>
ulong value As longword
endunion fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 6144>
union fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 6144>
{field (By field)}
<byte 6144>
lbits:24 bb0_timer BB_Credit Timer
lbits:8 reserved Reserved
{}
or fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 6144>
ulong value As longword
endunion fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 6148>
union fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 6148>
{field (By field)}
<byte 6148>
lbits:32 wwn World Wide Name
{}
or fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 6148>
ulong value As longword
endunion fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 6152>
union fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 6152>
{field (By field)}
<byte 6152>
lbits:32 wwn World Wide Name
{}
or fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 6152>
ulong value As longword
endunion fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 6156>
union fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 6156>
{field (By field)}
<byte 6156>
lbits:8 lipf_alpa AL_PA of Most Recent LIPf Received
lbits:8 bad_alpa AL_PA of Most Recent OPN Sent and Returned Without Being Accepted
lbits:8 acq_alpa AL_PA Acquired During Loop Initialization
lbits:8 reserved Reserved
{}
or fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 6156>
ulong value As longword
endunion fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 6160>
union fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 6160>
{field (By field)}
<byte 6160>
lbits:24 prim_value Primitive to be Sent
lbits:8 reserved Reserved
{}
or fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 6160>
ulong value As longword
endunion fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 6164>
union fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 6164>
{field (By field)}
<byte 6164>
lbits:8 exp_frm Expired Frames
lbits:24 reserved Reserved
{}
or fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 6164>
ulong value As longword
endunion fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 6168>
union fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 6168>
{field (By field)}
<byte 6168>
lbits:1 dac Disable Auto Close
lbits:2 nbc Non-zero Login BB_Credit
lbits:1 eei Enable ERR_INIT
lbits:1 icb Ignore Close Bit
lbits:2 atv Arbitration Threshold Value
lbits:1 gde Garbage Deletion Enable
lbits:8 laa Lowest Allowable AL_PA
lbits:8 reserved Reserved
lbits:1 reserved1 Reserved
lbits:1 prm Promiscuous Mode
lbits:1 wpe Wait For Port Enable
lbits:1 fmh Force Monitor State With Hard Address
lbits:1 fmn Force Monitor Non-participating State
lbits:1 dlm Disable Loop Master
lbits:1 dsa Disable Soft Address Selection
lbits:1 ilp Ignore LPB/LPE Primitive Sequences
{}
or fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 6168>
ulong value As longword
endunion fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 6172>
union pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 6172>
{field (By field)}
<byte 6172>
union brstctr PCI Master Burst Count Control
<byte 6172>
{field (By field)}
<byte 6172>
tbits:4 read_burst PCI read burst count
tbits:4 write_burst PCI write burst count
{}
or brstctr PCI Master Burst Count Control
<byte 6172>
utiny value As byte
endunion brstctr PCI Master Burst Count Control
<byte 6173>
union waitctr PCI Master Wait Count Control
<byte 6173>
{field (By field)}
<byte 6173>
tbits:4 read_wait DMA read wait count
tbits:4 write_wait DMA write wait count
{}
or waitctr PCI Master Wait Count Control
<byte 6173>
utiny value As byte
endunion waitctr PCI Master Wait Count Control
<byte 6174>
union romctr PCI ROM Control
<byte 6174>
{field (By field)}
<byte 6174>
tbits:1 vpp_en ROM VPP Enable
tbits:1 fla Flash Installed (read only)
tbits:1 rom ROM Installed (read only)
tbits:1 rm0 RAM 0 (read only); combination of RAM 2, RAM 1, and RAM 0 describe static RAM configuration: 000 - none, 001 - 128KB, 010 - 256KB, 011 - 512KB, 100 - 1MB, 101 - 2MB, 110 - reserved, 111 - reserved
tbits:1 rm1 RAM 1 (read only)
tbits:1 svl Subsystem VID Loaded (read only)
tbits:1 par External memory parity checking enabled (read only)
tbits:1 rm2 RAM 2 (read only)
{}
or romctr PCI ROM Control
<byte 6174>
utiny value As byte
endunion romctr PCI ROM Control
<byte 6175>
union mctr PCI Master Control
<byte 6175>
{field (By field)}
<byte 6175>
tbits:1 ecl Enable MRM and MRL Completion to Cache Line
tbits:1 rrd PCI Memory Read Round Down Enable
tbits:1 p64 PCI Present and Active
tbits:1 rae Memory Read Alignment Enable
tbits:1 wae Memory Write Alignment Enable
tbits:1 rbe PCI Read Burst Counter Enable
tbits:1 wbe PCI Write Burst Counter Enable
tbits:1 dlt Disable Latency Timer
{}
or mctr PCI Master Control
<byte 6175>
utiny value As byte
endunion mctr PCI Master Control
{}
or pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 6172>
ulong value As longword
endunion pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 6176>
union pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
<byte 6176>
{field (By field)}
<byte 6176>
union softrst PCI Interface Reset Control
<byte 6176>
{field (By field)}
<byte 6176>
tbits:1 rst PCI Interface Soft Reset
tbits:1 dpe Reserved (must be zero)
tbits:1 rdd RAM/ROM Read Delayed Transaction Disabled
tbits:1 tad Target Abort Disable
tbits:4 rsvd Reserved (must be zero)
{}
or softrst PCI Interface Reset Control
<byte 6176>
utiny value As byte
endunion softrst PCI Interface Reset Control
<byte 6177>
union intpend PCI Interrupt Pending
<byte 6177>
{field (By field)}
<byte 6177>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or intpend PCI Interrupt Pending
<byte 6177>
utiny value As byte
endunion intpend PCI Interrupt Pending
<byte 6178>
union inten PCI Interrupt Enable
<byte 6178>
{field (By field)}
<byte 6178>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or inten PCI Interrupt Enable
<byte 6178>
utiny value As byte
endunion inten PCI Interrupt Enable
<byte 6179>
union intstat PCI Interrupt Status
<byte 6179>
{field (By field)}
<byte 6179>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or intstat PCI Interrupt Status
<byte 6179>
utiny value As byte
endunion intstat PCI Interrupt Status
{}
or pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
<byte 6176>
ulong value As longword
endunion pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
{}
endunion csr[3] Tachyon XL2 CSR Registers
<byte 6180>
union csr[4] Tachyon XL2 CSR Registers
<byte 6180>
ulong[128] csra Tachyon XL2 CSR Registers As Longwords
or csr[4] Tachyon XL2 CSR Registers
<byte 6180>
{csr (Tachyon XL2 CSR Registers By Field)}
<byte 6180>
union erq_base (Offset 000) ERQ Base (write only)
<byte 6180>
{field (By field)}
<byte 6180>
lbits:32 address ERQ Base Address
{}
or erq_base (Offset 000) ERQ Base (write only)
<byte 6180>
ulong value As longword
endunion erq_base (Offset 000) ERQ Base (write only)
<byte 6184>
union erq_len (Offset 004) ERQ Length (write only)
<byte 6184>
{field (By field)}
<byte 6184>
lbits:12 length ERQ Length
lbits:20 reserved Reserved
{}
or erq_len (Offset 004) ERQ Length (write only)
<byte 6184>
ulong value As longword
endunion erq_len (Offset 004) ERQ Length (write only)
<byte 6188>
union erq_prod (Offset 008) ERQ Producer Index
<byte 6188>
{field (By field)}
<byte 6188>
lbits:12 index ERQ Producer Index
lbits:20 reserved Reserved
{}
or erq_prod (Offset 008) ERQ Producer Index
<byte 6188>
ulong value As longword
endunion erq_prod (Offset 008) ERQ Producer Index
<byte 6192>
union erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 6192>
{field (By field)}
<byte 6192>
lbits:32 address ERQ Consumer Index Address
{}
or erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 6192>
ulong value As longword
endunion erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 6196>
union erq_cons (Offset 010) ERQ Consumer Index
<byte 6196>
{field (By field)}
<byte 6196>
lbits:12 index ERQ Consumer Index
lbits:20 reserved Reserved
{}
or erq_cons (Offset 010) ERQ Consumer Index
<byte 6196>
ulong value As longword
endunion erq_cons (Offset 010) ERQ Consumer Index
<byte 6200>
{rsvd1[0] ((Offset 014-04F) Reserved)}
<byte 6200>
ulong value
{}
<byte 6204>
{rsvd1[1] ((Offset 014-04F) Reserved)}
<byte 6204>
ulong value
{}
<byte 6208>
{rsvd1[2] ((Offset 014-04F) Reserved)}
<byte 6208>
ulong value
{}
<byte 6212>
{rsvd1[3] ((Offset 014-04F) Reserved)}
<byte 6212>
ulong value
{}
<byte 6216>
{rsvd1[4] ((Offset 014-04F) Reserved)}
<byte 6216>
ulong value
{}
<byte 6220>
{rsvd1[5] ((Offset 014-04F) Reserved)}
<byte 6220>
ulong value
{}
<byte 6224>
{rsvd1[6] ((Offset 014-04F) Reserved)}
<byte 6224>
ulong value
{}
<byte 6228>
{rsvd1[7] ((Offset 014-04F) Reserved)}
<byte 6228>
ulong value
{}
<byte 6232>
{rsvd1[8] ((Offset 014-04F) Reserved)}
<byte 6232>
ulong value
{}
<byte 6236>
{rsvd1[9] ((Offset 014-04F) Reserved)}
<byte 6236>
ulong value
{}
<byte 6240>
{rsvd1[10] ((Offset 014-04F) Reserved)}
<byte 6240>
ulong value
{}
<byte 6244>
{rsvd1[11] ((Offset 014-04F) Reserved)}
<byte 6244>
ulong value
{}
<byte 6248>
{rsvd1[12] ((Offset 014-04F) Reserved)}
<byte 6248>
ulong value
{}
<byte 6252>
{rsvd1[13] ((Offset 014-04F) Reserved)}
<byte 6252>
ulong value
{}
<byte 6256>
{rsvd1[14] ((Offset 014-04F) Reserved)}
<byte 6256>
ulong value
{}
<byte 6260>
union sfq_base (Offset 050) SFQ Base (write only)
<byte 6260>
{field (By field)}
<byte 6260>
lbits:32 address SFQ Base Address
{}
or sfq_base (Offset 050) SFQ Base (write only)
<byte 6260>
ulong value As longword
endunion sfq_base (Offset 050) SFQ Base (write only)
<byte 6264>
union sfq_len (Offset 054) SFQ Length (write only)
<byte 6264>
{field (By field)}
<byte 6264>
lbits:12 length SFQ Length
lbits:20 reserved Reserved
{}
or sfq_len (Offset 054) SFQ Length (write only)
<byte 6264>
ulong value As longword
endunion sfq_len (Offset 054) SFQ Length (write only)
<byte 6268>
union sfq_cons (Offset 058) SFQ Consumer Index
<byte 6268>
{field (By field)}
<byte 6268>
lbits:12 index SFQ Consumer Index
lbits:20 reserved Reserved
{}
or sfq_cons (Offset 058) SFQ Consumer Index
<byte 6268>
ulong value As longword
endunion sfq_cons (Offset 058) SFQ Consumer Index
<byte 6272>
{rsvd2[0] ((Offset 05C-07B) Reserved)}
<byte 6272>
ulong value
{}
<byte 6276>
{rsvd2[1] ((Offset 05C-07B) Reserved)}
<byte 6276>
ulong value
{}
<byte 6280>
{rsvd2[2] ((Offset 05C-07B) Reserved)}
<byte 6280>
ulong value
{}
<byte 6284>
{rsvd2[3] ((Offset 05C-07B) Reserved)}
<byte 6284>
ulong value
{}
<byte 6288>
{rsvd2[4] ((Offset 05C-07B) Reserved)}
<byte 6288>
ulong value
{}
<byte 6292>
{rsvd2[5] ((Offset 05C-07B) Reserved)}
<byte 6292>
ulong value
{}
<byte 6296>
{rsvd2[6] ((Offset 05C-07B) Reserved)}
<byte 6296>
ulong value
{}
<byte 6300>
{rsvd2[7] ((Offset 05C-07B) Reserved)}
<byte 6300>
ulong value
{}
<byte 6304>
union int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 6304>
{field (By field)}
<byte 6304>
lbits:4 timer Interrupt Timer Value
lbits:3 reserved Reserved
lbits:1 ihf Interrupt when IMQ Half Full
lbits:24 reserved1 Reserved
{}
or int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 6304>
ulong value As longword
endunion int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 6308>
union imq_base (Offset 080) IMQ Base (write only)
<byte 6308>
{field (By field)}
<byte 6308>
lbits:32 address IMQ Base Address
{}
or imq_base (Offset 080) IMQ Base (write only)
<byte 6308>
ulong value As longword
endunion imq_base (Offset 080) IMQ Base (write only)
<byte 6312>
union imq_len (Offset 084) IMQ Length (write only)
<byte 6312>
{field (By field)}
<byte 6312>
lbits:12 length IMQ Length
lbits:20 reserved Reserved
{}
or imq_len (Offset 084) IMQ Length (write only)
<byte 6312>
ulong value As longword
endunion imq_len (Offset 084) IMQ Length (write only)
<byte 6316>
union imq_cons (Offset 088) IMQ Consumer Index
<byte 6316>
{field (By field)}
<byte 6316>
lbits:12 index IMQ Consumer Index
lbits:20 reserved Reserved
{}
or imq_cons (Offset 088) IMQ Consumer Index
<byte 6316>
ulong value As longword
endunion imq_cons (Offset 088) IMQ Consumer Index
<byte 6320>
union imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 6320>
{field (By field)}
<byte 6320>
lbits:32 address IMQ Producer Index Address
{}
or imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 6320>
ulong value As longword
endunion imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 6324>
{rsvd3[0] ((Offset 090-0FC) Reserved)}
<byte 6324>
ulong value
{}
<byte 6328>
{rsvd3[1] ((Offset 090-0FC) Reserved)}
<byte 6328>
ulong value
{}
<byte 6332>
{rsvd3[2] ((Offset 090-0FC) Reserved)}
<byte 6332>
ulong value
{}
<byte 6336>
{rsvd3[3] ((Offset 090-0FC) Reserved)}
<byte 6336>
ulong value
{}
<byte 6340>
{rsvd3[4] ((Offset 090-0FC) Reserved)}
<byte 6340>
ulong value
{}
<byte 6344>
{rsvd3[5] ((Offset 090-0FC) Reserved)}
<byte 6344>
ulong value
{}
<byte 6348>
{rsvd3[6] ((Offset 090-0FC) Reserved)}
<byte 6348>
ulong value
{}
<byte 6352>
{rsvd3[7] ((Offset 090-0FC) Reserved)}
<byte 6352>
ulong value
{}
<byte 6356>
{rsvd3[8] ((Offset 090-0FC) Reserved)}
<byte 6356>
ulong value
{}
<byte 6360>
{rsvd3[9] ((Offset 090-0FC) Reserved)}
<byte 6360>
ulong value
{}
<byte 6364>
{rsvd3[10] ((Offset 090-0FC) Reserved)}
<byte 6364>
ulong value
{}
<byte 6368>
{rsvd3[11] ((Offset 090-0FC) Reserved)}
<byte 6368>
ulong value
{}
<byte 6372>
{rsvd3[12] ((Offset 090-0FC) Reserved)}
<byte 6372>
ulong value
{}
<byte 6376>
{rsvd3[13] ((Offset 090-0FC) Reserved)}
<byte 6376>
ulong value
{}
<byte 6380>
{rsvd3[14] ((Offset 090-0FC) Reserved)}
<byte 6380>
ulong value
{}
<byte 6384>
{rsvd3[15] ((Offset 090-0FC) Reserved)}
<byte 6384>
ulong value
{}
<byte 6388>
{rsvd3[16] ((Offset 090-0FC) Reserved)}
<byte 6388>
ulong value
{}
<byte 6392>
{rsvd3[17] ((Offset 090-0FC) Reserved)}
<byte 6392>
ulong value
{}
<byte 6396>
{rsvd3[18] ((Offset 090-0FC) Reserved)}
<byte 6396>
ulong value
{}
<byte 6400>
{rsvd3[19] ((Offset 090-0FC) Reserved)}
<byte 6400>
ulong value
{}
<byte 6404>
{rsvd3[20] ((Offset 090-0FC) Reserved)}
<byte 6404>
ulong value
{}
<byte 6408>
{rsvd3[21] ((Offset 090-0FC) Reserved)}
<byte 6408>
ulong value
{}
<byte 6412>
{rsvd3[22] ((Offset 090-0FC) Reserved)}
<byte 6412>
ulong value
{}
<byte 6416>
{rsvd3[23] ((Offset 090-0FC) Reserved)}
<byte 6416>
ulong value
{}
<byte 6420>
{rsvd3[24] ((Offset 090-0FC) Reserved)}
<byte 6420>
ulong value
{}
<byte 6424>
{rsvd3[25] ((Offset 090-0FC) Reserved)}
<byte 6424>
ulong value
{}
<byte 6428>
{rsvd3[26] ((Offset 090-0FC) Reserved)}
<byte 6428>
ulong value
{}
<byte 6432>
{rsvd3[27] ((Offset 090-0FC) Reserved)}
<byte 6432>
ulong value
{}
<byte 6436>
union fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 6436>
{field (By field)}
<byte 6436>
lbits:1 x50 50 Ohms Termination Enable
lbits:2 xtr Termination Receive
lbits:2 xtt Termination Transmit
lbits:3 xta Transmitter Amplitude
lbits:1 xwb Wrapback
lbits:1 reserved Reserved
lbits:1 txo Transmitter Off
lbits:1 reserved1 Reserved
lbits:1 xlp Loopback
lbits:2 xem Output Emphasis
lbits:1 reserved2 Reserved
lbits:2 xrz Receiver Zero Adjust
lbits:2 xrp Receiver Pole Adjust
lbits:2 xtz Transmitter Zero Adjust
lbits:2 xtp Transmitter Pole Adjust
lbits:2 rxs Receiver Speed
lbits:2 txs Transmitter Speed
lbits:1 ean Enable Auto Speed Negotiation
lbits:1 xlr Force iTR to lock reference clock
lbits:1 asp Auto Speed Negotiation in Progress
lbits:1 xcv Type of Transceiver
{}
or fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 6436>
ulong value As longword
endunion fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 6440>
union fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 6440>
{field (By field)}
<byte 6440>
lbits:4 psm Port State Machine
lbits:4 lsm Loop State Machine
lbits:1 ldn Link Down
lbits:1 lup Link Up
lbits:1 es Elastic Store Error
lbits:1 ce Credit Error
lbits:1 lf Link Failure
lbits:1 lg Login Required
lbits:1 ptx Primitive Transmitted
lbits:1 prx Primitive Received
lbits:1 ba Bad AL_PA
lbits:1 lpf LIPf
lbits:1 sto State Time-out
lbits:1 ols OLS/NOS Received
lbits:1 lpb Loop Port Bypass (LPB) Primitive Sequence Received
lbits:1 lpe Loop Port Enable (LPE) Primitive Sequence Received
lbits:1 drs Directed LIP Sequence Received
lbits:1 reserved Reserved
lbits:1 ls Loss of Signal
lbits:1 os Out of Synchronization
lbits:1 flt Link Fault
lbits:1 reserved1 Reserved
lbits:1 byp Node Bypassed
lbits:1 np Non-Participating
lbits:1 tp Transmit Parity Error
lbits:1 lp Loop
{}
or fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 6440>
ulong value As longword
endunion fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 6444>
{rsvd3a[0] ((Offset 108-13F) Reserved)}
<byte 6444>
ulong value
{}
<byte 6448>
{rsvd3a[1] ((Offset 108-13F) Reserved)}
<byte 6448>
ulong value
{}
<byte 6452>
{rsvd3a[2] ((Offset 108-13F) Reserved)}
<byte 6452>
ulong value
{}
<byte 6456>
{rsvd3a[3] ((Offset 108-13F) Reserved)}
<byte 6456>
ulong value
{}
<byte 6460>
{rsvd3a[4] ((Offset 108-13F) Reserved)}
<byte 6460>
ulong value
{}
<byte 6464>
{rsvd3a[5] ((Offset 108-13F) Reserved)}
<byte 6464>
ulong value
{}
<byte 6468>
{rsvd3a[6] ((Offset 108-13F) Reserved)}
<byte 6468>
ulong value
{}
<byte 6472>
{rsvd3a[7] ((Offset 108-13F) Reserved)}
<byte 6472>
ulong value
{}
<byte 6476>
{rsvd3a[8] ((Offset 108-13F) Reserved)}
<byte 6476>
ulong value
{}
<byte 6480>
{rsvd3a[9] ((Offset 108-13F) Reserved)}
<byte 6480>
ulong value
{}
<byte 6484>
{rsvd3a[10] ((Offset 108-13F) Reserved)}
<byte 6484>
ulong value
{}
<byte 6488>
{rsvd3a[11] ((Offset 108-13F) Reserved)}
<byte 6488>
ulong value
{}
<byte 6492>
{rsvd3a[12] ((Offset 108-13F) Reserved)}
<byte 6492>
ulong value
{}
<byte 6496>
{rsvd3a[13] ((Offset 108-13F) Reserved)}
<byte 6496>
ulong value
{}
<byte 6500>
union sest_base (Offset 140) SEST Base (write only)
<byte 6500>
{field (By field)}
<byte 6500>
lbits:32 address SEST Base Address
{}
or sest_base (Offset 140) SEST Base (write only)
<byte 6500>
ulong value As longword
endunion sest_base (Offset 140) SEST Base (write only)
<byte 6504>
union sest_len (Offset 144) SEST Length (write only)
<byte 6504>
{field (By field)}
<byte 6504>
lbits:16 length SEST Length
lbits:16 reserved Reserved
{}
or sest_len (Offset 144) SEST Length (write only)
<byte 6504>
ulong value As longword
endunion sest_len (Offset 144) SEST Length (write only)
<byte 6508>
{rsvd4 ((Offset 148) Reserved)}
<byte 6508>
ulong value
{}
<byte 6512>
union scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 6512>
{field (By field)}
<byte 6512>
lbits:16 tail Tail
lbits:16 head Head
{}
or scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 6512>
ulong value As longword
endunion scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 6516>
union spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 6516>
{field (By field)}
<byte 6516>
lbits:1 sra SPI SRAM Access
lbits:10 rsvd Reserved
lbits:21 address RAM/ROM Address
{}
or spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 6516>
ulong value As longword
endunion spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 6520>
union spidata (Offset 154) SPI RAM/ROM Data
<byte 6520>
union field By field
<byte 6520>
{ram (By field)}
<byte 6520>
lbits:32 data RAM data
{}
or field By field
<byte 6520>
{rom (By field)}
<byte 6520>
lbits:8 data ROM data
lbits:24 rsvd Reserved
{}
endunion field By field
or spidata (Offset 154) SPI RAM/ROM Data
<byte 6520>
ulong value As longword
endunion spidata (Offset 154) SPI RAM/ROM Data
<byte 6524>
{rsvd5[0] ((Offset 158-15C) Reserved)}
<byte 6524>
ulong value
{}
<byte 6528>
{rsvd5[1] ((Offset 158-15C) Reserved)}
<byte 6528>
ulong value
{}
<byte 6532>
union int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 6532>
{field (By field)}
<byte 6532>
lbits:32 address Interrupt Message Address
{}
or int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 6532>
ulong value As longword
endunion int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 6536>
union int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 6536>
{field (By field)}
<byte 6536>
lbits:32 value Interrupt Message Value
{}
or int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 6536>
ulong value As longword
endunion int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 6540>
union sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 6540>
{field (By field)}
<byte 6540>
lbits:8 length SGL Page Length
lbits:24 reserved Reserved
{}
or sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 6540>
ulong value As longword
endunion sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 6544>
union my_id (Offset 16C) My ID
<byte 6544>
{field (By field)}
<byte 6544>
lbits:24 id My ID
lbits:8 reserved Reserved
{}
or my_id (Offset 16C) My ID
<byte 6544>
ulong value As longword
endunion my_id (Offset 16C) My ID
<byte 6548>
union gpio (Offset 170) General Purpose I/O
<byte 6548>
{field (By field)}
<byte 6548>
lbits:1 gc0 General Purpose Control 0
lbits:1 gc1 General Purpose Control 1
lbits:1 gc2 General Purpose Control 2
lbits:1 gc3 General Purpose Control 3
lbits:1 gc4 General Purpose Control 4
lbits:1 gc5 General Purpose Control 5
lbits:1 gc6 General Purpose Control 6
lbits:1 gc7 General Purpose Control 7
lbits:8 reserved Reserved
lbits:1 gp0 General Purpose I/O 0
lbits:1 gp1 General Purpose I/O 1
lbits:1 gp2 General Purpose I/O 2
lbits:1 gp3 General Purpose I/O 3
lbits:1 gp4 General Purpose Input 4
lbits:1 gp5 General Purpose I/O 5
lbits:1 gp6 General Purpose I/O 6
lbits:1 gp7 General Purpose I/O 7
lbits:8 reserved1 Reserved
{}
or gpio (Offset 170) General Purpose I/O
<byte 6548>
ulong value As longword
endunion gpio (Offset 170) General Purpose I/O
<byte 6552>
{rsvd6[0] ((Offset 174-17F) Reserved)}
<byte 6552>
ulong value
{}
<byte 6556>
{rsvd6[1] ((Offset 174-17F) Reserved)}
<byte 6556>
ulong value
{}
<byte 6560>
{rsvd6[2] ((Offset 174-17F) Reserved)}
<byte 6560>
ulong value
{}
<byte 6564>
union tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 6564>
{field (By field)}
<byte 6564>
lbits:9 pfs Programmable Frame Size
lbits:15 reserved Reserved
lbits:8 esi_range Exchange_ID Signaled Interrupt Range
{}
or tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 6564>
ulong value As longword
endunion tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 6568>
union tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 6568>
{field (By field)}
<byte 6568>
lbits:1 fad FCP Assist Disable
lbits:1 ino In Order
lbits:1 dof Discard OOO FCP Frames
lbits:1 fua FCP Unassisted ACK Enable
lbits:1 ime Interrupt Message Enable
lbits:1 fab Fabric
lbits:1 sic S_ID Copy Enable
lbits:1 eqs Equal Service
lbits:1 reserved Reserved
lbits:1 cae Concurrent Access Enable
lbits:14 reserved1 Reserved
lbits:1 fc2 FCP Class 2 Reassembly Enable
lbits:1 reserved2 Reserved
lbits:1 sdf Save Discarded Frames
lbits:1 rde Response Detect Enable
lbits:1 dam Default ACK Model
lbits:3 reserved3 Reserved
{}
or tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 6568>
ulong value As longword
endunion tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 6572>
union tach_control (Offset 188) Tachyon XL2 Control
<byte 6572>
{field (By field)}
<byte 6572>
lbits:1 gc0 General Purpose Control 0
lbits:1 gc1 General Purpose Control 1
lbits:1 gc2 General Purpose Control 2
lbits:1 gc3 General Purpose Control 3
lbits:1 gc4 General Purpose Control 4
lbits:3 reserved Reserved
lbits:1 feq Freeze ERQ
lbits:1 ffa Freeze FCP Assists
lbits:2 reserved1 Reserved
lbits:1 fis Freeze Inbound FCP Assists When Frame Placed in SFQ
lbits:1 fib Freeze Inbound FCP Assists
lbits:2 reserved2 Reserved
lbits:1 req Resume ERQ
lbits:1 rif Resume Inbound FCP Assists
lbits:1 rof Resume Outbound FCP Assists
lbits:12 reserved3 Reserved
lbits:1 crs Core Reset
{}
or tach_control (Offset 188) Tachyon XL2 Control
<byte 6572>
ulong value As longword
endunion tach_control (Offset 188) Tachyon XL2 Control
<byte 6576>
union tach_status (Offset 18C) Tachyon XL2 Status
<byte 6576>
{field (By field)}
<byte 6576>
lbits:1 gp0 General Purpose I/O 0
lbits:1 gp1 General Purpose I/O 1
lbits:1 gp2 General Purpose I/O 2
lbits:1 gp3 General Purpose I/O 3
lbits:1 gp4 General Purpose Input 4
lbits:5 revid Device Revision ID
lbits:1 ipe Inbound Parity Error
lbits:1 ope Outbound Parity Error
lbits:4 reserved Reserved
lbits:1 eqf ERQ Frozen
lbits:1 iff Inbound FCP Assists Frozen
lbits:1 off Outbound FCP Assists Frozen
lbits:6 reserved1 Reserved
lbits:1 m66 66 Mhz Enabled
lbits:1 ile Inbound Link Control FIFO Empty
lbits:1 ole Outbound Link Control List Empty
lbits:1 ife Inbound FIFO Empty
lbits:1 ofe Outbound FIFO Empty
lbits:1 imf IMQ Full
lbits:1 ssf SFQ Full
{}
or tach_status (Offset 18C) Tachyon XL2 Status
<byte 6576>
ulong value As longword
endunion tach_status (Offset 18C) Tachyon XL2 Status
<byte 6580>
{rsvd7 ((Offset 190) Reserved)}
<byte 6580>
ulong value
{}
<byte 6584>
union hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 6584>
{field (By field)}
<byte 6584>
lbits:12 length Frame Length
lbits:7 reserved Reserved
lbits:12 upper_addr Frame Upper Address
lbits:1 reserved1 Reserved
{}
or hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 6584>
ulong value As longword
endunion hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 6588>
union hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 6588>
{field (By field)}
<byte 6588>
lbits:12 length Frame Length
lbits:7 reserved Reserved
lbits:12 upper_addr Frame Upper Address
lbits:1 reserved1 Reserved
{}
or hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 6588>
ulong value As longword
endunion hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 6592>
union inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 6592>
{field (By field)}
<byte 6592>
lbits:24 reserved Reserved
lbits:8 sest_lru_count SEST LRU Count
{}
or inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 6592>
ulong value As longword
endunion inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 6596>
union inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 6596>
{field (By field)}
<byte 6596>
lbits:8 discd_frames Discarded Frame Count
lbits:24 reserved Reserved
{}
or inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 6596>
ulong value As longword
endunion inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 6600>
union ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 6600>
{field (By field)}
<byte 6600>
lbits:28 threshold EE_Credit Zero Timer Threshold
lbits:4 reserved Reserved
{}
or ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 6600>
ulong value As longword
endunion ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 6604>
union up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 6604>
{field (By field)}
<byte 6604>
lbits:13 reserved Reserved
lbits:19 upper_addr Upper Data Address
{}
or up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 6604>
ulong value As longword
endunion up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 6608>
union up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 6608>
{field (By field)}
<byte 6608>
lbits:32 upper_addr Upper Control Address
{}
or up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 6608>
ulong value As longword
endunion up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 6612>
union dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 6612>
{field (By field)}
<byte 6612>
lbits:1 ef AL_PA 0xEF DHD Login Information
lbits:1 e8 AL_PA 0xE8 DHD Login Information
lbits:1 e4 AL_PA 0xE4 DHD Login Information
lbits:1 e2 AL_PA 0xE2 DHD Login Information
lbits:1 e1 AL_PA 0xE1 DHD Login Information
lbits:1 e0 AL_PA 0xE0 DHD Login Information
lbits:1 dc AL_PA 0xDC DHD Login Information
lbits:1 da AL_PA 0xDA DHD Login Information
lbits:1 d9 AL_PA 0xD9 DHD Login Information
lbits:1 d6 AL_PA 0xD6 DHD Login Information
lbits:1 d5 AL_PA 0xD5 DHD Login Information
lbits:1 d4 AL_PA 0xD4 DHD Login Information
lbits:1 d3 AL_PA 0xD3 DHD Login Information
lbits:1 d2 AL_PA 0xD2 DHD Login Information
lbits:1 d1 AL_PA 0xD1 DHD Login Information
lbits:1 ce AL_PA 0xCE DHD Login Information
lbits:1 cd AL_PA 0xCD DHD Login Information
lbits:1 cc AL_PA 0xCC DHD Login Information
lbits:1 cb AL_PA 0xCB DHD Login Information
lbits:1 ca AL_PA 0xCA DHD Login Information
lbits:1 c9 AL_PA 0xC9 DHD Login Information
lbits:1 c7 AL_PA 0xC7 DHD Login Information
lbits:1 c6 AL_PA 0xC6 DHD Login Information
lbits:1 c5 AL_PA 0xC5 DHD Login Information
lbits:1 c3 AL_PA 0xC3 DHD Login Information
lbits:1 bc AL_PA 0xBC DHD Login Information
lbits:1 ba AL_PA 0xBA DHD Login Information
lbits:1 b9 AL_PA 0xB9 DHD Login Information
lbits:1 b6 AL_PA 0xB6 DHD Login Information
lbits:1 b5 AL_PA 0xB5 DHD Login Information
lbits:1 b4 AL_PA 0xB4 DHD Login Information
lbits:1 b3 AL_PA 0xB3 DHD Login Information
{}
or dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 6612>
ulong value As longword
endunion dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 6616>
union dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 6616>
{field (By field)}
<byte 6616>
lbits:1 alpab2 AL_PA 0xB2 DHD Login Information
lbits:1 alpab1 AL_PA 0xB1 DHD Login Information
lbits:1 alpaae AL_PA 0xAE DHD Login Information
lbits:1 alpaad AL_PA 0xAD DHD Login Information
lbits:1 alpaac AL_PA 0xAC DHD Login Information
lbits:1 alpaab AL_PA 0xAB DHD Login Information
lbits:1 alpaaa AL_PA 0xAA DHD Login Information
lbits:1 alpaa9 AL_PA 0xA9 DHD Login Information
lbits:1 alpaa7 AL_PA 0xA7 DHD Login Information
lbits:1 alpaa6 AL_PA 0xA6 DHD Login Information
lbits:1 alpaa5 AL_PA 0xA5 DHD Login Information
lbits:1 alpaa3 AL_PA 0xA3 DHD Login Information
lbits:1 alpa9f AL_PA 0x9F DHD Login Information
lbits:1 alpa9e AL_PA 0x9E DHD Login Information
lbits:1 alpa9d AL_PA 0x9D DHD Login Information
lbits:1 alpa9b AL_PA 0x9B DHD Login Information
lbits:1 alpa98 AL_PA 0x98 DHD Login Information
lbits:1 alpa97 AL_PA 0x97 DHD Login Information
lbits:1 alpa90 AL_PA 0x90 DHD Login Information
lbits:1 alpa8f AL_PA 0x8F DHD Login Information
lbits:1 alpa88 AL_PA 0x88 DHD Login Information
lbits:1 alpa84 AL_PA 0x84 DHD Login Information
lbits:1 alpa82 AL_PA 0x82 DHD Login Information
lbits:1 alpa81 AL_PA 0x81 DHD Login Information
lbits:1 alpa80 AL_PA 0x80 DHD Login Information
lbits:1 alpa7c AL_PA 0x7C DHD Login Information
lbits:1 alpa7a AL_PA 0x7A DHD Login Information
lbits:1 alpa79 AL_PA 0x79 DHD Login Information
lbits:1 alpa76 AL_PA 0x76 DHD Login Information
lbits:1 alpa75 AL_PA 0x75 DHD Login Information
lbits:1 alpa74 AL_PA 0x74 DHD Login Information
lbits:1 alpa73 AL_PA 0x73 DHD Login Information
{}
or dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 6616>
ulong value As longword
endunion dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 6620>
union dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 6620>
{field (By field)}
<byte 6620>
lbits:1 alpa72 AL_PA 0x72 DHD Login Information
lbits:1 alpa71 AL_PA 0x71 DHD Login Information
lbits:1 alpa6e AL_PA 0x6E DHD Login Information
lbits:1 alpa6d AL_PA 0x6D DHD Login Information
lbits:1 alpa6c AL_PA 0x6C DHD Login Information
lbits:1 alpa6b AL_PA 0x6B DHD Login Information
lbits:1 alpa6a AL_PA 0x6A DHD Login Information
lbits:1 alpa69 AL_PA 0x69 DHD Login Information
lbits:1 alpa67 AL_PA 0x67 DHD Login Information
lbits:1 alpa66 AL_PA 0x66 DHD Login Information
lbits:1 alpa65 AL_PA 0x65 DHD Login Information
lbits:1 alpa63 AL_PA 0x63 DHD Login Information
lbits:1 alpa5c AL_PA 0x5C DHD Login Information
lbits:1 alpa5a AL_PA 0x5A DHD Login Information
lbits:1 alpa59 AL_PA 0x59 DHD Login Information
lbits:1 alpa56 AL_PA 0x56 DHD Login Information
lbits:1 alpa55 AL_PA 0x55 DHD Login Information
lbits:1 alpa54 AL_PA 0x54 DHD Login Information
lbits:1 alpa53 AL_PA 0x53 DHD Login Information
lbits:1 alpa52 AL_PA 0x52 DHD Login Information
lbits:1 alpa51 AL_PA 0x51 DHD Login Information
lbits:1 alpa4e AL_PA 0x4E DHD Login Information
lbits:1 alpa4d AL_PA 0x4D DHD Login Information
lbits:1 alpa4c AL_PA 0x4C DHD Login Information
lbits:1 alpa4b AL_PA 0x4B DHD Login Information
lbits:1 alpa4a AL_PA 0x4A DHD Login Information
lbits:1 alpa49 AL_PA 0x49 DHD Login Information
lbits:1 alpa47 AL_PA 0x47 DHD Login Information
lbits:1 alpa46 AL_PA 0x46 DHD Login Information
lbits:1 alpa45 AL_PA 0x45 DHD Login Information
lbits:1 alpa43 AL_PA 0x43 DHD Login Information
lbits:1 alpa3c AL_PA 0x3C DHD Login Information
{}
or dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 6620>
ulong value As longword
endunion dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 6624>
union dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 6624>
{field (By field)}
<byte 6624>
lbits:1 alpa3a AL_PA 0x3A DHD Login Information
lbits:1 alpa39 AL_PA 0x39 DHD Login Information
lbits:1 alpa36 AL_PA 0x36 DHD Login Information
lbits:1 alpa35 AL_PA 0x35 DHD Login Information
lbits:1 alpa34 AL_PA 0x34 DHD Login Information
lbits:1 alpa33 AL_PA 0x33 DHD Login Information
lbits:1 alpa32 AL_PA 0x32 DHD Login Information
lbits:1 alpa31 AL_PA 0x31 DHD Login Information
lbits:1 alpa2e AL_PA 0x2E DHD Login Information
lbits:1 alpa2d AL_PA 0x2D DHD Login Information
lbits:1 alpa2c AL_PA 0x2C DHD Login Information
lbits:1 alpa2b AL_PA 0x2B DHD Login Information
lbits:1 alpa2a AL_PA 0x2A DHD Login Information
lbits:1 alpa29 AL_PA 0x29 DHD Login Information
lbits:1 alpa27 AL_PA 0x27 DHD Login Information
lbits:1 alpa26 AL_PA 0x26 DHD Login Information
lbits:1 alpa25 AL_PA 0x25 DHD Login Information
lbits:1 alpa23 AL_PA 0x23 DHD Login Information
lbits:1 alpa1f AL_PA 0x1F DHD Login Information
lbits:1 alpa1e AL_PA 0x1E DHD Login Information
lbits:1 alpa1d AL_PA 0x1D DHD Login Information
lbits:1 alpa1b AL_PA 0x1B DHD Login Information
lbits:1 alpa18 AL_PA 0x18 DHD Login Information
lbits:1 alpa17 AL_PA 0x17 DHD Login Information
lbits:1 alpa10 AL_PA 0x10 DHD Login Information
lbits:1 alpa0f AL_PA 0x0F DHD Login Information
lbits:1 alpa08 AL_PA 0x08 DHD Login Information
lbits:1 alpa04 AL_PA 0x04 DHD Login Information
lbits:1 alpa02 AL_PA 0x02 DHD Login Information
lbits:1 alpa01 AL_PA 0x01 DHD Login Information
lbits:1 alpa00 AL_PA 0x00 DHD Login Information
lbits:1 reserved Reserved
{}
or dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 6624>
ulong value As longword
endunion dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 6628>
union fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 6628>
{field (By field)}
<byte 6628>
lbits:1 bli Bypass Loop Initialization
lbits:1 reserved Reserved
lbits:1 enp Enable N_Port Mode
lbits:1 lr Login Required
lbits:1 inif Initialize as Fabric
lbits:1 rf Respond to Fabric Address
lbits:1 blm Bypass Loop Map
lbits:1 sa Acquire Soft Address
lbits:1 ha Acquire Hard Address
lbits:1 aq Acquire Previously Acquired Address
lbits:1 fa Acquire Fabric Aquired Address
lbits:1 td Timer Disable
lbits:1 sap Skip Arbitration Phase
lbits:1 elb External Loopback/Pad Loopback
lbits:1 ilb Internal loopback
lbits:1 npi Initialize as N_Port
lbits:8 bb_credit BB_Credit
lbits:8 al_pa Desired AL_PA
{}
or fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 6628>
ulong value As longword
endunion fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 6632>
union fm_control (Offset 1C4) Frame Manager Control
<byte 6632>
{field (By field)}
<byte 6632>
lbits:3 cmd State Machine Command
lbits:1 cl Close Loop Request
lbits:1 ipe Initiate Port Enable
lbits:1 sp Send Prim_Reg
lbits:1 sq Primitive Sequence
lbits:1 sas Start Auto-Speed Negotiation
lbits:24 reserved Reserved
{}
or fm_control (Offset 1C4) Frame Manager Control
<byte 6632>
ulong value As longword
endunion fm_control (Offset 1C4) Frame Manager Control
<byte 6636>
union fm_status (Offset 1C8) Frame Manager Status
<byte 6636>
{field (By field)}
<byte 6636>
lbits:4 psm Port State Machine
lbits:4 lsm Loop State Machine
lbits:1 ldn Link Down
lbits:1 lup Link Up
lbits:1 es Elastic Store Error
lbits:1 ce Credit Error
lbits:1 lf Link Failure
lbits:1 lg Login Required
lbits:1 ptx Primitive Transmitted
lbits:1 prx Primitive Received
lbits:1 ba Bad AL_PA
lbits:1 lpf LIPf
lbits:1 sto State Time-out
lbits:1 ols OLS/NOS Received
lbits:1 lpb Loop Port Bypass (LPB) Primitive Sequence Received
lbits:1 lpe Loop Port Enable (LPE) Primitive Sequence Received
lbits:1 drs Directed LIP Sequence Received
lbits:1 reserved Reserved
lbits:1 ls Loss of Signal
lbits:1 os Out of Synchronization
lbits:1 flt Link Fault
lbits:1 reserved1 Reserved
lbits:1 byp Node Bypassed
lbits:1 np Non-Participating
lbits:1 tp Transmit Parity Error
lbits:1 lp Loop
{}
or fm_status (Offset 1C8) Frame Manager Status
<byte 6636>
ulong value As longword
endunion fm_status (Offset 1C8) Frame Manager Status
<byte 6640>
union fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 6640>
{field (By field)}
<byte 6640>
lbits:16 ed_tov Error Detect Time-Out
lbits:9 rt_tov Receiver Transmitter Time-Out
lbits:7 reserved Reserved
{}
or fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 6640>
ulong value As longword
endunion fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 6644>
union fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 6644>
{field (By field)}
<byte 6644>
lbits:8 link_fail Link Fail Count
lbits:8 loss_of_sync Loss of Synchronization Count
lbits:8 bad_rx_char Bad Received Character Count
lbits:8 loss_of_signal Loss of Signal Count
{}
or fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 6644>
ulong value As longword
endunion fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 6648>
union fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 6648>
{field (By field)}
<byte 6648>
lbits:8 proto_er Protocol Error Count
lbits:8 bad_crc Bad CRC Count
lbits:8 dis_frm Discarded Frames
lbits:8 rx_eofa Received EOFa
{}
or fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 6648>
ulong value As longword
endunion fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 6652>
union fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 6652>
{field (By field)}
<byte 6652>
lbits:9 al_time Arbitrated Loop Time-Out
lbits:7 reserved Reserved
lbits:16 lp_tov Loop Time-Out
{}
or fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 6652>
ulong value As longword
endunion fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 6656>
union fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 6656>
{field (By field)}
<byte 6656>
lbits:24 bb0_timer BB_Credit Timer
lbits:8 reserved Reserved
{}
or fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 6656>
ulong value As longword
endunion fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 6660>
union fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 6660>
{field (By field)}
<byte 6660>
lbits:32 wwn World Wide Name
{}
or fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 6660>
ulong value As longword
endunion fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 6664>
union fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 6664>
{field (By field)}
<byte 6664>
lbits:32 wwn World Wide Name
{}
or fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 6664>
ulong value As longword
endunion fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 6668>
union fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 6668>
{field (By field)}
<byte 6668>
lbits:8 lipf_alpa AL_PA of Most Recent LIPf Received
lbits:8 bad_alpa AL_PA of Most Recent OPN Sent and Returned Without Being Accepted
lbits:8 acq_alpa AL_PA Acquired During Loop Initialization
lbits:8 reserved Reserved
{}
or fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 6668>
ulong value As longword
endunion fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 6672>
union fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 6672>
{field (By field)}
<byte 6672>
lbits:24 prim_value Primitive to be Sent
lbits:8 reserved Reserved
{}
or fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 6672>
ulong value As longword
endunion fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 6676>
union fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 6676>
{field (By field)}
<byte 6676>
lbits:8 exp_frm Expired Frames
lbits:24 reserved Reserved
{}
or fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 6676>
ulong value As longword
endunion fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 6680>
union fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 6680>
{field (By field)}
<byte 6680>
lbits:1 dac Disable Auto Close
lbits:2 nbc Non-zero Login BB_Credit
lbits:1 eei Enable ERR_INIT
lbits:1 icb Ignore Close Bit
lbits:2 atv Arbitration Threshold Value
lbits:1 gde Garbage Deletion Enable
lbits:8 laa Lowest Allowable AL_PA
lbits:8 reserved Reserved
lbits:1 reserved1 Reserved
lbits:1 prm Promiscuous Mode
lbits:1 wpe Wait For Port Enable
lbits:1 fmh Force Monitor State With Hard Address
lbits:1 fmn Force Monitor Non-participating State
lbits:1 dlm Disable Loop Master
lbits:1 dsa Disable Soft Address Selection
lbits:1 ilp Ignore LPB/LPE Primitive Sequences
{}
or fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 6680>
ulong value As longword
endunion fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 6684>
union pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 6684>
{field (By field)}
<byte 6684>
union brstctr PCI Master Burst Count Control
<byte 6684>
{field (By field)}
<byte 6684>
tbits:4 read_burst PCI read burst count
tbits:4 write_burst PCI write burst count
{}
or brstctr PCI Master Burst Count Control
<byte 6684>
utiny value As byte
endunion brstctr PCI Master Burst Count Control
<byte 6685>
union waitctr PCI Master Wait Count Control
<byte 6685>
{field (By field)}
<byte 6685>
tbits:4 read_wait DMA read wait count
tbits:4 write_wait DMA write wait count
{}
or waitctr PCI Master Wait Count Control
<byte 6685>
utiny value As byte
endunion waitctr PCI Master Wait Count Control
<byte 6686>
union romctr PCI ROM Control
<byte 6686>
{field (By field)}
<byte 6686>
tbits:1 vpp_en ROM VPP Enable
tbits:1 fla Flash Installed (read only)
tbits:1 rom ROM Installed (read only)
tbits:1 rm0 RAM 0 (read only); combination of RAM 2, RAM 1, and RAM 0 describe static RAM configuration: 000 - none, 001 - 128KB, 010 - 256KB, 011 - 512KB, 100 - 1MB, 101 - 2MB, 110 - reserved, 111 - reserved
tbits:1 rm1 RAM 1 (read only)
tbits:1 svl Subsystem VID Loaded (read only)
tbits:1 par External memory parity checking enabled (read only)
tbits:1 rm2 RAM 2 (read only)
{}
or romctr PCI ROM Control
<byte 6686>
utiny value As byte
endunion romctr PCI ROM Control
<byte 6687>
union mctr PCI Master Control
<byte 6687>
{field (By field)}
<byte 6687>
tbits:1 ecl Enable MRM and MRL Completion to Cache Line
tbits:1 rrd PCI Memory Read Round Down Enable
tbits:1 p64 PCI Present and Active
tbits:1 rae Memory Read Alignment Enable
tbits:1 wae Memory Write Alignment Enable
tbits:1 rbe PCI Read Burst Counter Enable
tbits:1 wbe PCI Write Burst Counter Enable
tbits:1 dlt Disable Latency Timer
{}
or mctr PCI Master Control
<byte 6687>
utiny value As byte
endunion mctr PCI Master Control
{}
or pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 6684>
ulong value As longword
endunion pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 6688>
union pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
<byte 6688>
{field (By field)}
<byte 6688>
union softrst PCI Interface Reset Control
<byte 6688>
{field (By field)}
<byte 6688>
tbits:1 rst PCI Interface Soft Reset
tbits:1 dpe Reserved (must be zero)
tbits:1 rdd RAM/ROM Read Delayed Transaction Disabled
tbits:1 tad Target Abort Disable
tbits:4 rsvd Reserved (must be zero)
{}
or softrst PCI Interface Reset Control
<byte 6688>
utiny value As byte
endunion softrst PCI Interface Reset Control
<byte 6689>
union intpend PCI Interrupt Pending
<byte 6689>
{field (By field)}
<byte 6689>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or intpend PCI Interrupt Pending
<byte 6689>
utiny value As byte
endunion intpend PCI Interrupt Pending
<byte 6690>
union inten PCI Interrupt Enable
<byte 6690>
{field (By field)}
<byte 6690>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or inten PCI Interrupt Enable
<byte 6690>
utiny value As byte
endunion inten PCI Interrupt Enable
<byte 6691>
union intstat PCI Interrupt Status
<byte 6691>
{field (By field)}
<byte 6691>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or intstat PCI Interrupt Status
<byte 6691>
utiny value As byte
endunion intstat PCI Interrupt Status
{}
or pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
<byte 6688>
ulong value As longword
endunion pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
{}
endunion csr[4] Tachyon XL2 CSR Registers
<byte 6692>
union csr[5] Tachyon XL2 CSR Registers
<byte 6692>
ulong[128] csra Tachyon XL2 CSR Registers As Longwords
or csr[5] Tachyon XL2 CSR Registers
<byte 6692>
{csr (Tachyon XL2 CSR Registers By Field)}
<byte 6692>
union erq_base (Offset 000) ERQ Base (write only)
<byte 6692>
{field (By field)}
<byte 6692>
lbits:32 address ERQ Base Address
{}
or erq_base (Offset 000) ERQ Base (write only)
<byte 6692>
ulong value As longword
endunion erq_base (Offset 000) ERQ Base (write only)
<byte 6696>
union erq_len (Offset 004) ERQ Length (write only)
<byte 6696>
{field (By field)}
<byte 6696>
lbits:12 length ERQ Length
lbits:20 reserved Reserved
{}
or erq_len (Offset 004) ERQ Length (write only)
<byte 6696>
ulong value As longword
endunion erq_len (Offset 004) ERQ Length (write only)
<byte 6700>
union erq_prod (Offset 008) ERQ Producer Index
<byte 6700>
{field (By field)}
<byte 6700>
lbits:12 index ERQ Producer Index
lbits:20 reserved Reserved
{}
or erq_prod (Offset 008) ERQ Producer Index
<byte 6700>
ulong value As longword
endunion erq_prod (Offset 008) ERQ Producer Index
<byte 6704>
union erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 6704>
{field (By field)}
<byte 6704>
lbits:32 address ERQ Consumer Index Address
{}
or erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 6704>
ulong value As longword
endunion erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 6708>
union erq_cons (Offset 010) ERQ Consumer Index
<byte 6708>
{field (By field)}
<byte 6708>
lbits:12 index ERQ Consumer Index
lbits:20 reserved Reserved
{}
or erq_cons (Offset 010) ERQ Consumer Index
<byte 6708>
ulong value As longword
endunion erq_cons (Offset 010) ERQ Consumer Index
<byte 6712>
{rsvd1[0] ((Offset 014-04F) Reserved)}
<byte 6712>
ulong value
{}
<byte 6716>
{rsvd1[1] ((Offset 014-04F) Reserved)}
<byte 6716>
ulong value
{}
<byte 6720>
{rsvd1[2] ((Offset 014-04F) Reserved)}
<byte 6720>
ulong value
{}
<byte 6724>
{rsvd1[3] ((Offset 014-04F) Reserved)}
<byte 6724>
ulong value
{}
<byte 6728>
{rsvd1[4] ((Offset 014-04F) Reserved)}
<byte 6728>
ulong value
{}
<byte 6732>
{rsvd1[5] ((Offset 014-04F) Reserved)}
<byte 6732>
ulong value
{}
<byte 6736>
{rsvd1[6] ((Offset 014-04F) Reserved)}
<byte 6736>
ulong value
{}
<byte 6740>
{rsvd1[7] ((Offset 014-04F) Reserved)}
<byte 6740>
ulong value
{}
<byte 6744>
{rsvd1[8] ((Offset 014-04F) Reserved)}
<byte 6744>
ulong value
{}
<byte 6748>
{rsvd1[9] ((Offset 014-04F) Reserved)}
<byte 6748>
ulong value
{}
<byte 6752>
{rsvd1[10] ((Offset 014-04F) Reserved)}
<byte 6752>
ulong value
{}
<byte 6756>
{rsvd1[11] ((Offset 014-04F) Reserved)}
<byte 6756>
ulong value
{}
<byte 6760>
{rsvd1[12] ((Offset 014-04F) Reserved)}
<byte 6760>
ulong value
{}
<byte 6764>
{rsvd1[13] ((Offset 014-04F) Reserved)}
<byte 6764>
ulong value
{}
<byte 6768>
{rsvd1[14] ((Offset 014-04F) Reserved)}
<byte 6768>
ulong value
{}
<byte 6772>
union sfq_base (Offset 050) SFQ Base (write only)
<byte 6772>
{field (By field)}
<byte 6772>
lbits:32 address SFQ Base Address
{}
or sfq_base (Offset 050) SFQ Base (write only)
<byte 6772>
ulong value As longword
endunion sfq_base (Offset 050) SFQ Base (write only)
<byte 6776>
union sfq_len (Offset 054) SFQ Length (write only)
<byte 6776>
{field (By field)}
<byte 6776>
lbits:12 length SFQ Length
lbits:20 reserved Reserved
{}
or sfq_len (Offset 054) SFQ Length (write only)
<byte 6776>
ulong value As longword
endunion sfq_len (Offset 054) SFQ Length (write only)
<byte 6780>
union sfq_cons (Offset 058) SFQ Consumer Index
<byte 6780>
{field (By field)}
<byte 6780>
lbits:12 index SFQ Consumer Index
lbits:20 reserved Reserved
{}
or sfq_cons (Offset 058) SFQ Consumer Index
<byte 6780>
ulong value As longword
endunion sfq_cons (Offset 058) SFQ Consumer Index
<byte 6784>
{rsvd2[0] ((Offset 05C-07B) Reserved)}
<byte 6784>
ulong value
{}
<byte 6788>
{rsvd2[1] ((Offset 05C-07B) Reserved)}
<byte 6788>
ulong value
{}
<byte 6792>
{rsvd2[2] ((Offset 05C-07B) Reserved)}
<byte 6792>
ulong value
{}
<byte 6796>
{rsvd2[3] ((Offset 05C-07B) Reserved)}
<byte 6796>
ulong value
{}
<byte 6800>
{rsvd2[4] ((Offset 05C-07B) Reserved)}
<byte 6800>
ulong value
{}
<byte 6804>
{rsvd2[5] ((Offset 05C-07B) Reserved)}
<byte 6804>
ulong value
{}
<byte 6808>
{rsvd2[6] ((Offset 05C-07B) Reserved)}
<byte 6808>
ulong value
{}
<byte 6812>
{rsvd2[7] ((Offset 05C-07B) Reserved)}
<byte 6812>
ulong value
{}
<byte 6816>
union int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 6816>
{field (By field)}
<byte 6816>
lbits:4 timer Interrupt Timer Value
lbits:3 reserved Reserved
lbits:1 ihf Interrupt when IMQ Half Full
lbits:24 reserved1 Reserved
{}
or int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 6816>
ulong value As longword
endunion int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 6820>
union imq_base (Offset 080) IMQ Base (write only)
<byte 6820>
{field (By field)}
<byte 6820>
lbits:32 address IMQ Base Address
{}
or imq_base (Offset 080) IMQ Base (write only)
<byte 6820>
ulong value As longword
endunion imq_base (Offset 080) IMQ Base (write only)
<byte 6824>
union imq_len (Offset 084) IMQ Length (write only)
<byte 6824>
{field (By field)}
<byte 6824>
lbits:12 length IMQ Length
lbits:20 reserved Reserved
{}
or imq_len (Offset 084) IMQ Length (write only)
<byte 6824>
ulong value As longword
endunion imq_len (Offset 084) IMQ Length (write only)
<byte 6828>
union imq_cons (Offset 088) IMQ Consumer Index
<byte 6828>
{field (By field)}
<byte 6828>
lbits:12 index IMQ Consumer Index
lbits:20 reserved Reserved
{}
or imq_cons (Offset 088) IMQ Consumer Index
<byte 6828>
ulong value As longword
endunion imq_cons (Offset 088) IMQ Consumer Index
<byte 6832>
union imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 6832>
{field (By field)}
<byte 6832>
lbits:32 address IMQ Producer Index Address
{}
or imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 6832>
ulong value As longword
endunion imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 6836>
{rsvd3[0] ((Offset 090-0FC) Reserved)}
<byte 6836>
ulong value
{}
<byte 6840>
{rsvd3[1] ((Offset 090-0FC) Reserved)}
<byte 6840>
ulong value
{}
<byte 6844>
{rsvd3[2] ((Offset 090-0FC) Reserved)}
<byte 6844>
ulong value
{}
<byte 6848>
{rsvd3[3] ((Offset 090-0FC) Reserved)}
<byte 6848>
ulong value
{}
<byte 6852>
{rsvd3[4] ((Offset 090-0FC) Reserved)}
<byte 6852>
ulong value
{}
<byte 6856>
{rsvd3[5] ((Offset 090-0FC) Reserved)}
<byte 6856>
ulong value
{}
<byte 6860>
{rsvd3[6] ((Offset 090-0FC) Reserved)}
<byte 6860>
ulong value
{}
<byte 6864>
{rsvd3[7] ((Offset 090-0FC) Reserved)}
<byte 6864>
ulong value
{}
<byte 6868>
{rsvd3[8] ((Offset 090-0FC) Reserved)}
<byte 6868>
ulong value
{}
<byte 6872>
{rsvd3[9] ((Offset 090-0FC) Reserved)}
<byte 6872>
ulong value
{}
<byte 6876>
{rsvd3[10] ((Offset 090-0FC) Reserved)}
<byte 6876>
ulong value
{}
<byte 6880>
{rsvd3[11] ((Offset 090-0FC) Reserved)}
<byte 6880>
ulong value
{}
<byte 6884>
{rsvd3[12] ((Offset 090-0FC) Reserved)}
<byte 6884>
ulong value
{}
<byte 6888>
{rsvd3[13] ((Offset 090-0FC) Reserved)}
<byte 6888>
ulong value
{}
<byte 6892>
{rsvd3[14] ((Offset 090-0FC) Reserved)}
<byte 6892>
ulong value
{}
<byte 6896>
{rsvd3[15] ((Offset 090-0FC) Reserved)}
<byte 6896>
ulong value
{}
<byte 6900>
{rsvd3[16] ((Offset 090-0FC) Reserved)}
<byte 6900>
ulong value
{}
<byte 6904>
{rsvd3[17] ((Offset 090-0FC) Reserved)}
<byte 6904>
ulong value
{}
<byte 6908>
{rsvd3[18] ((Offset 090-0FC) Reserved)}
<byte 6908>
ulong value
{}
<byte 6912>
{rsvd3[19] ((Offset 090-0FC) Reserved)}
<byte 6912>
ulong value
{}
<byte 6916>
{rsvd3[20] ((Offset 090-0FC) Reserved)}
<byte 6916>
ulong value
{}
<byte 6920>
{rsvd3[21] ((Offset 090-0FC) Reserved)}
<byte 6920>
ulong value
{}
<byte 6924>
{rsvd3[22] ((Offset 090-0FC) Reserved)}
<byte 6924>
ulong value
{}
<byte 6928>
{rsvd3[23] ((Offset 090-0FC) Reserved)}
<byte 6928>
ulong value
{}
<byte 6932>
{rsvd3[24] ((Offset 090-0FC) Reserved)}
<byte 6932>
ulong value
{}
<byte 6936>
{rsvd3[25] ((Offset 090-0FC) Reserved)}
<byte 6936>
ulong value
{}
<byte 6940>
{rsvd3[26] ((Offset 090-0FC) Reserved)}
<byte 6940>
ulong value
{}
<byte 6944>
{rsvd3[27] ((Offset 090-0FC) Reserved)}
<byte 6944>
ulong value
{}
<byte 6948>
union fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 6948>
{field (By field)}
<byte 6948>
lbits:1 x50 50 Ohms Termination Enable
lbits:2 xtr Termination Receive
lbits:2 xtt Termination Transmit
lbits:3 xta Transmitter Amplitude
lbits:1 xwb Wrapback
lbits:1 reserved Reserved
lbits:1 txo Transmitter Off
lbits:1 reserved1 Reserved
lbits:1 xlp Loopback
lbits:2 xem Output Emphasis
lbits:1 reserved2 Reserved
lbits:2 xrz Receiver Zero Adjust
lbits:2 xrp Receiver Pole Adjust
lbits:2 xtz Transmitter Zero Adjust
lbits:2 xtp Transmitter Pole Adjust
lbits:2 rxs Receiver Speed
lbits:2 txs Transmitter Speed
lbits:1 ean Enable Auto Speed Negotiation
lbits:1 xlr Force iTR to lock reference clock
lbits:1 asp Auto Speed Negotiation in Progress
lbits:1 xcv Type of Transceiver
{}
or fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 6948>
ulong value As longword
endunion fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 6952>
union fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 6952>
{field (By field)}
<byte 6952>
lbits:4 psm Port State Machine
lbits:4 lsm Loop State Machine
lbits:1 ldn Link Down
lbits:1 lup Link Up
lbits:1 es Elastic Store Error
lbits:1 ce Credit Error
lbits:1 lf Link Failure
lbits:1 lg Login Required
lbits:1 ptx Primitive Transmitted
lbits:1 prx Primitive Received
lbits:1 ba Bad AL_PA
lbits:1 lpf LIPf
lbits:1 sto State Time-out
lbits:1 ols OLS/NOS Received
lbits:1 lpb Loop Port Bypass (LPB) Primitive Sequence Received
lbits:1 lpe Loop Port Enable (LPE) Primitive Sequence Received
lbits:1 drs Directed LIP Sequence Received
lbits:1 reserved Reserved
lbits:1 ls Loss of Signal
lbits:1 os Out of Synchronization
lbits:1 flt Link Fault
lbits:1 reserved1 Reserved
lbits:1 byp Node Bypassed
lbits:1 np Non-Participating
lbits:1 tp Transmit Parity Error
lbits:1 lp Loop
{}
or fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 6952>
ulong value As longword
endunion fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 6956>
{rsvd3a[0] ((Offset 108-13F) Reserved)}
<byte 6956>
ulong value
{}
<byte 6960>
{rsvd3a[1] ((Offset 108-13F) Reserved)}
<byte 6960>
ulong value
{}
<byte 6964>
{rsvd3a[2] ((Offset 108-13F) Reserved)}
<byte 6964>
ulong value
{}
<byte 6968>
{rsvd3a[3] ((Offset 108-13F) Reserved)}
<byte 6968>
ulong value
{}
<byte 6972>
{rsvd3a[4] ((Offset 108-13F) Reserved)}
<byte 6972>
ulong value
{}
<byte 6976>
{rsvd3a[5] ((Offset 108-13F) Reserved)}
<byte 6976>
ulong value
{}
<byte 6980>
{rsvd3a[6] ((Offset 108-13F) Reserved)}
<byte 6980>
ulong value
{}
<byte 6984>
{rsvd3a[7] ((Offset 108-13F) Reserved)}
<byte 6984>
ulong value
{}
<byte 6988>
{rsvd3a[8] ((Offset 108-13F) Reserved)}
<byte 6988>
ulong value
{}
<byte 6992>
{rsvd3a[9] ((Offset 108-13F) Reserved)}
<byte 6992>
ulong value
{}
<byte 6996>
{rsvd3a[10] ((Offset 108-13F) Reserved)}
<byte 6996>
ulong value
{}
<byte 7000>
{rsvd3a[11] ((Offset 108-13F) Reserved)}
<byte 7000>
ulong value
{}
<byte 7004>
{rsvd3a[12] ((Offset 108-13F) Reserved)}
<byte 7004>
ulong value
{}
<byte 7008>
{rsvd3a[13] ((Offset 108-13F) Reserved)}
<byte 7008>
ulong value
{}
<byte 7012>
union sest_base (Offset 140) SEST Base (write only)
<byte 7012>
{field (By field)}
<byte 7012>
lbits:32 address SEST Base Address
{}
or sest_base (Offset 140) SEST Base (write only)
<byte 7012>
ulong value As longword
endunion sest_base (Offset 140) SEST Base (write only)
<byte 7016>
union sest_len (Offset 144) SEST Length (write only)
<byte 7016>
{field (By field)}
<byte 7016>
lbits:16 length SEST Length
lbits:16 reserved Reserved
{}
or sest_len (Offset 144) SEST Length (write only)
<byte 7016>
ulong value As longword
endunion sest_len (Offset 144) SEST Length (write only)
<byte 7020>
{rsvd4 ((Offset 148) Reserved)}
<byte 7020>
ulong value
{}
<byte 7024>
union scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 7024>
{field (By field)}
<byte 7024>
lbits:16 tail Tail
lbits:16 head Head
{}
or scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 7024>
ulong value As longword
endunion scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 7028>
union spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 7028>
{field (By field)}
<byte 7028>
lbits:1 sra SPI SRAM Access
lbits:10 rsvd Reserved
lbits:21 address RAM/ROM Address
{}
or spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 7028>
ulong value As longword
endunion spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 7032>
union spidata (Offset 154) SPI RAM/ROM Data
<byte 7032>
union field By field
<byte 7032>
{ram (By field)}
<byte 7032>
lbits:32 data RAM data
{}
or field By field
<byte 7032>
{rom (By field)}
<byte 7032>
lbits:8 data ROM data
lbits:24 rsvd Reserved
{}
endunion field By field
or spidata (Offset 154) SPI RAM/ROM Data
<byte 7032>
ulong value As longword
endunion spidata (Offset 154) SPI RAM/ROM Data
<byte 7036>
{rsvd5[0] ((Offset 158-15C) Reserved)}
<byte 7036>
ulong value
{}
<byte 7040>
{rsvd5[1] ((Offset 158-15C) Reserved)}
<byte 7040>
ulong value
{}
<byte 7044>
union int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 7044>
{field (By field)}
<byte 7044>
lbits:32 address Interrupt Message Address
{}
or int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 7044>
ulong value As longword
endunion int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 7048>
union int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 7048>
{field (By field)}
<byte 7048>
lbits:32 value Interrupt Message Value
{}
or int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 7048>
ulong value As longword
endunion int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 7052>
union sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 7052>
{field (By field)}
<byte 7052>
lbits:8 length SGL Page Length
lbits:24 reserved Reserved
{}
or sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 7052>
ulong value As longword
endunion sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 7056>
union my_id (Offset 16C) My ID
<byte 7056>
{field (By field)}
<byte 7056>
lbits:24 id My ID
lbits:8 reserved Reserved
{}
or my_id (Offset 16C) My ID
<byte 7056>
ulong value As longword
endunion my_id (Offset 16C) My ID
<byte 7060>
union gpio (Offset 170) General Purpose I/O
<byte 7060>
{field (By field)}
<byte 7060>
lbits:1 gc0 General Purpose Control 0
lbits:1 gc1 General Purpose Control 1
lbits:1 gc2 General Purpose Control 2
lbits:1 gc3 General Purpose Control 3
lbits:1 gc4 General Purpose Control 4
lbits:1 gc5 General Purpose Control 5
lbits:1 gc6 General Purpose Control 6
lbits:1 gc7 General Purpose Control 7
lbits:8 reserved Reserved
lbits:1 gp0 General Purpose I/O 0
lbits:1 gp1 General Purpose I/O 1
lbits:1 gp2 General Purpose I/O 2
lbits:1 gp3 General Purpose I/O 3
lbits:1 gp4 General Purpose Input 4
lbits:1 gp5 General Purpose I/O 5
lbits:1 gp6 General Purpose I/O 6
lbits:1 gp7 General Purpose I/O 7
lbits:8 reserved1 Reserved
{}
or gpio (Offset 170) General Purpose I/O
<byte 7060>
ulong value As longword
endunion gpio (Offset 170) General Purpose I/O
<byte 7064>
{rsvd6[0] ((Offset 174-17F) Reserved)}
<byte 7064>
ulong value
{}
<byte 7068>
{rsvd6[1] ((Offset 174-17F) Reserved)}
<byte 7068>
ulong value
{}
<byte 7072>
{rsvd6[2] ((Offset 174-17F) Reserved)}
<byte 7072>
ulong value
{}
<byte 7076>
union tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 7076>
{field (By field)}
<byte 7076>
lbits:9 pfs Programmable Frame Size
lbits:15 reserved Reserved
lbits:8 esi_range Exchange_ID Signaled Interrupt Range
{}
or tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 7076>
ulong value As longword
endunion tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 7080>
union tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 7080>
{field (By field)}
<byte 7080>
lbits:1 fad FCP Assist Disable
lbits:1 ino In Order
lbits:1 dof Discard OOO FCP Frames
lbits:1 fua FCP Unassisted ACK Enable
lbits:1 ime Interrupt Message Enable
lbits:1 fab Fabric
lbits:1 sic S_ID Copy Enable
lbits:1 eqs Equal Service
lbits:1 reserved Reserved
lbits:1 cae Concurrent Access Enable
lbits:14 reserved1 Reserved
lbits:1 fc2 FCP Class 2 Reassembly Enable
lbits:1 reserved2 Reserved
lbits:1 sdf Save Discarded Frames
lbits:1 rde Response Detect Enable
lbits:1 dam Default ACK Model
lbits:3 reserved3 Reserved
{}
or tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 7080>
ulong value As longword
endunion tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 7084>
union tach_control (Offset 188) Tachyon XL2 Control
<byte 7084>
{field (By field)}
<byte 7084>
lbits:1 gc0 General Purpose Control 0
lbits:1 gc1 General Purpose Control 1
lbits:1 gc2 General Purpose Control 2
lbits:1 gc3 General Purpose Control 3
lbits:1 gc4 General Purpose Control 4
lbits:3 reserved Reserved
lbits:1 feq Freeze ERQ
lbits:1 ffa Freeze FCP Assists
lbits:2 reserved1 Reserved
lbits:1 fis Freeze Inbound FCP Assists When Frame Placed in SFQ
lbits:1 fib Freeze Inbound FCP Assists
lbits:2 reserved2 Reserved
lbits:1 req Resume ERQ
lbits:1 rif Resume Inbound FCP Assists
lbits:1 rof Resume Outbound FCP Assists
lbits:12 reserved3 Reserved
lbits:1 crs Core Reset
{}
or tach_control (Offset 188) Tachyon XL2 Control
<byte 7084>
ulong value As longword
endunion tach_control (Offset 188) Tachyon XL2 Control
<byte 7088>
union tach_status (Offset 18C) Tachyon XL2 Status
<byte 7088>
{field (By field)}
<byte 7088>
lbits:1 gp0 General Purpose I/O 0
lbits:1 gp1 General Purpose I/O 1
lbits:1 gp2 General Purpose I/O 2
lbits:1 gp3 General Purpose I/O 3
lbits:1 gp4 General Purpose Input 4
lbits:5 revid Device Revision ID
lbits:1 ipe Inbound Parity Error
lbits:1 ope Outbound Parity Error
lbits:4 reserved Reserved
lbits:1 eqf ERQ Frozen
lbits:1 iff Inbound FCP Assists Frozen
lbits:1 off Outbound FCP Assists Frozen
lbits:6 reserved1 Reserved
lbits:1 m66 66 Mhz Enabled
lbits:1 ile Inbound Link Control FIFO Empty
lbits:1 ole Outbound Link Control List Empty
lbits:1 ife Inbound FIFO Empty
lbits:1 ofe Outbound FIFO Empty
lbits:1 imf IMQ Full
lbits:1 ssf SFQ Full
{}
or tach_status (Offset 18C) Tachyon XL2 Status
<byte 7088>
ulong value As longword
endunion tach_status (Offset 18C) Tachyon XL2 Status
<byte 7092>
{rsvd7 ((Offset 190) Reserved)}
<byte 7092>
ulong value
{}
<byte 7096>
union hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 7096>
{field (By field)}
<byte 7096>
lbits:12 length Frame Length
lbits:7 reserved Reserved
lbits:12 upper_addr Frame Upper Address
lbits:1 reserved1 Reserved
{}
or hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 7096>
ulong value As longword
endunion hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 7100>
union hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 7100>
{field (By field)}
<byte 7100>
lbits:12 length Frame Length
lbits:7 reserved Reserved
lbits:12 upper_addr Frame Upper Address
lbits:1 reserved1 Reserved
{}
or hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 7100>
ulong value As longword
endunion hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 7104>
union inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 7104>
{field (By field)}
<byte 7104>
lbits:24 reserved Reserved
lbits:8 sest_lru_count SEST LRU Count
{}
or inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 7104>
ulong value As longword
endunion inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 7108>
union inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 7108>
{field (By field)}
<byte 7108>
lbits:8 discd_frames Discarded Frame Count
lbits:24 reserved Reserved
{}
or inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 7108>
ulong value As longword
endunion inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 7112>
union ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 7112>
{field (By field)}
<byte 7112>
lbits:28 threshold EE_Credit Zero Timer Threshold
lbits:4 reserved Reserved
{}
or ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 7112>
ulong value As longword
endunion ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 7116>
union up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 7116>
{field (By field)}
<byte 7116>
lbits:13 reserved Reserved
lbits:19 upper_addr Upper Data Address
{}
or up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 7116>
ulong value As longword
endunion up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 7120>
union up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 7120>
{field (By field)}
<byte 7120>
lbits:32 upper_addr Upper Control Address
{}
or up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 7120>
ulong value As longword
endunion up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 7124>
union dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 7124>
{field (By field)}
<byte 7124>
lbits:1 ef AL_PA 0xEF DHD Login Information
lbits:1 e8 AL_PA 0xE8 DHD Login Information
lbits:1 e4 AL_PA 0xE4 DHD Login Information
lbits:1 e2 AL_PA 0xE2 DHD Login Information
lbits:1 e1 AL_PA 0xE1 DHD Login Information
lbits:1 e0 AL_PA 0xE0 DHD Login Information
lbits:1 dc AL_PA 0xDC DHD Login Information
lbits:1 da AL_PA 0xDA DHD Login Information
lbits:1 d9 AL_PA 0xD9 DHD Login Information
lbits:1 d6 AL_PA 0xD6 DHD Login Information
lbits:1 d5 AL_PA 0xD5 DHD Login Information
lbits:1 d4 AL_PA 0xD4 DHD Login Information
lbits:1 d3 AL_PA 0xD3 DHD Login Information
lbits:1 d2 AL_PA 0xD2 DHD Login Information
lbits:1 d1 AL_PA 0xD1 DHD Login Information
lbits:1 ce AL_PA 0xCE DHD Login Information
lbits:1 cd AL_PA 0xCD DHD Login Information
lbits:1 cc AL_PA 0xCC DHD Login Information
lbits:1 cb AL_PA 0xCB DHD Login Information
lbits:1 ca AL_PA 0xCA DHD Login Information
lbits:1 c9 AL_PA 0xC9 DHD Login Information
lbits:1 c7 AL_PA 0xC7 DHD Login Information
lbits:1 c6 AL_PA 0xC6 DHD Login Information
lbits:1 c5 AL_PA 0xC5 DHD Login Information
lbits:1 c3 AL_PA 0xC3 DHD Login Information
lbits:1 bc AL_PA 0xBC DHD Login Information
lbits:1 ba AL_PA 0xBA DHD Login Information
lbits:1 b9 AL_PA 0xB9 DHD Login Information
lbits:1 b6 AL_PA 0xB6 DHD Login Information
lbits:1 b5 AL_PA 0xB5 DHD Login Information
lbits:1 b4 AL_PA 0xB4 DHD Login Information
lbits:1 b3 AL_PA 0xB3 DHD Login Information
{}
or dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 7124>
ulong value As longword
endunion dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 7128>
union dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 7128>
{field (By field)}
<byte 7128>
lbits:1 alpab2 AL_PA 0xB2 DHD Login Information
lbits:1 alpab1 AL_PA 0xB1 DHD Login Information
lbits:1 alpaae AL_PA 0xAE DHD Login Information
lbits:1 alpaad AL_PA 0xAD DHD Login Information
lbits:1 alpaac AL_PA 0xAC DHD Login Information
lbits:1 alpaab AL_PA 0xAB DHD Login Information
lbits:1 alpaaa AL_PA 0xAA DHD Login Information
lbits:1 alpaa9 AL_PA 0xA9 DHD Login Information
lbits:1 alpaa7 AL_PA 0xA7 DHD Login Information
lbits:1 alpaa6 AL_PA 0xA6 DHD Login Information
lbits:1 alpaa5 AL_PA 0xA5 DHD Login Information
lbits:1 alpaa3 AL_PA 0xA3 DHD Login Information
lbits:1 alpa9f AL_PA 0x9F DHD Login Information
lbits:1 alpa9e AL_PA 0x9E DHD Login Information
lbits:1 alpa9d AL_PA 0x9D DHD Login Information
lbits:1 alpa9b AL_PA 0x9B DHD Login Information
lbits:1 alpa98 AL_PA 0x98 DHD Login Information
lbits:1 alpa97 AL_PA 0x97 DHD Login Information
lbits:1 alpa90 AL_PA 0x90 DHD Login Information
lbits:1 alpa8f AL_PA 0x8F DHD Login Information
lbits:1 alpa88 AL_PA 0x88 DHD Login Information
lbits:1 alpa84 AL_PA 0x84 DHD Login Information
lbits:1 alpa82 AL_PA 0x82 DHD Login Information
lbits:1 alpa81 AL_PA 0x81 DHD Login Information
lbits:1 alpa80 AL_PA 0x80 DHD Login Information
lbits:1 alpa7c AL_PA 0x7C DHD Login Information
lbits:1 alpa7a AL_PA 0x7A DHD Login Information
lbits:1 alpa79 AL_PA 0x79 DHD Login Information
lbits:1 alpa76 AL_PA 0x76 DHD Login Information
lbits:1 alpa75 AL_PA 0x75 DHD Login Information
lbits:1 alpa74 AL_PA 0x74 DHD Login Information
lbits:1 alpa73 AL_PA 0x73 DHD Login Information
{}
or dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 7128>
ulong value As longword
endunion dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 7132>
union dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 7132>
{field (By field)}
<byte 7132>
lbits:1 alpa72 AL_PA 0x72 DHD Login Information
lbits:1 alpa71 AL_PA 0x71 DHD Login Information
lbits:1 alpa6e AL_PA 0x6E DHD Login Information
lbits:1 alpa6d AL_PA 0x6D DHD Login Information
lbits:1 alpa6c AL_PA 0x6C DHD Login Information
lbits:1 alpa6b AL_PA 0x6B DHD Login Information
lbits:1 alpa6a AL_PA 0x6A DHD Login Information
lbits:1 alpa69 AL_PA 0x69 DHD Login Information
lbits:1 alpa67 AL_PA 0x67 DHD Login Information
lbits:1 alpa66 AL_PA 0x66 DHD Login Information
lbits:1 alpa65 AL_PA 0x65 DHD Login Information
lbits:1 alpa63 AL_PA 0x63 DHD Login Information
lbits:1 alpa5c AL_PA 0x5C DHD Login Information
lbits:1 alpa5a AL_PA 0x5A DHD Login Information
lbits:1 alpa59 AL_PA 0x59 DHD Login Information
lbits:1 alpa56 AL_PA 0x56 DHD Login Information
lbits:1 alpa55 AL_PA 0x55 DHD Login Information
lbits:1 alpa54 AL_PA 0x54 DHD Login Information
lbits:1 alpa53 AL_PA 0x53 DHD Login Information
lbits:1 alpa52 AL_PA 0x52 DHD Login Information
lbits:1 alpa51 AL_PA 0x51 DHD Login Information
lbits:1 alpa4e AL_PA 0x4E DHD Login Information
lbits:1 alpa4d AL_PA 0x4D DHD Login Information
lbits:1 alpa4c AL_PA 0x4C DHD Login Information
lbits:1 alpa4b AL_PA 0x4B DHD Login Information
lbits:1 alpa4a AL_PA 0x4A DHD Login Information
lbits:1 alpa49 AL_PA 0x49 DHD Login Information
lbits:1 alpa47 AL_PA 0x47 DHD Login Information
lbits:1 alpa46 AL_PA 0x46 DHD Login Information
lbits:1 alpa45 AL_PA 0x45 DHD Login Information
lbits:1 alpa43 AL_PA 0x43 DHD Login Information
lbits:1 alpa3c AL_PA 0x3C DHD Login Information
{}
or dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 7132>
ulong value As longword
endunion dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 7136>
union dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 7136>
{field (By field)}
<byte 7136>
lbits:1 alpa3a AL_PA 0x3A DHD Login Information
lbits:1 alpa39 AL_PA 0x39 DHD Login Information
lbits:1 alpa36 AL_PA 0x36 DHD Login Information
lbits:1 alpa35 AL_PA 0x35 DHD Login Information
lbits:1 alpa34 AL_PA 0x34 DHD Login Information
lbits:1 alpa33 AL_PA 0x33 DHD Login Information
lbits:1 alpa32 AL_PA 0x32 DHD Login Information
lbits:1 alpa31 AL_PA 0x31 DHD Login Information
lbits:1 alpa2e AL_PA 0x2E DHD Login Information
lbits:1 alpa2d AL_PA 0x2D DHD Login Information
lbits:1 alpa2c AL_PA 0x2C DHD Login Information
lbits:1 alpa2b AL_PA 0x2B DHD Login Information
lbits:1 alpa2a AL_PA 0x2A DHD Login Information
lbits:1 alpa29 AL_PA 0x29 DHD Login Information
lbits:1 alpa27 AL_PA 0x27 DHD Login Information
lbits:1 alpa26 AL_PA 0x26 DHD Login Information
lbits:1 alpa25 AL_PA 0x25 DHD Login Information
lbits:1 alpa23 AL_PA 0x23 DHD Login Information
lbits:1 alpa1f AL_PA 0x1F DHD Login Information
lbits:1 alpa1e AL_PA 0x1E DHD Login Information
lbits:1 alpa1d AL_PA 0x1D DHD Login Information
lbits:1 alpa1b AL_PA 0x1B DHD Login Information
lbits:1 alpa18 AL_PA 0x18 DHD Login Information
lbits:1 alpa17 AL_PA 0x17 DHD Login Information
lbits:1 alpa10 AL_PA 0x10 DHD Login Information
lbits:1 alpa0f AL_PA 0x0F DHD Login Information
lbits:1 alpa08 AL_PA 0x08 DHD Login Information
lbits:1 alpa04 AL_PA 0x04 DHD Login Information
lbits:1 alpa02 AL_PA 0x02 DHD Login Information
lbits:1 alpa01 AL_PA 0x01 DHD Login Information
lbits:1 alpa00 AL_PA 0x00 DHD Login Information
lbits:1 reserved Reserved
{}
or dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 7136>
ulong value As longword
endunion dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 7140>
union fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 7140>
{field (By field)}
<byte 7140>
lbits:1 bli Bypass Loop Initialization
lbits:1 reserved Reserved
lbits:1 enp Enable N_Port Mode
lbits:1 lr Login Required
lbits:1 inif Initialize as Fabric
lbits:1 rf Respond to Fabric Address
lbits:1 blm Bypass Loop Map
lbits:1 sa Acquire Soft Address
lbits:1 ha Acquire Hard Address
lbits:1 aq Acquire Previously Acquired Address
lbits:1 fa Acquire Fabric Aquired Address
lbits:1 td Timer Disable
lbits:1 sap Skip Arbitration Phase
lbits:1 elb External Loopback/Pad Loopback
lbits:1 ilb Internal loopback
lbits:1 npi Initialize as N_Port
lbits:8 bb_credit BB_Credit
lbits:8 al_pa Desired AL_PA
{}
or fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 7140>
ulong value As longword
endunion fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 7144>
union fm_control (Offset 1C4) Frame Manager Control
<byte 7144>
{field (By field)}
<byte 7144>
lbits:3 cmd State Machine Command
lbits:1 cl Close Loop Request
lbits:1 ipe Initiate Port Enable
lbits:1 sp Send Prim_Reg
lbits:1 sq Primitive Sequence
lbits:1 sas Start Auto-Speed Negotiation
lbits:24 reserved Reserved
{}
or fm_control (Offset 1C4) Frame Manager Control
<byte 7144>
ulong value As longword
endunion fm_control (Offset 1C4) Frame Manager Control
<byte 7148>
union fm_status (Offset 1C8) Frame Manager Status
<byte 7148>
{field (By field)}
<byte 7148>
lbits:4 psm Port State Machine
lbits:4 lsm Loop State Machine
lbits:1 ldn Link Down
lbits:1 lup Link Up
lbits:1 es Elastic Store Error
lbits:1 ce Credit Error
lbits:1 lf Link Failure
lbits:1 lg Login Required
lbits:1 ptx Primitive Transmitted
lbits:1 prx Primitive Received
lbits:1 ba Bad AL_PA
lbits:1 lpf LIPf
lbits:1 sto State Time-out
lbits:1 ols OLS/NOS Received
lbits:1 lpb Loop Port Bypass (LPB) Primitive Sequence Received
lbits:1 lpe Loop Port Enable (LPE) Primitive Sequence Received
lbits:1 drs Directed LIP Sequence Received
lbits:1 reserved Reserved
lbits:1 ls Loss of Signal
lbits:1 os Out of Synchronization
lbits:1 flt Link Fault
lbits:1 reserved1 Reserved
lbits:1 byp Node Bypassed
lbits:1 np Non-Participating
lbits:1 tp Transmit Parity Error
lbits:1 lp Loop
{}
or fm_status (Offset 1C8) Frame Manager Status
<byte 7148>
ulong value As longword
endunion fm_status (Offset 1C8) Frame Manager Status
<byte 7152>
union fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 7152>
{field (By field)}
<byte 7152>
lbits:16 ed_tov Error Detect Time-Out
lbits:9 rt_tov Receiver Transmitter Time-Out
lbits:7 reserved Reserved
{}
or fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 7152>
ulong value As longword
endunion fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 7156>
union fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 7156>
{field (By field)}
<byte 7156>
lbits:8 link_fail Link Fail Count
lbits:8 loss_of_sync Loss of Synchronization Count
lbits:8 bad_rx_char Bad Received Character Count
lbits:8 loss_of_signal Loss of Signal Count
{}
or fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 7156>
ulong value As longword
endunion fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 7160>
union fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 7160>
{field (By field)}
<byte 7160>
lbits:8 proto_er Protocol Error Count
lbits:8 bad_crc Bad CRC Count
lbits:8 dis_frm Discarded Frames
lbits:8 rx_eofa Received EOFa
{}
or fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 7160>
ulong value As longword
endunion fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 7164>
union fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 7164>
{field (By field)}
<byte 7164>
lbits:9 al_time Arbitrated Loop Time-Out
lbits:7 reserved Reserved
lbits:16 lp_tov Loop Time-Out
{}
or fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 7164>
ulong value As longword
endunion fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 7168>
union fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 7168>
{field (By field)}
<byte 7168>
lbits:24 bb0_timer BB_Credit Timer
lbits:8 reserved Reserved
{}
or fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 7168>
ulong value As longword
endunion fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 7172>
union fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 7172>
{field (By field)}
<byte 7172>
lbits:32 wwn World Wide Name
{}
or fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 7172>
ulong value As longword
endunion fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 7176>
union fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 7176>
{field (By field)}
<byte 7176>
lbits:32 wwn World Wide Name
{}
or fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 7176>
ulong value As longword
endunion fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 7180>
union fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 7180>
{field (By field)}
<byte 7180>
lbits:8 lipf_alpa AL_PA of Most Recent LIPf Received
lbits:8 bad_alpa AL_PA of Most Recent OPN Sent and Returned Without Being Accepted
lbits:8 acq_alpa AL_PA Acquired During Loop Initialization
lbits:8 reserved Reserved
{}
or fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 7180>
ulong value As longword
endunion fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 7184>
union fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 7184>
{field (By field)}
<byte 7184>
lbits:24 prim_value Primitive to be Sent
lbits:8 reserved Reserved
{}
or fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 7184>
ulong value As longword
endunion fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 7188>
union fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 7188>
{field (By field)}
<byte 7188>
lbits:8 exp_frm Expired Frames
lbits:24 reserved Reserved
{}
or fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 7188>
ulong value As longword
endunion fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 7192>
union fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 7192>
{field (By field)}
<byte 7192>
lbits:1 dac Disable Auto Close
lbits:2 nbc Non-zero Login BB_Credit
lbits:1 eei Enable ERR_INIT
lbits:1 icb Ignore Close Bit
lbits:2 atv Arbitration Threshold Value
lbits:1 gde Garbage Deletion Enable
lbits:8 laa Lowest Allowable AL_PA
lbits:8 reserved Reserved
lbits:1 reserved1 Reserved
lbits:1 prm Promiscuous Mode
lbits:1 wpe Wait For Port Enable
lbits:1 fmh Force Monitor State With Hard Address
lbits:1 fmn Force Monitor Non-participating State
lbits:1 dlm Disable Loop Master
lbits:1 dsa Disable Soft Address Selection
lbits:1 ilp Ignore LPB/LPE Primitive Sequences
{}
or fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 7192>
ulong value As longword
endunion fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 7196>
union pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 7196>
{field (By field)}
<byte 7196>
union brstctr PCI Master Burst Count Control
<byte 7196>
{field (By field)}
<byte 7196>
tbits:4 read_burst PCI read burst count
tbits:4 write_burst PCI write burst count
{}
or brstctr PCI Master Burst Count Control
<byte 7196>
utiny value As byte
endunion brstctr PCI Master Burst Count Control
<byte 7197>
union waitctr PCI Master Wait Count Control
<byte 7197>
{field (By field)}
<byte 7197>
tbits:4 read_wait DMA read wait count
tbits:4 write_wait DMA write wait count
{}
or waitctr PCI Master Wait Count Control
<byte 7197>
utiny value As byte
endunion waitctr PCI Master Wait Count Control
<byte 7198>
union romctr PCI ROM Control
<byte 7198>
{field (By field)}
<byte 7198>
tbits:1 vpp_en ROM VPP Enable
tbits:1 fla Flash Installed (read only)
tbits:1 rom ROM Installed (read only)
tbits:1 rm0 RAM 0 (read only); combination of RAM 2, RAM 1, and RAM 0 describe static RAM configuration: 000 - none, 001 - 128KB, 010 - 256KB, 011 - 512KB, 100 - 1MB, 101 - 2MB, 110 - reserved, 111 - reserved
tbits:1 rm1 RAM 1 (read only)
tbits:1 svl Subsystem VID Loaded (read only)
tbits:1 par External memory parity checking enabled (read only)
tbits:1 rm2 RAM 2 (read only)
{}
or romctr PCI ROM Control
<byte 7198>
utiny value As byte
endunion romctr PCI ROM Control
<byte 7199>
union mctr PCI Master Control
<byte 7199>
{field (By field)}
<byte 7199>
tbits:1 ecl Enable MRM and MRL Completion to Cache Line
tbits:1 rrd PCI Memory Read Round Down Enable
tbits:1 p64 PCI Present and Active
tbits:1 rae Memory Read Alignment Enable
tbits:1 wae Memory Write Alignment Enable
tbits:1 rbe PCI Read Burst Counter Enable
tbits:1 wbe PCI Write Burst Counter Enable
tbits:1 dlt Disable Latency Timer
{}
or mctr PCI Master Control
<byte 7199>
utiny value As byte
endunion mctr PCI Master Control
{}
or pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 7196>
ulong value As longword
endunion pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 7200>
union pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
<byte 7200>
{field (By field)}
<byte 7200>
union softrst PCI Interface Reset Control
<byte 7200>
{field (By field)}
<byte 7200>
tbits:1 rst PCI Interface Soft Reset
tbits:1 dpe Reserved (must be zero)
tbits:1 rdd RAM/ROM Read Delayed Transaction Disabled
tbits:1 tad Target Abort Disable
tbits:4 rsvd Reserved (must be zero)
{}
or softrst PCI Interface Reset Control
<byte 7200>
utiny value As byte
endunion softrst PCI Interface Reset Control
<byte 7201>
union intpend PCI Interrupt Pending
<byte 7201>
{field (By field)}
<byte 7201>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or intpend PCI Interrupt Pending
<byte 7201>
utiny value As byte
endunion intpend PCI Interrupt Pending
<byte 7202>
union inten PCI Interrupt Enable
<byte 7202>
{field (By field)}
<byte 7202>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or inten PCI Interrupt Enable
<byte 7202>
utiny value As byte
endunion inten PCI Interrupt Enable
<byte 7203>
union intstat PCI Interrupt Status
<byte 7203>
{field (By field)}
<byte 7203>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or intstat PCI Interrupt Status
<byte 7203>
utiny value As byte
endunion intstat PCI Interrupt Status
{}
or pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
<byte 7200>
ulong value As longword
endunion pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
{}
endunion csr[5] Tachyon XL2 CSR Registers
<byte 7204>
union csr[6] Tachyon XL2 CSR Registers
<byte 7204>
ulong[128] csra Tachyon XL2 CSR Registers As Longwords
or csr[6] Tachyon XL2 CSR Registers
<byte 7204>
{csr (Tachyon XL2 CSR Registers By Field)}
<byte 7204>
union erq_base (Offset 000) ERQ Base (write only)
<byte 7204>
{field (By field)}
<byte 7204>
lbits:32 address ERQ Base Address
{}
or erq_base (Offset 000) ERQ Base (write only)
<byte 7204>
ulong value As longword
endunion erq_base (Offset 000) ERQ Base (write only)
<byte 7208>
union erq_len (Offset 004) ERQ Length (write only)
<byte 7208>
{field (By field)}
<byte 7208>
lbits:12 length ERQ Length
lbits:20 reserved Reserved
{}
or erq_len (Offset 004) ERQ Length (write only)
<byte 7208>
ulong value As longword
endunion erq_len (Offset 004) ERQ Length (write only)
<byte 7212>
union erq_prod (Offset 008) ERQ Producer Index
<byte 7212>
{field (By field)}
<byte 7212>
lbits:12 index ERQ Producer Index
lbits:20 reserved Reserved
{}
or erq_prod (Offset 008) ERQ Producer Index
<byte 7212>
ulong value As longword
endunion erq_prod (Offset 008) ERQ Producer Index
<byte 7216>
union erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 7216>
{field (By field)}
<byte 7216>
lbits:32 address ERQ Consumer Index Address
{}
or erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 7216>
ulong value As longword
endunion erq_cons_adr (Offset 00C) ERQ Consumer Index Address (write only)
<byte 7220>
union erq_cons (Offset 010) ERQ Consumer Index
<byte 7220>
{field (By field)}
<byte 7220>
lbits:12 index ERQ Consumer Index
lbits:20 reserved Reserved
{}
or erq_cons (Offset 010) ERQ Consumer Index
<byte 7220>
ulong value As longword
endunion erq_cons (Offset 010) ERQ Consumer Index
<byte 7224>
{rsvd1[0] ((Offset 014-04F) Reserved)}
<byte 7224>
ulong value
{}
<byte 7228>
{rsvd1[1] ((Offset 014-04F) Reserved)}
<byte 7228>
ulong value
{}
<byte 7232>
{rsvd1[2] ((Offset 014-04F) Reserved)}
<byte 7232>
ulong value
{}
<byte 7236>
{rsvd1[3] ((Offset 014-04F) Reserved)}
<byte 7236>
ulong value
{}
<byte 7240>
{rsvd1[4] ((Offset 014-04F) Reserved)}
<byte 7240>
ulong value
{}
<byte 7244>
{rsvd1[5] ((Offset 014-04F) Reserved)}
<byte 7244>
ulong value
{}
<byte 7248>
{rsvd1[6] ((Offset 014-04F) Reserved)}
<byte 7248>
ulong value
{}
<byte 7252>
{rsvd1[7] ((Offset 014-04F) Reserved)}
<byte 7252>
ulong value
{}
<byte 7256>
{rsvd1[8] ((Offset 014-04F) Reserved)}
<byte 7256>
ulong value
{}
<byte 7260>
{rsvd1[9] ((Offset 014-04F) Reserved)}
<byte 7260>
ulong value
{}
<byte 7264>
{rsvd1[10] ((Offset 014-04F) Reserved)}
<byte 7264>
ulong value
{}
<byte 7268>
{rsvd1[11] ((Offset 014-04F) Reserved)}
<byte 7268>
ulong value
{}
<byte 7272>
{rsvd1[12] ((Offset 014-04F) Reserved)}
<byte 7272>
ulong value
{}
<byte 7276>
{rsvd1[13] ((Offset 014-04F) Reserved)}
<byte 7276>
ulong value
{}
<byte 7280>
{rsvd1[14] ((Offset 014-04F) Reserved)}
<byte 7280>
ulong value
{}
<byte 7284>
union sfq_base (Offset 050) SFQ Base (write only)
<byte 7284>
{field (By field)}
<byte 7284>
lbits:32 address SFQ Base Address
{}
or sfq_base (Offset 050) SFQ Base (write only)
<byte 7284>
ulong value As longword
endunion sfq_base (Offset 050) SFQ Base (write only)
<byte 7288>
union sfq_len (Offset 054) SFQ Length (write only)
<byte 7288>
{field (By field)}
<byte 7288>
lbits:12 length SFQ Length
lbits:20 reserved Reserved
{}
or sfq_len (Offset 054) SFQ Length (write only)
<byte 7288>
ulong value As longword
endunion sfq_len (Offset 054) SFQ Length (write only)
<byte 7292>
union sfq_cons (Offset 058) SFQ Consumer Index
<byte 7292>
{field (By field)}
<byte 7292>
lbits:12 index SFQ Consumer Index
lbits:20 reserved Reserved
{}
or sfq_cons (Offset 058) SFQ Consumer Index
<byte 7292>
ulong value As longword
endunion sfq_cons (Offset 058) SFQ Consumer Index
<byte 7296>
{rsvd2[0] ((Offset 05C-07B) Reserved)}
<byte 7296>
ulong value
{}
<byte 7300>
{rsvd2[1] ((Offset 05C-07B) Reserved)}
<byte 7300>
ulong value
{}
<byte 7304>
{rsvd2[2] ((Offset 05C-07B) Reserved)}
<byte 7304>
ulong value
{}
<byte 7308>
{rsvd2[3] ((Offset 05C-07B) Reserved)}
<byte 7308>
ulong value
{}
<byte 7312>
{rsvd2[4] ((Offset 05C-07B) Reserved)}
<byte 7312>
ulong value
{}
<byte 7316>
{rsvd2[5] ((Offset 05C-07B) Reserved)}
<byte 7316>
ulong value
{}
<byte 7320>
{rsvd2[6] ((Offset 05C-07B) Reserved)}
<byte 7320>
ulong value
{}
<byte 7324>
{rsvd2[7] ((Offset 05C-07B) Reserved)}
<byte 7324>
ulong value
{}
<byte 7328>
union int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 7328>
{field (By field)}
<byte 7328>
lbits:4 timer Interrupt Timer Value
lbits:3 reserved Reserved
lbits:1 ihf Interrupt when IMQ Half Full
lbits:24 reserved1 Reserved
{}
or int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 7328>
ulong value As longword
endunion int_delay_timer (Offset 07C) Interrupt Delay Timer (write only)
<byte 7332>
union imq_base (Offset 080) IMQ Base (write only)
<byte 7332>
{field (By field)}
<byte 7332>
lbits:32 address IMQ Base Address
{}
or imq_base (Offset 080) IMQ Base (write only)
<byte 7332>
ulong value As longword
endunion imq_base (Offset 080) IMQ Base (write only)
<byte 7336>
union imq_len (Offset 084) IMQ Length (write only)
<byte 7336>
{field (By field)}
<byte 7336>
lbits:12 length IMQ Length
lbits:20 reserved Reserved
{}
or imq_len (Offset 084) IMQ Length (write only)
<byte 7336>
ulong value As longword
endunion imq_len (Offset 084) IMQ Length (write only)
<byte 7340>
union imq_cons (Offset 088) IMQ Consumer Index
<byte 7340>
{field (By field)}
<byte 7340>
lbits:12 index IMQ Consumer Index
lbits:20 reserved Reserved
{}
or imq_cons (Offset 088) IMQ Consumer Index
<byte 7340>
ulong value As longword
endunion imq_cons (Offset 088) IMQ Consumer Index
<byte 7344>
union imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 7344>
{field (By field)}
<byte 7344>
lbits:32 address IMQ Producer Index Address
{}
or imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 7344>
ulong value As longword
endunion imq_prod_adr (Offset 08C) IMQ Producer Index Address (write only)
<byte 7348>
{rsvd3[0] ((Offset 090-0FC) Reserved)}
<byte 7348>
ulong value
{}
<byte 7352>
{rsvd3[1] ((Offset 090-0FC) Reserved)}
<byte 7352>
ulong value
{}
<byte 7356>
{rsvd3[2] ((Offset 090-0FC) Reserved)}
<byte 7356>
ulong value
{}
<byte 7360>
{rsvd3[3] ((Offset 090-0FC) Reserved)}
<byte 7360>
ulong value
{}
<byte 7364>
{rsvd3[4] ((Offset 090-0FC) Reserved)}
<byte 7364>
ulong value
{}
<byte 7368>
{rsvd3[5] ((Offset 090-0FC) Reserved)}
<byte 7368>
ulong value
{}
<byte 7372>
{rsvd3[6] ((Offset 090-0FC) Reserved)}
<byte 7372>
ulong value
{}
<byte 7376>
{rsvd3[7] ((Offset 090-0FC) Reserved)}
<byte 7376>
ulong value
{}
<byte 7380>
{rsvd3[8] ((Offset 090-0FC) Reserved)}
<byte 7380>
ulong value
{}
<byte 7384>
{rsvd3[9] ((Offset 090-0FC) Reserved)}
<byte 7384>
ulong value
{}
<byte 7388>
{rsvd3[10] ((Offset 090-0FC) Reserved)}
<byte 7388>
ulong value
{}
<byte 7392>
{rsvd3[11] ((Offset 090-0FC) Reserved)}
<byte 7392>
ulong value
{}
<byte 7396>
{rsvd3[12] ((Offset 090-0FC) Reserved)}
<byte 7396>
ulong value
{}
<byte 7400>
{rsvd3[13] ((Offset 090-0FC) Reserved)}
<byte 7400>
ulong value
{}
<byte 7404>
{rsvd3[14] ((Offset 090-0FC) Reserved)}
<byte 7404>
ulong value
{}
<byte 7408>
{rsvd3[15] ((Offset 090-0FC) Reserved)}
<byte 7408>
ulong value
{}
<byte 7412>
{rsvd3[16] ((Offset 090-0FC) Reserved)}
<byte 7412>
ulong value
{}
<byte 7416>
{rsvd3[17] ((Offset 090-0FC) Reserved)}
<byte 7416>
ulong value
{}
<byte 7420>
{rsvd3[18] ((Offset 090-0FC) Reserved)}
<byte 7420>
ulong value
{}
<byte 7424>
{rsvd3[19] ((Offset 090-0FC) Reserved)}
<byte 7424>
ulong value
{}
<byte 7428>
{rsvd3[20] ((Offset 090-0FC) Reserved)}
<byte 7428>
ulong value
{}
<byte 7432>
{rsvd3[21] ((Offset 090-0FC) Reserved)}
<byte 7432>
ulong value
{}
<byte 7436>
{rsvd3[22] ((Offset 090-0FC) Reserved)}
<byte 7436>
ulong value
{}
<byte 7440>
{rsvd3[23] ((Offset 090-0FC) Reserved)}
<byte 7440>
ulong value
{}
<byte 7444>
{rsvd3[24] ((Offset 090-0FC) Reserved)}
<byte 7444>
ulong value
{}
<byte 7448>
{rsvd3[25] ((Offset 090-0FC) Reserved)}
<byte 7448>
ulong value
{}
<byte 7452>
{rsvd3[26] ((Offset 090-0FC) Reserved)}
<byte 7452>
ulong value
{}
<byte 7456>
{rsvd3[27] ((Offset 090-0FC) Reserved)}
<byte 7456>
ulong value
{}
<byte 7460>
union fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 7460>
{field (By field)}
<byte 7460>
lbits:1 x50 50 Ohms Termination Enable
lbits:2 xtr Termination Receive
lbits:2 xtt Termination Transmit
lbits:3 xta Transmitter Amplitude
lbits:1 xwb Wrapback
lbits:1 reserved Reserved
lbits:1 txo Transmitter Off
lbits:1 reserved1 Reserved
lbits:1 xlp Loopback
lbits:2 xem Output Emphasis
lbits:1 reserved2 Reserved
lbits:2 xrz Receiver Zero Adjust
lbits:2 xrp Receiver Pole Adjust
lbits:2 xtz Transmitter Zero Adjust
lbits:2 xtp Transmitter Pole Adjust
lbits:2 rxs Receiver Speed
lbits:2 txs Transmitter Speed
lbits:1 ean Enable Auto Speed Negotiation
lbits:1 xlr Force iTR to lock reference clock
lbits:1 asp Auto Speed Negotiation in Progress
lbits:1 xcv Type of Transceiver
{}
or fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 7460>
ulong value As longword
endunion fm_config3 (Offset 100) Frame Manager Configuration 3
<byte 7464>
union fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 7464>
{field (By field)}
<byte 7464>
lbits:4 psm Port State Machine
lbits:4 lsm Loop State Machine
lbits:1 ldn Link Down
lbits:1 lup Link Up
lbits:1 es Elastic Store Error
lbits:1 ce Credit Error
lbits:1 lf Link Failure
lbits:1 lg Login Required
lbits:1 ptx Primitive Transmitted
lbits:1 prx Primitive Received
lbits:1 ba Bad AL_PA
lbits:1 lpf LIPf
lbits:1 sto State Time-out
lbits:1 ols OLS/NOS Received
lbits:1 lpb Loop Port Bypass (LPB) Primitive Sequence Received
lbits:1 lpe Loop Port Enable (LPE) Primitive Sequence Received
lbits:1 drs Directed LIP Sequence Received
lbits:1 reserved Reserved
lbits:1 ls Loss of Signal
lbits:1 os Out of Synchronization
lbits:1 flt Link Fault
lbits:1 reserved1 Reserved
lbits:1 byp Node Bypassed
lbits:1 np Non-Participating
lbits:1 tp Transmit Parity Error
lbits:1 lp Loop
{}
or fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 7464>
ulong value As longword
endunion fm_statuss (Offset 104) Frame Manager Status Shadow (read only)
<byte 7468>
{rsvd3a[0] ((Offset 108-13F) Reserved)}
<byte 7468>
ulong value
{}
<byte 7472>
{rsvd3a[1] ((Offset 108-13F) Reserved)}
<byte 7472>
ulong value
{}
<byte 7476>
{rsvd3a[2] ((Offset 108-13F) Reserved)}
<byte 7476>
ulong value
{}
<byte 7480>
{rsvd3a[3] ((Offset 108-13F) Reserved)}
<byte 7480>
ulong value
{}
<byte 7484>
{rsvd3a[4] ((Offset 108-13F) Reserved)}
<byte 7484>
ulong value
{}
<byte 7488>
{rsvd3a[5] ((Offset 108-13F) Reserved)}
<byte 7488>
ulong value
{}
<byte 7492>
{rsvd3a[6] ((Offset 108-13F) Reserved)}
<byte 7492>
ulong value
{}
<byte 7496>
{rsvd3a[7] ((Offset 108-13F) Reserved)}
<byte 7496>
ulong value
{}
<byte 7500>
{rsvd3a[8] ((Offset 108-13F) Reserved)}
<byte 7500>
ulong value
{}
<byte 7504>
{rsvd3a[9] ((Offset 108-13F) Reserved)}
<byte 7504>
ulong value
{}
<byte 7508>
{rsvd3a[10] ((Offset 108-13F) Reserved)}
<byte 7508>
ulong value
{}
<byte 7512>
{rsvd3a[11] ((Offset 108-13F) Reserved)}
<byte 7512>
ulong value
{}
<byte 7516>
{rsvd3a[12] ((Offset 108-13F) Reserved)}
<byte 7516>
ulong value
{}
<byte 7520>
{rsvd3a[13] ((Offset 108-13F) Reserved)}
<byte 7520>
ulong value
{}
<byte 7524>
union sest_base (Offset 140) SEST Base (write only)
<byte 7524>
{field (By field)}
<byte 7524>
lbits:32 address SEST Base Address
{}
or sest_base (Offset 140) SEST Base (write only)
<byte 7524>
ulong value As longword
endunion sest_base (Offset 140) SEST Base (write only)
<byte 7528>
union sest_len (Offset 144) SEST Length (write only)
<byte 7528>
{field (By field)}
<byte 7528>
lbits:16 length SEST Length
lbits:16 reserved Reserved
{}
or sest_len (Offset 144) SEST Length (write only)
<byte 7528>
ulong value As longword
endunion sest_len (Offset 144) SEST Length (write only)
<byte 7532>
{rsvd4 ((Offset 148) Reserved)}
<byte 7532>
ulong value
{}
<byte 7536>
union scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 7536>
{field (By field)}
<byte 7536>
lbits:16 tail Tail
lbits:16 head Head
{}
or scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 7536>
ulong value As longword
endunion scsi_link_lst (Offset 14C) SCSI Linked List Head and Tail
<byte 7540>
union spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 7540>
{field (By field)}
<byte 7540>
lbits:1 sra SPI SRAM Access
lbits:10 rsvd Reserved
lbits:21 address RAM/ROM Address
{}
or spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 7540>
ulong value As longword
endunion spiaddr (Offset 150) SPI RAM/ROM Address (write only)
<byte 7544>
union spidata (Offset 154) SPI RAM/ROM Data
<byte 7544>
union field By field
<byte 7544>
{ram (By field)}
<byte 7544>
lbits:32 data RAM data
{}
or field By field
<byte 7544>
{rom (By field)}
<byte 7544>
lbits:8 data ROM data
lbits:24 rsvd Reserved
{}
endunion field By field
or spidata (Offset 154) SPI RAM/ROM Data
<byte 7544>
ulong value As longword
endunion spidata (Offset 154) SPI RAM/ROM Data
<byte 7548>
{rsvd5[0] ((Offset 158-15C) Reserved)}
<byte 7548>
ulong value
{}
<byte 7552>
{rsvd5[1] ((Offset 158-15C) Reserved)}
<byte 7552>
ulong value
{}
<byte 7556>
union int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 7556>
{field (By field)}
<byte 7556>
lbits:32 address Interrupt Message Address
{}
or int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 7556>
ulong value As longword
endunion int_mess_adr (Offset 160) Interrupt Message Address (write only)
<byte 7560>
union int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 7560>
{field (By field)}
<byte 7560>
lbits:32 value Interrupt Message Value
{}
or int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 7560>
ulong value As longword
endunion int_mess_value (Offset 164) Interrupt Message Value (write only)
<byte 7564>
union sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 7564>
{field (By field)}
<byte 7564>
lbits:8 length SGL Page Length
lbits:24 reserved Reserved
{}
or sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 7564>
ulong value As longword
endunion sgl_page_len (Offset 168) Scatter/Gather List Page Length (write only)
<byte 7568>
union my_id (Offset 16C) My ID
<byte 7568>
{field (By field)}
<byte 7568>
lbits:24 id My ID
lbits:8 reserved Reserved
{}
or my_id (Offset 16C) My ID
<byte 7568>
ulong value As longword
endunion my_id (Offset 16C) My ID
<byte 7572>
union gpio (Offset 170) General Purpose I/O
<byte 7572>
{field (By field)}
<byte 7572>
lbits:1 gc0 General Purpose Control 0
lbits:1 gc1 General Purpose Control 1
lbits:1 gc2 General Purpose Control 2
lbits:1 gc3 General Purpose Control 3
lbits:1 gc4 General Purpose Control 4
lbits:1 gc5 General Purpose Control 5
lbits:1 gc6 General Purpose Control 6
lbits:1 gc7 General Purpose Control 7
lbits:8 reserved Reserved
lbits:1 gp0 General Purpose I/O 0
lbits:1 gp1 General Purpose I/O 1
lbits:1 gp2 General Purpose I/O 2
lbits:1 gp3 General Purpose I/O 3
lbits:1 gp4 General Purpose Input 4
lbits:1 gp5 General Purpose I/O 5
lbits:1 gp6 General Purpose I/O 6
lbits:1 gp7 General Purpose I/O 7
lbits:8 reserved1 Reserved
{}
or gpio (Offset 170) General Purpose I/O
<byte 7572>
ulong value As longword
endunion gpio (Offset 170) General Purpose I/O
<byte 7576>
{rsvd6[0] ((Offset 174-17F) Reserved)}
<byte 7576>
ulong value
{}
<byte 7580>
{rsvd6[1] ((Offset 174-17F) Reserved)}
<byte 7580>
ulong value
{}
<byte 7584>
{rsvd6[2] ((Offset 174-17F) Reserved)}
<byte 7584>
ulong value
{}
<byte 7588>
union tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 7588>
{field (By field)}
<byte 7588>
lbits:9 pfs Programmable Frame Size
lbits:15 reserved Reserved
lbits:8 esi_range Exchange_ID Signaled Interrupt Range
{}
or tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 7588>
ulong value As longword
endunion tach_config2 (Offset 180) Tachyon XL2 Configuration 2
<byte 7592>
union tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 7592>
{field (By field)}
<byte 7592>
lbits:1 fad FCP Assist Disable
lbits:1 ino In Order
lbits:1 dof Discard OOO FCP Frames
lbits:1 fua FCP Unassisted ACK Enable
lbits:1 ime Interrupt Message Enable
lbits:1 fab Fabric
lbits:1 sic S_ID Copy Enable
lbits:1 eqs Equal Service
lbits:1 reserved Reserved
lbits:1 cae Concurrent Access Enable
lbits:14 reserved1 Reserved
lbits:1 fc2 FCP Class 2 Reassembly Enable
lbits:1 reserved2 Reserved
lbits:1 sdf Save Discarded Frames
lbits:1 rde Response Detect Enable
lbits:1 dam Default ACK Model
lbits:3 reserved3 Reserved
{}
or tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 7592>
ulong value As longword
endunion tach_config (Offset 184) Tachyon XL2 Configuration 1
<byte 7596>
union tach_control (Offset 188) Tachyon XL2 Control
<byte 7596>
{field (By field)}
<byte 7596>
lbits:1 gc0 General Purpose Control 0
lbits:1 gc1 General Purpose Control 1
lbits:1 gc2 General Purpose Control 2
lbits:1 gc3 General Purpose Control 3
lbits:1 gc4 General Purpose Control 4
lbits:3 reserved Reserved
lbits:1 feq Freeze ERQ
lbits:1 ffa Freeze FCP Assists
lbits:2 reserved1 Reserved
lbits:1 fis Freeze Inbound FCP Assists When Frame Placed in SFQ
lbits:1 fib Freeze Inbound FCP Assists
lbits:2 reserved2 Reserved
lbits:1 req Resume ERQ
lbits:1 rif Resume Inbound FCP Assists
lbits:1 rof Resume Outbound FCP Assists
lbits:12 reserved3 Reserved
lbits:1 crs Core Reset
{}
or tach_control (Offset 188) Tachyon XL2 Control
<byte 7596>
ulong value As longword
endunion tach_control (Offset 188) Tachyon XL2 Control
<byte 7600>
union tach_status (Offset 18C) Tachyon XL2 Status
<byte 7600>
{field (By field)}
<byte 7600>
lbits:1 gp0 General Purpose I/O 0
lbits:1 gp1 General Purpose I/O 1
lbits:1 gp2 General Purpose I/O 2
lbits:1 gp3 General Purpose I/O 3
lbits:1 gp4 General Purpose Input 4
lbits:5 revid Device Revision ID
lbits:1 ipe Inbound Parity Error
lbits:1 ope Outbound Parity Error
lbits:4 reserved Reserved
lbits:1 eqf ERQ Frozen
lbits:1 iff Inbound FCP Assists Frozen
lbits:1 off Outbound FCP Assists Frozen
lbits:6 reserved1 Reserved
lbits:1 m66 66 Mhz Enabled
lbits:1 ile Inbound Link Control FIFO Empty
lbits:1 ole Outbound Link Control List Empty
lbits:1 ife Inbound FIFO Empty
lbits:1 ofe Outbound FIFO Empty
lbits:1 imf IMQ Full
lbits:1 ssf SFQ Full
{}
or tach_status (Offset 18C) Tachyon XL2 Status
<byte 7600>
ulong value As longword
endunion tach_status (Offset 18C) Tachyon XL2 Status
<byte 7604>
{rsvd7 ((Offset 190) Reserved)}
<byte 7604>
ulong value
{}
<byte 7608>
union hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 7608>
{field (By field)}
<byte 7608>
lbits:12 length Frame Length
lbits:7 reserved Reserved
lbits:12 upper_addr Frame Upper Address
lbits:1 reserved1 Reserved
{}
or hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 7608>
ulong value As longword
endunion hi_pri_send1 (Offset 194) High Priority Send 1 (write only)
<byte 7612>
union hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 7612>
{field (By field)}
<byte 7612>
lbits:12 length Frame Length
lbits:7 reserved Reserved
lbits:12 upper_addr Frame Upper Address
lbits:1 reserved1 Reserved
{}
or hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 7612>
ulong value As longword
endunion hi_pri_send2 (Offset 198) High Priority Send 2 (write only)
<byte 7616>
union inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 7616>
{field (By field)}
<byte 7616>
lbits:24 reserved Reserved
lbits:8 sest_lru_count SEST LRU Count
{}
or inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 7616>
ulong value As longword
endunion inbound_rstat1 (Offset 19C) Inbound Resource Status 1
<byte 7620>
union inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 7620>
{field (By field)}
<byte 7620>
lbits:8 discd_frames Discarded Frame Count
lbits:24 reserved Reserved
{}
or inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 7620>
ulong value As longword
endunion inbound_rstat2 (Offset 1A0) Inbound Resource Status 2
<byte 7624>
union ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 7624>
{field (By field)}
<byte 7624>
lbits:28 threshold EE_Credit Zero Timer Threshold
lbits:4 reserved Reserved
{}
or ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 7624>
ulong value As longword
endunion ee_cr_z_tmr_thr (Offset 1A4) EE_Credit Zero Timer Threshold (write only)
<byte 7628>
union up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 7628>
{field (By field)}
<byte 7628>
lbits:13 reserved Reserved
lbits:19 upper_addr Upper Data Address
{}
or up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 7628>
ulong value As longword
endunion up_data_addr (Offset 1A8) Upper Data Address (write only)
<byte 7632>
union up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 7632>
{field (By field)}
<byte 7632>
lbits:32 upper_addr Upper Control Address
{}
or up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 7632>
ulong value As longword
endunion up_ctrl_addr (Offset 1AC) Upper Control Address (write only)
<byte 7636>
union dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 7636>
{field (By field)}
<byte 7636>
lbits:1 ef AL_PA 0xEF DHD Login Information
lbits:1 e8 AL_PA 0xE8 DHD Login Information
lbits:1 e4 AL_PA 0xE4 DHD Login Information
lbits:1 e2 AL_PA 0xE2 DHD Login Information
lbits:1 e1 AL_PA 0xE1 DHD Login Information
lbits:1 e0 AL_PA 0xE0 DHD Login Information
lbits:1 dc AL_PA 0xDC DHD Login Information
lbits:1 da AL_PA 0xDA DHD Login Information
lbits:1 d9 AL_PA 0xD9 DHD Login Information
lbits:1 d6 AL_PA 0xD6 DHD Login Information
lbits:1 d5 AL_PA 0xD5 DHD Login Information
lbits:1 d4 AL_PA 0xD4 DHD Login Information
lbits:1 d3 AL_PA 0xD3 DHD Login Information
lbits:1 d2 AL_PA 0xD2 DHD Login Information
lbits:1 d1 AL_PA 0xD1 DHD Login Information
lbits:1 ce AL_PA 0xCE DHD Login Information
lbits:1 cd AL_PA 0xCD DHD Login Information
lbits:1 cc AL_PA 0xCC DHD Login Information
lbits:1 cb AL_PA 0xCB DHD Login Information
lbits:1 ca AL_PA 0xCA DHD Login Information
lbits:1 c9 AL_PA 0xC9 DHD Login Information
lbits:1 c7 AL_PA 0xC7 DHD Login Information
lbits:1 c6 AL_PA 0xC6 DHD Login Information
lbits:1 c5 AL_PA 0xC5 DHD Login Information
lbits:1 c3 AL_PA 0xC3 DHD Login Information
lbits:1 bc AL_PA 0xBC DHD Login Information
lbits:1 ba AL_PA 0xBA DHD Login Information
lbits:1 b9 AL_PA 0xB9 DHD Login Information
lbits:1 b6 AL_PA 0xB6 DHD Login Information
lbits:1 b5 AL_PA 0xB5 DHD Login Information
lbits:1 b4 AL_PA 0xB4 DHD Login Information
lbits:1 b3 AL_PA 0xB3 DHD Login Information
{}
or dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 7636>
ulong value As longword
endunion dyn_half_dup3 (Offset 1B0) Dynamic Half Duplex 3
<byte 7640>
union dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 7640>
{field (By field)}
<byte 7640>
lbits:1 alpab2 AL_PA 0xB2 DHD Login Information
lbits:1 alpab1 AL_PA 0xB1 DHD Login Information
lbits:1 alpaae AL_PA 0xAE DHD Login Information
lbits:1 alpaad AL_PA 0xAD DHD Login Information
lbits:1 alpaac AL_PA 0xAC DHD Login Information
lbits:1 alpaab AL_PA 0xAB DHD Login Information
lbits:1 alpaaa AL_PA 0xAA DHD Login Information
lbits:1 alpaa9 AL_PA 0xA9 DHD Login Information
lbits:1 alpaa7 AL_PA 0xA7 DHD Login Information
lbits:1 alpaa6 AL_PA 0xA6 DHD Login Information
lbits:1 alpaa5 AL_PA 0xA5 DHD Login Information
lbits:1 alpaa3 AL_PA 0xA3 DHD Login Information
lbits:1 alpa9f AL_PA 0x9F DHD Login Information
lbits:1 alpa9e AL_PA 0x9E DHD Login Information
lbits:1 alpa9d AL_PA 0x9D DHD Login Information
lbits:1 alpa9b AL_PA 0x9B DHD Login Information
lbits:1 alpa98 AL_PA 0x98 DHD Login Information
lbits:1 alpa97 AL_PA 0x97 DHD Login Information
lbits:1 alpa90 AL_PA 0x90 DHD Login Information
lbits:1 alpa8f AL_PA 0x8F DHD Login Information
lbits:1 alpa88 AL_PA 0x88 DHD Login Information
lbits:1 alpa84 AL_PA 0x84 DHD Login Information
lbits:1 alpa82 AL_PA 0x82 DHD Login Information
lbits:1 alpa81 AL_PA 0x81 DHD Login Information
lbits:1 alpa80 AL_PA 0x80 DHD Login Information
lbits:1 alpa7c AL_PA 0x7C DHD Login Information
lbits:1 alpa7a AL_PA 0x7A DHD Login Information
lbits:1 alpa79 AL_PA 0x79 DHD Login Information
lbits:1 alpa76 AL_PA 0x76 DHD Login Information
lbits:1 alpa75 AL_PA 0x75 DHD Login Information
lbits:1 alpa74 AL_PA 0x74 DHD Login Information
lbits:1 alpa73 AL_PA 0x73 DHD Login Information
{}
or dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 7640>
ulong value As longword
endunion dyn_half_dup2 (Offset 1B4) Dynamic Half Duplex 2
<byte 7644>
union dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 7644>
{field (By field)}
<byte 7644>
lbits:1 alpa72 AL_PA 0x72 DHD Login Information
lbits:1 alpa71 AL_PA 0x71 DHD Login Information
lbits:1 alpa6e AL_PA 0x6E DHD Login Information
lbits:1 alpa6d AL_PA 0x6D DHD Login Information
lbits:1 alpa6c AL_PA 0x6C DHD Login Information
lbits:1 alpa6b AL_PA 0x6B DHD Login Information
lbits:1 alpa6a AL_PA 0x6A DHD Login Information
lbits:1 alpa69 AL_PA 0x69 DHD Login Information
lbits:1 alpa67 AL_PA 0x67 DHD Login Information
lbits:1 alpa66 AL_PA 0x66 DHD Login Information
lbits:1 alpa65 AL_PA 0x65 DHD Login Information
lbits:1 alpa63 AL_PA 0x63 DHD Login Information
lbits:1 alpa5c AL_PA 0x5C DHD Login Information
lbits:1 alpa5a AL_PA 0x5A DHD Login Information
lbits:1 alpa59 AL_PA 0x59 DHD Login Information
lbits:1 alpa56 AL_PA 0x56 DHD Login Information
lbits:1 alpa55 AL_PA 0x55 DHD Login Information
lbits:1 alpa54 AL_PA 0x54 DHD Login Information
lbits:1 alpa53 AL_PA 0x53 DHD Login Information
lbits:1 alpa52 AL_PA 0x52 DHD Login Information
lbits:1 alpa51 AL_PA 0x51 DHD Login Information
lbits:1 alpa4e AL_PA 0x4E DHD Login Information
lbits:1 alpa4d AL_PA 0x4D DHD Login Information
lbits:1 alpa4c AL_PA 0x4C DHD Login Information
lbits:1 alpa4b AL_PA 0x4B DHD Login Information
lbits:1 alpa4a AL_PA 0x4A DHD Login Information
lbits:1 alpa49 AL_PA 0x49 DHD Login Information
lbits:1 alpa47 AL_PA 0x47 DHD Login Information
lbits:1 alpa46 AL_PA 0x46 DHD Login Information
lbits:1 alpa45 AL_PA 0x45 DHD Login Information
lbits:1 alpa43 AL_PA 0x43 DHD Login Information
lbits:1 alpa3c AL_PA 0x3C DHD Login Information
{}
or dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 7644>
ulong value As longword
endunion dyn_half_dup1 (Offset 1B8) Dynamic Half Duplex 1
<byte 7648>
union dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 7648>
{field (By field)}
<byte 7648>
lbits:1 alpa3a AL_PA 0x3A DHD Login Information
lbits:1 alpa39 AL_PA 0x39 DHD Login Information
lbits:1 alpa36 AL_PA 0x36 DHD Login Information
lbits:1 alpa35 AL_PA 0x35 DHD Login Information
lbits:1 alpa34 AL_PA 0x34 DHD Login Information
lbits:1 alpa33 AL_PA 0x33 DHD Login Information
lbits:1 alpa32 AL_PA 0x32 DHD Login Information
lbits:1 alpa31 AL_PA 0x31 DHD Login Information
lbits:1 alpa2e AL_PA 0x2E DHD Login Information
lbits:1 alpa2d AL_PA 0x2D DHD Login Information
lbits:1 alpa2c AL_PA 0x2C DHD Login Information
lbits:1 alpa2b AL_PA 0x2B DHD Login Information
lbits:1 alpa2a AL_PA 0x2A DHD Login Information
lbits:1 alpa29 AL_PA 0x29 DHD Login Information
lbits:1 alpa27 AL_PA 0x27 DHD Login Information
lbits:1 alpa26 AL_PA 0x26 DHD Login Information
lbits:1 alpa25 AL_PA 0x25 DHD Login Information
lbits:1 alpa23 AL_PA 0x23 DHD Login Information
lbits:1 alpa1f AL_PA 0x1F DHD Login Information
lbits:1 alpa1e AL_PA 0x1E DHD Login Information
lbits:1 alpa1d AL_PA 0x1D DHD Login Information
lbits:1 alpa1b AL_PA 0x1B DHD Login Information
lbits:1 alpa18 AL_PA 0x18 DHD Login Information
lbits:1 alpa17 AL_PA 0x17 DHD Login Information
lbits:1 alpa10 AL_PA 0x10 DHD Login Information
lbits:1 alpa0f AL_PA 0x0F DHD Login Information
lbits:1 alpa08 AL_PA 0x08 DHD Login Information
lbits:1 alpa04 AL_PA 0x04 DHD Login Information
lbits:1 alpa02 AL_PA 0x02 DHD Login Information
lbits:1 alpa01 AL_PA 0x01 DHD Login Information
lbits:1 alpa00 AL_PA 0x00 DHD Login Information
lbits:1 reserved Reserved
{}
or dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 7648>
ulong value As longword
endunion dyn_half_dup0 (Offset 1BC) Dynamic Half Duplex 0
<byte 7652>
union fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 7652>
{field (By field)}
<byte 7652>
lbits:1 bli Bypass Loop Initialization
lbits:1 reserved Reserved
lbits:1 enp Enable N_Port Mode
lbits:1 lr Login Required
lbits:1 inif Initialize as Fabric
lbits:1 rf Respond to Fabric Address
lbits:1 blm Bypass Loop Map
lbits:1 sa Acquire Soft Address
lbits:1 ha Acquire Hard Address
lbits:1 aq Acquire Previously Acquired Address
lbits:1 fa Acquire Fabric Aquired Address
lbits:1 td Timer Disable
lbits:1 sap Skip Arbitration Phase
lbits:1 elb External Loopback/Pad Loopback
lbits:1 ilb Internal loopback
lbits:1 npi Initialize as N_Port
lbits:8 bb_credit BB_Credit
lbits:8 al_pa Desired AL_PA
{}
or fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 7652>
ulong value As longword
endunion fm_config1 (Offset 1C0) Frame Manager Configuration 1
<byte 7656>
union fm_control (Offset 1C4) Frame Manager Control
<byte 7656>
{field (By field)}
<byte 7656>
lbits:3 cmd State Machine Command
lbits:1 cl Close Loop Request
lbits:1 ipe Initiate Port Enable
lbits:1 sp Send Prim_Reg
lbits:1 sq Primitive Sequence
lbits:1 sas Start Auto-Speed Negotiation
lbits:24 reserved Reserved
{}
or fm_control (Offset 1C4) Frame Manager Control
<byte 7656>
ulong value As longword
endunion fm_control (Offset 1C4) Frame Manager Control
<byte 7660>
union fm_status (Offset 1C8) Frame Manager Status
<byte 7660>
{field (By field)}
<byte 7660>
lbits:4 psm Port State Machine
lbits:4 lsm Loop State Machine
lbits:1 ldn Link Down
lbits:1 lup Link Up
lbits:1 es Elastic Store Error
lbits:1 ce Credit Error
lbits:1 lf Link Failure
lbits:1 lg Login Required
lbits:1 ptx Primitive Transmitted
lbits:1 prx Primitive Received
lbits:1 ba Bad AL_PA
lbits:1 lpf LIPf
lbits:1 sto State Time-out
lbits:1 ols OLS/NOS Received
lbits:1 lpb Loop Port Bypass (LPB) Primitive Sequence Received
lbits:1 lpe Loop Port Enable (LPE) Primitive Sequence Received
lbits:1 drs Directed LIP Sequence Received
lbits:1 reserved Reserved
lbits:1 ls Loss of Signal
lbits:1 os Out of Synchronization
lbits:1 flt Link Fault
lbits:1 reserved1 Reserved
lbits:1 byp Node Bypassed
lbits:1 np Non-Participating
lbits:1 tp Transmit Parity Error
lbits:1 lp Loop
{}
or fm_status (Offset 1C8) Frame Manager Status
<byte 7660>
ulong value As longword
endunion fm_status (Offset 1C8) Frame Manager Status
<byte 7664>
union fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 7664>
{field (By field)}
<byte 7664>
lbits:16 ed_tov Error Detect Time-Out
lbits:9 rt_tov Receiver Transmitter Time-Out
lbits:7 reserved Reserved
{}
or fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 7664>
ulong value As longword
endunion fm_to_values1 (Offset 1CC) Frame Manager Time-Out Values 1
<byte 7668>
union fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 7668>
{field (By field)}
<byte 7668>
lbits:8 link_fail Link Fail Count
lbits:8 loss_of_sync Loss of Synchronization Count
lbits:8 bad_rx_char Bad Received Character Count
lbits:8 loss_of_signal Loss of Signal Count
{}
or fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 7668>
ulong value As longword
endunion fm_link_stat1 (Offset 1D0) Frame Manager Link Status 1
<byte 7672>
union fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 7672>
{field (By field)}
<byte 7672>
lbits:8 proto_er Protocol Error Count
lbits:8 bad_crc Bad CRC Count
lbits:8 dis_frm Discarded Frames
lbits:8 rx_eofa Received EOFa
{}
or fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 7672>
ulong value As longword
endunion fm_link_stat2 (Offset 1D4) Frame Manager Link Status 2
<byte 7676>
union fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 7676>
{field (By field)}
<byte 7676>
lbits:9 al_time Arbitrated Loop Time-Out
lbits:7 reserved Reserved
lbits:16 lp_tov Loop Time-Out
{}
or fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 7676>
ulong value As longword
endunion fm_to_values2 (Offset 1D8) Frame Manager Time-Out Values 2
<byte 7680>
union fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 7680>
{field (By field)}
<byte 7680>
lbits:24 bb0_timer BB_Credit Timer
lbits:8 reserved Reserved
{}
or fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 7680>
ulong value As longword
endunion fm_bb0_timer (Offset 1DC) Frame Manager BB_Credit Zero Timer
<byte 7684>
union fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 7684>
{field (By field)}
<byte 7684>
lbits:32 wwn World Wide Name
{}
or fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 7684>
ulong value As longword
endunion fm_wwn_hi (Offset 1E0) Frame Manager World Wide Name High
<byte 7688>
union fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 7688>
{field (By field)}
<byte 7688>
lbits:32 wwn World Wide Name
{}
or fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 7688>
ulong value As longword
endunion fm_wwn_lo (Offset 1E4) Frame Manager World Wide Name Low
<byte 7692>
union fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 7692>
{field (By field)}
<byte 7692>
lbits:8 lipf_alpa AL_PA of Most Recent LIPf Received
lbits:8 bad_alpa AL_PA of Most Recent OPN Sent and Returned Without Being Accepted
lbits:8 acq_alpa AL_PA Acquired During Loop Initialization
lbits:8 reserved Reserved
{}
or fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 7692>
ulong value As longword
endunion fm_rcvd_al_pa (Offset 1E8) Frame Manager Received AL_PA
<byte 7696>
union fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 7696>
{field (By field)}
<byte 7696>
lbits:24 prim_value Primitive to be Sent
lbits:8 reserved Reserved
{}
or fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 7696>
ulong value As longword
endunion fm_primitive (Offset 1EC) Frame Manager Primitive
<byte 7700>
union fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 7700>
{field (By field)}
<byte 7700>
lbits:8 exp_frm Expired Frames
lbits:24 reserved Reserved
{}
or fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 7700>
ulong value As longword
endunion fm_link_stat3 (Offset 1F0) Frame Manager Link Status 3
<byte 7704>
union fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 7704>
{field (By field)}
<byte 7704>
lbits:1 dac Disable Auto Close
lbits:2 nbc Non-zero Login BB_Credit
lbits:1 eei Enable ERR_INIT
lbits:1 icb Ignore Close Bit
lbits:2 atv Arbitration Threshold Value
lbits:1 gde Garbage Deletion Enable
lbits:8 laa Lowest Allowable AL_PA
lbits:8 reserved Reserved
lbits:1 reserved1 Reserved
lbits:1 prm Promiscuous Mode
lbits:1 wpe Wait For Port Enable
lbits:1 fmh Force Monitor State With Hard Address
lbits:1 fmn Force Monitor Non-participating State
lbits:1 dlm Disable Loop Master
lbits:1 dsa Disable Soft Address Selection
lbits:1 ilp Ignore LPB/LPE Primitive Sequences
{}
or fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 7704>
ulong value As longword
endunion fm_config2 (Offset 1F4) Frame Manager Configuration 2
<byte 7708>
union pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 7708>
{field (By field)}
<byte 7708>
union brstctr PCI Master Burst Count Control
<byte 7708>
{field (By field)}
<byte 7708>
tbits:4 read_burst PCI read burst count
tbits:4 write_burst PCI write burst count
{}
or brstctr PCI Master Burst Count Control
<byte 7708>
utiny value As byte
endunion brstctr PCI Master Burst Count Control
<byte 7709>
union waitctr PCI Master Wait Count Control
<byte 7709>
{field (By field)}
<byte 7709>
tbits:4 read_wait DMA read wait count
tbits:4 write_wait DMA write wait count
{}
or waitctr PCI Master Wait Count Control
<byte 7709>
utiny value As byte
endunion waitctr PCI Master Wait Count Control
<byte 7710>
union romctr PCI ROM Control
<byte 7710>
{field (By field)}
<byte 7710>
tbits:1 vpp_en ROM VPP Enable
tbits:1 fla Flash Installed (read only)
tbits:1 rom ROM Installed (read only)
tbits:1 rm0 RAM 0 (read only); combination of RAM 2, RAM 1, and RAM 0 describe static RAM configuration: 000 - none, 001 - 128KB, 010 - 256KB, 011 - 512KB, 100 - 1MB, 101 - 2MB, 110 - reserved, 111 - reserved
tbits:1 rm1 RAM 1 (read only)
tbits:1 svl Subsystem VID Loaded (read only)
tbits:1 par External memory parity checking enabled (read only)
tbits:1 rm2 RAM 2 (read only)
{}
or romctr PCI ROM Control
<byte 7710>
utiny value As byte
endunion romctr PCI ROM Control
<byte 7711>
union mctr PCI Master Control
<byte 7711>
{field (By field)}
<byte 7711>
tbits:1 ecl Enable MRM and MRL Completion to Cache Line
tbits:1 rrd PCI Memory Read Round Down Enable
tbits:1 p64 PCI Present and Active
tbits:1 rae Memory Read Alignment Enable
tbits:1 wae Memory Write Alignment Enable
tbits:1 rbe PCI Read Burst Counter Enable
tbits:1 wbe PCI Write Burst Counter Enable
tbits:1 dlt Disable Latency Timer
{}
or mctr PCI Master Control
<byte 7711>
utiny value As byte
endunion mctr PCI Master Control
{}
or pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 7708>
ulong value As longword
endunion pci_reg_1F8 (Offset 1F8) PCIMCTR/ROMCTR/WAITCTR/BRSTCTR
<byte 7712>
union pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
<byte 7712>
{field (By field)}
<byte 7712>
union softrst PCI Interface Reset Control
<byte 7712>
{field (By field)}
<byte 7712>
tbits:1 rst PCI Interface Soft Reset
tbits:1 dpe Reserved (must be zero)
tbits:1 rdd RAM/ROM Read Delayed Transaction Disabled
tbits:1 tad Target Abort Disable
tbits:4 rsvd Reserved (must be zero)
{}
or softrst PCI Interface Reset Control
<byte 7712>
utiny value As byte
endunion softrst PCI Interface Reset Control
<byte 7713>
union intpend PCI Interrupt Pending
<byte 7713>
{field (By field)}
<byte 7713>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or intpend PCI Interrupt Pending
<byte 7713>
utiny value As byte
endunion intpend PCI Interrupt Pending
<byte 7714>
union inten PCI Interrupt Enable
<byte 7714>
{field (By field)}
<byte 7714>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or inten PCI Interrupt Enable
<byte 7714>
utiny value As byte
endunion inten PCI Interrupt Enable
<byte 7715>
union intstat PCI Interrupt Status
<byte 7715>
{field (By field)}
<byte 7715>
tbits:1 per PCI Error Detected Interrupt
tbits:1 der Device Error Detected Interrupt
tbits:1 xl2int XL2 Interrupt
tbits:1 crs PCI Master Address Crossed 64-bit Boundary Interrupt
tbits:1 mpe External Memory Parity Error Interrupt
tbits:1 ube Unsupported Byte Enables
tbits:2 rsvd Reserved
{}
or intstat PCI Interrupt Status
<byte 7715>
utiny value As byte
endunion intstat PCI Interrupt Status
{}
or pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
<byte 7712>
ulong value As longword
endunion pci_reg_1FC (Offset 1FC) INTSTAT/INTEN/INTPEND/SOFTRST
{}
endunion csr[6] Tachyon XL2 CSR Registers
<byte 7716>
union gbic_sid[0] GBIC Small Form Factor Serial ID data
<byte 7716>
ulong[33] gbic_sida GBIC Small Form Factor Serial ID Data As Longwords
or gbic_sid[0] GBIC Small Form Factor Serial ID data
<byte 7716>
{gbic_sid (GBIC Small Form Factor Serial ID Data By Field)}
<byte 7716>
{base_id (Base ID Fields (Addresses 0-63))}
<byte 7716>
utiny transceiver0 Transceiver code 0
<byte 7717>
utiny connector Connector type
<byte 7718>
utiny ext_identifier Extended identifier
<byte 7719>
utiny identifier Identifier, transceiver type
<byte 7720>
utiny transceiver4 Transceiver code 4
<byte 7721>
utiny transceiver3 Transceiver code 3
<byte 7722>
utiny transceiver2 Transceiver code 2
<byte 7723>
utiny transceiver1 Transceiver code 1
<byte 7724>
utiny encoding Encoding
<byte 7725>
utiny transceiver7 Transceiver code 7
<byte 7726>
utiny transceiver6 Transceiver code 6
<byte 7727>
utiny transceiver5 Transceiver code 5
<byte 7728>
utiny distance_9u_100m 9u, Distance (100m units)
<byte 7729>
utiny distance_9u_km 9u, Distance (1000m units)
<byte 7730>
utiny reserved Reserved
<byte 7731>
utiny br_nom Baud rate, nominal
<byte 7732>
utiny reserved1 Reserved
<byte 7733>
utiny distance_cu CU, Distance (1m units)
<byte 7734>
utiny distance_60u_10m 60u, Distance (10m units)
<byte 7735>
utiny distance_50u_10m 50u, Distance (10m units)
<byte 7736>
utiny[16] vendor_name Vendor name
<byte 7752>
utiny[3] vendor_oui Vendor OUI
<byte 7755>
utiny reserved2 Reserved
<byte 7756>
utiny[16] vendor_pn Vendor part number
<byte 7772>
utiny[4] vendor_rev Vendor revision
<byte 7776>
utiny ccid CCID check code (Addresses 0-62)
<byte 7777>
utiny[3] reserved3 Reserved
{}
<byte 7780>
{extn_id (Extended ID Fields (Addresses 64-95))}
<byte 7780>
utiny br_min Baud rate, mmin (% lower margin)
<byte 7781>
utiny br_max Baud rate, max (% upper margin)
<byte 7782>
utiny[2] options Options
<byte 7784>
utiny[16] vendor_sn Vendor serial number
<byte 7800>
utiny[8] date_code Date code
<byte 7808>
utiny ccex CCEX check code (Addresses 64-94)
<byte 7809>
utiny[3] reserved Reserved
{}
<byte 7812>
{vend_id (Vendor Specific ID Fields (Addresses 96-127))}
<byte 7812>
utiny[32] vendor_specific_data
{}
<byte 7844>
ulong status Tachyon port diagnostic check code test result (not part of the SFF Serial data stream): 0 = Both check codes passed, 1 = CCID check code failed (addresses 0-62), 2 = CCEX check code failed (addresses 64-94), 3 = Both check codes failed, -1 = Data has not been read yet. NOTE: There is no check code for addresses 96-127.
{}
endunion gbic_sid[0] GBIC Small Form Factor Serial ID data
<byte 7848>
union gbic_sid[1] GBIC Small Form Factor Serial ID data
<byte 7848>
ulong[33] gbic_sida GBIC Small Form Factor Serial ID Data As Longwords
or gbic_sid[1] GBIC Small Form Factor Serial ID data
<byte 7848>
{gbic_sid (GBIC Small Form Factor Serial ID Data By Field)}
<byte 7848>
{base_id (Base ID Fields (Addresses 0-63))}
<byte 7848>
utiny transceiver0 Transceiver code 0
<byte 7849>
utiny connector Connector type
<byte 7850>
utiny ext_identifier Extended identifier
<byte 7851>
utiny identifier Identifier, transceiver type
<byte 7852>
utiny transceiver4 Transceiver code 4
<byte 7853>
utiny transceiver3 Transceiver code 3
<byte 7854>
utiny transceiver2 Transceiver code 2
<byte 7855>
utiny transceiver1 Transceiver code 1
<byte 7856>
utiny encoding Encoding
<byte 7857>
utiny transceiver7 Transceiver code 7
<byte 7858>
utiny transceiver6 Transceiver code 6
<byte 7859>
utiny transceiver5 Transceiver code 5
<byte 7860>
utiny distance_9u_100m 9u, Distance (100m units)
<byte 7861>
utiny distance_9u_km 9u, Distance (1000m units)
<byte 7862>
utiny reserved Reserved
<byte 7863>
utiny br_nom Baud rate, nominal
<byte 7864>
utiny reserved1 Reserved
<byte 7865>
utiny distance_cu CU, Distance (1m units)
<byte 7866>
utiny distance_60u_10m 60u, Distance (10m units)
<byte 7867>
utiny distance_50u_10m 50u, Distance (10m units)
<byte 7868>
utiny[16] vendor_name Vendor name
<byte 7884>
utiny[3] vendor_oui Vendor OUI
<byte 7887>
utiny reserved2 Reserved
<byte 7888>
utiny[16] vendor_pn Vendor part number
<byte 7904>
utiny[4] vendor_rev Vendor revision
<byte 7908>
utiny ccid CCID check code (Addresses 0-62)
<byte 7909>
utiny[3] reserved3 Reserved
{}
<byte 7912>
{extn_id (Extended ID Fields (Addresses 64-95))}
<byte 7912>
utiny br_min Baud rate, mmin (% lower margin)
<byte 7913>
utiny br_max Baud rate, max (% upper margin)
<byte 7914>
utiny[2] options Options
<byte 7916>
utiny[16] vendor_sn Vendor serial number
<byte 7932>
utiny[8] date_code Date code
<byte 7940>
utiny ccex CCEX check code (Addresses 64-94)
<byte 7941>
utiny[3] reserved Reserved
{}
<byte 7944>
{vend_id (Vendor Specific ID Fields (Addresses 96-127))}
<byte 7944>
utiny[32] vendor_specific_data
{}
<byte 7976>
ulong status Tachyon port diagnostic check code test result (not part of the SFF Serial data stream): 0 = Both check codes passed, 1 = CCID check code failed (addresses 0-62), 2 = CCEX check code failed (addresses 64-94), 3 = Both check codes failed, -1 = Data has not been read yet. NOTE: There is no check code for addresses 96-127.
{}
endunion gbic_sid[1] GBIC Small Form Factor Serial ID data
<byte 7980>
union gbic_sid[2] GBIC Small Form Factor Serial ID data
<byte 7980>
ulong[33] gbic_sida GBIC Small Form Factor Serial ID Data As Longwords
or gbic_sid[2] GBIC Small Form Factor Serial ID data
<byte 7980>
{gbic_sid (GBIC Small Form Factor Serial ID Data By Field)}
<byte 7980>
{base_id (Base ID Fields (Addresses 0-63))}
<byte 7980>
utiny transceiver0 Transceiver code 0
<byte 7981>
utiny connector Connector type
<byte 7982>
utiny ext_identifier Extended identifier
<byte 7983>
utiny identifier Identifier, transceiver type
<byte 7984>
utiny transceiver4 Transceiver code 4
<byte 7985>
utiny transceiver3 Transceiver code 3
<byte 7986>
utiny transceiver2 Transceiver code 2
<byte 7987>
utiny transceiver1 Transceiver code 1
<byte 7988>
utiny encoding Encoding
<byte 7989>
utiny transceiver7 Transceiver code 7
<byte 7990>
utiny transceiver6 Transceiver code 6
<byte 7991>
utiny transceiver5 Transceiver code 5
<byte 7992>
utiny distance_9u_100m 9u, Distance (100m units)
<byte 7993>
utiny distance_9u_km 9u, Distance (1000m units)
<byte 7994>
utiny reserved Reserved
<byte 7995>
utiny br_nom Baud rate, nominal
<byte 7996>
utiny reserved1 Reserved
<byte 7997>
utiny distance_cu CU, Distance (1m units)
<byte 7998>
utiny distance_60u_10m 60u, Distance (10m units)
<byte 7999>
utiny distance_50u_10m 50u, Distance (10m units)
<byte 8000>
utiny[16] vendor_name Vendor name
<byte 8016>
utiny[3] vendor_oui Vendor OUI
<byte 8019>
utiny reserved2 Reserved
<byte 8020>
utiny[16] vendor_pn Vendor part number
<byte 8036>
utiny[4] vendor_rev Vendor revision
<byte 8040>
utiny ccid CCID check code (Addresses 0-62)
<byte 8041>
utiny[3] reserved3 Reserved
{}
<byte 8044>
{extn_id (Extended ID Fields (Addresses 64-95))}
<byte 8044>
utiny br_min Baud rate, mmin (% lower margin)
<byte 8045>
utiny br_max Baud rate, max (% upper margin)
<byte 8046>
utiny[2] options Options
<byte 8048>
utiny[16] vendor_sn Vendor serial number
<byte 8064>
utiny[8] date_code Date code
<byte 8072>
utiny ccex CCEX check code (Addresses 64-94)
<byte 8073>
utiny[3] reserved Reserved
{}
<byte 8076>
{vend_id (Vendor Specific ID Fields (Addresses 96-127))}
<byte 8076>
utiny[32] vendor_specific_data
{}
<byte 8108>
ulong status Tachyon port diagnostic check code test result (not part of the SFF Serial data stream): 0 = Both check codes passed, 1 = CCID check code failed (addresses 0-62), 2 = CCEX check code failed (addresses 64-94), 3 = Both check codes failed, -1 = Data has not been read yet. NOTE: There is no check code for addresses 96-127.
{}
endunion gbic_sid[2] GBIC Small Form Factor Serial ID data
<byte 8112>
union gbic_sid[3] GBIC Small Form Factor Serial ID data
<byte 8112>
ulong[33] gbic_sida GBIC Small Form Factor Serial ID Data As Longwords
or gbic_sid[3] GBIC Small Form Factor Serial ID data
<byte 8112>
{gbic_sid (GBIC Small Form Factor Serial ID Data By Field)}
<byte 8112>
{base_id (Base ID Fields (Addresses 0-63))}
<byte 8112>
utiny transceiver0 Transceiver code 0
<byte 8113>
utiny connector Connector type
<byte 8114>
utiny ext_identifier Extended identifier
<byte 8115>
utiny identifier Identifier, transceiver type
<byte 8116>
utiny transceiver4 Transceiver code 4
<byte 8117>
utiny transceiver3 Transceiver code 3
<byte 8118>
utiny transceiver2 Transceiver code 2
<byte 8119>
utiny transceiver1 Transceiver code 1
<byte 8120>
utiny encoding Encoding
<byte 8121>
utiny transceiver7 Transceiver code 7
<byte 8122>
utiny transceiver6 Transceiver code 6
<byte 8123>
utiny transceiver5 Transceiver code 5
<byte 8124>
utiny distance_9u_100m 9u, Distance (100m units)
<byte 8125>
utiny distance_9u_km 9u, Distance (1000m units)
<byte 8126>
utiny reserved Reserved
<byte 8127>
utiny br_nom Baud rate, nominal
<byte 8128>
utiny reserved1 Reserved
<byte 8129>
utiny distance_cu CU, Distance (1m units)
<byte 8130>
utiny distance_60u_10m 60u, Distance (10m units)
<byte 8131>
utiny distance_50u_10m 50u, Distance (10m units)
<byte 8132>
utiny[16] vendor_name Vendor name
<byte 8148>
utiny[3] vendor_oui Vendor OUI
<byte 8151>
utiny reserved2 Reserved
<byte 8152>
utiny[16] vendor_pn Vendor part number
<byte 8168>
utiny[4] vendor_rev Vendor revision
<byte 8172>
utiny ccid CCID check code (Addresses 0-62)
<byte 8173>
utiny[3] reserved3 Reserved
{}
<byte 8176>
{extn_id (Extended ID Fields (Addresses 64-95))}
<byte 8176>
utiny br_min Baud rate, mmin (% lower margin)
<byte 8177>
utiny br_max Baud rate, max (% upper margin)
<byte 8178>
utiny[2] options Options
<byte 8180>
utiny[16] vendor_sn Vendor serial number
<byte 8196>
utiny[8] date_code Date code
<byte 8204>
utiny ccex CCEX check code (Addresses 64-94)
<byte 8205>
utiny[3] reserved Reserved
{}
<byte 8208>
{vend_id (Vendor Specific ID Fields (Addresses 96-127))}
<byte 8208>
utiny[32] vendor_specific_data
{}
<byte 8240>
ulong status Tachyon port diagnostic check code test result (not part of the SFF Serial data stream): 0 = Both check codes passed, 1 = CCID check code failed (addresses 0-62), 2 = CCEX check code failed (addresses 64-94), 3 = Both check codes failed, -1 = Data has not been read yet. NOTE: There is no check code for addresses 96-127.
{}
endunion gbic_sid[3] GBIC Small Form Factor Serial ID data
<byte 8244>
union gbic_sid[4] GBIC Small Form Factor Serial ID data
<byte 8244>
ulong[33] gbic_sida GBIC Small Form Factor Serial ID Data As Longwords
or gbic_sid[4] GBIC Small Form Factor Serial ID data
<byte 8244>
{gbic_sid (GBIC Small Form Factor Serial ID Data By Field)}
<byte 8244>
{base_id (Base ID Fields (Addresses 0-63))}
<byte 8244>
utiny transceiver0 Transceiver code 0
<byte 8245>
utiny connector Connector type
<byte 8246>
utiny ext_identifier Extended identifier
<byte 8247>
utiny identifier Identifier, transceiver type
<byte 8248>
utiny transceiver4 Transceiver code 4
<byte 8249>
utiny transceiver3 Transceiver code 3
<byte 8250>
utiny transceiver2 Transceiver code 2
<byte 8251>
utiny transceiver1 Transceiver code 1
<byte 8252>
utiny encoding Encoding
<byte 8253>
utiny transceiver7 Transceiver code 7
<byte 8254>
utiny transceiver6 Transceiver code 6
<byte 8255>
utiny transceiver5 Transceiver code 5
<byte 8256>
utiny distance_9u_100m 9u, Distance (100m units)
<byte 8257>
utiny distance_9u_km 9u, Distance (1000m units)
<byte 8258>
utiny reserved Reserved
<byte 8259>
utiny br_nom Baud rate, nominal
<byte 8260>
utiny reserved1 Reserved
<byte 8261>
utiny distance_cu CU, Distance (1m units)
<byte 8262>
utiny distance_60u_10m 60u, Distance (10m units)
<byte 8263>
utiny distance_50u_10m 50u, Distance (10m units)
<byte 8264>
utiny[16] vendor_name Vendor name
<byte 8280>
utiny[3] vendor_oui Vendor OUI
<byte 8283>
utiny reserved2 Reserved
<byte 8284>
utiny[16] vendor_pn Vendor part number
<byte 8300>
utiny[4] vendor_rev Vendor revision
<byte 8304>
utiny ccid CCID check code (Addresses 0-62)
<byte 8305>
utiny[3] reserved3 Reserved
{}
<byte 8308>
{extn_id (Extended ID Fields (Addresses 64-95))}
<byte 8308>
utiny br_min Baud rate, mmin (% lower margin)
<byte 8309>
utiny br_max Baud rate, max (% upper margin)
<byte 8310>
utiny[2] options Options
<byte 8312>
utiny[16] vendor_sn Vendor serial number
<byte 8328>
utiny[8] date_code Date code
<byte 8336>
utiny ccex CCEX check code (Addresses 64-94)
<byte 8337>
utiny[3] reserved Reserved
{}
<byte 8340>
{vend_id (Vendor Specific ID Fields (Addresses 96-127))}
<byte 8340>
utiny[32] vendor_specific_data
{}
<byte 8372>
ulong status Tachyon port diagnostic check code test result (not part of the SFF Serial data stream): 0 = Both check codes passed, 1 = CCID check code failed (addresses 0-62), 2 = CCEX check code failed (addresses 64-94), 3 = Both check codes failed, -1 = Data has not been read yet. NOTE: There is no check code for addresses 96-127.
{}
endunion gbic_sid[4] GBIC Small Form Factor Serial ID data
<byte 8376>
union gbic_sid[5] GBIC Small Form Factor Serial ID data
<byte 8376>
ulong[33] gbic_sida GBIC Small Form Factor Serial ID Data As Longwords
or gbic_sid[5] GBIC Small Form Factor Serial ID data
<byte 8376>
{gbic_sid (GBIC Small Form Factor Serial ID Data By Field)}
<byte 8376>
{base_id (Base ID Fields (Addresses 0-63))}
<byte 8376>
utiny transceiver0 Transceiver code 0
<byte 8377>
utiny connector Connector type
<byte 8378>
utiny ext_identifier Extended identifier
<byte 8379>
utiny identifier Identifier, transceiver type
<byte 8380>
utiny transceiver4 Transceiver code 4
<byte 8381>
utiny transceiver3 Transceiver code 3
<byte 8382>
utiny transceiver2 Transceiver code 2
<byte 8383>
utiny transceiver1 Transceiver code 1
<byte 8384>
utiny encoding Encoding
<byte 8385>
utiny transceiver7 Transceiver code 7
<byte 8386>
utiny transceiver6 Transceiver code 6
<byte 8387>
utiny transceiver5 Transceiver code 5
<byte 8388>
utiny distance_9u_100m 9u, Distance (100m units)
<byte 8389>
utiny distance_9u_km 9u, Distance (1000m units)
<byte 8390>
utiny reserved Reserved
<byte 8391>
utiny br_nom Baud rate, nominal
<byte 8392>
utiny reserved1 Reserved
<byte 8393>
utiny distance_cu CU, Distance (1m units)
<byte 8394>
utiny distance_60u_10m 60u, Distance (10m units)
<byte 8395>
utiny distance_50u_10m 50u, Distance (10m units)
<byte 8396>
utiny[16] vendor_name Vendor name
<byte 8412>
utiny[3] vendor_oui Vendor OUI
<byte 8415>
utiny reserved2 Reserved
<byte 8416>
utiny[16] vendor_pn Vendor part number
<byte 8432>
utiny[4] vendor_rev Vendor revision
<byte 8436>
utiny ccid CCID check code (Addresses 0-62)
<byte 8437>
utiny[3] reserved3 Reserved
{}
<byte 8440>
{extn_id (Extended ID Fields (Addresses 64-95))}
<byte 8440>
utiny br_min Baud rate, mmin (% lower margin)
<byte 8441>
utiny br_max Baud rate, max (% upper margin)
<byte 8442>
utiny[2] options Options
<byte 8444>
utiny[16] vendor_sn Vendor serial number
<byte 8460>
utiny[8] date_code Date code
<byte 8468>
utiny ccex CCEX check code (Addresses 64-94)
<byte 8469>
utiny[3] reserved Reserved
{}
<byte 8472>
{vend_id (Vendor Specific ID Fields (Addresses 96-127))}
<byte 8472>
utiny[32] vendor_specific_data
{}
<byte 8504>
ulong status Tachyon port diagnostic check code test result (not part of the SFF Serial data stream): 0 = Both check codes passed, 1 = CCID check code failed (addresses 0-62), 2 = CCEX check code failed (addresses 64-94), 3 = Both check codes failed, -1 = Data has not been read yet. NOTE: There is no check code for addresses 96-127.
{}
endunion gbic_sid[5] GBIC Small Form Factor Serial ID data
<byte 8508>
union gbic_sid[6] GBIC Small Form Factor Serial ID data
<byte 8508>
ulong[33] gbic_sida GBIC Small Form Factor Serial ID Data As Longwords
or gbic_sid[6] GBIC Small Form Factor Serial ID data
<byte 8508>
{gbic_sid (GBIC Small Form Factor Serial ID Data By Field)}
<byte 8508>
{base_id (Base ID Fields (Addresses 0-63))}
<byte 8508>
utiny transceiver0 Transceiver code 0
<byte 8509>
utiny connector Connector type
<byte 8510>
utiny ext_identifier Extended identifier
<byte 8511>
utiny identifier Identifier, transceiver type
<byte 8512>
utiny transceiver4 Transceiver code 4
<byte 8513>
utiny transceiver3 Transceiver code 3
<byte 8514>
utiny transceiver2 Transceiver code 2
<byte 8515>
utiny transceiver1 Transceiver code 1
<byte 8516>
utiny encoding Encoding
<byte 8517>
utiny transceiver7 Transceiver code 7
<byte 8518>
utiny transceiver6 Transceiver code 6
<byte 8519>
utiny transceiver5 Transceiver code 5
<byte 8520>
utiny distance_9u_100m 9u, Distance (100m units)
<byte 8521>
utiny distance_9u_km 9u, Distance (1000m units)
<byte 8522>
utiny reserved Reserved
<byte 8523>
utiny br_nom Baud rate, nominal
<byte 8524>
utiny reserved1 Reserved
<byte 8525>
utiny distance_cu CU, Distance (1m units)
<byte 8526>
utiny distance_60u_10m 60u, Distance (10m units)
<byte 8527>
utiny distance_50u_10m 50u, Distance (10m units)
<byte 8528>
utiny[16] vendor_name Vendor name
<byte 8544>
utiny[3] vendor_oui Vendor OUI
<byte 8547>
utiny reserved2 Reserved
<byte 8548>
utiny[16] vendor_pn Vendor part number
<byte 8564>
utiny[4] vendor_rev Vendor revision
<byte 8568>
utiny ccid CCID check code (Addresses 0-62)
<byte 8569>
utiny[3] reserved3 Reserved
{}
<byte 8572>
{extn_id (Extended ID Fields (Addresses 64-95))}
<byte 8572>
utiny br_min Baud rate, mmin (% lower margin)
<byte 8573>
utiny br_max Baud rate, max (% upper margin)
<byte 8574>
utiny[2] options Options
<byte 8576>
utiny[16] vendor_sn Vendor serial number
<byte 8592>
utiny[8] date_code Date code
<byte 8600>
utiny ccex CCEX check code (Addresses 64-94)
<byte 8601>
utiny[3] reserved Reserved
{}
<byte 8604>
{vend_id (Vendor Specific ID Fields (Addresses 96-127))}
<byte 8604>
utiny[32] vendor_specific_data
{}
<byte 8636>
ulong status Tachyon port diagnostic check code test result (not part of the SFF Serial data stream): 0 = Both check codes passed, 1 = CCID check code failed (addresses 0-62), 2 = CCEX check code failed (addresses 64-94), 3 = Both check codes failed, -1 = Data has not been read yet. NOTE: There is no check code for addresses 96-127.
{}
endunion gbic_sid[6] GBIC Small Form Factor Serial ID data
{}
{}
<byte 8640>
{recursive_event[0] (Recursive entry array)}
<byte 8640>
ulong tt Trap type
<byte 8644>
ulong tc Termination code
<byte 8648>
ulong srr0 SRR0 register
<byte 8652>
ulong srr1 SRR1 register
<byte 8656>
ulong cr CR register
<byte 8660>
ulong xer XER register
<byte 8664>
ulong ctr CTR register
<byte 8668>
ulong lr LR register
<byte 8672>
ulong exception Exception code
<byte 8676>
ulong count Exception count
{}
<byte 8680>
{recursive_event[1] (Recursive entry array)}
<byte 8680>
ulong tt Trap type
<byte 8684>
ulong tc Termination code
<byte 8688>
ulong srr0 SRR0 register
<byte 8692>
ulong srr1 SRR1 register
<byte 8696>
ulong cr CR register
<byte 8700>
ulong xer XER register
<byte 8704>
ulong ctr CTR register
<byte 8708>
ulong lr LR register
<byte 8712>
ulong exception Exception code
<byte 8716>
ulong count Exception count
{}
<byte 8720>
{recursive_event[2] (Recursive entry array)}
<byte 8720>
ulong tt Trap type
<byte 8724>
ulong tc Termination code
<byte 8728>
ulong srr0 SRR0 register
<byte 8732>
ulong srr1 SRR1 register
<byte 8736>
ulong cr CR register
<byte 8740>
ulong xer XER register
<byte 8744>
ulong ctr CTR register
<byte 8748>
ulong lr LR register
<byte 8752>
ulong exception Exception code
<byte 8756>
ulong count Exception count
{}
<byte 8760>
{recursive_event[3] (Recursive entry array)}
<byte 8760>
ulong tt Trap type
<byte 8764>
ulong tc Termination code
<byte 8768>
ulong srr0 SRR0 register
<byte 8772>
ulong srr1 SRR1 register
<byte 8776>
ulong cr CR register
<byte 8780>
ulong xer XER register
<byte 8784>
ulong ctr CTR register
<byte 8788>
ulong lr LR register
<byte 8792>
ulong exception Exception code
<byte 8796>
ulong count Exception count
{}
<byte 8800>
{recursive_event[4] (Recursive entry array)}
<byte 8800>
ulong tt Trap type
<byte 8804>
ulong tc Termination code
<byte 8808>
ulong srr0 SRR0 register
<byte 8812>
ulong srr1 SRR1 register
<byte 8816>
ulong cr CR register
<byte 8820>
ulong xer XER register
<byte 8824>
ulong ctr CTR register
<byte 8828>
ulong lr LR register
<byte 8832>
ulong exception Exception code
<byte 8836>
ulong count Exception count
{}
<byte 8840>
{recursive_event[5] (Recursive entry array)}
<byte 8840>
ulong tt Trap type
<byte 8844>
ulong tc Termination code
<byte 8848>
ulong srr0 SRR0 register
<byte 8852>
ulong srr1 SRR1 register
<byte 8856>
ulong cr CR register
<byte 8860>
ulong xer XER register
<byte 8864>
ulong ctr CTR register
<byte 8868>
ulong lr LR register
<byte 8872>
ulong exception Exception code
<byte 8876>
ulong count Exception count
{}
<byte 8880>
{recursive_event[6] (Recursive entry array)}
<byte 8880>
ulong tt Trap type
<byte 8884>
ulong tc Termination code
<byte 8888>
ulong srr0 SRR0 register
<byte 8892>
ulong srr1 SRR1 register
<byte 8896>
ulong cr CR register
<byte 8900>
ulong xer XER register
<byte 8904>
ulong ctr CTR register
<byte 8908>
ulong lr LR register
<byte 8912>
ulong exception Exception code
<byte 8916>
ulong count Exception count
{}
<byte 8920>
{recursive_event[7] (Recursive entry array)}
<byte 8920>
ulong tt Trap type
<byte 8924>
ulong tc Termination code
<byte 8928>
ulong srr0 SRR0 register
<byte 8932>
ulong srr1 SRR1 register
<byte 8936>
ulong cr CR register
<byte 8940>
ulong xer XER register
<byte 8944>
ulong ctr CTR register
<byte 8948>
ulong lr LR register
<byte 8952>
ulong exception Exception code
<byte 8956>
ulong count Exception count
{}
<byte 8960>
{recursive_event[8] (Recursive entry array)}
<byte 8960>
ulong tt Trap type
<byte 8964>
ulong tc Termination code
<byte 8968>
ulong srr0 SRR0 register
<byte 8972>
ulong srr1 SRR1 register
<byte 8976>
ulong cr CR register
<byte 8980>
ulong xer XER register
<byte 8984>
ulong ctr CTR register
<byte 8988>
ulong lr LR register
<byte 8992>
ulong exception Exception code
<byte 8996>
ulong count Exception count
{}
<byte 9000>
{recursive_event[9] (Recursive entry array)}
<byte 9000>
ulong tt Trap type
<byte 9004>
ulong tc Termination code
<byte 9008>
ulong srr0 SRR0 register
<byte 9012>
ulong srr1 SRR1 register
<byte 9016>
ulong cr CR register
<byte 9020>
ulong xer XER register
<byte 9024>
ulong ctr CTR register
<byte 9028>
ulong lr LR register
<byte 9032>
ulong exception Exception code
<byte 9036>
ulong count Exception count
{}
<byte 9040>
{recursive_event[10] (Recursive entry array)}
<byte 9040>
ulong tt Trap type
<byte 9044>
ulong tc Termination code
<byte 9048>
ulong srr0 SRR0 register
<byte 9052>
ulong srr1 SRR1 register
<byte 9056>
ulong cr CR register
<byte 9060>
ulong xer XER register
<byte 9064>
ulong ctr CTR register
<byte 9068>
ulong lr LR register
<byte 9072>
ulong exception Exception code
<byte 9076>
ulong count Exception count
{}
<byte 9080>
{recursive_event[11] (Recursive entry array)}
<byte 9080>
ulong tt Trap type
<byte 9084>
ulong tc Termination code
<byte 9088>
ulong srr0 SRR0 register
<byte 9092>
ulong srr1 SRR1 register
<byte 9096>
ulong cr CR register
<byte 9100>
ulong xer XER register
<byte 9104>
ulong ctr CTR register
<byte 9108>
ulong lr LR register
<byte 9112>
ulong exception Exception code
<byte 9116>
ulong count Exception count
{}
<byte 9120>
{recursive_event[12] (Recursive entry array)}
<byte 9120>
ulong tt Trap type
<byte 9124>
ulong tc Termination code
<byte 9128>
ulong srr0 SRR0 register
<byte 9132>
ulong srr1 SRR1 register
<byte 9136>
ulong cr CR register
<byte 9140>
ulong xer XER register
<byte 9144>
ulong ctr CTR register
<byte 9148>
ulong lr LR register
<byte 9152>
ulong exception Exception code
<byte 9156>
ulong count Exception count
{}
<byte 9160>
{recursive_event[13] (Recursive entry array)}
<byte 9160>
ulong tt Trap type
<byte 9164>
ulong tc Termination code
<byte 9168>
ulong srr0 SRR0 register
<byte 9172>
ulong srr1 SRR1 register
<byte 9176>
ulong cr CR register
<byte 9180>
ulong xer XER register
<byte 9184>
ulong ctr CTR register
<byte 9188>
ulong lr LR register
<byte 9192>
ulong exception Exception code
<byte 9196>
ulong count Exception count
{}
<byte 9200>
{recursive_event[14] (Recursive entry array)}
<byte 9200>
ulong tt Trap type
<byte 9204>
ulong tc Termination code
<byte 9208>
ulong srr0 SRR0 register
<byte 9212>
ulong srr1 SRR1 register
<byte 9216>
ulong cr CR register
<byte 9220>
ulong xer XER register
<byte 9224>
ulong ctr CTR register
<byte 9228>
ulong lr LR register
<byte 9232>
ulong exception Exception code
<byte 9236>
ulong count Exception count
{}
<byte 9240>
{recursive_event[15] (Recursive entry array)}
<byte 9240>
ulong tt Trap type
<byte 9244>
ulong tc Termination code
<byte 9248>
ulong srr0 SRR0 register
<byte 9252>
ulong srr1 SRR1 register
<byte 9256>
ulong cr CR register
<byte 9260>
ulong xer XER register
<byte 9264>
ulong ctr CTR register
<byte 9268>
ulong lr LR register
<byte 9272>
ulong exception Exception code
<byte 9276>
ulong count Exception count
{}
<byte 9280>
{recursive_event[16] (Recursive entry array)}
<byte 9280>
ulong tt Trap type
<byte 9284>
ulong tc Termination code
<byte 9288>
ulong srr0 SRR0 register
<byte 9292>
ulong srr1 SRR1 register
<byte 9296>
ulong cr CR register
<byte 9300>
ulong xer XER register
<byte 9304>
ulong ctr CTR register
<byte 9308>
ulong lr LR register
<byte 9312>
ulong exception Exception code
<byte 9316>
ulong count Exception count
{}
<byte 9320>
{recursive_event[17] (Recursive entry array)}
<byte 9320>
ulong tt Trap type
<byte 9324>
ulong tc Termination code
<byte 9328>
ulong srr0 SRR0 register
<byte 9332>
ulong srr1 SRR1 register
<byte 9336>
ulong cr CR register
<byte 9340>
ulong xer XER register
<byte 9344>
ulong ctr CTR register
<byte 9348>
ulong lr LR register
<byte 9352>
ulong exception Exception code
<byte 9356>
ulong count Exception count
{}
<byte 9360>
{recursive_event[18] (Recursive entry array)}
<byte 9360>
ulong tt Trap type
<byte 9364>
ulong tc Termination code
<byte 9368>
ulong srr0 SRR0 register
<byte 9372>
ulong srr1 SRR1 register
<byte 9376>
ulong cr CR register
<byte 9380>
ulong xer XER register
<byte 9384>
ulong ctr CTR register
<byte 9388>
ulong lr LR register
<byte 9392>
ulong exception Exception code
<byte 9396>
ulong count Exception count
{}
<byte 9400>
{recursive_event[19] (Recursive entry array)}
<byte 9400>
ulong tt Trap type
<byte 9404>
ulong tc Termination code
<byte 9408>
ulong srr0 SRR0 register
<byte 9412>
ulong srr1 SRR1 register
<byte 9416>
ulong cr CR register
<byte 9420>
ulong xer XER register
<byte 9424>
ulong ctr CTR register
<byte 9428>
ulong lr LR register
<byte 9432>
ulong exception Exception code
<byte 9436>
ulong count Exception count
{}
<byte 9440>
{recursive_event[20] (Recursive entry array)}
<byte 9440>
ulong tt Trap type
<byte 9444>
ulong tc Termination code
<byte 9448>
ulong srr0 SRR0 register
<byte 9452>
ulong srr1 SRR1 register
<byte 9456>
ulong cr CR register
<byte 9460>
ulong xer XER register
<byte 9464>
ulong ctr CTR register
<byte 9468>
ulong lr LR register
<byte 9472>
ulong exception Exception code
<byte 9476>
ulong count Exception count
{}
<byte 9480>
{recursive_event[21] (Recursive entry array)}
<byte 9480>
ulong tt Trap type
<byte 9484>
ulong tc Termination code
<byte 9488>
ulong srr0 SRR0 register
<byte 9492>
ulong srr1 SRR1 register
<byte 9496>
ulong cr CR register
<byte 9500>
ulong xer XER register
<byte 9504>
ulong ctr CTR register
<byte 9508>
ulong lr LR register
<byte 9512>
ulong exception Exception code
<byte 9516>
ulong count Exception count
{}
<byte 9520>
{recursive_event[22] (Recursive entry array)}
<byte 9520>
ulong tt Trap type
<byte 9524>
ulong tc Termination code
<byte 9528>
ulong srr0 SRR0 register
<byte 9532>
ulong srr1 SRR1 register
<byte 9536>
ulong cr CR register
<byte 9540>
ulong xer XER register
<byte 9544>
ulong ctr CTR register
<byte 9548>
ulong lr LR register
<byte 9552>
ulong exception Exception code
<byte 9556>
ulong count Exception count
{}
<byte 9560>
{recursive_event[23] (Recursive entry array)}
<byte 9560>
ulong tt Trap type
<byte 9564>
ulong tc Termination code
<byte 9568>
ulong srr0 SRR0 register
<byte 9572>
ulong srr1 SRR1 register
<byte 9576>
ulong cr CR register
<byte 9580>
ulong xer XER register
<byte 9584>
ulong ctr CTR register
<byte 9588>
ulong lr LR register
<byte 9592>
ulong exception Exception code
<byte 9596>
ulong count Exception count
{}
<byte 9600>
{recursive_event[24] (Recursive entry array)}
<byte 9600>
ulong tt Trap type
<byte 9604>
ulong tc Termination code
<byte 9608>
ulong srr0 SRR0 register
<byte 9612>
ulong srr1 SRR1 register
<byte 9616>
ulong cr CR register
<byte 9620>
ulong xer XER register
<byte 9624>
ulong ctr CTR register
<byte 9628>
ulong lr LR register
<byte 9632>
ulong exception Exception code
<byte 9636>
ulong count Exception count
{}
<byte 9640>
{recursive_event[25] (Recursive entry array)}
<byte 9640>
ulong tt Trap type
<byte 9644>
ulong tc Termination code
<byte 9648>
ulong srr0 SRR0 register
<byte 9652>
ulong srr1 SRR1 register
<byte 9656>
ulong cr CR register
<byte 9660>
ulong xer XER register
<byte 9664>
ulong ctr CTR register
<byte 9668>
ulong lr LR register
<byte 9672>
ulong exception Exception code
<byte 9676>
ulong count Exception count
{}
<byte 9680>
{recursive_event[26] (Recursive entry array)}
<byte 9680>
ulong tt Trap type
<byte 9684>
ulong tc Termination code
<byte 9688>
ulong srr0 SRR0 register
<byte 9692>
ulong srr1 SRR1 register
<byte 9696>
ulong cr CR register
<byte 9700>
ulong xer XER register
<byte 9704>
ulong ctr CTR register
<byte 9708>
ulong lr LR register
<byte 9712>
ulong exception Exception code
<byte 9716>
ulong count Exception count
{}
<byte 9720>
{recursive_event[27] (Recursive entry array)}
<byte 9720>
ulong tt Trap type
<byte 9724>
ulong tc Termination code
<byte 9728>
ulong srr0 SRR0 register
<byte 9732>
ulong srr1 SRR1 register
<byte 9736>
ulong cr CR register
<byte 9740>
ulong xer XER register
<byte 9744>
ulong ctr CTR register
<byte 9748>
ulong lr LR register
<byte 9752>
ulong exception Exception code
<byte 9756>
ulong count Exception count
{}
<byte 9760>
{recursive_event[28] (Recursive entry array)}
<byte 9760>
ulong tt Trap type
<byte 9764>
ulong tc Termination code
<byte 9768>
ulong srr0 SRR0 register
<byte 9772>
ulong srr1 SRR1 register
<byte 9776>
ulong cr CR register
<byte 9780>
ulong xer XER register
<byte 9784>
ulong ctr CTR register
<byte 9788>
ulong lr LR register
<byte 9792>
ulong exception Exception code
<byte 9796>
ulong count Exception count
{}
<byte 9800>
{unexpected_event[0] (Unexpected event array)}
<byte 9800>
ulong type Unexpected event type
<byte 9804>
ulong pto Post-Termination Operation Indicator
<byte 9808>
ulong[10] param Unexpected event parameters
{}
<byte 9848>
{unexpected_event[1] (Unexpected event array)}
<byte 9848>
ulong type Unexpected event type
<byte 9852>
ulong pto Post-Termination Operation Indicator
<byte 9856>
ulong[10] param Unexpected event parameters
{}
<byte 9896>
{unexpected_event[2] (Unexpected event array)}
<byte 9896>
ulong type Unexpected event type
<byte 9900>
ulong pto Post-Termination Operation Indicator
<byte 9904>
ulong[10] param Unexpected event parameters
{}
<byte 9944>
{unexpected_event[3] (Unexpected event array)}
<byte 9944>
ulong type Unexpected event type
<byte 9948>
ulong pto Post-Termination Operation Indicator
<byte 9952>
ulong[10] param Unexpected event parameters
{}
<byte 9992>
{first_event (First event information)}
<byte 9992>
ulong tt Trap type
<byte 9996>
ulong tc Termination code
<byte 10000>
ulong srr0 SRR0 register
<byte 10004>
ulong srr1 SRR1 register
<byte 10008>
ulong cr CR register
<byte 10012>
ulong xer XER register
<byte 10016>
ulong ctr CTR register
<byte 10020>
ulong lr LR register
<byte 10024>
ulong exception Exception code
<byte 10028>
ulong count Exception count
{}
{}
<byte 10032>
{ltecb (Last Termination Event Control Block)}
<byte 10032>
utiny recursive_notlogged Recursive entry not yet logged count
<byte 10033>
utiny info_notlogged Last Termination Event Information not yet logged
<byte 10034>
utiny reserved Reserved
<byte 10035>
utiny ltecb_revision Last Termination Event Control Block Revision number
<byte 10036>
utiny unexpected_logged Unexpected event already logged count
<byte 10037>
utiny unexpected_notlogged Unexpected event not yet logged count
<byte 10038>
utiny unexpected_event_index Unexpected event array index
<byte 10039>
utiny recursive_logged Recursive entry already logged count
<byte 10040>
ulong info_edc Last Termination Event Information EDC
{}
{}
<byte 10044>
do_not_display[196] union_pad Union Element Padding (DO NOT DISPLAY!)
or u Last Termination Event Block Union
<byte 0>
utiny[10240] union_pad Union Element Padding (DO NOT DISPLAY!)
endunion u Last Termination Event Block Union
{}
FSWGAS
EVENT CODE TRANSLATION BLOCKS:
EC BLOCK: 0102000d SCID$EXEC_TOD_CHANGE
TRANSLATIONBLOCK
TRANSLATE("Action: %[exec_tod]", eip0D.action);
TRANSLATE("Current date/time: %[scmitim]", eip0D.ctime);
TRANSLATE("Previous date/time: %[scmitim]", eip0D.ptime);
ENDTRANSLATIONBLOCK
EC BLOCK: 0300200a SCID$SCS_CBIC_FAILURE
TRANSLATIONBLOCK
TRANSLATE("Controller: %[wwn]", eip0A.node_name);
CONDITIONAL(
eip0A.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB", eip0A.dimm_size );
ENDTRANSLATIONBLOCK
EC BLOCK: 0301400b SCID$SCS_DDRIVE_INOP
TRANSLATIONBLOCK
TRANSLATE("Device: %[uuid]", eip0B.device);
TRANSLATE("Port ID: %s", eip0B.cerp_id);
CONDITIONAL(eip0B.dencl_num != 99,
TRANSLATE("Rack: %d.", eip0B.rack_num),
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip0B.dencl_num != 99,
TRANSLATE("Enclosure: %d.", eip0B.dencl_num)
);
CONDITIONAL(eip0B.dencl_num != 99,
TRANSLATE("Bay: %d.", eip0B.bay)
);
TRANSLATE(
"Reason code: 0x%04X (%[drv_inop])",
eip0B.reason_code,
eip0B.reason_code
);
CONDITIONAL(eip0B.flags.quorum_disk != 0,
TRANSLATE(
"Quorum space write sequence: %d.",
eip0B.quorum_sequence
)
);
CONDITIONAL(eip0B.flags.inq_state != 0,
TRANSLATE(
"Inquiry data is valid (get more details)"
);
TRANSLATE(
"Device capacity (blocks): %d.",
eip0B.capacity
)
);
CONDITIONAL(eip0B.rss_flags.member_migrating != 0,
TRANSLATE(
"Redundant Storage Set member is migrating"
)
);
CONDITIONAL(eip0B.rss_flags.member_missing != 0,
TRANSLATE(
"Redundant Storage Set member is missing"
)
);
CONDITIONAL(eip0B.rss_flags.member_abnormal != 0,
TRANSLATE(
"Redundant Storage Set member state: %d.",
eip0B.member_state
)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 03024f0b SCID$SCS_TOO_MANY_DISKS
TRANSLATIONBLOCK
TRANSLATE("Device: %[uuid]", eip0B.device);
TRANSLATE("Port ID: %s", eip0B.cerp_id);
CONDITIONAL(eip0B.dencl_num != 99,
TRANSLATE("Rack: %d.", eip0B.rack_num),
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip0B.dencl_num != 99,
TRANSLATE("Enclosure: %d.", eip0B.dencl_num)
);
CONDITIONAL(eip0B.dencl_num != 99,
TRANSLATE("Bay: %d.", eip0B.bay)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0303000a SCID$SCS_START_OF_BOOT
TRANSLATIONBLOCK
TRANSLATE("Controller: %[wwn]", eip0A.node_name);
ENDTRANSLATIONBLOCK
EC BLOCK: 0304000a SCID$SCS_REALIZE_CELL_TRANSITION
TRANSLATIONBLOCK
TRANSLATE("Controller: %[wwn]", eip0A.node_name);
TRANSLATE("Storage System: %[tag]", eip0A.scell_tag);
ENDTRANSLATIONBLOCK
EC BLOCK: 0305000a SCID$SCS_FINISHED_JOINING_SLAVE
TRANSLATIONBLOCK
TRANSLATE("Controller: %[wwn]", eip0A.node_name);
TRANSLATE("Storage System: %[tag]", eip0A.scell_tag);
ENDTRANSLATIONBLOCK
EC BLOCK: 0306000a SCID$SCS_FINISHED_SLAVE_LEAVE
TRANSLATIONBLOCK
TRANSLATE("Controller: %[wwn]", eip0A.node_name);
TRANSLATE("Storage System: %[tag]", eip0A.scell_tag);
ENDTRANSLATIONBLOCK
EC BLOCK: 0307000a SCID$SCS_MASTER_FAILOVER
TRANSLATIONBLOCK
TRANSLATE("Controller: %[wwn]", eip0A.node_name);
TRANSLATE("Storage System: %[tag]", eip0A.scell_tag);
ENDTRANSLATIONBLOCK
EC BLOCK: 0308000a SCID$SCS_NSC_BROUGHT_IN
TRANSLATIONBLOCK
TRANSLATE("Controller: %[wwn]", eip0A.node_name);
TRANSLATE("Storage System: %[tag]", eip0A.scell_tag);
ENDTRANSLATIONBLOCK
EC BLOCK: 03090018 SCID$SCS_MIGRATION_START
TRANSLATIONBLOCK
CONDITIONAL(eip18.source_migr == 0x06,
TRANSLATE("Merge started")
);
CONDITIONAL(eip18.source_migr == 0x0A,
TRANSLATE("Split started")
);
TRANSLATE("Disk Group tag: %[tag]", eip18.ldad_tag);
TRANSLATE("Source Redundant Storage Set: %04X", eip18.source_rss);
TRANSLATE("Target Redundant Storage Set: %04X", eip18.target_rss);
TRANSLATE("Source migration flags: %04x", eip18.source_migr);
TRANSLATE("Target migration flags: %04x", eip18.target_migr);
TRANSLATE("Source volumes: %02X %02X %02X %02X %02X %02X %02X %02X",
eip18.smembers[0], eip18.smembers[1], eip18.smembers[2],
eip18.smembers[3], eip18.smembers[4], eip18.smembers[5],
eip18.smembers[6], eip18.smembers[7]);
TRANSLATE(" %02X %02X %02X %02X %02X %02X %02X %02X",
eip18.smembers[8], eip18.smembers[9], eip18.smembers[10],
eip18.smembers[11], eip18.smembers[12],
eip18.smembers[13], eip18.smembers[14],
eip18.smembers[15]);
TRANSLATE("Target volumes: %02X %02X %02X %02X %02X %02X %02X %02X",
eip18.tmembers[0], eip18.tmembers[1], eip18.tmembers[2],
eip18.tmembers[3], eip18.tmembers[4], eip18.tmembers[5],
eip18.tmembers[6], eip18.tmembers[7]);
TRANSLATE(" %02X %02X %02X %02X %02X %02X %02X %02X",
eip18.tmembers[8], eip18.tmembers[9], eip18.tmembers[10],
eip18.tmembers[11], eip18.tmembers[12],
eip18.tmembers[13], eip18.tmembers[14],
eip18.tmembers[15]);
ENDTRANSLATIONBLOCK
EC BLOCK: 030a0018 SCID$SCS_MIGRATION_END
TRANSLATIONBLOCK
CONDITIONAL(eip18.source_migr == 0x06,
TRANSLATE("Merge finished")
);
CONDITIONAL(eip18.source_migr == 0x0A,
TRANSLATE("Split finished")
);
TRANSLATE("Disk Group tag: %[tag]", eip18.ldad_tag);
TRANSLATE("Source Redundant Storage Set: %04X", eip18.source_rss);
TRANSLATE("Target Redundant Storage Set: %04X", eip18.target_rss);
TRANSLATE("Source migration flags: %04x", eip18.source_migr);
TRANSLATE("Target migration flags: %04x", eip18.target_migr);
TRANSLATE("Source volumes: %02X %02X %02X %02X %02X %02X %02X %02X",
eip18.smembers[0], eip18.smembers[1], eip18.smembers[2],
eip18.smembers[3], eip18.smembers[4], eip18.smembers[5],
eip18.smembers[6], eip18.smembers[7]);
TRANSLATE(" %02X %02X %02X %02X %02X %02X %02X %02X",
eip18.smembers[8], eip18.smembers[9], eip18.smembers[10],
eip18.smembers[11], eip18.smembers[12],
eip18.smembers[13], eip18.smembers[14],
eip18.smembers[15]);
TRANSLATE("Target volumes: %02X %02X %02X %02X %02X %02X %02X %02X",
eip18.tmembers[0], eip18.tmembers[1], eip18.tmembers[2],
eip18.tmembers[3], eip18.tmembers[4], eip18.tmembers[5],
eip18.tmembers[6], eip18.tmembers[7]);
TRANSLATE(" %02X %02X %02X %02X %02X %02X %02X %02X",
eip18.tmembers[8], eip18.tmembers[9], eip18.tmembers[10],
eip18.tmembers[11], eip18.tmembers[12],
eip18.tmembers[13], eip18.tmembers[14],
eip18.tmembers[15]);
ENDTRANSLATIONBLOCK
EC BLOCK: 030b4f0b SCID$SCS_DRIVE_FAIL_DURING_REALIZE
TRANSLATIONBLOCK
TRANSLATE("Device: %[uuid]", eip0B.device);
TRANSLATE("Port ID: %s", eip0B.cerp_id);
CONDITIONAL(eip0B.dencl_num != 99,
TRANSLATE("Rack: %d.", eip0B.rack_num),
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip0B.dencl_num != 99,
TRANSLATE("Enclosure: %d.", eip0B.dencl_num)
);
CONDITIONAL(eip0B.dencl_num != 99,
TRANSLATE("Bay: %d.", eip0B.bay)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 030d001e SCID$SCS_CSM_HANG_PROCESS
TRANSLATIONBLOCK
CONDITIONAL(eip1E.data[0] != 0,
TRANSLATE("Process: %s %02d", eip1E.info, eip1E.data[0])
);
CONDITIONAL(eip1E.data[0] == 0,
TRANSLATE("Process: %s", eip1E.info)
);
CONDITIONAL(eip1E.data[1] != 0,
TRANSLATE("Stack[0]: %08x (%s)", eip1E.data[1],
XLATE_PC_CURRENT(eip1E.data[1]))
);
CONDITIONAL(eip1E.data[2] != 0,
TRANSLATE("Stack[1]: %08x (%s)", eip1E.data[2],
XLATE_PC_CURRENT(eip1E.data[2]))
);
CONDITIONAL(eip1E.data[3] != 0,
TRANSLATE("Stack[2]: %08x (%s)", eip1E.data[3],
XLATE_PC_CURRENT(eip1E.data[3]))
);
CONDITIONAL(eip1E.data[4] != 0,
TRANSLATE("Stack[3]: %08x (%s)", eip1E.data[4],
XLATE_PC_CURRENT(eip1E.data[4]))
);
CONDITIONAL(eip1E.data[5] != 0,
TRANSLATE("Stack[4]: %08x (%s)", eip1E.data[5],
XLATE_PC_CURRENT(eip1E.data[5]))
);
CONDITIONAL(eip1E.data[6] != 0,
TRANSLATE("Stack[5]: %08x (%s)", eip1E.data[6],
XLATE_PC_CURRENT(eip1E.data[6]))
);
CONDITIONAL(eip1E.data[7] != 0,
TRANSLATE("Stack[6]: %08x (%s)", eip1E.data[7],
XLATE_PC_CURRENT(eip1E.data[7]))
);
CONDITIONAL(eip1E.data[8] != 0,
TRANSLATE("Stack[7]: %08x (%s)", eip1E.data[8],
XLATE_PC_CURRENT(eip1E.data[8]))
);
CONDITIONAL(eip1E.data[9] != 0,
TRANSLATE("Stack[8]: %08x (%s)", eip1E.data[9],
XLATE_PC_CURRENT(eip1E.data[9]))
);
CONDITIONAL(eip1E.data[10] != 0,
TRANSLATE("Stack[9]: %08x (%s)", eip1E.data[10],
XLATE_PC_CURRENT(eip1E.data[10]))
);
CONDITIONAL(eip1E.data[11] != 0,
TRANSLATE("Stack[10]: %08x (%s)", eip1E.data[11],
XLATE_PC_CURRENT(eip1E.data[11]))
);
CONDITIONAL(eip1E.data[12] != 0,
TRANSLATE("Stack[11]: %08x (%s)", eip1E.data[12],
XLATE_PC_CURRENT(eip1E.data[12]))
);
CONDITIONAL(eip1E.data[13] != 0,
TRANSLATE("Stack[12]: %08x (%s)", eip1E.data[13],
XLATE_PC_CURRENT(eip1E.data[13]))
);
CONDITIONAL(eip1E.data[14] != 0,
TRANSLATE("Stack[13]: %08x (%s)", eip1E.data[14],
XLATE_PC_CURRENT(eip1E.data[14]))
);
CONDITIONAL(eip1E.data[15] != 0,
TRANSLATE("Stack[14]: %08x (%s)", eip1E.data[15],
XLATE_PC_CURRENT(eip1E.data[15]))
);
CONDITIONAL(eip1E.data[16] != 0,
TRANSLATE("Stack[15]: %08x (%s)", eip1E.data[16],
XLATE_PC_CURRENT(eip1E.data[16]))
);
CONDITIONAL(eip1E.data[17] != 0,
TRANSLATE("Stack[16]: %08x (%s)", eip1E.data[17],
XLATE_PC_CURRENT(eip1E.data[17]))
);
CONDITIONAL(eip1E.data[18] != 0,
TRANSLATE("Stack[17]: %08x (%s)", eip1E.data[18],
XLATE_PC_CURRENT(eip1E.data[18]))
);
CONDITIONAL(eip1E.data[19] != 0,
TRANSLATE("Stack[18]: %08x (%s)", eip1E.data[19],
XLATE_PC_CURRENT(eip1E.data[19]))
);
CONDITIONAL(eip1E.data[20] != 0,
TRANSLATE("Stack[19]: %08x (%s)", eip1E.data[20],
XLATE_PC_CURRENT(eip1E.data[20]))
);
CONDITIONAL(eip1E.data[21] != 0,
TRANSLATE("Stack[20]: %08x (%s)", eip1E.data[21],
XLATE_PC_CURRENT(eip1E.data[21]))
);
CONDITIONAL(eip1E.data[22] != 0,
TRANSLATE("Stack[21]: %08x (%s)", eip1E.data[22],
XLATE_PC_CURRENT(eip1E.data[22]))
);
CONDITIONAL(eip1E.data[23] != 0,
TRANSLATE("Stack[22]: %08x (%s)", eip1E.data[23],
XLATE_PC_CURRENT(eip1E.data[23]))
);
ENDTRANSLATIONBLOCK
EC BLOCK: 04000300 SCID$FM_TE
TRANSLATIONBLOCK
TRANSLATE(
"Termination Code: 0x%08X (%s)",
eip00.ru.lter.termination_event.u.value,
XLATE_TC_FLO(
eip00.ru.lter.termination_event.u.value,
eip00.ru.lter.ctrlr_model_id,
eip00.ru.lter.baselevel_id,
eip00.ru.lter.sw_version
)
);
TRANSLATE(
"Termination corrective action code: 0x%02x",
eip00.ru.lter.termination_event.u.code.cac
);
TRANSLATE(
"Location: 0x%08X",
eip00.ru.lter.termination_event.termination_location
);
TRANSLATE(
"Date/time: %[scmitim]",
eip00.ru.lter.termination_time
);
TRANSLATE(
"Controller: %[scmi_obj_hnd]",
eip00.ru.lter.terminating_ctrlr
);
TRANSLATE(
"Sequence number: %d.",
eip00.ru.lter.seq
);
TRANSLATE(
"Software version: %s",
eip00.ru.lter.sw_version
);
TRANSLATE(
"Controller uptime: %y.",
eip00.ru.lter.uptime
);
ENDTRANSLATIONBLOCK
EC BLOCK: 04010300 SCID$FM_LAST_GASP
TRANSLATIONBLOCK
TRANSLATE(
"Termination Code: 0x%08X (%s)",
eip00.ru.lter.termination_event.u.value,
XLATE_TC_FLO(
eip00.ru.lter.termination_event.u.value,
eip00.ru.lter.ctrlr_model_id,
eip00.ru.lter.baselevel_id,
eip00.ru.lter.sw_version
)
);
TRANSLATE(
"Termination corrective action code: 0x%02x",
eip00.ru.lter.termination_event.u.code.cac
);
TRANSLATE(
"Location: 0x%08X",
eip00.ru.lter.termination_event.termination_location
);
TRANSLATE(
"Date/time: %[scmitim]",
eip00.ru.lter.termination_time
);
TRANSLATE(
"Controller: %[scmi_obj_hnd]",
eip00.ru.lter.terminating_ctrlr
);
TRANSLATE(
"Software version: %s",
eip00.ru.lter.sw_version
);
TRANSLATE(
"Baselevel ID: %s",
eip00.ru.lter.baselevel_id
);
TRANSLATE(
"Controller model: %s",
eip00.ru.lter.ctrlr_model_id
);
TRANSLATE(
"Controller uptime: %y.",
eip00.ru.lter.uptime
);
ENDTRANSLATIONBLOCK
EC BLOCK: 04020101 SCID$FM_TPRE
TRANSLATIONBLOCK
TRANSLATE(
"Termination Code: 0x%08X (%s)",
eip01.ru.lter.termination_event.u.value,
XLATE_TC_FLO(
eip01.ru.lter.termination_event.u.value,
eip01.ru.lter.ctrlr_model_id,
eip01.ru.lter.baselevel_id,
eip01.ru.lter.sw_version
)
);
TRANSLATE(
"Location: 0x%08X",
eip01.ru.lter.termination_event.termination_location
);
TRANSLATE(
"Date/time: %[scmitim]",
eip01.ru.lter.termination_time
);
TRANSLATE(
"Controller: %[scmi_obj_hnd]",
eip01.ru.lter.terminating_ctrlr
);
TRANSLATE(
"Software version: %s",
eip01.ru.lter.sw_version
);
TRANSLATE(
"Controller uptime: %y.",
eip01.ru.lter.uptime
);
TRANSLATE(
"Post termination operation: %d. (%[fm_terminate_routines])",
eip01.ru.lter.reuea_index,
eip01.ru.lter.reuea_index
);
TRANSLATE(
"Trap type: 0x%08X",
eip01.rei.tt
);
TRANSLATE(
"Termination code: 0x%08X",
eip01.rei.tc
);
TRANSLATE(
"SRRO register: 0x%08X",
eip01.rei.srr0
);
TRANSLATE(
"LR register: 0x%08X",
eip01.rei.lr
);
TRANSLATE(
"Exception code: 0x%08X",
eip01.rei.exception
);
ENDTRANSLATIONBLOCK
EC BLOCK: 04030102 SCID$FM_TPUE
TRANSLATIONBLOCK
TRANSLATE(
"Termination Code: 0x%08X (%s)",
eip02.ru.lter.termination_event.u.value,
XLATE_TC_FLO(
eip02.ru.lter.termination_event.u.value,
eip02.ru.lter.ctrlr_model_id,
eip02.ru.lter.baselevel_id,
eip02.ru.lter.sw_version
)
);
TRANSLATE(
"Location: 0x%08X",
eip02.ru.lter.termination_event.termination_location
);
TRANSLATE(
"Date/time: %[scmitim]",
eip02.ru.lter.termination_time
);
TRANSLATE(
"Controller: %[scmi_obj_hnd]",
eip02.ru.lter.terminating_ctrlr
);
TRANSLATE(
"Software version: %s",
eip02.ru.lter.sw_version
);
TRANSLATE(
"Controller uptime: %y.",
eip02.ru.lter.uptime
);
TRANSLATE(
"Unexpected event type: %d. (%[fm_ue])",
eip02.uei.type,
eip02.uei.type
);
TRANSLATE(
"Post termination operation: %d. (%[fm_terminate_routines])",
eip02.uei.pto,
eip02.uei.pto
);
TRANSLATE(
"Parameter[0]: 0x%08X",
eip02.uei.param
);
ENDTRANSLATIONBLOCK
EC BLOCK: 04040003 SCID$FM_SCEL_VALIDATED
TRANSLATIONBLOCK
CONDITIONAL(
eip03.cinfo.scelcbi.status == 0,
TRANSLATE("Status: 0. (No problems found)"),
TRANSLATE(
"Unexpected status: %d.",
eip03.cinfo.scelcbi.status
)
);
TRANSLATE(
"Current offset: %d.",
eip03.cinfo.scelcbi.current_offset
);
CONDITIONAL(
eip03.cinfo.scelcbi.flags.time_set != 0,
TRANSLATE("Time set"),
TRANSLATE("Time not set")
);
CONDITIONAL(
eip03.cinfo.scelcbi.flags.time_synched != 0,
TRANSLATE("Time synchronized"),
TRANSLATE("Time not synchronized")
);
CONDITIONAL(
eip03.cinfo.scelcbi.flags.seq_reset != 0,
TRANSLATE("Sequence number reset"),
TRANSLATE("Sequence number not reset")
);
CONDITIONAL(
eip03.cinfo.scelcbi.flags.wrapped != 0,
TRANSLATE("Events wrapped"),
TRANSLATE("Events not wrapped")
);
TRANSLATE(
"Current EDBN: %d.",
eip03.cinfo.scelcbi.current_edbn
);
TRANSLATE(
"Start EDBN: %d.",
eip03.cinfo.scelcbi.start_edbn
);
TRANSLATE(
"End EDBN: %d.",
eip03.cinfo.scelcbi.end_edbn
);
TRANSLATE(
"Sequence reset EDBN: %d.",
eip03.cinfo.scelcbi.seq_reset_edbn
);
TRANSLATE(
"Event count: %d.",
eip03.cinfo.scelcbi.event_count
);
TRANSLATE(
"Sequence number: %d.",
eip03.cinfo.scelcbi.sequence_number
);
TRANSLATE(
"Loop index: %d.",
eip03.minfo.scelmi.index
);
TRANSLATE(
"Zero test buffer pointer: 0x%08X",
eip03.minfo.scelmi.utp
);
TRANSLATE(
"Current event pointer: 0x%08X",
eip03.minfo.scelmi.current_eventp
);
TRANSLATE(
"Current EDBN: %d.",
eip03.minfo.scelmi.current_edbn
);
TRANSLATE(
"Current sequence number: %d.",
eip03.minfo.scelmi.current_seqn
);
TRANSLATE(
"Previous offset: %d., 0x%04X",
eip03.minfo.scelmi.previous_offset,
eip03.minfo.scelmi.previous_offset
);
TRANSLATE(
"Current offset: %d., 0x%04X",
eip03.minfo.scelmi.current_offset,
eip03.minfo.scelmi.current_offset
);
TRANSLATE(
"Previous EDBN: %d.",
eip03.minfo.scelmi.previous_edbn
);
TRANSLATE(
"Previous sequence number: %d.",
eip03.minfo.scelmi.previous_seqn
);
CONDITIONAL(
eip03.minfo.scelmi.end_found != 0,
TRANSLATE("End found"),
TRANSLATE("End not found")
);
CONDITIONAL(
eip03.minfo.scelmi.accept_new_to_old != 0,
TRANSLATE("New to old acceptable"),
TRANSLATE("New to old not acceptable")
);
CONDITIONAL(
eip03.minfo.scelmi.unequal_found != 0,
TRANSLATE("Sequence number not as expected"),
TRANSLATE("Sequence number as expected")
);
TRANSLATE(
"I/O status: %d., 0x%08X",
eip03.minfo.scelmi.iostatus,
eip03.minfo.scelmi.iostatus
);
ENDTRANSLATIONBLOCK
EC BLOCK: 04050003 SCID$FM_SCEL_INITED
TRANSLATIONBLOCK
TRANSLATE(
"Status: 0x%02X (%[fm_mpvfc])",
eip03.cinfo.scelcbi.status,
eip03.cinfo.scelcbi.status
);
TRANSLATE(
"Current offset: %d.",
eip03.cinfo.scelcbi.current_offset
);
CONDITIONAL(
eip03.cinfo.scelcbi.flags.time_set != 0,
TRANSLATE("Time set"),
TRANSLATE("Time not set")
);
CONDITIONAL(
eip03.cinfo.scelcbi.flags.time_synched != 0,
TRANSLATE("Time synchronized"),
TRANSLATE("Time not synchronized")
);
CONDITIONAL(
eip03.cinfo.scelcbi.flags.seq_reset != 0,
TRANSLATE("Sequence number reset"),
TRANSLATE("Sequence number not reset")
);
CONDITIONAL(
eip03.cinfo.scelcbi.flags.wrapped != 0,
TRANSLATE("Events wrapped"),
TRANSLATE("Events not wrapped")
);
TRANSLATE(
"Current EDBN: %d.",
eip03.cinfo.scelcbi.current_edbn
);
TRANSLATE(
"Start EDBN: %d.",
eip03.cinfo.scelcbi.start_edbn
);
TRANSLATE(
"End EDBN: %d.",
eip03.cinfo.scelcbi.end_edbn
);
TRANSLATE(
"Sequence reset EDBN: %d.",
eip03.cinfo.scelcbi.seq_reset_edbn
);
TRANSLATE(
"Event count: %d.",
eip03.cinfo.scelcbi.event_count
);
TRANSLATE(
"Sequence number: %d.",
eip03.cinfo.scelcbi.sequence_number
);
TRANSLATE(
"Loop index: %d.",
eip03.minfo.scelmi.index
);
TRANSLATE(
"Zero test buffer pointer: 0x%08X",
eip03.minfo.scelmi.utp
);
TRANSLATE(
"Current event pointer: 0x%08X",
eip03.minfo.scelmi.current_eventp
);
TRANSLATE(
"Current EDBN: %d.",
eip03.minfo.scelmi.current_edbn
);
TRANSLATE(
"Current sequence number: %d.",
eip03.minfo.scelmi.current_seqn
);
TRANSLATE(
"Previous offset: %d., 0x%04X",
eip03.minfo.scelmi.previous_offset,
eip03.minfo.scelmi.previous_offset
);
TRANSLATE(
"Current offset: %d., 0x%04X",
eip03.minfo.scelmi.current_offset,
eip03.minfo.scelmi.current_offset
);
TRANSLATE(
"Previous EDBN: %d.",
eip03.minfo.scelmi.previous_edbn
);
TRANSLATE(
"Previous sequence number: %d.",
eip03.minfo.scelmi.previous_seqn
);
CONDITIONAL(
eip03.minfo.scelmi.end_found != 0,
TRANSLATE("End found"),
TRANSLATE("End not found")
);
CONDITIONAL(
eip03.minfo.scelmi.accept_new_to_old != 0,
TRANSLATE("New to old acceptable"),
TRANSLATE("New to old not acceptable")
);
CONDITIONAL(
eip03.minfo.scelmi.unequal_found != 0,
TRANSLATE("Sequence number not as expected"),
TRANSLATE("Sequence number as expected")
);
TRANSLATE(
"I/O status: %d., 0x%08X",
eip03.minfo.scelmi.iostatus,
eip03.minfo.scelmi.iostatus
);
ENDTRANSLATIONBLOCK
EC BLOCK: 04060803 SCID$FM_LOCAL_EVENTS_NR
TRANSLATIONBLOCK
TRANSLATE(
"Local events not reported: %d.",
eip03.ainfo.events_not_reported
);
ENDTRANSLATIONBLOCK
EC BLOCK: 04070803 SCID$FM_REMOTE_EVENTS_NR
TRANSLATIONBLOCK
TRANSLATE(
"Remote events not reported: %d.",
eip03.ainfo.events_not_reported
);
ENDTRANSLATIONBLOCK
EC BLOCK: 04080003 SCID$FM_SCTEL_INACC
TRANSLATIONBLOCK
TRANSLATE(
"Status: 0x%02X (%[fm_mpvfc])",
eip03.cinfo.sctelcbi.status,
eip03.cinfo.sctelcbi.status
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.time_set != 0,
TRANSLATE("Time set"),
TRANSLATE("Time not set")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.time_synched != 0,
TRANSLATE("Time synchronized"),
TRANSLATE("Time not synchronized")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.bctrlr_wrapped != 0,
TRANSLATE("B events wrapped"),
TRANSLATE("B events not wrapped")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.bctrlr_valid != 0,
TRANSLATE("B events valid"),
TRANSLATE("B events not valid")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.actrlr_wrapped != 0,
TRANSLATE("A events wrapped"),
TRANSLATE("A events not wrapped")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.actrlr_valid != 0,
TRANSLATE("A events valid"),
TRANSLATE("A events not valid")
);
TRANSLATE(
"A Controller: %[uuid]",
eip03.cinfo.sctelcbi.actrlr_id
);
TRANSLATE(
"A MRU TEDBN: %d.",
eip03.cinfo.sctelcbi.actrlr_mru_edbn
);
TRANSLATE(
"B Controller: %[uuid]",
eip03.cinfo.sctelcbi.bctrlr_id
);
TRANSLATE(
"B MRU TEDBN: %d.",
eip03.cinfo.sctelcbi.bctrlr_mru_edbn
);
TRANSLATE(
"Loop index: %d.",
eip03.minfo.sctelmi.index
);
TRANSLATE(
"Current TEDBN: %d.",
eip03.minfo.sctelmi.current_edbn
);
TRANSLATE(
"End TEDBN: %d.",
eip03.minfo.sctelmi.end_edbn
);
CONDITIONAL(
eip03.minfo.sctelmi.actrlr != 0,
TRANSLATE("Is A controller"),
TRANSLATE("Is not A controller")
);
TRANSLATE(
"I/O status: %d., 0x%08X",
eip03.minfo.sctelmi.iostatus,
eip03.minfo.sctelmi.iostatus
);
TRANSLATE(
"Hold buffer offset: %d., 0x%08X",
eip03.minfo.sctelmi.hold_offset,
eip03.minfo.sctelmi.hold_offset
);
ENDTRANSLATIONBLOCK
EC BLOCK: 04090003 SCID$FM_SCTEL_VALIDATED
TRANSLATIONBLOCK
CONDITIONAL(
eip03.cinfo.sctelcbi.status == 0,
TRANSLATE("Status: 0. (No problems found)"),
TRANSLATE(
"Unexpected status: %d.",
eip03.cinfo.sctelcbi.status
)
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.time_set != 0,
TRANSLATE("Time set"),
TRANSLATE("Time not set")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.time_synched != 0,
TRANSLATE("Time synchronized"),
TRANSLATE("Time not synchronized")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.bctrlr_wrapped != 0,
TRANSLATE("B events wrapped"),
TRANSLATE("B events not wrapped")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.bctrlr_valid != 0,
TRANSLATE("B events valid"),
TRANSLATE("B events not valid")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.actrlr_wrapped != 0,
TRANSLATE("A events wrapped"),
TRANSLATE("A events not wrapped")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.actrlr_valid != 0,
TRANSLATE("A events valid"),
TRANSLATE("A events not valid")
);
TRANSLATE(
"A Controller: %[uuid]",
eip03.cinfo.sctelcbi.actrlr_id
);
TRANSLATE(
"A MRU TEDBN: %d.",
eip03.cinfo.sctelcbi.actrlr_mru_edbn
);
TRANSLATE(
"B Controller: %[uuid]",
eip03.cinfo.sctelcbi.bctrlr_id
);
TRANSLATE(
"B MRU TEDBN: %d.",
eip03.cinfo.sctelcbi.bctrlr_mru_edbn
);
TRANSLATE(
"Loop index: %d.",
eip03.minfo.sctelmi.index
);
TRANSLATE(
"Current TEDBN: %d.",
eip03.minfo.sctelmi.current_edbn
);
TRANSLATE(
"End TEDBN: %d.",
eip03.minfo.sctelmi.end_edbn
);
CONDITIONAL(
eip03.minfo.sctelmi.actrlr != 0,
TRANSLATE("Is A controller"),
TRANSLATE("Is not A controller")
);
TRANSLATE(
"I/O status: %d., 0x%08X",
eip03.minfo.sctelmi.iostatus,
eip03.minfo.sctelmi.iostatus
);
TRANSLATE(
"Hold buffer offset: %d., 0x%08X",
eip03.minfo.sctelmi.hold_offset,
eip03.minfo.sctelmi.hold_offset
);
ENDTRANSLATIONBLOCK
EC BLOCK: 040a0003 SCID$FM_SCTEL_INITED
TRANSLATIONBLOCK
TRANSLATE(
"Status: 0x%02X (%[fm_mpvfc])",
eip03.cinfo.sctelcbi.status,
eip03.cinfo.sctelcbi.status
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.time_set != 0,
TRANSLATE("Time set"),
TRANSLATE("Time not set")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.time_synched != 0,
TRANSLATE("Time synchronized"),
TRANSLATE("Time not synchronized")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.bctrlr_wrapped != 0,
TRANSLATE("B events wrapped"),
TRANSLATE("B events not wrapped")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.bctrlr_valid != 0,
TRANSLATE("B events valid"),
TRANSLATE("B events not valid")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.actrlr_wrapped != 0,
TRANSLATE("A events wrapped"),
TRANSLATE("A events not wrapped")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.actrlr_valid != 0,
TRANSLATE("A events valid"),
TRANSLATE("A events not valid")
);
TRANSLATE(
"A Controller: %[uuid]",
eip03.cinfo.sctelcbi.actrlr_id
);
TRANSLATE(
"A MRU TEDBN: %d.",
eip03.cinfo.sctelcbi.actrlr_mru_edbn
);
TRANSLATE(
"B Controller: %[uuid]",
eip03.cinfo.sctelcbi.bctrlr_id
);
TRANSLATE(
"B MRU TEDBN: %d.",
eip03.cinfo.sctelcbi.bctrlr_mru_edbn
);
TRANSLATE(
"Loop index: %d.",
eip03.minfo.sctelmi.index
);
TRANSLATE(
"Current TEDBN: %d.",
eip03.minfo.sctelmi.current_edbn
);
TRANSLATE(
"End TEDBN: %d.",
eip03.minfo.sctelmi.end_edbn
);
CONDITIONAL(
eip03.minfo.sctelmi.actrlr != 0,
TRANSLATE("Is A controller"),
TRANSLATE("Is not A controller")
);
TRANSLATE(
"I/O status: %d., 0x%08X",
eip03.minfo.sctelmi.iostatus,
eip03.minfo.sctelmi.iostatus
);
TRANSLATE(
"Hold buffer offset: %d., 0x%08X",
eip03.minfo.sctelmi.hold_offset,
eip03.minfo.sctelmi.hold_offset
);
ENDTRANSLATIONBLOCK
EC BLOCK: 040b0003 SCID$FM_SCTEL_UPDATED
TRANSLATIONBLOCK
CONDITIONAL(
eip03.cinfo.sctelcbi.status == 0,
TRANSLATE("Status: 0. (No problems found)"),
TRANSLATE(
"Unexpected status: %d.",
eip03.cinfo.sctelcbi.status
)
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.time_set != 0,
TRANSLATE("Time set"),
TRANSLATE("Time not set")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.time_synched != 0,
TRANSLATE("Time synchronized"),
TRANSLATE("Time not synchronized")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.bctrlr_wrapped != 0,
TRANSLATE("B events wrapped"),
TRANSLATE("B events not wrapped")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.bctrlr_valid != 0,
TRANSLATE("B events valid"),
TRANSLATE("B events not valid")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.actrlr_wrapped != 0,
TRANSLATE("A events wrapped"),
TRANSLATE("A events not wrapped")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.actrlr_valid != 0,
TRANSLATE("A events valid"),
TRANSLATE("A events not valid")
);
TRANSLATE(
"A Controller: %[uuid]",
eip03.cinfo.sctelcbi.actrlr_id
);
TRANSLATE(
"A MRU TEDBN: %d.",
eip03.cinfo.sctelcbi.actrlr_mru_edbn
);
TRANSLATE(
"B Controller: %[uuid]",
eip03.cinfo.sctelcbi.bctrlr_id
);
TRANSLATE(
"B MRU TEDBN: %d.",
eip03.cinfo.sctelcbi.bctrlr_mru_edbn
);
TRANSLATE(
"Loop index: %d.",
eip03.minfo.sctelmi.index
);
TRANSLATE(
"Current TEDBN: %d.",
eip03.minfo.sctelmi.current_edbn
);
TRANSLATE(
"End TEDBN: %d.",
eip03.minfo.sctelmi.end_edbn
);
CONDITIONAL(
eip03.minfo.sctelmi.actrlr != 0,
TRANSLATE("Is A controller"),
TRANSLATE("Is not A controller")
);
TRANSLATE(
"I/O status: %d., 0x%08X",
eip03.minfo.sctelmi.iostatus,
eip03.minfo.sctelmi.iostatus
);
TRANSLATE(
"Hold buffer offset: %d., 0x%08X",
eip03.minfo.sctelmi.hold_offset,
eip03.minfo.sctelmi.hold_offset
);
ENDTRANSLATIONBLOCK
EC BLOCK: 040c0803 SCID$FM_BAD_REMOTE_EVENT
TRANSLATIONBLOCK
TRANSLATE(
"EIP event code: 0x%08x",
eip03.ainfo.remote_event.u.value
);
TRANSLATE(
"EIP type: 0x%02x",
eip03.ainfo.remote_event.type
);
TRANSLATE(
"EIP revision number: 0x%02x",
eip03.ainfo.remote_event.revision
);
TRANSLATE("EIP count: %d.", eip03.ainfo.remote_event.count);
ENDTRANSLATIONBLOCK
EC BLOCK: 040d0003 SCID$FM_QUIESCED
TRANSLATIONBLOCK
TRANSLATE(
"Quiescent type: %[fm_quiesce]",
eip03.ainfo.quiesce_type
);
ENDTRANSLATIONBLOCK
EC BLOCK: 040e0300 SCID$FM_TE_CPLD
TRANSLATIONBLOCK
TRANSLATE(
"Termination Code: 0x%08X (%s)",
eip00.ru.lter.termination_event.u.value,
XLATE_TC_FLO(
eip00.ru.lter.termination_event.u.value,
eip00.ru.lter.ctrlr_model_id,
eip00.ru.lter.baselevel_id,
eip00.ru.lter.sw_version
)
);
TRANSLATE(
"Termination corrective action code: 0x%02x",
eip00.ru.lter.termination_event.u.code.cac
);
TRANSLATE(
"Location: 0x%08X",
eip00.ru.lter.termination_event.termination_location
);
TRANSLATE(
"Date/time: %[scmitim]",
eip00.ru.lter.termination_time
);
TRANSLATE(
"Controller: %[scmi_obj_hnd]",
eip00.ru.lter.terminating_ctrlr
);
TRANSLATE(
"Software version: %s",
eip00.ru.lter.sw_version
);
TRANSLATE(
"Controller uptime: %y.",
eip00.ru.lter.uptime
);
ENDTRANSLATIONBLOCK
EC BLOCK: 040f0003 SCID$FM_TEISP_SENT
TRANSLATIONBLOCK
CONDITIONAL(
eip03.cinfo.sctelcbi.status == 0,
TRANSLATE("Status: 0. (No problems found)"),
TRANSLATE(
"Unexpected status: %d.",
eip03.cinfo.sctelcbi.status
)
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.time_set != 0,
TRANSLATE("Time set"),
TRANSLATE("Time not set")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.time_synched != 0,
TRANSLATE("Time synchronized"),
TRANSLATE("Time not synchronized")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.bctrlr_wrapped != 0,
TRANSLATE("B events wrapped"),
TRANSLATE("B events not wrapped")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.bctrlr_valid != 0,
TRANSLATE("B events valid"),
TRANSLATE("B events not valid")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.actrlr_wrapped != 0,
TRANSLATE("A events wrapped"),
TRANSLATE("A events not wrapped")
);
CONDITIONAL(
eip03.cinfo.sctelcbi.flags.actrlr_valid != 0,
TRANSLATE("A events valid"),
TRANSLATE("A events not valid")
);
TRANSLATE(
"A Controller: %[uuid]",
eip03.cinfo.sctelcbi.actrlr_id
);
TRANSLATE(
"A MRU TEDBN: %d.",
eip03.cinfo.sctelcbi.actrlr_mru_edbn
);
TRANSLATE(
"B Controller: %[uuid]",
eip03.cinfo.sctelcbi.bctrlr_id
);
TRANSLATE(
"B MRU TEDBN: %d.",
eip03.cinfo.sctelcbi.bctrlr_mru_edbn
);
TRANSLATE(
"Loop index: %d.",
eip03.minfo.sctelmi.index
);
TRANSLATE(
"Current TEDBN: %d.",
eip03.minfo.sctelmi.current_edbn
);
TRANSLATE(
"End TEDBN: %d.",
eip03.minfo.sctelmi.end_edbn
);
CONDITIONAL(
eip03.minfo.sctelmi.actrlr != 0,
TRANSLATE("Is A controller"),
TRANSLATE("Is not A controller")
);
TRANSLATE(
"I/O status: %d., 0x%08X",
eip03.minfo.sctelmi.iostatus,
eip03.minfo.sctelmi.iostatus
);
TRANSLATE(
"Hold buffer offset: %d., 0x%08X",
eip03.minfo.sctelmi.hold_offset,
eip03.minfo.sctelmi.hold_offset
);
ENDTRANSLATIONBLOCK
EC BLOCK: 04100803 SCID$FM_LOCAL_ISR_EVENTS_NR
TRANSLATIONBLOCK
TRANSLATE(
"ISR events not reported: %d.",
eip03.ainfo.events_not_reported
);
ENDTRANSLATIONBLOCK
EC BLOCK: 04110803 SCID$FM_REMOTE_ISR_EVENTS_NR
TRANSLATIONBLOCK
TRANSLATE(
"ISR events not reported: %d.",
eip03.ainfo.events_not_reported
);
ENDTRANSLATIONBLOCK
EC BLOCK: 04120003 SCID$FM_LER_INTERVAL_CHANGED
TRANSLATIONBLOCK
CONDITIONAL(
eip03.minfo.lerinfo.reporting_interval != 0,
TRANSLATE(
"Last event reporting enabled, interval: %d. minutes",
eip03.minfo.lerinfo.reporting_interval * 15
),
TRANSLATE("Last event reporting disabled")
);
ENDTRANSLATIONBLOCK
EC BLOCK: 04130003 SCID$FM_LAST_EVENT_REPORTED
TRANSLATIONBLOCK
TRANSLATE("Last event information - ");
TRANSLATE(
" Reporting interval: %d. minutes",
eip03.minfo.lerinfo.reporting_interval * 15
);
TRANSLATE(
" Sequence number: %d.",
eip03.minfo.lerinfo.sequence_number
);
TRANSLATE(
" Report time: %[scmitim]",
eip03.minfo.lerinfo.report_time
);
TRANSLATE(
" Event code: %08X",
eip03.minfo.lerinfo.header.u.value
);
TRANSLATE("Primary controller last 30 seconds activity summary - ");
TRANSLATE(
" Total requests per second: %d.",
eip03.cinfo.stats30.total.rps
);
TRANSLATE(
" Total KB per second: %d.",
eip03.cinfo.stats30.total.kbs
);
TRANSLATE(
" Host requests per second: %d.",
eip03.cinfo.stats30.host.rps
);
TRANSLATE(
" Host KB per second: %d.",
eip03.cinfo.stats30.host.kbs
);
ENDTRANSLATIONBLOCK
EC BLOCK: 041a0300 SCID$FM_TE_PRETEND
TRANSLATIONBLOCK
TRANSLATE(
"Termination code: 0x%08x (%s)",
eip00.ru.lter.termination_event.u.value,
XLATE_TC_FLO(
eip00.ru.lter.termination_event.u.value,
eip00.ru.lter.ctrlr_model_id,
eip00.ru.lter.baselevel_id,
eip00.ru.lter.sw_version
)
);
TRANSLATE(
"Termination corrective action code: 0x%02x",
eip00.ru.lter.termination_event.u.code.cac
);
TRANSLATE(
"Termination location: 0x%08x",
eip00.ru.lter.termination_event.termination_location
);
TRANSLATE(
"Termination date/time: %[scmitim]",
eip00.ru.lter.termination_time
);
TRANSLATE(
"Terminating controller: %[scmi_obj_hnd]",
eip00.ru.lter.terminating_ctrlr
);
TRANSLATE(
"Termination event sequence number: %d.",
eip00.ru.lter.seq
);
TRANSLATE(
"Terminating controller's software version: %s",
eip00.ru.lter.sw_version
);
TRANSLATE(
"Terminating controller's baselevel ID: %s",
eip00.ru.lter.baselevel_id
);
TRANSLATE(
"Controller uptime: %y. seconds",
eip00.ru.lter.uptime
);
ENDTRANSLATIONBLOCK
EC BLOCK: 06000009 SCID$FCS_SMART_FAILURE
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip09.device);
TRANSLATE("Port ID: %s", eip09.cerp_id);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip09.dencl_num - 100
)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip09.bay - 100)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip09.dencl_num)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Bay: %d.", eip09.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip09.al_pa);
TRANSLATE("%s", XLATE_EIP09_OPCODE(
eip09.fed_class,
eip09.cmd.cdb10.opcode
)
);
TRANSLATE(
"Sense Key: %1X (%[scsi_sensekey])",
eip09.error.sense_data.sense_key,
eip09.error.sense_data.sense_key
);
TRANSLATE(
"ASC: 0x%02x ASCQ: 0x%02x (%[scsi_asc_ascq])",
eip09.error.sense_data.asc_ascq.asc_ascqb.asc,
eip09.error.sense_data.asc_ascq.asc_ascqb.asq,
eip09.error.sense_data.asc_ascq.asc_ascqw
);
TRANSLATE(
"FRU Code: 0x%02x",
eip09.error.sense_data.fru_code
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip09.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06014a08 SCID$FCS_LINK_FAILURE
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip08.cerp_id);
TRANSLATE("Failure cause: %[fcs_fail]", eip08.failure_cause);
TRANSLATE("Producer index: 0x%04x", eip08.peq_prod_index);
TRANSLATE("Consumer index: 0x%04x", eip08.peq_cons_index);
TRANSLATE("Frozen index: 0x%04x", eip08.peq_frz_prod_index);
TRANSLATE("Port event block(s):");
CONDITIONAL( eip08.peb[0].type != 0,
TRANSLATE(
" [0] Type: %08X Context: %08X",
eip08.peb[0].type,
eip08.peb[0].context
)
);
CONDITIONAL( eip08.peb[1].type != 0,
TRANSLATE(
" [1] Type: %08X Context: %08X",
eip08.peb[1].type,
eip08.peb[1].context
)
);
CONDITIONAL( eip08.peb[2].type != 0,
TRANSLATE(
" [2] Type: %08X Context: %08X",
eip08.peb[2].type,
eip08.peb[2].context
)
);
CONDITIONAL( eip08.peb[3].type != 0,
TRANSLATE(
" [3] Type: %08X Context: %08X",
eip08.peb[3].type,
eip08.peb[3].context
)
);
CONDITIONAL( eip08.peb[4].type != 0,
TRANSLATE(
" [4] Type: %08X Context: %08X",
eip08.peb[4].type,
eip08.peb[4].context
)
);
CONDITIONAL( eip08.peb[5].type != 0,
TRANSLATE(
" [5] Type: %08X Context: %08X",
eip08.peb[5].type,
eip08.peb[5].context
)
);
CONDITIONAL( eip08.peb[6].type != 0,
TRANSLATE(
" [6] Type: %08X Context: %08X",
eip08.peb[6].type,
eip08.peb[6].context
)
);
CONDITIONAL( eip08.peb[7].type != 0,
TRANSLATE(
" [7] Type: %08X Context: %08X",
eip08.peb[7].type,
eip08.peb[7].context
)
);
TRANSLATE("Retry Timer: %d ", eip08.time.time_value);
CONDITIONAL ( eip08.time.time_unit == 0,
TRANSLATE(
"second(s)"
)
);
CONDITIONAL ( eip08.time.time_unit == 1,
TRANSLATE(
"minute(s)"
)
);
CONDITIONAL ( eip08.time.time_unit == 2,
TRANSLATE(
"hour(s)"
)
);
CONDITIONAL ( eip08.time.time_unit == 3,
TRANSLATE(
"day(s)"
)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 06020009 SCID$FCS_CHECK_CONDITION
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip09.device);
TRANSLATE("Port ID: %s", eip09.cerp_id);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip09.dencl_num - 100
)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip09.bay - 100)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip09.dencl_num)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Bay: %d.", eip09.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip09.al_pa);
TRANSLATE("%s", XLATE_EIP09_OPCODE(
eip09.fed_class,
eip09.cmd.cdb10.opcode
)
);
TRANSLATE(
"Sense Key: %1X (%[scsi_sensekey])",
eip09.error.sense_data.sense_key,
eip09.error.sense_data.sense_key
);
TRANSLATE(
"ASC: 0x%02x ASCQ: 0x%02x (%[scsi_asc_ascq])",
eip09.error.sense_data.asc_ascq.asc_ascqb.asc,
eip09.error.sense_data.asc_ascq.asc_ascqb.asq,
eip09.error.sense_data.asc_ascq.asc_ascqw
);
TRANSLATE(
"FRU Code: 0x%02x",
eip09.error.sense_data.fru_code
);
TRANSLATE( "%s", XLATE_EIP09_LBA( eip09.cmd ) );
TRANSLATE(
"Info: 0x%02x%02x%02x%02x",
eip09.error.sense_data.info_0,
eip09.error.sense_data.info_1,
eip09.error.sense_data.info_2,
eip09.error.sense_data.info_3
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip09.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06034713 SCID$FCS_DATA_EXCHANGE_TIMEOUT
TRANSLATIONBLOCK
TRANSLATE("Intended recipient: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip13.bay - 100)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Bay: %d.", eip13.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip13.al_pa);
TRANSLATE("Number of timeouts detected: %d.", eip13.num_times);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06044812 SCID$FCS_UNEXPECTED_WORK
TRANSLATIONBLOCK
TRANSLATE("Sender: %[tag]", eip12.device);
TRANSLATE("Port ID: %s", eip12.cerp_id);
CONDITIONAL(eip12.al_pa != 0x01 &&
eip12.al_pa != 0x02 &&
eip12.al_pa != 0xEE &&
eip12.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip12.al_pa != 0x01 &&
eip12.al_pa != 0x02 &&
eip12.al_pa != 0xEE &&
eip12.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip12.al_pa != 0x01 &&
eip12.al_pa != 0x02 &&
eip12.al_pa != 0xEE &&
eip12.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip12.dencl_num - 100
)
);
CONDITIONAL(eip12.al_pa != 0x01 &&
eip12.al_pa != 0x02 &&
eip12.al_pa != 0xEE &&
eip12.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip12.bay - 100)
);
CONDITIONAL(eip12.al_pa != 0x01 &&
eip12.al_pa != 0x02 &&
eip12.al_pa != 0xEE &&
eip12.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip12.al_pa != 0x01 &&
eip12.al_pa != 0x02 &&
eip12.al_pa != 0xEE &&
eip12.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip12.dencl_num)
);
CONDITIONAL(eip12.al_pa != 0x01 &&
eip12.al_pa != 0x02 &&
eip12.al_pa != 0xEE &&
eip12.dencl_num < 99,
TRANSLATE("Bay: %d.", eip12.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip12.al_pa);
TRANSLATE(
"Command descriptor block and Fibre Channel header information:"
);
TRANSLATE("hdr_cdb[0]: %08X", eip12.hdr_cdb[0]);
TRANSLATE("hdr_cdb[1]: %08X", eip12.hdr_cdb[1]);
TRANSLATE("hdr_cdb[2]: %08X", eip12.hdr_cdb[2]);
TRANSLATE("hdr_cdb[3]: %08X", eip12.hdr_cdb[3]);
TRANSLATE("hdr_cdb[4]: %08X", eip12.hdr_cdb[4]);
TRANSLATE("hdr_cdb[5]: %08X", eip12.hdr_cdb[5]);
TRANSLATE("hdr_cdb[6]: %08X", eip12.hdr_cdb[6]);
TRANSLATE("hdr_cdb[7]: %08X", eip12.hdr_cdb[7]);
TRANSLATE("hdr_cdb[8]: %08X", eip12.hdr_cdb[8]);
TRANSLATE("hdr_cdb[9]: %08X", eip12.hdr_cdb[9]);
TRANSLATE("hdr_cdb[10]: %08X", eip12.hdr_cdb[10]);
TRANSLATE("hdr_cdb[11]: %08X", eip12.hdr_cdb[11]);
TRANSLATE("hdr_cdb[12]: %08X", eip12.hdr_cdb[12]);
TRANSLATE("hdr_cdb[13]: %08X", eip12.hdr_cdb[13]);
ENDTRANSLATIONBLOCK
EC BLOCK: 06054909 SCID$FCS_BAD_ALPA
TRANSLATIONBLOCK
TRANSLATE("Intended target: %[tag]", eip09.device);
TRANSLATE("Port ID: %s", eip09.cerp_id);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip09.dencl_num - 100
)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip09.bay - 100)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip09.dencl_num)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Bay: %d.", eip09.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip09.al_pa);
TRANSLATE("%s", XLATE_EIP09_OPCODE(
eip09.fed_class,
eip09.cmd.cdb10.opcode
)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip09.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06074709 SCID$FCS_TDS_TIMEOUT
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip09.device);
TRANSLATE("Port ID: %s", eip09.cerp_id);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip09.dencl_num - 100
)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip09.bay - 100)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip09.dencl_num)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Bay: %d.", eip09.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip09.al_pa);
TRANSLATE("%s", XLATE_EIP09_OPCODE(
eip09.fed_class,
eip09.cmd.cdb10.opcode
)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip09.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06080007 SCID$FCS_LINK_ERRORS
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip07.cerp_id);
TRANSLATE("Non-zero error counts:");
CONDITIONAL( eip07.loss_of_signal != 0,
TRANSLATE("Loss of signal: %d.", eip07.loss_of_signal)
);
CONDITIONAL( eip07.bad_rx_char != 0,
TRANSLATE("Bad RX character: %d.", eip07.bad_rx_char)
);
CONDITIONAL( eip07.loss_of_sync != 0,
TRANSLATE("Loss of synch: %d.", eip07.loss_of_sync)
);
CONDITIONAL( eip07.link_fail != 0,
TRANSLATE("Link failure: %d.", eip07.link_fail)
);
CONDITIONAL( eip07.rx_eofa != 0,
TRANSLATE("RX EOFa delimiter: %d.", eip07.rx_eofa)
);
CONDITIONAL( eip07.dis_frm != 0,
TRANSLATE("Discarded frame: %d.", eip07.dis_frm)
);
CONDITIONAL( eip07.bad_crc != 0,
TRANSLATE("Frames with bad CRC and valid EOF: %d.", eip07.bad_crc)
);
CONDITIONAL( eip07.proto_err != 0,
TRANSLATE("N_Port protocol error: %d.", eip07.proto_err)
);
CONDITIONAL( eip07.exp_frm != 0,
TRANSLATE("Expired outbound frame: %d.", eip07.exp_frm)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 06090013 SCID$FCS_SMART_FAILURE_COUNT
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip13.bay - 100)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Bay: %d.", eip13.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip13.al_pa);
TRANSLATE("Number of failure prediction threshold exceeded errors: %d.",
eip13.num_times
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 060a0013 SCID$FCS_CHECK_CONDITION_COUNT
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip13.bay - 100)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Bay: %d.", eip13.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip13.al_pa);
TRANSLATE("Number of check condition errors in last minute: %d.",
eip13.num_times
);
ENDTRANSLATIONBLOCK
EC BLOCK: 060b4709 SCID$FCS_NONDATA_EXCH_TIMEOUT
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip09.device);
TRANSLATE("Port ID: %s", eip09.cerp_id);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip09.dencl_num - 100
)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip09.bay - 100)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip09.dencl_num)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Bay: %d.", eip09.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip09.al_pa);
TRANSLATE("%s", XLATE_EIP09_OPCODE(
eip09.fed_class,
eip09.cmd.cdb10.opcode
)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip09.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 060c0013 SCID$FCS_LOOP_SWITCH
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip13.cerp_id);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 060d0013 SCID$FCS_DRIVE_PHYSICAL_LOCATION
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip13.bay - 100)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Bay: %d.", eip13.bay)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 060e9613 SCID$FCS_NO_EMU_CODE
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack and enclosure not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 060f4013 SCID$FCS_DRIVE_SEEN_ON_ESI
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip13.bay - 100)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Bay: %d.", eip13.bay)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06109b13 SCID$FCS_EMU_NOT_COMMUNICATE
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip13.bay - 100)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Bay: %d.", eip13.bay)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06120008 SCID$FCS_EMU_RETRIES_EXHAUSTED
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip08.cerp_id);
TRANSLATE("Enclosure: %d.", eip08.peq_prod_index);
TRANSLATE("Bay: %d.", eip08.failure_cause);
CONDITIONAL(eip08.peq_cons_index == 0, TRANSLATE("Loop: A"));
CONDITIONAL(eip08.peq_cons_index == 1, TRANSLATE("Loop: B"));
TRANSLATE("Retried task: 0x%04x", eip08.peq_frz_prod_index);
TRANSLATE("Task list to be sent to Drive Enclosure Environmental Monitoring Unit:");
CONDITIONAL( eip08.peb[0].type != 0,
TRANSLATE(
" [0] Type: %08X Context: %08X",
eip08.peb[0].type,
eip08.peb[0].context
)
);
CONDITIONAL( eip08.peb[1].type != 0,
TRANSLATE(
" [1] Type: %08X Context: %08X",
eip08.peb[1].type,
eip08.peb[1].context
)
);
CONDITIONAL( eip08.peb[2].type != 0,
TRANSLATE(
" [2] Type: %08X Context: %08X",
eip08.peb[2].type,
eip08.peb[2].context
)
);
CONDITIONAL( eip08.peb[3].type != 0,
TRANSLATE(
" [3] Type: %08X Context: %08X",
eip08.peb[3].type,
eip08.peb[3].context
)
);
CONDITIONAL( eip08.peb[4].type != 0,
TRANSLATE(
" [4] Type: %08X Context: %08X",
eip08.peb[4].type,
eip08.peb[4].context
)
);
CONDITIONAL( eip08.peb[5].type != 0,
TRANSLATE(
" [5] Type: %08X Context: %08X",
eip08.peb[5].type,
eip08.peb[5].context
)
);
CONDITIONAL( eip08.peb[6].type != 0,
TRANSLATE(
" [6] Type: %08X Context: %08X",
eip08.peb[6].type,
eip08.peb[6].context
)
);
CONDITIONAL( eip08.peb[7].type != 0,
TRANSLATE(
" [7] Type: %08X Context: %08X",
eip08.peb[7].type,
eip08.peb[7].context
)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 06130013 SCID$FCS_EMU_COMMUNICATE
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack and enclosure not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06149813 SCID$FCS_TOO_MANY_SHELVES
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip13.cerp_id);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06159913 SCID$FCS_PORT_CONNECTION_SWAPPED
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip13.cerp_id);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06169713 SCID$FCS_CABINET_NOT_CONNECTED
TRANSLATIONBLOCK
TRANSLATE("Controller ID not available");
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06180013 SCID$FCS_EMU_CODE_LOAD_START
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack and enclosure not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06190013 SCID$FCS_EMU_CODE_LOAD_DONE
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack and enclosure not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 061a0009 SCID$FCS_DRIVE_SOFT_ERRORS
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip09.device);
TRANSLATE("Port ID: %s", eip09.cerp_id);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip09.dencl_num - 100
)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip09.bay - 100)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip09.dencl_num)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Bay: %d.", eip09.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip09.al_pa);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip09.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 061b0013 SCID$FCS_CABINET_CONNECTED
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack and enclosure not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 061c4709 SCID$FCS_FRAME_TIMEOUT
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip09.device);
TRANSLATE("Port ID: %s", eip09.cerp_id);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip09.dencl_num - 100
)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip09.bay - 100)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip09.dencl_num)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Bay: %d.", eip09.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip09.al_pa);
TRANSLATE("%s", XLATE_EIP09_OPCODE(
eip09.fed_class,
eip09.cmd.cdb10.opcode
)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip09.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 061d4709 SCID$FCS_DROPPED_FRAME
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip09.device);
TRANSLATE("Port ID: %s", eip09.cerp_id);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip09.dencl_num - 100
)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip09.bay - 100)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip09.dencl_num)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Bay: %d.", eip09.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip09.al_pa);
TRANSLATE("%s", XLATE_EIP09_OPCODE(
eip09.fed_class,
eip09.cmd.cdb10.opcode
)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip09.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 061e4c13 SCID$FCS_DRIVE_SPOF
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip13.device);
TRANSLATE("Good port ID: %s", eip13.cerp_id);
TRANSLATE("Missing port ID: %s", eip13.missing_cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip13.bay - 100)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Bay: %d.", eip13.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip13.al_pa);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 061f0013 SCID$FCS_DRIVE_SPOF_FIXED
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip13.bay - 100)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Bay: %d.", eip13.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip13.al_pa);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06204013 SCID$FCS_UNSUPPORTED_DRIVE
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip13.bay - 100)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Bay: %d.", eip13.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip13.al_pa);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06210013 SCID$FCS_WRONG_BLOCK_SIZE
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip13.bay - 100)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Bay: %d.", eip13.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip13.al_pa);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06230013 SCID$FCS_LINK_IS_RESTARTED
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip13.cerp_id);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06240013 SCID$FCS_POST_LINK_FAIL_DD
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip13.cerp_id);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06254313 SCID$FCS_WRONG_HARD_ALPA
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip13.bay - 100)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Bay: %d.", eip13.bay)
);
TRANSLATE("Expected AL_PA: %04x", eip13.al_pa);
TRANSLATE("Actual AL_PA: %04x", eip13.num_times);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06268913 SCID$FCS_HARD_ALPA_THIEF
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip13.bay - 100)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Bay: %d.", eip13.bay)
);
TRANSLATE("Stolen AL_PA: %04x", eip13.al_pa);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06270113 SCID$FCS_SOFT_ALPA
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip13.bay - 100)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Bay: %d.", eip13.bay)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06280008 SCID$FCS_EMU_OB_RETRIES_EXHAUSTED
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip08.cerp_id);
TRANSLATE("Enclosure: %d.", eip08.peq_prod_index);
TRANSLATE("Bay: %d.", eip08.failure_cause);
CONDITIONAL(eip08.peq_cons_index == 0, TRANSLATE("Loop: A"));
CONDITIONAL(eip08.peq_cons_index == 1, TRANSLATE("Loop: B"));
TRANSLATE("Retried task: 0x%04x", eip08.peq_frz_prod_index);
TRANSLATE("Task list:");
CONDITIONAL( eip08.peb[0].type != 0,
TRANSLATE(
" [0] Type: %08X Context: %08X",
eip08.peb[0].type,
eip08.peb[0].context
)
);
CONDITIONAL( eip08.peb[1].type != 0,
TRANSLATE(
" [1] Type: %08X Context: %08X",
eip08.peb[1].type,
eip08.peb[1].context
)
);
CONDITIONAL( eip08.peb[2].type != 0,
TRANSLATE(
" [2] Type: %08X Context: %08X",
eip08.peb[2].type,
eip08.peb[2].context
)
);
CONDITIONAL( eip08.peb[3].type != 0,
TRANSLATE(
" [3] Type: %08X Context: %08X",
eip08.peb[3].type,
eip08.peb[3].context
)
);
CONDITIONAL( eip08.peb[4].type != 0,
TRANSLATE(
" [4] Type: %08X Context: %08X",
eip08.peb[4].type,
eip08.peb[4].context
)
);
CONDITIONAL( eip08.peb[5].type != 0,
TRANSLATE(
" [5] Type: %08X Context: %08X",
eip08.peb[5].type,
eip08.peb[5].context
)
);
CONDITIONAL( eip08.peb[6].type != 0,
TRANSLATE(
" [6] Type: %08X Context: %08X",
eip08.peb[6].type,
eip08.peb[6].context
)
);
CONDITIONAL( eip08.peb[7].type != 0,
TRANSLATE(
" [7] Type: %08X Context: %08X",
eip08.peb[7].type,
eip08.peb[7].context
)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 06290009 SCID$FCS_ABORT
TRANSLATIONBLOCK
TRANSLATE("Intended target: %[tag]", eip09.device);
TRANSLATE("Port ID: %s", eip09.cerp_id);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip09.dencl_num - 100
)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip09.bay - 100)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip09.dencl_num)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Bay: %d.", eip09.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip09.al_pa);
TRANSLATE("%s", XLATE_EIP09_OPCODE(
eip09.fed_class,
eip09.cmd.cdb10.opcode
)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip09.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 062a0009 SCID$FCS_RRQ
TRANSLATIONBLOCK
TRANSLATE("Intended target: %[tag]", eip09.device);
TRANSLATE("Port ID: %s", eip09.cerp_id);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip09.dencl_num - 100
)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip09.bay - 100)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip09.dencl_num)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Bay: %d.", eip09.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip09.al_pa);
TRANSLATE("%s", XLATE_EIP09_OPCODE(
eip09.fed_class,
eip09.cmd.cdb10.opcode
)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip09.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 062b4004 SCID$FCS_DRIVE_BRICK
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[tag]", eip04.device);
TRANSLATE("Port ID: %s", eip04.cerp_id);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip04.dencl_num - 100
)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip04.bay - 100)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip04.dencl_num)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Bay: %d.", eip04.bay)
);
TRANSLATE("Bypass method: %[fcs_mtl]", eip04.bypass_reason);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip04.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 062c0012 SCID$FCS_BBR
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip12.device);
TRANSLATE("Port ID: %s", eip12.cerp_id);
CONDITIONAL(eip12.al_pa != 0x01 &&
eip12.al_pa != 0x02 &&
eip12.al_pa != 0xEE &&
eip12.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip12.al_pa != 0x01 &&
eip12.al_pa != 0x02 &&
eip12.al_pa != 0xEE &&
eip12.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip12.al_pa != 0x01 &&
eip12.al_pa != 0x02 &&
eip12.al_pa != 0xEE &&
eip12.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip12.dencl_num - 100
)
);
CONDITIONAL(eip12.al_pa != 0x01 &&
eip12.al_pa != 0x02 &&
eip12.al_pa != 0xEE &&
eip12.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip12.bay - 100)
);
CONDITIONAL(eip12.al_pa != 0x01 &&
eip12.al_pa != 0x02 &&
eip12.al_pa != 0xEE &&
eip12.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip12.al_pa != 0x01 &&
eip12.al_pa != 0x02 &&
eip12.al_pa != 0xEE &&
eip12.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip12.dencl_num)
);
CONDITIONAL(eip12.al_pa != 0x01 &&
eip12.al_pa != 0x02 &&
eip12.al_pa != 0xEE &&
eip12.dencl_num < 99,
TRANSLATE("Bay: %d.", eip12.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip12.al_pa);
TRANSLATE("Media defects:");
CONDITIONAL( eip12.hdr_cdb[0] != 0,
TRANSLATE(
" [0] LBA: %08X",
eip12.hdr_cdb[0]
)
);
CONDITIONAL( eip12.hdr_cdb[1] != 0,
TRANSLATE(
" [1] LBA: %08X",
eip12.hdr_cdb[1]
)
);
CONDITIONAL( eip12.hdr_cdb[2] != 0,
TRANSLATE(
" [2] LBA: %08X",
eip12.hdr_cdb[2]
)
);
CONDITIONAL( eip12.hdr_cdb[3] != 0,
TRANSLATE(
" [3] LBA: %08X",
eip12.hdr_cdb[3]
)
);
CONDITIONAL( eip12.hdr_cdb[4] != 0,
TRANSLATE(
" [4] LBA: %08X",
eip12.hdr_cdb[4]
)
);
CONDITIONAL( eip12.hdr_cdb[5] != 0,
TRANSLATE(
" [5] LBA: %08X",
eip12.hdr_cdb[5]
)
);
CONDITIONAL( eip12.hdr_cdb[6] != 0,
TRANSLATE(
" [6] LBA: %08X",
eip12.hdr_cdb[6]
)
);
CONDITIONAL( eip12.hdr_cdb[7] != 0,
TRANSLATE(
" [7] LBA: %08X",
eip12.hdr_cdb[7]
)
);
CONDITIONAL( eip12.hdr_cdb[8] != 0,
TRANSLATE(
" [8] LBA: %08X",
eip12.hdr_cdb[8]
)
);
CONDITIONAL( eip12.hdr_cdb[9] != 0,
TRANSLATE(
" [9] LBA: %08X",
eip12.hdr_cdb[9]
)
);
CONDITIONAL( eip12.hdr_cdb[10] != 0,
TRANSLATE(
" [10] LBA: %08X",
eip12.hdr_cdb[10]
)
);
CONDITIONAL( eip12.hdr_cdb[11] != 0,
TRANSLATE(
" [11] LBA: %08X",
eip12.hdr_cdb[11]
)
);
CONDITIONAL( eip12.hdr_cdb[12] != 0,
TRANSLATE(
" [12] LBA: %08X",
eip12.hdr_cdb[12]
)
);
CONDITIONAL( eip12.hdr_cdb[13] != 0,
TRANSLATE(
" [13] LBA: %08X",
eip12.hdr_cdb[13]
)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 062d0012 SCID$FCS_DIRECTED_LIP
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip12.cerp_id);
TRANSLATE("AL_PA: 0x%04x", eip12.al_pa);
TRANSLATE("LIP Type:");
CONDITIONAL( eip12.hdr_cdb[0] == 0,
TRANSLATE(
" LIP(F7,F7)"
)
);
CONDITIONAL( eip12.hdr_cdb[0] == 1,
TRANSLATE(
" DIRECTED RESET"
)
);
TRANSLATE("Caller PC: 0x%08X", eip12.hdr_cdb[1]);
ENDTRANSLATIONBLOCK
EC BLOCK: 062e0012 SCID$FCS_LIP_F8
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip12.cerp_id);
TRANSLATE("Controller affected: %[tag]", eip12.device);
CONDITIONAL( eip12.hdr_cdb[0] != 0,
TRANSLATE(
" [0] Count/AL_PA (ccccaaaa): %08X",
eip12.hdr_cdb[0]
)
);
CONDITIONAL( eip12.hdr_cdb[1] != 0,
TRANSLATE(
" [1] Count/AL_PA (ccccaaaa): %08X",
eip12.hdr_cdb[1]
)
);
CONDITIONAL( eip12.hdr_cdb[2] != 0,
TRANSLATE(
" [2] Count/AL_PA (ccccaaaa): %08X",
eip12.hdr_cdb[2]
)
);
CONDITIONAL( eip12.hdr_cdb[3] != 0,
TRANSLATE(
" [3] Count/AL_PA (ccccaaaa): %08X",
eip12.hdr_cdb[3]
)
);
CONDITIONAL( eip12.hdr_cdb[4] != 0,
TRANSLATE(
" [4] Count/AL_PA (ccccaaaa): %08X",
eip12.hdr_cdb[4]
)
);
CONDITIONAL( eip12.hdr_cdb[5] != 0,
TRANSLATE(
" [5] Count/AL_PA (ccccaaaa): %08X",
eip12.hdr_cdb[5]
)
);
CONDITIONAL( eip12.hdr_cdb[6] != 0,
TRANSLATE(
" [6] Count/AL_PA (ccccaaaa): %08X",
eip12.hdr_cdb[6]
)
);
CONDITIONAL( eip12.hdr_cdb[7] != 0,
TRANSLATE(
" [7] Count/AL_PA (ccccaaaa): %08X",
eip12.hdr_cdb[7]
)
);
CONDITIONAL( eip12.hdr_cdb[8] != 0,
TRANSLATE(
" [8] Count/AL_PA (ccccaaaa): %08X",
eip12.hdr_cdb[8]
)
);
CONDITIONAL( eip12.hdr_cdb[9] != 0,
TRANSLATE(
" [9] Count/AL_PA (ccccaaaa): %08X",
eip12.hdr_cdb[9]
)
);
CONDITIONAL( eip12.hdr_cdb[10] != 0,
TRANSLATE(
" [10] Count/AL_PA (ccccaaaa): %08X",
eip12.hdr_cdb[10]
)
);
CONDITIONAL( eip12.hdr_cdb[11] != 0,
TRANSLATE(
" [11] Count/AL_PA (ccccaaaa): %08X",
eip12.hdr_cdb[11]
)
);
CONDITIONAL( eip12.hdr_cdb[12] != 0,
TRANSLATE(
" [12] Count/AL_PA (ccccaaaa): %08X",
eip12.hdr_cdb[12]
)
);
CONDITIONAL( eip12.hdr_cdb[13] != 0,
TRANSLATE(
" [13] Count/AL_PA (ccccaaaa): %08X",
eip12.hdr_cdb[13]
)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 06304e13 SCID$FCS_SHELF_SPOF
TRANSLATIONBLOCK
TRANSLATE("Enclosure: %[tag]", eip13.device);
TRANSLATE("Good port ID: %s", eip13.cerp_id);
TRANSLATE("Missing port ID: %s", eip13.missing_cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack and enclosure not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
TRANSLATE("AL_PA: 0x%04x", eip13.al_pa);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06310013 SCID$FCS_SHELF_SPOF_FIXED
TRANSLATIONBLOCK
TRANSLATE("Enclosure: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack and enclosure not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06324e13 SCID$FCS_PORT_SPOF
TRANSLATIONBLOCK
TRANSLATE("Good port ID: %s", eip13.cerp_id);
TRANSLATE("Missing port ID: %s", eip13.missing_cerp_id);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06330013 SCID$FCS_PORT_SPOF_FIXED
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip13.cerp_id);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06340013 SCID$FCS_ENABLE_DP
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip13.cerp_id);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06354d04 SCID$FCS_UNKNOWN_FIRMWARE
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip04.device);
TRANSLATE("Port ID: %s", eip04.cerp_id);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip04.dencl_num - 100
)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip04.bay - 100)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip04.dencl_num)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Bay: %d.", eip04.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip04.al_pa);
TRANSLATE("SCSI Product ID: %s", eip04.pid);
TRANSLATE("Current firmware revision: %s", eip04.rev);
TRANSLATE("Latest known revision: %s", eip04.new_rev);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip04.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06364d04 SCID$FCS_UNSUPPORTED_FIRMWARE
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip04.device);
TRANSLATE("Port ID: %s", eip04.cerp_id);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip04.dencl_num - 100
)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip04.bay - 100)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip04.dencl_num)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Bay: %d.", eip04.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip04.al_pa);
TRANSLATE("SCSI Product ID: %s", eip04.pid);
TRANSLATE("Current firmware revision: %s", eip04.rev);
TRANSLATE("Latest known revision: %s", eip04.new_rev);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip04.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 0637c404 SCID$FCS_LATER_FIRMWARE
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip04.device);
TRANSLATE("Port ID: %s", eip04.cerp_id);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip04.dencl_num - 100
)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip04.bay - 100)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip04.dencl_num)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Bay: %d.", eip04.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip04.al_pa);
TRANSLATE("SCSI Product ID: %s", eip04.pid);
TRANSLATE("Current firmware revision: %s", eip04.rev);
TRANSLATE("Latest known revision: %s", eip04.new_rev);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip04.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 0638c404 SCID$FCS_NEWER_FIRMWARE
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip04.device);
TRANSLATE("Port ID: %s", eip04.cerp_id);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip04.dencl_num - 100
)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip04.bay - 100)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip04.dencl_num)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Bay: %d.", eip04.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip04.al_pa);
TRANSLATE("SCSI Product ID: %s", eip04.pid);
TRANSLATE("Current firmware revision: %s", eip04.rev);
TRANSLATE("Latest known revision: %s", eip04.new_rev);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip04.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06394008 SCID$FCS_LOOP_RECOVERY_SLOT_BYPASSED
TRANSLATIONBLOCK
TRANSLATE("Port IDs: %s %s", eip08.cerp_id, eip08.other_cerp_id);
TRANSLATE("Cabinet ID: %x", eip08.recovery.cab);
TRANSLATE("Enclosure ID: %x", eip08.recovery.shelf);
TRANSLATE("Bay: %x", eip08.recovery.slot);
ENDTRANSLATIONBLOCK
EC BLOCK: 063a0008 SCID$FCS_LOOP_RECOVERY_ENTERED
TRANSLATIONBLOCK
TRANSLATE("Port IDs: %s %s", eip08.cerp_id, eip08.other_cerp_id);
TRANSLATE("Reason Code: %d", eip08.failure_cause);
CONDITIONAL(eip08.failure_cause == 0x03,
TRANSLATE("LID Recovery"));
CONDITIONAL(eip08.failure_cause == 0x05,
TRANSLATE("DDD Recovery"));
ENDTRANSLATIONBLOCK
EC BLOCK: 063b0008 SCID$FCS_LOOP_RECOVERY_EXIT
TRANSLATIONBLOCK
TRANSLATE("Port IDs: %s %s", eip08.cerp_id, eip08.other_cerp_id);
TRANSLATE("Recovery Status: %x", eip08.failure_cause);
CONDITIONAL(eip08.failure_cause == 0,
TRANSLATE("Recovery Status Text: Success"));
CONDITIONAL(eip08.failure_cause == 1,
TRANSLATE("Recovery Status Text: Exhausted retry count for FNB"));
CONDITIONAL(eip08.failure_cause == 2,
TRANSLATE("Recovery Status Text: No valid FNBs"));
CONDITIONAL(eip08.failure_cause == 3,
TRANSLATE("Recovery Status Text: No open DUB gates"));
CONDITIONAL(eip08.failure_cause == 4,
TRANSLATE("Recovery Status Text: Fibre channel error"));
CONDITIONAL(eip08.failure_cause == 5,
TRANSLATE("Recovery Status Text: CBIC codeload in progress"));
CONDITIONAL(eip08.failure_cause == 6,
TRANSLATE("Recovery Status Text: CBIC communications over IIC"));
CONDITIONAL(eip08.failure_cause == 7,
TRANSLATE("Recovery Status Text: Failed to enter FCS Maint Mode"));
CONDITIONAL(eip08.failure_cause == 8,
TRANSLATE("Recovery Status Text: Partial success"));
CONDITIONAL(eip08.failure_cause == 9,
TRANSLATE("Recovery Status Text: Task aborted"));
CONDITIONAL(eip08.failure_cause == 10,
TRANSLATE("Recovery Status Text: No progress made"));
CONDITIONAL(eip08.failure_cause == 11,
TRANSLATE("Recovery Status Text: Semaphore wait timed out"));
CONDITIONAL(eip08.failure_cause == 12,
TRANSLATE("Recovery Status Text: Exceeded max failure threshold for loop recovery"));
CONDITIONAL(eip08.failure_cause == 13,
TRANSLATE("Recovery Status Text: User disabled loop recoveries"));
ENDTRANSLATIONBLOCK
EC BLOCK: 063c0008 SCID$FCS_LOOP_RECOVERY_ABORT
TRANSLATIONBLOCK
TRANSLATE("Port IDs: %s %s", eip08.cerp_id, eip08.other_cerp_id);
TRANSLATE("Progress: %x", eip08.recovery.progress);
TRANSLATE("Abort Status: %x", eip08.failure_cause);
ENDTRANSLATIONBLOCK
EC BLOCK: 063d9b09 SCID$FCS_SHELF_ONLY_OB
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip09.cerp_id);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num == 99,
TRANSLATE("Rack and enclosure not known")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip09.dencl_num - 100
)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip09.dencl_num)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 063ec513 SCID$FCS_SHELF_ONLY_IB
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[tag]", eip13.device);
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack and enclosure not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip13.dencl_num - 100
)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip13.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 063f9c13 SCID$FCS_DRIVE_EMU_NOT_COMMUNICATE
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip13.cerp_id);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num != 99,
TRANSLATE("Rack: %d.", eip13.rack_num)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num != 99,
TRANSLATE("Enclosure: %d.", eip13.dencl_num)
);
CONDITIONAL(eip13.al_pa != 0x01 &&
eip13.al_pa != 0x02 &&
eip13.al_pa != 0xEE &&
eip13.dencl_num != 99,
TRANSLATE("Bay: %d.", eip13.bay)
);
TRANSLATE("physical disk drive: %[tag]", eip13.device);
ENDTRANSLATIONBLOCK
EC BLOCK: 06404d04 SCID$FCS_PROVISIONAL_DRIVE
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip04.device);
TRANSLATE("Port ID: %s", eip04.cerp_id);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip04.dencl_num - 100
)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip04.bay - 100)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip04.dencl_num)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Bay: %d.", eip04.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip04.al_pa);
TRANSLATE("SCSI Product ID: %s", eip04.pid);
TRANSLATE("Current firmware revision: %s", eip04.rev);
TRANSLATE("Latest known revision: %s", eip04.new_rev);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip04.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06410017 SCID$FCS_LOOP_CONFIG
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip17.cerp_id);
TRANSLATE("Map ID: %u", eip17.map_id);
TRANSLATE("Loop map page: %d of %d", eip17.page, eip17.total_pages);
TRANSLATE("Entries in this page: %d", eip17.entries);
CONDITIONAL(eip17.loop_map[0] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[00] ALPA: 0x%X", eip17.loop_map[0])
);
CONDITIONAL(eip17.loop_map[0] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[92] ALPA: 0x%X", eip17.loop_map[0])
);
CONDITIONAL(eip17.loop_map[1] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[01] ALPA: 0x%X", eip17.loop_map[1])
);
CONDITIONAL(eip17.loop_map[1] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[93] ALPA: 0x%X", eip17.loop_map[1])
);
CONDITIONAL(eip17.loop_map[2] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[02] ALPA: 0x%X", eip17.loop_map[2])
);
CONDITIONAL(eip17.loop_map[2] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[94] ALPA: 0x%X", eip17.loop_map[2])
);
CONDITIONAL(eip17.loop_map[3] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[03] ALPA: 0x%X", eip17.loop_map[3])
);
CONDITIONAL(eip17.loop_map[3] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[95] ALPA: 0x%X", eip17.loop_map[3])
);
CONDITIONAL(eip17.loop_map[4] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[04] ALPA: 0x%X", eip17.loop_map[4])
);
CONDITIONAL(eip17.loop_map[4] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[96] ALPA: 0x%X", eip17.loop_map[4])
);
CONDITIONAL(eip17.loop_map[5] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[05] ALPA: 0x%X", eip17.loop_map[5])
);
CONDITIONAL(eip17.loop_map[5] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[97] ALPA: 0x%X", eip17.loop_map[5])
);
CONDITIONAL(eip17.loop_map[6] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[06] ALPA: 0x%X", eip17.loop_map[6])
);
CONDITIONAL(eip17.loop_map[6] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[98] ALPA: 0x%X", eip17.loop_map[6])
);
CONDITIONAL(eip17.loop_map[7] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[07] ALPA: 0x%X", eip17.loop_map[7])
);
CONDITIONAL(eip17.loop_map[7] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[99] ALPA: 0x%X", eip17.loop_map[7])
);
CONDITIONAL(eip17.loop_map[8] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[08] ALPA: 0x%X", eip17.loop_map[8])
);
CONDITIONAL(eip17.loop_map[8] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[100] ALPA: 0x%X", eip17.loop_map[8])
);
CONDITIONAL(eip17.loop_map[9] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[09] ALPA: 0x%X", eip17.loop_map[9])
);
CONDITIONAL(eip17.loop_map[9] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[101] ALPA: 0x%X", eip17.loop_map[9])
);
CONDITIONAL(eip17.loop_map[10] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[10] ALPA: 0x%X", eip17.loop_map[10])
);
CONDITIONAL(eip17.loop_map[10] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[102] ALPA: 0x%X", eip17.loop_map[10])
);
CONDITIONAL(eip17.loop_map[11] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[11] ALPA: 0x%X", eip17.loop_map[11])
);
CONDITIONAL(eip17.loop_map[11] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[103] ALPA: 0x%X", eip17.loop_map[11])
);
CONDITIONAL(eip17.loop_map[12] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[12] ALPA: 0x%X", eip17.loop_map[12])
);
CONDITIONAL(eip17.loop_map[12] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[104] ALPA: 0x%X", eip17.loop_map[12])
);
CONDITIONAL(eip17.loop_map[13] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[13] ALPA: 0x%X", eip17.loop_map[13])
);
CONDITIONAL(eip17.loop_map[13] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[105] ALPA: 0x%X", eip17.loop_map[13])
);
CONDITIONAL(eip17.loop_map[14] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[14] ALPA: 0x%X", eip17.loop_map[14])
);
CONDITIONAL(eip17.loop_map[14] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[106] ALPA: 0x%X", eip17.loop_map[14])
);
CONDITIONAL(eip17.loop_map[15] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[15] ALPA: 0x%X", eip17.loop_map[15])
);
CONDITIONAL(eip17.loop_map[15] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[107] ALPA: 0x%X", eip17.loop_map[15])
);
CONDITIONAL(eip17.loop_map[16] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[16] ALPA: 0x%X", eip17.loop_map[16])
);
CONDITIONAL(eip17.loop_map[16] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[108] ALPA: 0x%X", eip17.loop_map[16])
);
CONDITIONAL(eip17.loop_map[17] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[17] ALPA: 0x%X", eip17.loop_map[17])
);
CONDITIONAL(eip17.loop_map[17] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[109] ALPA: 0x%X", eip17.loop_map[17])
);
CONDITIONAL(eip17.loop_map[18] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[18] ALPA: 0x%X", eip17.loop_map[18])
);
CONDITIONAL(eip17.loop_map[18] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[110] ALPA: 0x%X", eip17.loop_map[18])
);
CONDITIONAL(eip17.loop_map[19] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[19] ALPA: 0x%X", eip17.loop_map[19])
);
CONDITIONAL(eip17.loop_map[19] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[111] ALPA: 0x%X", eip17.loop_map[19])
);
CONDITIONAL(eip17.loop_map[20] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[20] ALPA: 0x%X", eip17.loop_map[20])
);
CONDITIONAL(eip17.loop_map[20] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[112] ALPA: 0x%X", eip17.loop_map[20])
);
CONDITIONAL(eip17.loop_map[21] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[21] ALPA: 0x%X", eip17.loop_map[21])
);
CONDITIONAL(eip17.loop_map[21] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[113] ALPA: 0x%X", eip17.loop_map[21])
);
CONDITIONAL(eip17.loop_map[22] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[22] ALPA: 0x%X", eip17.loop_map[22])
);
CONDITIONAL(eip17.loop_map[22] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[114] ALPA: 0x%X", eip17.loop_map[22])
);
CONDITIONAL(eip17.loop_map[23] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[23] ALPA: 0x%X", eip17.loop_map[23])
);
CONDITIONAL(eip17.loop_map[23] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[115] ALPA: 0x%X", eip17.loop_map[23])
);
CONDITIONAL(eip17.loop_map[24] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[24] ALPA: 0x%X", eip17.loop_map[24])
);
CONDITIONAL(eip17.loop_map[24] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[116] ALPA: 0x%X", eip17.loop_map[24])
);
CONDITIONAL(eip17.loop_map[25] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[25] ALPA: 0x%X", eip17.loop_map[25])
);
CONDITIONAL(eip17.loop_map[25] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[117] ALPA: 0x%X", eip17.loop_map[25])
);
CONDITIONAL(eip17.loop_map[26] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[26] ALPA: 0x%X", eip17.loop_map[26])
);
CONDITIONAL(eip17.loop_map[26] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[118] ALPA: 0x%X", eip17.loop_map[26])
);
CONDITIONAL(eip17.loop_map[27] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[27] ALPA: 0x%X", eip17.loop_map[27])
);
CONDITIONAL(eip17.loop_map[27] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[119] ALPA: 0x%X", eip17.loop_map[27])
);
CONDITIONAL(eip17.loop_map[28] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[28] ALPA: 0x%X", eip17.loop_map[28])
);
CONDITIONAL(eip17.loop_map[28] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[120] ALPA: 0x%X", eip17.loop_map[28])
);
CONDITIONAL(eip17.loop_map[29] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[29] ALPA: 0x%X", eip17.loop_map[29])
);
CONDITIONAL(eip17.loop_map[29] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[121] ALPA: 0x%X", eip17.loop_map[29])
);
CONDITIONAL(eip17.loop_map[30] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[30] ALPA: 0x%X", eip17.loop_map[30])
);
CONDITIONAL(eip17.loop_map[30] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[122] ALPA: 0x%X", eip17.loop_map[30])
);
CONDITIONAL(eip17.loop_map[31] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[31] ALPA: 0x%X", eip17.loop_map[31])
);
CONDITIONAL(eip17.loop_map[31] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[123] ALPA: 0x%X", eip17.loop_map[31])
);
CONDITIONAL(eip17.loop_map[32] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[32] ALPA: 0x%X", eip17.loop_map[32])
);
CONDITIONAL(eip17.loop_map[32] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[124] ALPA: 0x%X", eip17.loop_map[32])
);
CONDITIONAL(eip17.loop_map[33] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[33] ALPA: 0x%X", eip17.loop_map[33])
);
CONDITIONAL(eip17.loop_map[33] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[125] ALPA: 0x%X", eip17.loop_map[33])
);
CONDITIONAL(eip17.loop_map[34] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[34] ALPA: 0x%X", eip17.loop_map[34])
);
CONDITIONAL(eip17.loop_map[34] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[126] ALPA: 0x%X", eip17.loop_map[34])
);
CONDITIONAL(eip17.loop_map[35] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[35] ALPA: 0x%X", eip17.loop_map[35])
);
CONDITIONAL(eip17.loop_map[35] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[127] ALPA: 0x%X", eip17.loop_map[35])
);
CONDITIONAL(eip17.loop_map[36] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[36] ALPA: 0x%X", eip17.loop_map[36])
);
CONDITIONAL(eip17.loop_map[36] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[128] ALPA: 0x%X", eip17.loop_map[36])
);
CONDITIONAL(eip17.loop_map[37] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[37] ALPA: 0x%X", eip17.loop_map[37])
);
CONDITIONAL(eip17.loop_map[37] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[129] ALPA: 0x%X", eip17.loop_map[37])
);
CONDITIONAL(eip17.loop_map[38] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[38] ALPA: 0x%X", eip17.loop_map[38])
);
CONDITIONAL(eip17.loop_map[38] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[130] ALPA: 0x%X", eip17.loop_map[38])
);
CONDITIONAL(eip17.loop_map[39] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[39] ALPA: 0x%X", eip17.loop_map[39])
);
CONDITIONAL(eip17.loop_map[39] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[131] ALPA: 0x%X", eip17.loop_map[39])
);
CONDITIONAL(eip17.loop_map[40] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[40] ALPA: 0x%X", eip17.loop_map[40])
);
CONDITIONAL(eip17.loop_map[40] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[132] ALPA: 0x%X", eip17.loop_map[40])
);
CONDITIONAL(eip17.loop_map[41] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[41] ALPA: 0x%X", eip17.loop_map[41])
);
CONDITIONAL(eip17.loop_map[41] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[133] ALPA: 0x%X", eip17.loop_map[41])
);
CONDITIONAL(eip17.loop_map[42] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[42] ALPA: 0x%X", eip17.loop_map[42])
);
CONDITIONAL(eip17.loop_map[42] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[134] ALPA: 0x%X", eip17.loop_map[42])
);
CONDITIONAL(eip17.loop_map[43] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[43] ALPA: 0x%X", eip17.loop_map[43])
);
CONDITIONAL(eip17.loop_map[43] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[135] ALPA: 0x%X", eip17.loop_map[43])
);
CONDITIONAL(eip17.loop_map[44] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[44] ALPA: 0x%X", eip17.loop_map[44])
);
CONDITIONAL(eip17.loop_map[44] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[136] ALPA: 0x%X", eip17.loop_map[44])
);
CONDITIONAL(eip17.loop_map[45] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[45] ALPA: 0x%X", eip17.loop_map[45])
);
CONDITIONAL(eip17.loop_map[45] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[137] ALPA: 0x%X", eip17.loop_map[45])
);
CONDITIONAL(eip17.loop_map[46] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[46] ALPA: 0x%X", eip17.loop_map[46])
);
CONDITIONAL(eip17.loop_map[46] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[138] ALPA: 0x%X", eip17.loop_map[46])
);
CONDITIONAL(eip17.loop_map[47] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[47] ALPA: 0x%X", eip17.loop_map[47])
);
CONDITIONAL(eip17.loop_map[47] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[139] ALPA: 0x%X", eip17.loop_map[47])
);
CONDITIONAL(eip17.loop_map[48] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[48] ALPA: 0x%X", eip17.loop_map[48])
);
CONDITIONAL(eip17.loop_map[48] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[140] ALPA: 0x%X", eip17.loop_map[48])
);
CONDITIONAL(eip17.loop_map[49] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[49] ALPA: 0x%X", eip17.loop_map[49])
);
CONDITIONAL(eip17.loop_map[49] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[141] ALPA: 0x%X", eip17.loop_map[49])
);
CONDITIONAL(eip17.loop_map[50] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[50] ALPA: 0x%X", eip17.loop_map[50])
);
CONDITIONAL(eip17.loop_map[50] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[142] ALPA: 0x%X", eip17.loop_map[50])
);
CONDITIONAL(eip17.loop_map[51] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[51] ALPA: 0x%X", eip17.loop_map[51])
);
CONDITIONAL(eip17.loop_map[51] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[143] ALPA: 0x%X", eip17.loop_map[51])
);
CONDITIONAL(eip17.loop_map[52] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[52] ALPA: 0x%X", eip17.loop_map[52])
);
CONDITIONAL(eip17.loop_map[52] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[144] ALPA: 0x%X", eip17.loop_map[52])
);
CONDITIONAL(eip17.loop_map[53] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[53] ALPA: 0x%X", eip17.loop_map[53])
);
CONDITIONAL(eip17.loop_map[53] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[145] ALPA: 0x%X", eip17.loop_map[53])
);
CONDITIONAL(eip17.loop_map[54] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[54] ALPA: 0x%X", eip17.loop_map[54])
);
CONDITIONAL(eip17.loop_map[54] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[146] ALPA: 0x%X", eip17.loop_map[54])
);
CONDITIONAL(eip17.loop_map[55] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[55] ALPA: 0x%X", eip17.loop_map[55])
);
CONDITIONAL(eip17.loop_map[55] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[147] ALPA: 0x%X", eip17.loop_map[55])
);
CONDITIONAL(eip17.loop_map[56] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[56] ALPA: 0x%X", eip17.loop_map[56])
);
CONDITIONAL(eip17.loop_map[56] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[148] ALPA: 0x%X", eip17.loop_map[56])
);
CONDITIONAL(eip17.loop_map[57] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[57] ALPA: 0x%X", eip17.loop_map[57])
);
CONDITIONAL(eip17.loop_map[57] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[149] ALPA: 0x%X", eip17.loop_map[57])
);
CONDITIONAL(eip17.loop_map[58] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[58] ALPA: 0x%X", eip17.loop_map[58])
);
CONDITIONAL(eip17.loop_map[58] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[150] ALPA: 0x%X", eip17.loop_map[58])
);
CONDITIONAL(eip17.loop_map[59] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[59] ALPA: 0x%X", eip17.loop_map[59])
);
CONDITIONAL(eip17.loop_map[59] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[151] ALPA: 0x%X", eip17.loop_map[59])
);
CONDITIONAL(eip17.loop_map[60] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[60] ALPA: 0x%X", eip17.loop_map[60])
);
CONDITIONAL(eip17.loop_map[60] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[152] ALPA: 0x%X", eip17.loop_map[60])
);
CONDITIONAL(eip17.loop_map[61] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[61] ALPA: 0x%X", eip17.loop_map[61])
);
CONDITIONAL(eip17.loop_map[61] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[153] ALPA: 0x%X", eip17.loop_map[61])
);
CONDITIONAL(eip17.loop_map[62] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[62] ALPA: 0x%X", eip17.loop_map[62])
);
CONDITIONAL(eip17.loop_map[62] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[154] ALPA: 0x%X", eip17.loop_map[62])
);
CONDITIONAL(eip17.loop_map[63] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[63] ALPA: 0x%X", eip17.loop_map[63])
);
CONDITIONAL(eip17.loop_map[63] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[155] ALPA: 0x%X", eip17.loop_map[63])
);
CONDITIONAL(eip17.loop_map[64] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[64] ALPA: 0x%X", eip17.loop_map[64])
);
CONDITIONAL(eip17.loop_map[64] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[156] ALPA: 0x%X", eip17.loop_map[64])
);
CONDITIONAL(eip17.loop_map[65] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[65] ALPA: 0x%X", eip17.loop_map[65])
);
CONDITIONAL(eip17.loop_map[65] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[157] ALPA: 0x%X", eip17.loop_map[65])
);
CONDITIONAL(eip17.loop_map[66] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[66] ALPA: 0x%X", eip17.loop_map[66])
);
CONDITIONAL(eip17.loop_map[66] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[158] ALPA: 0x%X", eip17.loop_map[66])
);
CONDITIONAL(eip17.loop_map[67] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[67] ALPA: 0x%X", eip17.loop_map[67])
);
CONDITIONAL(eip17.loop_map[67] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[159] ALPA: 0x%X", eip17.loop_map[67])
);
CONDITIONAL(eip17.loop_map[68] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[68] ALPA: 0x%X", eip17.loop_map[68])
);
CONDITIONAL(eip17.loop_map[68] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[160] ALPA: 0x%X", eip17.loop_map[68])
);
CONDITIONAL(eip17.loop_map[69] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[69] ALPA: 0x%X", eip17.loop_map[69])
);
CONDITIONAL(eip17.loop_map[69] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[161] ALPA: 0x%X", eip17.loop_map[69])
);
CONDITIONAL(eip17.loop_map[70] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[70] ALPA: 0x%X", eip17.loop_map[70])
);
CONDITIONAL(eip17.loop_map[70] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[162] ALPA: 0x%X", eip17.loop_map[70])
);
CONDITIONAL(eip17.loop_map[71] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[71] ALPA: 0x%X", eip17.loop_map[71])
);
CONDITIONAL(eip17.loop_map[71] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[163] ALPA: 0x%X", eip17.loop_map[71])
);
CONDITIONAL(eip17.loop_map[72] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[72] ALPA: 0x%X", eip17.loop_map[72])
);
CONDITIONAL(eip17.loop_map[72] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[164] ALPA: 0x%X", eip17.loop_map[72])
);
CONDITIONAL(eip17.loop_map[73] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[73] ALPA: 0x%X", eip17.loop_map[73])
);
CONDITIONAL(eip17.loop_map[73] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[165] ALPA: 0x%X", eip17.loop_map[73])
);
CONDITIONAL(eip17.loop_map[74] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[74] ALPA: 0x%X", eip17.loop_map[74])
);
CONDITIONAL(eip17.loop_map[74] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[166] ALPA: 0x%X", eip17.loop_map[74])
);
CONDITIONAL(eip17.loop_map[75] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[75] ALPA: 0x%X", eip17.loop_map[75])
);
CONDITIONAL(eip17.loop_map[75] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[167] ALPA: 0x%X", eip17.loop_map[75])
);
CONDITIONAL(eip17.loop_map[76] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[76] ALPA: 0x%X", eip17.loop_map[76])
);
CONDITIONAL(eip17.loop_map[76] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[168] ALPA: 0x%X", eip17.loop_map[76])
);
CONDITIONAL(eip17.loop_map[77] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[77] ALPA: 0x%X", eip17.loop_map[77])
);
CONDITIONAL(eip17.loop_map[77] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[169] ALPA: 0x%X", eip17.loop_map[77])
);
CONDITIONAL(eip17.loop_map[78] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[78] ALPA: 0x%X", eip17.loop_map[78])
);
CONDITIONAL(eip17.loop_map[78] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[170] ALPA: 0x%X", eip17.loop_map[78])
);
CONDITIONAL(eip17.loop_map[79] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[79] ALPA: 0x%X", eip17.loop_map[79])
);
CONDITIONAL(eip17.loop_map[79] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[171] ALPA: 0x%X", eip17.loop_map[79])
);
CONDITIONAL(eip17.loop_map[80] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[80] ALPA: 0x%X", eip17.loop_map[80])
);
CONDITIONAL(eip17.loop_map[80] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[172] ALPA: 0x%X", eip17.loop_map[80])
);
CONDITIONAL(eip17.loop_map[81] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[81] ALPA: 0x%X", eip17.loop_map[81])
);
CONDITIONAL(eip17.loop_map[81] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[173] ALPA: 0x%X", eip17.loop_map[81])
);
CONDITIONAL(eip17.loop_map[82] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[82] ALPA: 0x%X", eip17.loop_map[82])
);
CONDITIONAL(eip17.loop_map[82] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[174] ALPA: 0x%X", eip17.loop_map[82])
);
CONDITIONAL(eip17.loop_map[83] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[83] ALPA: 0x%X", eip17.loop_map[83])
);
CONDITIONAL(eip17.loop_map[83] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[175] ALPA: 0x%X", eip17.loop_map[83])
);
CONDITIONAL(eip17.loop_map[84] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[84] ALPA: 0x%X", eip17.loop_map[84])
);
CONDITIONAL(eip17.loop_map[84] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[176] ALPA: 0x%X", eip17.loop_map[84])
);
CONDITIONAL(eip17.loop_map[85] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[85] ALPA: 0x%X", eip17.loop_map[85])
);
CONDITIONAL(eip17.loop_map[85] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[177] ALPA: 0x%X", eip17.loop_map[85])
);
CONDITIONAL(eip17.loop_map[86] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[86] ALPA: 0x%X", eip17.loop_map[86])
);
CONDITIONAL(eip17.loop_map[86] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[178] ALPA: 0x%X", eip17.loop_map[86])
);
CONDITIONAL(eip17.loop_map[87] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[87] ALPA: 0x%X", eip17.loop_map[87])
);
CONDITIONAL(eip17.loop_map[87] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[179] ALPA: 0x%X", eip17.loop_map[87])
);
CONDITIONAL(eip17.loop_map[88] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[88] ALPA: 0x%X", eip17.loop_map[88])
);
CONDITIONAL(eip17.loop_map[88] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[180] ALPA: 0x%X", eip17.loop_map[88])
);
CONDITIONAL(eip17.loop_map[89] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[89] ALPA: 0x%X", eip17.loop_map[89])
);
CONDITIONAL(eip17.loop_map[89] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[181] ALPA: 0x%X", eip17.loop_map[89])
);
CONDITIONAL(eip17.loop_map[90] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[90] ALPA: 0x%X", eip17.loop_map[90])
);
CONDITIONAL(eip17.loop_map[90] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[182] ALPA: 0x%X", eip17.loop_map[90])
);
CONDITIONAL(eip17.loop_map[91] != 0xFF &&
eip17.page == 1,
TRANSLATE("Loop Map[91] ALPA: 0x%X", eip17.loop_map[91])
);
CONDITIONAL(eip17.loop_map[91] != 0xFF &&
eip17.page == 2,
TRANSLATE("Loop Map[183] ALPA: 0x%X", eip17.loop_map[91])
);
ENDTRANSLATIONBLOCK
EC BLOCK: 06420009 SCID$FCS_PASSTHRU_CMD
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip09.device);
TRANSLATE("Port ID: %s", eip09.cerp_id);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip09.dencl_num - 100
)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip09.bay - 100)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip09.dencl_num)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Bay: %d.", eip09.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip09.al_pa);
TRANSLATE("%s", XLATE_EIP09_OPCODE(
eip09.fed_class,
eip09.cmd.cdb10.opcode
)
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip09.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06440008 SCID$FCS_LOOP_RECOVERY_SHELF
TRANSLATIONBLOCK
TRANSLATE("Port IDs: %s %s", eip08.cerp_id, eip08.other_cerp_id);
TRANSLATE("Enclosure ID: %d", eip08.recovery.shelf);
ENDTRANSLATIONBLOCK
EC BLOCK: 06460008 SCID$FCS_LOOP_RECOVERY_CAB_ERROR
TRANSLATIONBLOCK
TRANSLATE("Port IDs: %s %s", eip08.cerp_id, eip08.other_cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 06480008 SCID$FCS_LOOP_RECOVERY_BYPASS_FAILURE
TRANSLATIONBLOCK
TRANSLATE("Port IDs: %s %s", eip08.cerp_id, eip08.other_cerp_id);
TRANSLATE("Unypass Failure Enclosure Mask: %x", eip08.failure_cause);
ENDTRANSLATIONBLOCK
EC BLOCK: 06490008 SCID$FCS_ENCLOSURE_RECOVERY_ENTERED
TRANSLATIONBLOCK
TRANSLATE("Port IDs: %s %s", eip08.cerp_id, eip08.other_cerp_id);
TRANSLATE("Cab: %d, Enclosure %d", eip08.recovery.cab, eip08.recovery.shelf);
ENDTRANSLATIONBLOCK
EC BLOCK: 064a0008 SCID$FCS_ENCLOSURE_RECOVERY_EXIT
TRANSLATIONBLOCK
TRANSLATE("Port IDs: %s %s", eip08.cerp_id, eip08.other_cerp_id);
TRANSLATE("Cab: %d, Enclosure %d", eip08.recovery.cab, eip08.recovery.shelf);
TRANSLATE("Recovery Status: %x", eip08.failure_cause);
ENDTRANSLATIONBLOCK
EC BLOCK: 064c0004 SCID$FCS_DSL_DRIVE
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip04.device);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip04.dencl_num - 100
)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip04.bay - 100)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip04.dencl_num)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Bay: %d.", eip04.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip04.al_pa);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip04.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 064e0009 SCID$FCS_NON_ZERO_RSP_CODE
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip09.device);
TRANSLATE("Port ID: %s", eip09.cerp_id);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip09.dencl_num - 100
)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip09.bay - 100)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip09.dencl_num)
);
CONDITIONAL(eip09.al_pa != 0x01 &&
eip09.al_pa != 0x02 &&
eip09.al_pa != 0xEE &&
eip09.dencl_num < 99,
TRANSLATE("Bay: %d.", eip09.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip09.al_pa);
TRANSLATE("%s", XLATE_EIP09_OPCODE(
eip09.fed_class,
eip09.cmd.cdb10.opcode
)
);
TRANSLATE(
"RSP Code: 0x%02x",
eip09.error.sense_data.fru_code
);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip09.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 0700b515 SCID$CS_ALLOCATION_STALL
TRANSLATIONBLOCK
TRANSLATE("Virtual Disk: %[tag]", eip15.tag1);
TRANSLATE("Disk group: %[tag]", eip15.tag2);
CONDITIONAL(eip15.state == 0,
TRANSLATE("State: Attempting to retry allocation")
);
CONDITIONAL(eip15.state == 1,
TRANSLATE("State: Awaiting a leveling event")
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0701b515 SCID$CS_EXPANSION_STALL
TRANSLATIONBLOCK
TRANSLATE("Virtual Disk: %[tag]", eip15.tag1);
TRANSLATE("Disk group: %[tag]", eip15.tag2);
CONDITIONAL(eip15.state == 0,
TRANSLATE("State: Attempting to retry allocation")
);
CONDITIONAL(eip15.state == 1,
TRANSLATE("State: Awaiting a leveling event")
);
ENDTRANSLATIONBLOCK
EC BLOCK: 07020015 SCID$CS_LEVELING_START
TRANSLATIONBLOCK
TRANSLATE("Disk group: %[tag]", eip15.tag1);
ENDTRANSLATIONBLOCK
EC BLOCK: 07030015 SCID$CS_LEVELING_END
TRANSLATIONBLOCK
TRANSLATE("Disk group: %[tag]", eip15.tag1);
CONDITIONAL(eip15.state == 0,
TRANSLATE("Not Level"),
TRANSLATE("Level")
);
CONDITIONAL(eip15.status == 0,
TRANSLATE("No Data Moved"),
TRANSLATE("Data Moved")
);
ENDTRANSLATIONBLOCK
EC BLOCK: 07040015 SCID$CS_MEMBER_MANAGER_OP_START
TRANSLATIONBLOCK
CONDITIONAL(eip15.tag1 eq '0000-0000-0000-0000-0000-0000-0000-0000',
TRANSLATE("Volume identity unavailable"),
TRANSLATE("Volume: %[tag]", eip15.tag1)
);
TRANSLATE("Physical Disk Drive: %[tag]", eip15.tag2);
CONDITIONAL(eip15.state == 2,
TRANSLATE("State: Reconstructing")
);
CONDITIONAL(eip15.state == 4,
TRANSLATE("State: Migrating")
);
CONDITIONAL(eip15.state == 6,
TRANSLATE("State: Reverting")
);
ENDTRANSLATIONBLOCK
EC BLOCK: 07050015 SCID$CS_MEMBER_MANAGER_OP_END
TRANSLATIONBLOCK
CONDITIONAL(eip15.tag1 eq '0000-0000-0000-0000-0000-0000-0000-0000',
TRANSLATE("Volume identity unavailable"),
TRANSLATE("Volume: %[tag]", eip15.tag1)
);
TRANSLATE("Physical Disk Drive: %[tag]", eip15.tag2);
CONDITIONAL(eip15.state == 2,
TRANSLATE("State: Reconstructing")
);
CONDITIONAL(eip15.state == 4,
TRANSLATE("State: Migrating")
);
CONDITIONAL(eip15.state == 6,
TRANSLATE("State: Reverting")
);
CONDITIONAL(eip15.status == 1,
TRANSLATE("Status: success")
);
CONDITIONAL(eip15.status == 2,
TRANSLATE("Status: RAID0 reconstruct failed")
);
CONDITIONAL(eip15.status == 4,
TRANSLATE("Status: RAID5 reconstruct failed")
);
CONDITIONAL(eip15.status == 8,
TRANSLATE("Status: RAID1 reconstruct failed")
);
ENDTRANSLATIONBLOCK
EC BLOCK: 07060015 SCID$CS_MIGRATION_START
TRANSLATIONBLOCK
TRANSLATE("Disk group: %[tag]", eip15.tag1);
CONDITIONAL(eip15.state == 4,
TRANSLATE("State: Merge began")
);
CONDITIONAL(eip15.state == 8,
TRANSLATE("State: Split began")
);
ENDTRANSLATIONBLOCK
EC BLOCK: 07070015 SCID$CS_MIGRATION_END
TRANSLATIONBLOCK
TRANSLATE("Disk group: %[tag]", eip15.tag1);
CONDITIONAL(eip15.state == 4,
TRANSLATE("State: Merge complete")
);
CONDITIONAL(eip15.state == 8,
TRANSLATE("State: Split complete")
);
ENDTRANSLATIONBLOCK
EC BLOCK: 07080015 SCID$CS_DELETION_FAILED
TRANSLATIONBLOCK
TRANSLATE("Virtual Disk: %[tag]", eip15.tag1);
TRANSLATE("Disk group: %[tag]", eip15.tag2);
TRANSLATE("Status: %d", eip15.status);
ENDTRANSLATIONBLOCK
EC BLOCK: 0709b515 SCID$CS_MEMBER_MANAGER_OP_STALL
TRANSLATIONBLOCK
CONDITIONAL(eip15.tag1 eq '0000-0000-0000-0000-0000-0000-0000-0000',
TRANSLATE("Volume identity unavailable"),
TRANSLATE("Volume: %[tag]", eip15.tag1)
);
TRANSLATE("Physical Disk Drive: %[tag]", eip15.tag2);
CONDITIONAL(eip15.state == 4,
TRANSLATE("State: Migrating")
);
CONDITIONAL(eip15.status == 1,
TRANSLATE("Status: Awaiting additional storage")
);
ENDTRANSLATIONBLOCK
EC BLOCK: 070a0015 SCID$CS_MEMBER_MANAGER_OP_RESTART
TRANSLATIONBLOCK
CONDITIONAL(eip15.tag1 eq '0000-0000-0000-0000-0000-0000-0000-0000',
TRANSLATE("Volume identity unavailable"),
TRANSLATE("Volume: %[tag]", eip15.tag1)
);
TRANSLATE("Physical Disk Drive: %[tag]", eip15.tag2);
CONDITIONAL(eip15.state == 4,
TRANSLATE("State: Migrating")
);
CONDITIONAL(eip15.status == 0,
TRANSLATE("Status: Retrying the operation")
);
ENDTRANSLATIONBLOCK
EC BLOCK: 070b0015 SCID$CS_METADATA_INCONSISTENCY
TRANSLATIONBLOCK
CONDITIONAL(eip15.tag1 eq '0000-0000-0000-0000-0000-0000-0000-0000',
TRANSLATE("Volume identity unavailable"),
TRANSLATE("Volume: %[tag]", eip15.tag1)
);
CONDITIONAL(eip15.tag2 eq '0000-0000-0000-0000-0000-0000-0000-0000',
TRANSLATE("Logical Disk identity unavailable"),
TRANSLATE("Logical Disk: %[tag]", eip15.tag2)
);
CONDITIONAL(eip15.state == 0,
TRANSLATE("State: Physical Segment Deallocated")
);
CONDITIONAL(eip15.state == 1,
TRANSLATE("State: Unreferenced Physical Segment")
);
CONDITIONAL(eip15.state == 2,
TRANSLATE("State: Multi-referenced Physical Segment")
);
CONDITIONAL(eip15.state == 3,
TRANSLATE("State: NULL rsdm_ptr in update_lmap_shared")
);
CONDITIONAL(eip15.status == 0,
TRANSLATE("Status: OK")
);
CONDITIONAL(eip15.status == 1,
TRANSLATE("Status: FAILURE")
);
CONDITIONAL(eip15.status == 3 &&
eip15.state == 3,
TRANSLATE("LD is overcommitted")
);
ENDTRANSLATIONBLOCK
EC BLOCK: 070c0115 SCID$CS_PSEG_INCONSISTENCY
TRANSLATIONBLOCK
TRANSLATE("Disk Group: %[tag]", eip15.tag1);
CONDITIONAL(eip15.tag2 eq '0000-0000-0000-0000-0000-0000-0000-0000',
TRANSLATE("Volume identity unavailable"),
TRANSLATE("Volume: %[tag]", eip15.tag2)
);
TRANSLATE("RSS NOID: 0x%x", eip15.status);
TRANSLATE("PSEG: 0x%x", eip15.state);
TRANSLATE("Deallocating a free pseg");
ENDTRANSLATIONBLOCK
EC BLOCK: 09010005 SCID$SCMI_PS_CONDITION_CHANGE_NOACT
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[scmi_obj_hnd]",
eip05.handle
);
TRANSLATE(
"State: %[scmi_physical_store_condition] --> %[scmi_physical_store_condition]",
eip05.value.ul2,
eip05.value.ul1
);
CONDITIONAL(eip05.attribute.value.u32[0] == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip05.attribute.value.u32[0] != 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip05.attribute.value.u32[0] != 99,
TRANSLATE("Enclosure: %d.", eip05.attribute.value.u32[0])
);
CONDITIONAL(eip05.attribute.value.u32[0] != 99,
TRANSLATE("Bay: %d.", eip05.attribute.value.u32[1])
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09020005 SCID$SCMI_VOL_CONDITION_CHANGE_NOACT
TRANSLATIONBLOCK
TRANSLATE("Volume: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Associated physical disk drive: %[scmi_obj_hnd]",
eip05.add_handle
);
TRANSLATE(
"State: %[scmi_volume_condition] --> %[scmi_volume_condition]",
eip05.value.ul2,
eip05.value.ul1
);
CONDITIONAL(eip05.attribute.type != 1,
TRANSLATE(
"Physical Disk Drive identity, location, and Redundant Storage Set internal identification unavailable"
)
);
CONDITIONAL(eip05.attribute.type == 1,
TRANSLATE(
"Physical Disk Drive: %[scmi_obj_hnd]",
eip05.add_handle
)
);
CONDITIONAL(eip05.attribute.type == 1 &&
eip05.attribute.value.u32[0] != 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip05.attribute.type == 1 &&
eip05.attribute.value.u32[0] != 99,
TRANSLATE("Enclosure: %d.", eip05.attribute.value.u32[0])
);
CONDITIONAL(eip05.attribute.type == 1 &&
eip05.attribute.value.u32[0] != 99,
TRANSLATE("Bay: %d.", eip05.attribute.value.u32[1])
);
CONDITIONAL(eip05.attribute.type == 1,
TRANSLATE(
"Redundant Storage Set internal identification: %08X",
eip05.attribute.value.u32[3]
)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09030005 SCID$SCMI_LDISK_CONDITION_CHANGE_NOACT
TRANSLATIONBLOCK
TRANSLATE("Associated Virtual Disk: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"State: %[scmi_logical_disk_condition] --> %[scmi_logical_disk_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09040005 SCID$SCMI_NSC_CONDITION_CHANGE_NORMAL
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"State: %[scmi_nsc_condition] --> %[scmi_nsc_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09050005 SCID$SCMI_NSC_CACHE_BATT_CONDITION_CHANGE_NOACT
TRANSLATIONBLOCK
TRANSLATE("Controller containing battery: %[scmi_obj_hnd]",
eip05.handle
);
TRANSLATE(
"State: %[scmi_nsc_battery_system_condition] --> %[scmi_nsc_battery_system_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0906bf05 SCID$SCMI_VOL_CONDITION_CHANGE_MISSING
TRANSLATIONBLOCK
TRANSLATE("Volume: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Associated physical disk drive: %[scmi_obj_hnd]",
eip05.add_handle
);
TRANSLATE(
"State: %[scmi_volume_condition] --> %[scmi_volume_condition]",
eip05.value.ul2,
eip05.value.ul1
);
CONDITIONAL(eip05.attribute.type != 1,
TRANSLATE(
"Physical Disk Drive identity, location, and Redundant Storage Set internal identification unavailable"
)
);
CONDITIONAL(eip05.attribute.type == 1,
TRANSLATE(
"Physical Disk Drive: %[scmi_obj_hnd]",
eip05.add_handle
)
);
CONDITIONAL(eip05.attribute.type == 1 &&
eip05.attribute.value.u32[0] != 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip05.attribute.type == 1 &&
eip05.attribute.value.u32[0] != 99,
TRANSLATE("Enclosure: %d.", eip05.attribute.value.u32[0])
);
CONDITIONAL(eip05.attribute.type == 1 &&
eip05.attribute.value.u32[0] != 99,
TRANSLATE("Bay: %d.", eip05.attribute.value.u32[1])
);
CONDITIONAL(eip05.attribute.type == 1,
TRANSLATE(
"Redundant Storage Set internal identification: %08X",
eip05.attribute.value.u32[3]
)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09070005 SCID$SCMI_NSC_FC_PORT_CONDITION_CHANGE_NORMAL
TRANSLATIONBLOCK
TRANSLATE("Fibre Channel port: %s (%d.)",
eip05.attribute.value.str,
eip05.secondary_id
);
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"State: %[scmi_nsc_fc_port_condition] --> %[scmi_nsc_fc_port_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0908b405 SCID$SCMI_LDAD_OCCUPANCY_HIGHWATER
TRANSLATIONBLOCK
TRANSLATE("Disk Group: %[scmi_obj_hnd]",
eip05.handle
);
TRANSLATE("State: Normal --> Threshold reached");
ENDTRANSLATIONBLOCK
EC BLOCK: 09090005 SCID$SCMI_VOL_INSUFF_RESOURCE_CHANGE_SUFFICIENT
TRANSLATIONBLOCK
TRANSLATE("Volume: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Associated physical disk drive: %[scmi_obj_hnd]",
eip05.add_handle
);
TRANSLATE(
"State: %[scmi_volume_resource_availability_condition] --> %[scmi_volume_resource_availability_condition]",
eip05.value.ul2,
eip05.value.ul1
);
CONDITIONAL(eip05.attribute.type != 1,
TRANSLATE(
"Physical Disk Drive identity, location, and Redundant Storage Set internal identification unavailable"
)
);
CONDITIONAL(eip05.attribute.type == 1,
TRANSLATE(
"Physical Disk Drive: %[scmi_obj_hnd]",
eip05.add_handle
)
);
CONDITIONAL(eip05.attribute.type == 1 &&
eip05.attribute.value.u32[0] != 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip05.attribute.type == 1 &&
eip05.attribute.value.u32[0] != 99,
TRANSLATE("Enclosure: %d.", eip05.attribute.value.u32[0])
);
CONDITIONAL(eip05.attribute.type == 1 &&
eip05.attribute.value.u32[0] != 99,
TRANSLATE("Bay: %d.", eip05.attribute.value.u32[1])
);
CONDITIONAL(eip05.attribute.type == 1,
TRANSLATE(
"Redundant Storage Set internal identification: %08X",
eip05.attribute.value.u32[3]
)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 090a0005 SCID$SCMI_LDISK_DATA_LOST_CHANGE_NORMAL
TRANSLATIONBLOCK
TRANSLATE("Associated Virtual Disk: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"State: %[scmi_logical_disk_data_availability_condition] --> %[scmi_logical_disk_data_availability_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 090c0005 SCID$SCMI_LDISK_SNAPCLONE_UNSHARE_DONE
TRANSLATIONBLOCK
TRANSLATE("Snapclone Logical Disk: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Noid of parent internal Logical Disk: 0x%04x",
eip05.secondary_id
);
ENDTRANSLATIONBLOCK
EC BLOCK: 090d0005 SCID$SCMI_VOL_QUORUM_DISK_CHANGE
TRANSLATIONBLOCK
TRANSLATE("Volume: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"State: %[scmi_volume_quorum_disk_condition] --> %[scmi_volume_quorum_disk_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 090e3605 SCID$SCMI_NSC_TEMP_TRIP_REACHED
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"Sensor 1 current temperature: %d. degrees Celsius",
eip05.value.ul1
);
TRANSLATE(
"Sensor 2 adjusted temperature: %d. degrees Celsius",
eip05.value.ul2
);
TRANSLATE(
"Trip point temperature: %d. degrees Celsius",
eip05.secondary_id
);
ENDTRANSLATIONBLOCK
EC BLOCK: 090f2e05 SCID$SCMI_NSC_CLOSE_TO_TEMP_TRIP
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"Sensor 1 current temperature: %d. degrees Celsius",
eip05.value.ul1
);
TRANSLATE(
"Sensor 2 adjusted temperature: %d. degrees Celsius",
eip05.value.ul2
);
TRANSLATE(
"Trip point temperature: %d. degrees Celsius",
eip05.secondary_id
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09110005 SCID$SCMI_NSC_FANA_PRESENT_CHANGE_NPP
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Blower assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_fan_present_condition] --> %[scmi_nsc_fan_present_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09122405 SCID$SCMI_NSC_FANA_SPEED_SLOW
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Blower assembly: %d.", eip05.secondary_id);
TRANSLATE("Current speed: %d. RPM", eip05.value.ul1);
TRANSLATE("Lowest acceptable speed: %d. RPM", eip05.value.ul2);
ENDTRANSLATIONBLOCK
EC BLOCK: 09132005 SCID$SCMI_NSC_VOLTAGE_OUT_OF_RANGE
TRANSLATIONBLOCK
CONDITIONAL(
eip05.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Out of range voltage: %d. millivolts", eip05.value.ul1);
TRANSLATE("Voltage threshold: %d. millivolts", eip05.secondary_id);
TRANSLATE("DIMM size: %d MB", eip05.add_data[0]);
ENDTRANSLATIONBLOCK
EC BLOCK: 0914bf05 SCID$SCMI_VOL_CONDITION_CHANGE_FAILED
TRANSLATIONBLOCK
TRANSLATE("Volume: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"State: %[scmi_volume_condition] --> %[scmi_volume_condition]",
eip05.value.ul2,
eip05.value.ul1
);
CONDITIONAL(eip05.attribute.type != 1,
TRANSLATE(
"Physical Disk Drive identity, location, and Redundant Storage Set internal identification unavailable"
)
);
CONDITIONAL(eip05.attribute.type == 1,
TRANSLATE(
"Physical Disk Drive: %[scmi_obj_hnd]",
eip05.add_handle
)
);
CONDITIONAL(eip05.attribute.type == 1 &&
eip05.attribute.value.u32[0] != 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip05.attribute.type == 1 &&
eip05.attribute.value.u32[0] != 99,
TRANSLATE("Enclosure: %d.", eip05.attribute.value.u32[0])
);
CONDITIONAL(eip05.attribute.type == 1 &&
eip05.attribute.value.u32[0] != 99,
TRANSLATE("Bay: %d.", eip05.attribute.value.u32[1])
);
CONDITIONAL(eip05.attribute.type == 1,
TRANSLATE(
"Redundant Storage Set internal identification: %08X",
eip05.attribute.value.u32[3]
)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0915b905 SCID$SCMI_NSC_CONDITION_CHANGE_FAILED
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"State: %[scmi_nsc_condition] --> %[scmi_nsc_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09160005 SCID$SCMI_NSC_TEMP_NORMAL
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"Sensor 1 current temperature: %d. degrees Celsius",
eip05.value.ul1
);
TRANSLATE(
"Sensor 2 adjusted temperature: %d. degrees Celsius",
eip05.value.ul2
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09172805 SCID$SCMI_NSC_BATTERYA_PRESENT_CHANGE_PNP
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Battery assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_battery_present_condition] --> %[scmi_nsc_battery_present_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09180005 SCID$SCMI_NSC_BATTERYA_IN_USE_CHANGE
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Battery assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_battery_use_condition] --> %[scmi_nsc_battery_use_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09190005 SCID$SCMI_NSC_VOLTAGE_NORMAL
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Normal range voltage: %d. millivolts", eip05.value.ul1);
TRANSLATE("Voltage threshold: %d. millivolts", eip05.secondary_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 091a2005 SCID$SCMI_NSC_VOLTAGE_REGULATOR_FAILURE
TRANSLATIONBLOCK
CONDITIONAL(
eip05.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("DIMM size: %d MB", eip05.add_data[0] );
ENDTRANSLATIONBLOCK
EC BLOCK: 091b0005 SCID$SCMI_LDAD_CONDITION_CHANGE_NORMAL
TRANSLATIONBLOCK
TRANSLATE("Disk Group: %[scmi_obj_hnd]",
eip05.handle
);
TRANSLATE(
"State: %[scmi_ldad_condition] --> %[scmi_ldad_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 091c0005 SCID$SCMI_LDAD_OCCUPANCY_HIGHWATER_NORMAL
TRANSLATIONBLOCK
TRANSLATE("Disk Group: %[scmi_obj_hnd]",
eip05.handle
);
TRANSLATE("State: Threshold reached --> Normal");
ENDTRANSLATIONBLOCK
EC BLOCK: 091d2205 SCID$SCMI_NSC_BATTERYA_BAD
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Battery assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_battery_use_condition] --> %[scmi_nsc_battery_use_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 091e0005 SCID$SCMI_NSC_BATTERYA_PRESENT_CHANGE_NPP
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Battery assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_battery_present_condition] --> %[scmi_nsc_battery_present_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 091f2905 SCID$SCMI_NSC_BATTERYB_PRESENT_CHANGE_PNP
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Battery assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_battery_present_condition] --> %[scmi_nsc_battery_present_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09200005 SCID$SCMI_NSC_BATTERYB_PRESENT_CHANGE_NPP
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Battery assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_battery_present_condition] --> %[scmi_nsc_battery_present_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09210005 SCID$SCMI_NSC_BATTERYB_IN_USE_CHANGE
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Battery assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_battery_use_condition] --> %[scmi_nsc_battery_use_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09222305 SCID$SCMI_NSC_BATTERYB_BAD
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Battery assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_battery_use_condition] --> %[scmi_nsc_battery_use_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09232b05 SCID$SCMI_NSC_FANB_PRESENT_CHANGE_PNP
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Blower assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_fan_present_condition] --> %[scmi_nsc_fan_present_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09240005 SCID$SCMI_NSC_FANB_PRESENT_CHANGE_NPP
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Blower assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_fan_present_condition] --> %[scmi_nsc_fan_present_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09252505 SCID$SCMI_NSC_FANB_SPEED_SLOW
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Blower assembly: %d.", eip05.secondary_id);
TRANSLATE("Current speed: %d. RPM", eip05.value.ul1);
TRANSLATE("Lowest acceptable speed: %d. RPM", eip05.value.ul2);
ENDTRANSLATIONBLOCK
EC BLOCK: 09262c05 SCID$SCMI_NSC_FANA_PRESENT_CHANGE_PNP__POWER_SUPPLY
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Blower/Power Supply assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_fanps_present_condition] --> %[scmi_nsc_fanps_present_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09270005 SCID$SCMI_NSC_FANA_PRESENT_CHANGE_NPP__POWER_SUPPLY
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Blower/Power Supply assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_fanps_present_condition] --> %[scmi_nsc_fanps_present_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09282d05 SCID$SCMI_NSC_FANB_PRESENT_CHANGE_PNP__POWER_SUPPLY
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Blower/Power Supply assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_fanps_present_condition] --> %[scmi_nsc_fanps_present_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09290005 SCID$SCMI_NSC_FANB_PRESENT_CHANGE_NPP__POWER_SUPPLY
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Blower/Power Supply assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_fanps_present_condition] --> %[scmi_nsc_fanps_present_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 092a2605 SCID$SCMI_NSC_FANA_SPEED_SLOW__POWER_SUPPLY
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Blower/Power Supply assembly: %d.", eip05.secondary_id);
TRANSLATE("Current speed: %d. RPM", eip05.value.ul1);
TRANSLATE("Lowest acceptable speed: %d. RPM", eip05.value.ul2);
ENDTRANSLATIONBLOCK
EC BLOCK: 092b2705 SCID$SCMI_NSC_FANB_SPEED_SLOW__POWER_SUPPLY
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Blower/Power Supply assembly: %d.", eip05.secondary_id);
TRANSLATE("Current speed: %d. RPM", eip05.value.ul1);
TRANSLATE("Lowest acceptable speed: %d. RPM", eip05.value.ul2);
ENDTRANSLATIONBLOCK
EC BLOCK: 092c2f05 SCID$SCMI_NSC_CACHE_BATT_CONDITION_CHANGE_BAD
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"State: %[scmi_nsc_battery_system_condition] --> %[scmi_nsc_battery_system_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 092dbf05 SCID$SCMI_VOL_INSUFF_RESOURCE_CHANGE_INSUFFICIENT
TRANSLATIONBLOCK
TRANSLATE("Volume: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Associated physical disk drive: %[scmi_obj_hnd]",
eip05.add_handle
);
TRANSLATE(
"State: %[scmi_volume_resource_availability_condition] --> %[scmi_volume_resource_availability_condition]",
eip05.value.ul2,
eip05.value.ul1
);
CONDITIONAL(eip05.attribute.type != 1,
TRANSLATE(
"Physical Disk Drive identity, location, and Redundant Storage Set internal identification unavailable"
)
);
CONDITIONAL(eip05.attribute.type == 1,
TRANSLATE(
"Physical Disk Drive: %[scmi_obj_hnd]",
eip05.add_handle
)
);
CONDITIONAL(eip05.attribute.type == 1 &&
eip05.attribute.value.u32[0] != 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip05.attribute.type == 1 &&
eip05.attribute.value.u32[0] != 99,
TRANSLATE("Enclosure: %d.", eip05.attribute.value.u32[0])
);
CONDITIONAL(eip05.attribute.type == 1 &&
eip05.attribute.value.u32[0] != 99,
TRANSLATE("Bay: %d.", eip05.attribute.value.u32[1])
);
CONDITIONAL(eip05.attribute.type == 1,
TRANSLATE(
"Redundant Storage Set internal identification: %08X",
eip05.attribute.value.u32[3]
)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 092e0005 SCID$SCMI_NSC_LOGIN_FAILURE
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"Storage System Management Interface command: %[scmi_object_function_code]",
eip05.value.ul1
);
TRANSLATE("Host Adapter: %[scmi_obj_hnd]", eip05.attribute.value.obj.handle);
TRANSLATE(
"Reject reason: %[scmi_response_status_value]",
eip05.secondary_id
);
ENDTRANSLATIONBLOCK
EC BLOCK: 092f0005 SCID$SCMI_NSC_COMMAND_ERROR_RETURN
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"Storage System Management Interface command: %[scmi_object_function_code]",
eip05.value.ul1
);
TRANSLATE(
"Return code: %[scmi_response_status_value]",
eip05.value.ul2
);
TRANSLATE(
"Internal command version: 0x%08x",
eip05.attribute.value.obj.value
);
TRANSLATE(
"Internal target: %[scmi_obj_hnd]",
eip05.attribute.value.obj.handle
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09300005 SCID$SCMI_NSC_LOOP_MAPGEN_CHANGE
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Loop pair: %d.", eip05.secondary_id);
TRANSLATE(
"Map generation number change: %d. --> %d.",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09314205 SCID$SCMI_PS_CONDITION_CHANGE_DEGRADED
TRANSLATIONBLOCK
TRANSLATE("physical disk drive: %[scmi_obj_hnd]",
eip05.handle
);
TRANSLATE(
"State: %[scmi_physical_store_condition] --> %[scmi_physical_store_condition]",
eip05.value.ul2,
eip05.value.ul1
);
CONDITIONAL(eip05.attribute.value.u32[0] == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip05.attribute.value.u32[0] != 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip05.attribute.value.u32[0] != 99,
TRANSLATE("Enclosure: %d.", eip05.attribute.value.u32[0])
);
CONDITIONAL(eip05.attribute.value.u32[0] != 99,
TRANSLATE("Bay: %d.", eip05.attribute.value.u32[1])
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09324005 SCID$SCMI_PS_CONDITION_CHANGE_FAILED
TRANSLATIONBLOCK
TRANSLATE("physical disk drive: %[scmi_obj_hnd]",
eip05.handle
);
TRANSLATE(
"State: %[scmi_physical_store_condition] --> %[scmi_physical_store_condition]",
eip05.value.ul2,
eip05.value.ul1
);
CONDITIONAL(eip05.attribute.value.u32[0] == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip05.attribute.value.u32[0] != 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip05.attribute.value.u32[0] != 99,
TRANSLATE("Enclosure: %d.", eip05.attribute.value.u32[0])
);
CONDITIONAL(eip05.attribute.value.u32[0] != 99,
TRANSLATE("Bay: %d.", eip05.attribute.value.u32[1])
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0933000e SCID$SCMI_DU_CREATED
TRANSLATIONBLOCK
TRANSLATE("Derived Unit: %[scmi_obj_hnd]", eip0E.handle);
TRANSLATE("Associated Storage System Virtual Disk: %[scmi_obj_hnd]",
eip0E.add_handle
);
TRANSLATE(
"Associated Virtual Disk: %[scmi_obj_hnd]",
eip0E.attribute.value.obj.handle
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0934000e SCID$SCMI_LDISK_CREATED
TRANSLATIONBLOCK
TRANSLATE("Associated Virtual Disk: %[scmi_obj_hnd]", eip0E.handle);
TRANSLATE(
"Disk Group: %[scmi_obj_hnd]",
eip0E.add_handle
);
TRANSLATE(
"Size in blocks: %y.",
eip0E.attribute.value.u64[0]
);
TRANSLATE(
"Redundancy type: %[scmi_logical_disk_redundancy_type]",
eip0E.attribute.value.u32[2]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0935000e SCID$SCMI_LDAD_CREATED
TRANSLATIONBLOCK
TRANSLATE("Disk Group: %[scmi_obj_hnd]",
eip0E.handle
);
TRANSLATE("Number of disks in group: %d.",
eip0E.attribute.value.u32[0]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0936000e SCID$SCMI_PS_DISCOVERED
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[scmi_obj_hnd]",
eip0E.handle
);
CONDITIONAL(eip0E.attribute.value.u32[0] == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip0E.attribute.value.u32[0] != 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip0E.attribute.value.u32[0] != 99,
TRANSLATE("Enclosure: %d.", eip0E.attribute.value.u32[0])
);
CONDITIONAL(eip0E.attribute.value.u32[0] != 99,
TRANSLATE("Bay: %d.", eip0E.attribute.value.u32[1])
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0937000e SCID$SCMI_PU_CREATED
TRANSLATIONBLOCK
TRANSLATE("Presented unit: %[scmi_obj_hnd]", eip0E.handle);
TRANSLATE(
"Associated Storage System Virtual Disk: %[scmi_obj_hnd]",
eip0E.add_handle
);
TRANSLATE(
"Associated Virtual Disk: %[scmi_obj_hnd]",
eip0E.attribute.value.obj.handle
);
TRANSLATE(
"Host path: %[scmi_obj_hnd]",
eip0E.add_handle2
);
TRANSLATE(
"Host LUN number [0]: 0x%08x",
eip0E.add_data[0]
);
TRANSLATE(
"Host LUN number [1]: 0x%08x",
eip0E.add_data[1]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0938000e SCID$SCMI_SCELL_CLIENT_CREATED
TRANSLATIONBLOCK
TRANSLATE(
"Storage System Host Path: %[scmi_obj_hnd]",
eip0E.handle
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0939000e SCID$SCMI_SCVD_CREATED
TRANSLATIONBLOCK
TRANSLATE(
"Storage System Virtual Disk: %[scmi_obj_hnd]",
eip0E.handle
);
ENDTRANSLATIONBLOCK
EC BLOCK: 093a000e SCID$SCMI_VOL_CREATED
TRANSLATIONBLOCK
TRANSLATE("Volume ID: %[scmi_obj_hnd]", eip0E.handle);
TRANSLATE("Associated physical disk drive: %[scmi_obj_hnd]",
eip0E.add_handle
);
CONDITIONAL(eip0E.attribute.value.u32[0] == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip0E.attribute.value.u32[0] != 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip0E.attribute.value.u32[0] != 99,
TRANSLATE("Enclosure: %d.", eip0E.attribute.value.u32[0])
);
CONDITIONAL(eip0E.attribute.value.u32[0] != 99,
TRANSLATE("Bay: %d.", eip0E.attribute.value.u32[1])
);
TRANSLATE(
"Redundant Storage Set internal identification: 0x%08x",
eip0E.attribute.value.u32[3]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 093b000e SCID$SCMI_DU_DELETED
TRANSLATIONBLOCK
TRANSLATE("Derived unit: %[scmi_obj_hnd]", eip0E.handle);
TRANSLATE(
"Associated Storage System Virtual Disk: %[scmi_obj_hnd]",
eip0E.add_handle
);
TRANSLATE(
"Associated Virtual Disk: %[scmi_obj_hnd]",
eip0E.attribute.value.obj.handle
);
ENDTRANSLATIONBLOCK
EC BLOCK: 093c000e SCID$SCMI_LDISK_DELETED
TRANSLATIONBLOCK
TRANSLATE("Associated Virtual Disk: %[scmi_obj_hnd]", eip0E.handle);
ENDTRANSLATIONBLOCK
EC BLOCK: 093d000e SCID$SCMI_LDAD_DELETED
TRANSLATIONBLOCK
TRANSLATE("Disk Group: %[scmi_obj_hnd]",
eip0E.handle
);
ENDTRANSLATIONBLOCK
EC BLOCK: 093e420e SCID$SCMI_PS_DISAPPEARED
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[scmi_obj_hnd]",
eip0E.handle
);
CONDITIONAL(eip0E.attribute.value.u32[0] == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip0E.attribute.value.u32[0] != 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip0E.attribute.value.u32[0] != 99,
TRANSLATE("Enclosure: %d.", eip0E.attribute.value.u32[0])
);
CONDITIONAL(eip0E.attribute.value.u32[0] != 99,
TRANSLATE("Bay: %d.", eip0E.attribute.value.u32[1])
);
ENDTRANSLATIONBLOCK
EC BLOCK: 093f000e SCID$SCMI_PU_DELETED
TRANSLATIONBLOCK
TRANSLATE("Presented unit: %[scmi_obj_hnd]", eip0E.handle);
TRANSLATE(
"Associated Storage System Virtual Disk: %[scmi_obj_hnd]",
eip0E.add_handle
);
TRANSLATE(
"Associated Virtual Disk: %[scmi_obj_hnd]",
eip0E.attribute.value.obj.handle
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0940000e SCID$SCMI_SCELL_CLIENT_DELETED
TRANSLATIONBLOCK
TRANSLATE(
"Storage System Host Path: %[scmi_obj_hnd]",
eip0E.handle
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0941000e SCID$SCMI_SCVD_DELETED
TRANSLATIONBLOCK
TRANSLATE(
"Storage System Virtual Disk: %[scmi_obj_hnd]",
eip0E.handle
);
TRANSLATE(
"Associated Virtual Disk: %[scmi_obj_hnd]",
eip0E.add_handle
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0943000e SCID$SCMI_SCELL_OTHER_JOINED
TRANSLATIONBLOCK
CONDITIONAL(
eip0E.handle eq '0000-0000-0000-0000-0000-0000-0000-0000',
TRANSLATE("Controller ID not available"),
TRANSLATE("Controller: %[scmi_obj_hnd]", eip0E.handle)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0944ba0e SCID$SCMI_SCELL_OTHER_GONE
TRANSLATIONBLOCK
CONDITIONAL(
eip0E.handle eq '0000-0000-0000-0000-0000-0000-0000-0000',
TRANSLATE("Controller ID not available"),
TRANSLATE("Controller: %[scmi_obj_hnd]", eip0E.handle)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0945000e SCID$SCMI_SCELL_DELETED
TRANSLATIONBLOCK
CONDITIONAL(
eip0E.handle eq '0000-0000-0000-0000-0000-0000-0000-0000',
TRANSLATE("Storage System ID not available"),
TRANSLATE("Storage System: %[scmi_obj_hnd]",
eip0E.add_handle
)
);
CONDITIONAL(
eip0E.add_handle eq '0000-0000-0000-0000-0000-0000-0000-0000',
TRANSLATE("Controller ID not available"),
TRANSLATE("Controller: %[scmi_obj_hnd]", eip0E.add_handle)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0946000e SCID$SCMI_GROUP_CREATED
TRANSLATIONBLOCK
TRANSLATE(
"Data Replication Group: %[scmi_obj_hnd]",
eip0E.handle
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0947000e SCID$SCMI_GROUP_DELETED
TRANSLATIONBLOCK
TRANSLATE(
"Data Replication Group: %[scmi_obj_hnd]",
eip0E.handle
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0948000e SCID$SCMI_SNAP_LD_CREATED
TRANSLATIONBLOCK
TRANSLATE("Associated snapshot Virtual Disk: %[scmi_obj_hnd]",
eip0E.handle
);
TRANSLATE(
"Disk Group: %[scmi_obj_hnd]",
eip0E.add_handle
);
TRANSLATE(
"Size in blocks: %y.",
eip0E.attribute.value.u64[0]
);
TRANSLATE(
"Redundancy type: %[scmi_logical_disk_redundancy_type]",
eip0E.attribute.value.u32[2]
);
TRANSLATE(
"Noid of parent internal Logical Disk: 0x%04x",
eip0E.attribute.value.u32[3]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0949000e SCID$SCMI_CLONE_LD_CREATED
TRANSLATIONBLOCK
TRANSLATE("Associated Virtual Disk copy: %[scmi_obj_hnd]",
eip0E.handle
);
TRANSLATE(
"Disk Group: %[scmi_obj_hnd]",
eip0E.add_handle
);
TRANSLATE(
"Size in blocks: %y.",
eip0E.attribute.value.u64[0]
);
TRANSLATE(
"Redundancy type: %[scmi_logical_disk_redundancy_type]",
eip0E.attribute.value.u32[2]
);
TRANSLATE(
"Noid of parent internal Logical Disk: 0x%04x",
eip0E.attribute.value.u32[3]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0965000f SCID$SCMI_SCELL_CLIENT_MODE_CHANGE
TRANSLATIONBLOCK
TRANSLATE(
"Storage System Host Path: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE(
"Mode: %[scmi_client_mode] --> %[scmi_client_mode]",
eip0F.old_attr.value.u32[0],
eip0F.new_attr.value.u32[0]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0966000f SCID$SCMI_STORAGECELL_TIME_SET
TRANSLATIONBLOCK
CONDITIONAL(
eip0F.handle eq '0000-0000-0000-0000-0000-0000-0000-0000',
TRANSLATE(
"Storage System identity unavailable"
),
TRANSLATE(
"Storage System: %[scmi_obj_hnd]",
eip0F.handle
)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0967000f SCID$SCMI_PU_LUN_CHANGE
TRANSLATIONBLOCK
TRANSLATE("Presented unit: %[scmi_obj_hnd]", eip0F.handle);
TRANSLATE(
"LUN: %y. --> %y.",
eip0F.old_attr.value.u32[0],
eip0F.new_attr.value.u32[0]
);
TRANSLATE("Storage System Virtual Disk noid: 0x%04x", eip0F.secondary_id);
TRANSLATE(
"Associated Virtual Disk: %[scmi_obj_hnd]",
eip0F.add_handle
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0968000f SCID$SCMI_STORAGECELL_DEV_ADDITION_CHANGE
TRANSLATIONBLOCK
TRANSLATE(
"Storage System: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE(
"Policy: %[scmi_storagecell_device_addition_policy] --> %[scmi_storagecell_device_addition_policy]",
eip0F.old_attr.value.u32[0],
eip0F.new_attr.value.u32[0]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0969000f SCID$SCMI_SCVD_QUIESCED_CHANGE
TRANSLATIONBLOCK
TRANSLATE(
"Storage System Virtual Disk: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE(
"Associated Virtual Disk: %[scmi_obj_hnd]",
eip0F.add_handle
);
TRANSLATE(
"State: %[scmi_scvd_quiescent_condition] --> %[scmi_scvd_quiescent_condition]",
eip0F.old_attr.value.u32[0],
eip0F.new_attr.value.u32[0]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 096a000f SCID$SCMI_SCVD_STATE_CHANGE
TRANSLATIONBLOCK
TRANSLATE(
"Storage System Virtual Disk: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE(
"Associated Virtual Disk: %[scmi_obj_hnd]",
eip0F.add_handle
);
TRANSLATE(
"State: %[scmi_state] --> %[scmi_state]",
eip0F.old_attr.value.u32[0],
eip0F.new_attr.value.u32[0]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 096b000f SCID$SCMI_SCVD_CACHE_POLICY_CHANGE
TRANSLATIONBLOCK
TRANSLATE(
"Storage System Virtual Disk: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE(
"Associated Virtual Disk: %[scmi_obj_hnd]",
eip0F.add_handle
);
TRANSLATE(
"Write cache policy: %[scmi_write_disk_cache_policy_type] --> %[scmi_write_disk_cache_policy_type]",
eip0F.old_attr.value.u32[0],
eip0F.new_attr.value.u32[0]
);
TRANSLATE(
"Read cache policy: %[scmi_read_disk_cache_policy_type] --> %[scmi_read_disk_cache_policy_type]",
eip0F.old_attr.value.u32[1],
eip0F.new_attr.value.u32[1]
);
TRANSLATE(
"Cache mirroring policy: %[scmi_mirror_disk_cache_policy_type] --> %[scmi_mirror_disk_cache_policy_type]",
eip0F.old_attr.value.u32[2],
eip0F.new_attr.value.u32[2]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 096c000f SCID$SCMI_VOL_USAGE_CHANGE
TRANSLATIONBLOCK
TRANSLATE(
"Volume: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE(
"State: %[scmi_volume_usage] --> %[scmi_volume_usage]",
eip0F.old_attr.value.u32[0],
eip0F.new_attr.value.u32[0]
);
CONDITIONAL(
eip0F.old_attr.value.u32[0] == 1 ||
eip0F.new_attr.value.u32[0] == 1,
TRANSLATE(
"Disk Group: %[scmi_obj_hnd]",
eip0F.add_handle
)
);
TRANSLATE(
"Redundant Storage Set internal identification: 0x%08x",
eip0F.secondary_id
);
ENDTRANSLATIONBLOCK
EC BLOCK: 096d000f SCID$SCMI_LDAD_SPARE_CHANGE
TRANSLATIONBLOCK
TRANSLATE(
"Disk Group: %[scmi_obj_hnd]",
eip0F.handle
);
CONDITIONAL(
eip0F.new_attr.value.u32[0] > eip0F.old_attr.value.u32[0],
TRANSLATE(
"Disk Failure Protection Level increased"
),
TRANSLATE(
"Disk Failure Protection Level decreased"
)
);
TRANSLATE(
"Disk Failure Protection Level: %d. --> %d.",
eip0F.old_attr.value.u32[0],
eip0F.new_attr.value.u32[0]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 096e000f SCID$SCMI_DU_WRITE_PROTECTED_CHANGE
TRANSLATIONBLOCK
TRANSLATE("Derived unit: %[scmi_obj_hnd]", eip0F.handle);
TRANSLATE(
"State: %[scmi_du_write_protect_condition] --> %[scmi_du_write_protect_condition]",
eip0F.old_attr.value.u32[0],
eip0F.new_attr.value.u32[0]
);
TRANSLATE("Storage System Virtual Disk noid: 0x%04x", eip0F.secondary_id);
TRANSLATE(
"Associated Virtual Disk: %[scmi_obj_hnd]",
eip0F.add_handle
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0970460f SCID$SCMI_PS_DRIVE_PORT_FAILURE
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE("Port: %s", eip0F.new_attr.value.str);
CONDITIONAL(eip0F.old_attr.value.u32[1] == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip0F.old_attr.value.u32[1] != 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip0F.old_attr.value.u32[1] != 99,
TRANSLATE("Enclosure: %d.", eip0F.old_attr.value.u32[1])
);
CONDITIONAL(eip0F.old_attr.value.u32[1] != 99,
TRANSLATE("Bay: %d.", eip0F.old_attr.value.u32[2])
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0971000f SCID$SCMI_NSC_SHUTDOWN_REQUEST
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip0F.handle);
TRANSLATE(
"Restart type: %[scmi_nsc_restart_option]",
eip0F.old_attr.value.u32[0]
);
TRANSLATE(
"Other controller action: %[scmi_nsc_shutdown_other_option]",
eip0F.old_attr.value.u32[1]
);
TRANSLATE(
"Controller power state: %[scmi_nsc_shutdown_poweroff_option]",
eip0F.old_attr.value.u32[2]
);
TRANSLATE(
"Physical disk drive enclosures power state: %[scmi_nsc_shutdown_encl_poweroff_option]",
eip0F.old_attr.value.u32[3]
);
TRANSLATE(
"Battery assembly state: %[scmi_nsc_shutdown_battass_option]",
eip0F.old_attr.value.u32[4]
);
TRANSLATE(
"Shutdown delay: %d. seconds",
eip0F.old_attr.value.u32[5]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0972000f SCID$SCMI_NSC_SHUTDOWN
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip0F.handle);
TRANSLATE(
"Cache memory shutdown result: %[scmi_shutdown]",
eip0F.old_attr.value.u32[0]
);
TRANSLATE(
"Cache memory shutdown internal status: %d.",
eip0F.old_attr.value.u32[1]
);
TRANSLATE(
"Physical disk drive enclosures power off result: %[scmi_shutdown]",
eip0F.old_attr.value.u32[2]
);
TRANSLATE(
"Physical disk drive enclosures power off internal status: %[scmi_shutdown]",
eip0F.old_attr.value.u32[3]
);
TRANSLATE(
"Battery assemblies disable result: %[scmi_shutdown]",
eip0F.old_attr.value.u32[4]
);
TRANSLATE(
"Battery assemblies disable failure mode: %[scmi_nsc_shutdown_battass_failure_mode]",
eip0F.old_attr.value.u32[5]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0973000f SCID$SCMI_DRM_FAILSAFE_CHANGED
TRANSLATIONBLOCK
TRANSLATE(
"Data Replication Group: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE(
"State: %[scmi_state] --> %[scmi_state]",
eip0F.old_attr.value.u32[0],
eip0F.new_attr.value.u32[0]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0974000f SCID$SCMI_DRM_MODE_CHANGED
TRANSLATIONBLOCK
TRANSLATE(
"Data Replication Group: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE(
"Mode: %[scmi_group_drm_mode] --> %[scmi_group_drm_mode]",
eip0F.old_attr.value.u32[0],
eip0F.new_attr.value.u32[0]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0975000f SCID$SCMI_DRM_OPERATION_CHANGED
TRANSLATIONBLOCK
TRANSLATE(
"Data Replication Group: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE(
"State: %[scmi_group_operation_type] --> %[scmi_group_operation_type]",
eip0F.old_attr.value.u32[0],
eip0F.new_attr.value.u32[0]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0976000f SCID$SCMI_DRM_READ_ONLY_CHANGED
TRANSLATIONBLOCK
TRANSLATE(
"Data Replication Group: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE(
"Attribute: %[scmi_group_readonly_type] --> %[scmi_group_readonly_type]",
eip0F.old_attr.value.u32[0],
eip0F.new_attr.value.u32[0]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0977000f SCID$SCMI_DRM_SITE_FAILOVER_CHANGED
TRANSLATIONBLOCK
TRANSLATE(
"Data Replication Group: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE(
"Role: %[scmi_group_drm_mode] --> %[scmi_group_drm_mode]",
eip0F.old_attr.value.u32[0],
eip0F.new_attr.value.u32[0]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0978000f SCID$SCMI_DRM_SUSPEND_CHANGED
TRANSLATIONBLOCK
TRANSLATE(
"Data Replication Group: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE(
"State: %[scmi_group_suspend_state] --> %[scmi_group_suspend_state]",
eip0F.old_attr.value.u32[0],
eip0F.new_attr.value.u32[0]
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0979000f SCID$SCMI_DRM_SCVD_ADDED_TO_GROUP
TRANSLATIONBLOCK
TRANSLATE(
"Data Replication Group: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE(
"Storage System Virtual Disk: %[scmi_obj_hnd]",
eip0F.add_handle
);
ENDTRANSLATIONBLOCK
EC BLOCK: 097a000f SCID$SCMI_DRM_SCVD_REMOVED_FROM_GROUP
TRANSLATIONBLOCK
TRANSLATE(
"Data Replication Group: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE(
"Storage System Virtual Disk: %[scmi_obj_hnd]",
eip0F.add_handle
);
ENDTRANSLATIONBLOCK
EC BLOCK: 097b000f SCID$SCMI_PS_FLAGS_CHANGED
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[scmi_obj_hnd]",
eip0F.handle
);
TRANSLATE("Old ps_flags value: 0x%08x.", eip0F.old_attr.value.u32[0]);
TRANSLATE("New ps_flags value: 0x%08x.", eip0F.new_attr.value.u32[0]);
ENDTRANSLATIONBLOCK
EC BLOCK: 09c85105 SCID$SCMI_LDISK_DATA_LOST_CHANGE_DATA_LOST
TRANSLATIONBLOCK
TRANSLATE("Associated Virtual Disk: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"State: %[scmi_logical_disk_data_availability_condition] --> %[scmi_logical_disk_data_availability_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09c95105 SCID$SCMI_LDAD_CONDITION_CHANGE_INOP
TRANSLATIONBLOCK
TRANSLATE("Disk Group: %[scmi_obj_hnd]",
eip05.handle
);
TRANSLATE(
"State: %[scmi_ldad_condition] --> %[scmi_ldad_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09ca5105 SCID$SCMI_LDISK_CONDITION_CHANGE_FAILED
TRANSLATIONBLOCK
TRANSLATE("Associated Virtual Disk: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"State: %[scmi_logical_disk_condition] --> %[scmi_logical_disk_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09cb5005 SCID$SCMI_LDISK_CONDITION_CHANGE_OVERCOMMIT
TRANSLATIONBLOCK
TRANSLATE("Associated Virtual Disk: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"State: %[scmi_logical_disk_condition] --> %[scmi_logical_disk_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09cc5105 SCID$SCMI_LDISK_CONDITION_CHANGE_DATA_LOST
TRANSLATIONBLOCK
TRANSLATE("Associated Virtual Disk: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"State: %[scmi_logical_disk_condition] --> %[scmi_logical_disk_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09cdc305 SCID$SCMI_NSC_FC_PORT_CONDITION_CHANGE_FAILED
TRANSLATIONBLOCK
CONDITIONAL(
eip05.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"Port: %s",
eip05.attribute.value.str
);
TRANSLATE(
"State: %[scmi_nsc_fc_port_condition] --> %[scmi_nsc_fc_port_condition]",
eip05.value.ul2,
eip05.value.ul1
);
TRANSLATE("DIMM size: %d MB", eip05.add_data[0]);
ENDTRANSLATIONBLOCK
EC BLOCK: 09ce0005 SCID$SCMI_LDAD_CONDITION_CHANGE_INOP_MARKED
TRANSLATIONBLOCK
TRANSLATE("Disk Group: %[scmi_obj_hnd]",
eip05.handle
);
TRANSLATE(
"State: %[scmi_ldad_condition] --> %[scmi_ldad_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09cf4105 SCID$SCMI_PS_CONDITION_CHANGE_NOT_PRESENT
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[scmi_obj_hnd]",
eip05.handle
);
TRANSLATE(
"State: %[scmi_physical_store_condition] --> %[scmi_physical_store_condition]",
eip05.value.ul2,
eip05.value.ul1
);
CONDITIONAL(eip05.attribute.value.u32[0] == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip05.attribute.value.u32[0] != 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip05.attribute.value.u32[0] != 99,
TRANSLATE("Enclosure: %d.", eip05.attribute.value.u32[0])
);
CONDITIONAL(eip05.attribute.value.u32[0] != 99,
TRANSLATE("Bay: %d.", eip05.attribute.value.u32[1])
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09d00005 SCID$SCMI_NSC_ICON_YELLOW_OFF_CHANGE
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
ENDTRANSLATIONBLOCK
EC BLOCK: 09d1b905 SCID$SCMI_NSC_ICON_YELLOW_ON_CHANGE
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
ENDTRANSLATIONBLOCK
EC BLOCK: 09d22a05 SCID$SCMI_NSC_FANA_PRESENT_CHANGE_PNP
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Blower assembly: %d.", eip05.secondary_id);
TRANSLATE(
"State: %[scmi_nsc_fan_present_condition] --> %[scmi_nsc_fan_present_condition]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09d35105 SCID$SCMI_DRM_GROUP_INOP
TRANSLATIONBLOCK
TRANSLATE(
"Data Replication Group: %[scmi_obj_hnd]",
eip05.handle
);
TRANSLATE(
"State: %[scmi_group_drm_ld_state] --> %[scmi_group_drm_ld_state]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09d40005 SCID$SCMI_DRM_GROUP_OPERATIVE
TRANSLATIONBLOCK
TRANSLATE(
"Data Replication Group: %[scmi_obj_hnd]",
eip05.handle
);
TRANSLATE(
"State: %[scmi_group_drm_ld_state] --> %[scmi_group_drm_ld_state]",
eip05.value.ul2,
eip05.value.ul1
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09d50005 SCID$SCMI_PS_CONDITION_CHANGE_SPOF
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[scmi_obj_hnd]",
eip05.handle
);
TRANSLATE(
"State: %[scmi_physical_store_condition] --> %[scmi_physical_store_condition]",
eip05.value.ul2,
eip05.value.ul1
);
CONDITIONAL(eip05.attribute.value.u32[0] == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip05.attribute.value.u32[0] != 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip05.attribute.value.u32[0] != 99,
TRANSLATE("Enclosure: %d.", eip05.attribute.value.u32[0])
);
CONDITIONAL(eip05.attribute.value.u32[0] != 99,
TRANSLATE("Bay: %d.", eip05.attribute.value.u32[1])
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09d63705 SCID$SCMI_NSC_TEMP_SNSR_DONT_AGREE
TRANSLATIONBLOCK
CONDITIONAL(
eip05.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE(
"Sensor 1 current reading: %d. degrees Celsius",
eip05.value.ul1
);
TRANSLATE(
"Sensor 2 current reading: %d. degrees Celsius",
eip05.value.ul2
);
ENDTRANSLATIONBLOCK
EC BLOCK: 09d73705 SCID$SCMI_NSC_TEMP_SNSR_FAILURE
TRANSLATIONBLOCK
CONDITIONAL(
eip05.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("I2C status: %x", eip05.value.ul1);
ENDTRANSLATIONBLOCK
EC BLOCK: 09da0005 SCID$SCMI_NSC_FANA_SPEED_NORMAL
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Blower assembly: %d.", eip05.secondary_id);
TRANSLATE("Current speed: %d. RPM", eip05.value.ul1);
TRANSLATE("Lowest acceptable speed: %d. RPM", eip05.value.ul2);
ENDTRANSLATIONBLOCK
EC BLOCK: 09db0005 SCID$SCMI_NSC_FANB_SPEED_NORMAL
TRANSLATIONBLOCK
TRANSLATE("Controller: %[scmi_obj_hnd]", eip05.handle);
TRANSLATE("Blower assembly: %d.", eip05.secondary_id);
TRANSLATE("Current speed: %d. RPM", eip05.value.ul1);
TRANSLATE("Lowest acceptable speed: %d. RPM", eip05.value.ul2);
ENDTRANSLATIONBLOCK
EC BLOCK: 0b000010 SCID$SYS_RESYNCH
TRANSLATIONBLOCK
TRANSLATE("Controller: %[wwn]", eip10.node_name);
TRANSLATE("Program Counter: 0x%08X", eip10.information.pc);
TRANSLATE(
"Code: %d., 0x%08X (%[rcse])",
eip10.information.code,
eip10.information.code,
eip10.information.code
);
TRANSLATE("Flags: 0x%08X", eip10.information.flags);
TRANSLATE("Flag meanings:");
TRANSLATE(
"0x00000001 = Do not turn off host port LASERs"
);
TRANSLATE(
"0x00000002 = Do not wait RA_TOV if source ids were not changed"
);
TRANSLATE(
"0x00000004 = Bypass all diagnostics"
);
TRANSLATE(
"0x00000008 = Bypass diagnostics and configuration"
);
TRANSLATE(
"0x00000010 = Do not prompt for GO"
);
TRANSLATE(
"0x00000020 = Bypass card boot and diagnostics"
);
TRANSLATE(
"0x00000040 = Use image in memory"
);
TRANSLATE(
"0x00000080 = Bypass device discovery"
);
TRANSLATE(
"0x00000100 = Realize from memory map"
);
TRANSLATE(
"0x00000200 = Preserve HELP cache"
);
TRANSLATE(
"0x00000400 = Emergency drive firmware upgrade"
);
TRANSLATE(
"0x00001000 = Preserve host port 0 at 2 gigabyte"
);
TRANSLATE(
"0x00002000 = Preserve host port 1 at 2 gigabyte"
);
TRANSLATE(
"0x02000000 = Use bypass to send resynchronization MFC"
);
TRANSLATE(
"0x04000000 = Storage System scrub by this controller"
);
TRANSLATE(
"0x08000000 = Storage System scrub by other controller"
);
TRANSLATE(
"0x10000000 = Log event after reboot"
);
TRANSLATE(
"0x20000000 = Storage System resynchronization"
);
TRANSLATE(
"0x40000000 = Fault Manager termination bypassed"
);
TRANSLATE(
"0x80000000 = Power on reboot occurred"
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0b01b515 SCID$SYS_MIGRATE_DFW_STALLED
TRANSLATIONBLOCK
CONDITIONAL(eip15.tag1 eq '0000-0000-0000-0000-0000-0000-0000-0000',
TRANSLATE("Volume identity unavailable"),
TRANSLATE("Volume: %[tag]", eip15.tag1)
);
TRANSLATE("Physical Disk Drive: %[tag]", eip15.tag2);
CONDITIONAL(eip15.state == 4,
TRANSLATE("State: Migrating")
);
CONDITIONAL(eip15.status == 1,
TRANSLATE("Status: Awaiting additional storage")
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0b020004 SCID$SYS_DCL_BEGIN
TRANSLATIONBLOCK
TRANSLATE("Model: %s",eip04.pid);
TRANSLATE("Target revision: %s",eip04.rev);
ENDTRANSLATIONBLOCK
EC BLOCK: 0b030004 SCID$SYS_DCL_END
TRANSLATIONBLOCK
TRANSLATE("Model: %s",eip04.pid);
TRANSLATE("Target revision: %s",eip04.rev);
ENDTRANSLATIONBLOCK
EC BLOCK: 0b040004 SCID$SYS_CODELOAD_DRIVE
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip04.device);
TRANSLATE("Port ID: %s", eip04.cerp_id);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num == 99,
TRANSLATE("Rack, enclosure, and bay not known")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip04.dencl_num - 100
)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num > 99,
TRANSLATE("Last known bay: %d.", eip04.bay - 100)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip04.dencl_num)
);
CONDITIONAL(eip04.al_pa != 0x01 &&
eip04.al_pa != 0x02 &&
eip04.al_pa != 0xEE &&
eip04.dencl_num < 99,
TRANSLATE("Bay: %d.", eip04.bay)
);
TRANSLATE("AL_PA: 0x%04x", eip04.al_pa);
TRANSLATE("SCSI Product ID: %s", eip04.pid);
TRANSLATE("Current firmware revision: %s", eip04.rev);
TRANSLATE("Target firmware revision: %s", eip04.new_rev);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip04.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 0b050004 SCID$SYS_DRIVE_LOADED
TRANSLATIONBLOCK
TRANSLATE("Physical disk drive: %[tag]", eip04.device);
TRANSLATE("SCSI Product ID: %s", eip04.pid);
TRANSLATE("Current firmware revision: %s", eip04.rev);
TRANSLATE("Target firmware revision: %s", eip04.new_rev);
TRANSLATE("Drive enclosures available on port %s may be found in the enclosures array in this event's detailed information", eip04.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c03000c SCID$DRM_MERGING
TRANSLATIONBLOCK
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c045f0c SCID$DRM_FAILSAFE_LOCKED_SITE_INACCESS
TRANSLATIONBLOCK
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c05600c SCID$DRM_FAILSAFE_LOCKED_UNIT_INACCESS
TRANSLATIONBLOCK
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c06600c SCID$DRM_COPY_READ_ERROR
TRANSLATIONBLOCK
TRANSLATE("Source Virtual Disk: %[tag]", eip0C.source_scvd_uuid);
TRANSLATE("First block in error: 0x%08x", eip0C.vda);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c075f0c SCID$DRM_COPY_WRITE_SITE_INACCESS
TRANSLATIONBLOCK
TRANSLATE("First block in error: 0x%08x", eip0C.vda);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c08610c SCID$DRM_COPY_WRITE_UNIT_INACCESS
TRANSLATIONBLOCK
TRANSLATE("Destination Virtual Disk: %[tag]", eip0C.dest_scvd_uuid);
TRANSLATE("First block in error: 0x%08x", eip0C.vda);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c09620c SCID$DRM_LOG_FULL
TRANSLATIONBLOCK
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c0a000c SCID$DRM_LOG_RESET
TRANSLATIONBLOCK
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c0c000c SCID$DRM_MERGE_DONE
TRANSLATIONBLOCK
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c0f000c SCID$DRM_FAILSAFE_CLEARED
TRANSLATIONBLOCK
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c10000c SCID$DRM_FULL_COPY
TRANSLATIONBLOCK
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c11000c SCID$DRM_SITE_FAILOVER_DEST_TO_SRC
TRANSLATIONBLOCK
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c155f0c SCID$DRM_TUNNEL_CLOSED
TRANSLATIONBLOCK
TRANSLATE("Port: %s", eip0C.cerp_id);
TRANSLATE("Peer Storage System: %[tag]",
eip0C.peer_scell_uuid
);
TRANSLATE("Peer port: %[wwn]", eip0C.dest_scvd_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c160016 SCID$DRM_TIME_REPORT
TRANSLATIONBLOCK
TRANSLATE("Message sender: %[uuid]", eip16.sender);
TRANSLATE("Message receiver: %[uuid]", eip16.receiver);
TRANSLATE("Message receiver's partner: %[uuid]", eip16.receiver_partner);
TRANSLATE("Time message sent: %[scmitim]", eip16.sent_time);
TRANSLATE("Time message received: %[scmitim]", eip16.received_time);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c17630c SCID$DRM_COMM_PROTOCOL_MISMATCH
TRANSLATIONBLOCK
TRANSLATE("Data Replication Destination Storage System UUID: %[tag]",
eip0C.peer_scell_uuid
);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c18640c SCID$DRM_SLOW_CROSS_SITE_RESPONSE
TRANSLATIONBLOCK
TRANSLATE("Data Replication Destination Storage System UUID: %[tag]",
eip0C.peer_scell_uuid
);
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c1a000c SCID$DRM_COPY_DONE
TRANSLATIONBLOCK
TRANSLATE("Destination Virtual Disk: %[tag]", eip0C.dest_scvd_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c1b5f0c SCID$DRM_LOGGING_SITE_INACCESS
TRANSLATIONBLOCK
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c1c610c SCID$DRM_LOGGING_UNIT_INACCESS
TRANSLATIONBLOCK
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
TRANSLATE("Destination Virtual Disk: %[tag]", eip0C.dest_scvd_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c1d000c SCID$DRM_LOG_INCONSISTENT
TRANSLATIONBLOCK
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c1e5f0c SCID$DRM_NOT_PRESENTING_UNITS
TRANSLATIONBLOCK
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c1f000c SCID$DRM_REPRESENTING_UNITS
TRANSLATIONBLOCK
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c20650c SCID$DRM_STUCK_CROSS_SITE_RESPONSE
TRANSLATIONBLOCK
TRANSLATE("Data Replication Destination Storage System UUID: %[tag]",
eip0C.peer_scell_uuid
);
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c21660c SCID$DRM_STUCK_LOCAL_GSB_LOCK
TRANSLATIONBLOCK
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c22000c SCID$DRM_TUNNEL_OPENED
TRANSLATIONBLOCK
TRANSLATE("Port: %s", eip0C.cerp_id);
TRANSLATE("Peer Storage System: %[tag]",
eip0C.peer_scell_uuid
);
TRANSLATE("Peer port: %[wwn]", eip0C.dest_scvd_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c23670c SCID$DRM_SLOW_ISL_RESPONSE
TRANSLATIONBLOCK
TRANSLATE("Data Replication Destination Storage System UUID: %[tag]",
eip0C.peer_scell_uuid
);
TRANSLATE("Group: %[tag]", eip0C.group_uuid);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c56000c SCID$DRM_FL_TIMEOUT_CHANGE
TRANSLATIONBLOCK
TRANSLATE("The DRM forced logging timeout value has changed from %d seconds to %d seconds.", eip0C.port, eip0C.side);
ENDTRANSLATIONBLOCK
EC BLOCK: 0c57000c SCID$DRM_FL_TIMEOUT_RESET
TRANSLATIONBLOCK
TRANSLATE("The DRM forced logging timeout value has reset to %d seconds.",eip0C.side);
ENDTRANSLATIONBLOCK
EC BLOCK: 0d000111 SCID$DEEMU_UNRECOGNIZED_ERROR
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
TRANSLATE("alarm_error_code.field.reserved: 0x%02x",
eip11.alarm_error_code.field.reserved
);
TRANSLATE("alarm_error_code.field.ec: 0x%02x",
eip11.alarm_error_code.field.ec
);
TRANSLATE("alarm_error_code.field.en: 0x%02x",
eip11.alarm_error_code.field.en
);
TRANSLATE("alarm_error_code.field.et: 0x%02x",
eip11.alarm_error_code.field.et
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d014011 SCID$DEEMU_DRIVE_CFG_LINK_ERROR
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
TRANSLATE("Bay which detected problem: %d.",
eip11.alarm_error_code.field.en
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d024111 SCID$DEEMU_DRIVE_MISSING
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
TRANSLATE("Affected bay: %d.",
eip11.alarm_error_code.field.en
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d034111 SCID$DEEMU_DRIVE_SLACTIVE_REMOVED
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
TRANSLATE("Affected bay: %d.",
eip11.alarm_error_code.field.en
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d044211 SCID$DEEMU_DRIVE_LINK_RATE_BAD
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
TRANSLATE("Affected bay: %d.",
eip11.alarm_error_code.field.en
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 4,
TRANSLATE("Problem detected on loop A")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 5,
TRANSLATE("Problem detected on loop B")
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d330911 SCID$DEEMU_DEPSACI_LOST
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
TRANSLATE("Affected power supply: %d.",
eip11.alarm_error_code.field.en
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d348011 SCID$DEEMU_DEPS_MISSING
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
TRANSLATE("Affected power supply: %d.",
eip11.alarm_error_code.field.en
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d359a11 SCID$DEEMU_LOAD_BALANCE
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
TRANSLATE("Affected power supply: %d.",
eip11.alarm_error_code.field.en
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d478311 SCID$DEEMU_DEBLWR_ERROR
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
TRANSLATE("Affected blower: %d.",
eip11.alarm_error_code.field.en
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 1,
TRANSLATE("Blower speed is out of range")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 2,
TRANSLATE("Blower speed is vastly out of range")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 3,
TRANSLATE("Blower has stopped")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 4,
TRANSLATE("Blower reported internal error")
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d4b8211 SCID$DEEMU_DEBLWR_MISSING
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
TRANSLATE("Affected blower: %d.",
eip11.alarm_error_code.field.en
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d4c8411 SCID$DEEMU_DEBLWR_BOTH_MISSING
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
TRANSLATE("Second missing blower: %d.",
eip11.alarm_error_code.field.en
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d5b8611 SCID$DEEMU_DETS_OOR
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
CONDITIONAL(eip11.alarm_error_code.field.en == 1,
TRANSLATE("Temperature sensor tripped by power supply 1 exhaust")
);
CONDITIONAL(eip11.alarm_error_code.field.en == 2,
TRANSLATE("Temperature sensor tripped by power supply 2 exhaust")
);
CONDITIONAL(eip11.alarm_error_code.field.en == 3,
TRANSLATE("Temperature sensor tripped by Drive Enclosure Environmental Monitoring Unit")
);
CONDITIONAL(eip11.alarm_error_code.field.en >= 4,
TRANSLATE("Temperature sensor tripped by drive bay %d.",
eip11.alarm_error_code.field.en - 3
)
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 1,
TRANSLATE("Temperature range is near high critical")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 2,
TRANSLATE("Temperature range is above high critical")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 3,
TRANSLATE("Temperature range is near low critical")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 4,
TRANSLATE("Temperature range is reached low critical")
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d5f8711 SCID$DEEMU_DETS_ATCRITICAL
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d6f8811 SCID$DEEMU_INTERNAL_ERROR
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 1,
TRANSLATE("An internal Drive Enclosure Environmental Monitoring Unit clock error has occurred")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 2,
TRANSLATE("The I2C bus not processing data and is unable to report status")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 5,
TRANSLATE("A backplane NVRAM error has occurred.")
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d710011 SCID$DEEMU_INTERNAL_ERROR1
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 3,
TRANSLATE("Error is due to an enclosure power supply shutdown")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 16,
TRANSLATE(
"Error is due to corrupt Drive Enclosure Environmental Monitoring Unit ESI data"
)
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d728a11 SCID$DEEMU_NOSES
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d7e8c11 SCID$DEEMU_INVNVRAM
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d7f8b11 SCID$DEEMU_INTERNAL_ERROR2
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 11,
TRANSLATE("Error cause: Drive Enclosure Environmental Monitoring Unit cannot write to NVRAM)")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 12,
TRANSLATE("Error cause: Drive Enclosure Environmental Monitoring Unit cannot read from NVRAM)")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 13,
TRANSLATE("Error cause: the Field Programmable Gate Array failed to load required information")
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d828e11 SCID$DEEMU_ENCADDRBAD
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d838911 SCID$DEEMU_HARDBAD
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
CONDITIONAL( eip11.alarm_error_code.field.ec == 15,
TRANSLATE( "Error cause: Drive Enclosure Environmental Monitoring Unit hardware failure DP")
);
CONDITIONAL( eip11.alarm_error_code.field.ec == 18,
TRANSLATE( "Error cause: Drive Enclosure Environmental Monitoring Unit hardware failure BT")
);
CONDITIONAL( eip11.alarm_error_code.field.ec == 19,
TRANSLATE( "Error cause: Drive Enclosure Environmental Monitoring Unit hardware failure ESI")
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d858f11 SCID$DEEMU_PSSHTDNFAILED
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0d8d9011 SCID$DEEMU_DEXCVR_ERROR
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
TRANSLATE("Transceiver: %d.", eip11.alarm_error_code.field.en);
CONDITIONAL(eip11.alarm_error_code.field.ec == 1,
TRANSLATE("Error cause: transceivers have invalid or incompatible type")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 2,
TRANSLATE("Error cause: transceiver cannot detect data signal")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 3,
TRANSLATE("Error cause: FC-AL bus fault involving transceiver")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 4,
TRANSLATE("Error cause: transceiver removed")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 5,
TRANSLATE("Error cause: transceiver detected invalid characters")
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0da18111 SCID$DEEMU_DEVS_OOR
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
CONDITIONAL(eip11.alarm_error_code.field.en == 1,
TRANSLATE("Voltage sensor tripped by power supply 1: +5 VDC")
);
CONDITIONAL(eip11.alarm_error_code.field.en == 2,
TRANSLATE("Voltage sensor tripped by power supply 1: +12 VDC")
);
CONDITIONAL(eip11.alarm_error_code.field.en == 3,
TRANSLATE("Voltage sensor tripped by power supply 2: +5 VDC")
);
CONDITIONAL(eip11.alarm_error_code.field.en == 4,
TRANSLATE("Voltage sensor tripped by power supply 2: +12 VDC")
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0db58111 SCID$DEEMU_DECS_OOR
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
CONDITIONAL(eip11.alarm_error_code.field.en == 1,
TRANSLATE("Current sensor tripped by power supply 1: +5 VDC")
);
CONDITIONAL(eip11.alarm_error_code.field.en == 2,
TRANSLATE("Current sensor tripped by power supply 1: +12 VDC")
);
CONDITIONAL(eip11.alarm_error_code.field.en == 3,
TRANSLATE("Current sensor tripped by power supply 2: +5 VDC")
);
CONDITIONAL(eip11.alarm_error_code.field.en == 4,
TRANSLATE("Current sensor tripped by power supply 2: +12 VDC")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 1,
TRANSLATE("The element current is appoaching the high current critical threshold")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 2,
TRANSLATE("The element current is above the high current critical threshold")
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0dd89211 SCID$DEEMU_BACKPLANE_ERROR_AUTOREC
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0dd99111 SCID$DEEMU_BACKPLANE_ERROR_UNREC
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 11,
TRANSLATE("Error cause: cannot write to NVRAM")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 12,
TRANSLATE("Error cause: cannot read from NVRAM")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 13,
TRANSLATE("Error cause: NVRAM not properly initialized")
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0ddd9311 SCID$DEEMU_DEIOM_ERROR_UNREC
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
TRANSLATE("I/O module: %d", eip11.alarm_error_code.field.en);
CONDITIONAL(eip11.alarm_error_code.field.ec == 1,
TRANSLATE("Error cause: I/O module link speed unsupported")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 11,
TRANSLATE("Error cause: cannot write to I/O module NVRAM")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 12,
TRANSLATE("Error cause: cannot read from I/O module NVRAM")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 13,
TRANSLATE("Error cause: I/O module was removed")
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0dde9511 SCID$DEEMU_DEIOM_NOCOMM_ERROR
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
TRANSLATE("I/O module: %d", eip11.alarm_error_code.field.en);
CONDITIONAL(eip11.alarm_error_code.field.ec == 1,
TRANSLATE("Error cause: I/O module link speed unsupported")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 11,
TRANSLATE("Error cause: cannot write to I/O module NVRAM")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 12,
TRANSLATE("Error cause: cannot read from I/O module NVRAM")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 13,
TRANSLATE("Error cause: I/O module was removed")
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0dec9411 SCID$DEEMU_DEIOM_ERROR_AUTOREC
TRANSLATIONBLOCK
TRANSLATE("Enclosure identity: %[scmi_obj_hnd]", eip11.handle);
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
TRANSLATE("I/O module: %d", eip11.alarm_error_code.field.en);
CONDITIONAL(eip11.alarm_error_code.field.ec == 1,
TRANSLATE("Error cause: I/O module link speed unsupported")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 11,
TRANSLATE("Error cause: cannot write to I/O module NVRAM")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 12,
TRANSLATE("Error cause: cannot read from I/O module NVRAM")
);
CONDITIONAL(eip11.alarm_error_code.field.ec == 13,
TRANSLATE("Error cause: I/O module was removed")
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 0df00011 SCID$DEEMU_STATUS_CHANGE
TRANSLATIONBLOCK
CONDITIONAL(eip11.dencl_num == 99,
TRANSLATE("Location unknown")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num < 99,
TRANSLATE("Enclosure: %d.", eip11.dencl_num)
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Rack number not valid in this release")
);
CONDITIONAL(eip11.dencl_num > 99,
TRANSLATE("Last known enclosure: %d.",
eip11.dencl_num - 100
)
);
CONDITIONAL(eip11.loop == 0, TRANSLATE("Drive enclosures available on loop A may be found in the enclosures array in this event's detailed information"), TRANSLATE("Drive enclosures available on loop B may be found in the enclosures array in this event's detailed information"));
ENDTRANSLATIONBLOCK
EC BLOCK: 42000008 SCID$HP_FC_LINK_DOWN
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip08.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 42010008 SCID$HP_FC_LINK_FAILED
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip08.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 42030007 SCID$HP_LINK_ERRORS
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip07.cerp_id);
CONDITIONAL( eip07.loss_of_signal != 0,
TRANSLATE("Loss of signal: %d.", eip07.loss_of_signal)
);
CONDITIONAL( eip07.bad_rx_char != 0,
TRANSLATE("Bad RX characters: %d.", eip07.bad_rx_char)
);
CONDITIONAL( eip07.loss_of_sync != 0,
TRANSLATE("Loss of synchs: %d.", eip07.loss_of_sync)
);
CONDITIONAL( eip07.link_fail != 0,
TRANSLATE("Link failures: %d.", eip07.link_fail)
);
CONDITIONAL( eip07.rx_eofa != 0,
TRANSLATE("RX EOFa delimiters: %d.", eip07.rx_eofa)
);
CONDITIONAL( eip07.dis_frm != 0,
TRANSLATE("Discarded frames: %d.", eip07.dis_frm)
);
CONDITIONAL( eip07.bad_crc != 0,
TRANSLATE("Frames with bad CRC and valid EOF: %d.", eip07.bad_crc)
);
CONDITIONAL( eip07.proto_err != 0,
TRANSLATE("N_Port protocol errors: %d.", eip07.proto_err)
);
CONDITIONAL( eip07.exp_frm != 0,
TRANSLATE("Expired outbound frames: %d.", eip07.exp_frm)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 42044a08 SCID$HP_LINK_FAILURE
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip08.cerp_id);
TRANSLATE("Producer index: %04X", eip08.peq_prod_index);
TRANSLATE("Consumer index: %04X", eip08.peq_cons_index);
TRANSLATE("Frozen index: %04X", eip08.peq_frz_prod_index);
TRANSLATE("Port event block(s):");
CONDITIONAL( eip08.peb[0].type != 0,
TRANSLATE(
" [0] Type: %08X Context: %08X",
eip08.peb[0].type,
eip08.peb[0].context
)
);
CONDITIONAL( eip08.peb[1].type != 0,
TRANSLATE(
" [1] Type: %08X Context: %08X",
eip08.peb[1].type,
eip08.peb[1].context
)
);
CONDITIONAL( eip08.peb[2].type != 0,
TRANSLATE(
" [2] Type: %08X Context: %08X",
eip08.peb[2].type,
eip08.peb[2].context
)
);
CONDITIONAL( eip08.peb[3].type != 0,
TRANSLATE(
" [3] Type: %08X Context: %08X",
eip08.peb[3].type,
eip08.peb[3].context
)
);
CONDITIONAL( eip08.peb[4].type != 0,
TRANSLATE(
" [4] Type: %08X Context: %08X",
eip08.peb[4].type,
eip08.peb[4].context
)
);
CONDITIONAL( eip08.peb[5].type != 0,
TRANSLATE(
" [5] Type: %08X Context: %08X",
eip08.peb[5].type,
eip08.peb[5].context
)
);
CONDITIONAL( eip08.peb[6].type != 0,
TRANSLATE(
" [6] Type: %08X Context: %08X",
eip08.peb[6].type,
eip08.peb[6].context
)
);
CONDITIONAL( eip08.peb[7].type != 0,
TRANSLATE(
" [7] Type: %08X Context: %08X",
eip08.peb[7].type,
eip08.peb[7].context
)
);
ENDTRANSLATIONBLOCK
EC BLOCK: 42050008 SCID$HP_FC_LINK_WEDGED
TRANSLATIONBLOCK
TRANSLATE("Port ID: %s", eip08.cerp_id);
ENDTRANSLATIONBLOCK
EC BLOCK: 4206001b SCID$HP_UNIT_STALLED_TOO_LONG
TRANSLATIONBLOCK
TRANSLATE("Virtual Disk: %[tag]", eip1B.scvd_tag);
ENDTRANSLATIONBLOCK
EC BLOCK: 83002014 SCID$DOG_FAILURE
TRANSLATIONBLOCK
CONDITIONAL(
eip14.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("Test Element: %d.", eip14.eep_error.TE_num);
CONDITIONAL(eip14.eep_error.TE_num == 1,
TRANSLATE("(Temperature Sensor test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 2,
TRANSLATE("(HW code check and LCD setup)")
);
CONDITIONAL(eip14.eep_error.TE_num == 3,
TRANSLATE("(diag_wwid_tests)")
);
CONDITIONAL(eip14.eep_error.TE_num == 10,
TRANSLATE("(Near PCI config)")
);
CONDITIONAL(eip14.eep_error.TE_num == 11,
TRANSLATE("(default_bist_ctlr)")
);
CONDITIONAL(eip14.eep_error.TE_num == 12,
TRANSLATE("(Cache Memory test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 13,
TRANSLATE("(Cache Battery test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 14,
TRANSLATE("(Far PCI config)")
);
CONDITIONAL(eip14.eep_error.TE_num == 17,
TRANSLATE("(Port 4 test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 18,
TRANSLATE("(Port 5 test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 19,
TRANSLATE("(Port 6 test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 20,
TRANSLATE("(Port 0 test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 21,
TRANSLATE("(Port 1 test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 22,
TRANSLATE("(Port 2 test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 23,
TRANSLATE("(Port 3 test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 24,
TRANSLATE("(All Ports test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 25,
TRANSLATE("(Port-to-Port test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 26,
TRANSLATE("(Config and Init Port regs)")
);
CONDITIONAL(eip14.eep_error.TE_num == 28,
TRANSLATE("(CBIC test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 30,
TRANSLATE("(Manufacturing only test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 31,
TRANSLATE("(Hardware Revision test)")
);
TRANSLATE("Test number: %d.", eip14.eep_error.test_num);
TRANSLATE("Duplicate error count: %d.", eip14.eep_error.count);
TRANSLATE("Error code: %08X", eip14.eep_error.error_code);
TRANSLATE("Address of error: %08X", eip14.eep_error.address);
TRANSLATE("Expected data: %08X", eip14.eep_error.expected);
TRANSLATE("Actual data: %08X", eip14.eep_error.actual);
TRANSLATE(
"Controller uptime of failure: %y.",
eip14.eep_error.uptime
);
TRANSLATE("DIMM size: %d MB", eip14.dimm_size );
ENDTRANSLATIONBLOCK
EC BLOCK: 83013014 SCID$DOG_FAILURE_GBIC
TRANSLATIONBLOCK
CONDITIONAL(
eip14.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("Test Element: %d.", eip14.eep_error.TE_num);
CONDITIONAL(eip14.eep_error.TE_num == 17,
TRANSLATE("(Port 4 test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 18,
TRANSLATE("(Port 5 test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 19,
TRANSLATE("(Port 6 test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 20,
TRANSLATE("(Port 0 test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 21,
TRANSLATE("(Port 1 test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 22,
TRANSLATE("(Port 2 test)")
);
CONDITIONAL(eip14.eep_error.TE_num == 23,
TRANSLATE("(Port 3 test)")
);
TRANSLATE("Test number: %d.", eip14.eep_error.test_num);
TRANSLATE("Duplicate error count: %d.", eip14.eep_error.count);
TRANSLATE("Error code: %08X", eip14.eep_error.error_code);
TRANSLATE("Address of error: %08X", eip14.eep_error.address);
TRANSLATE("Expected data: %08X", eip14.eep_error.expected);
TRANSLATE("Actual data: %08X", eip14.eep_error.actual);
TRANSLATE(
"Controller uptime of failure: %y.",
eip14.eep_error.uptime
);
TRANSLATE("DIMM size: %d MB", eip14.dimm_size );
ENDTRANSLATIONBLOCK
EC BLOCK: 83022214 SCID$DOG_FAILURE_BATTA
TRANSLATIONBLOCK
TRANSLATE("Test Element: %d.", eip14.eep_error.TE_num);
TRANSLATE("(Cache Battery test)");
TRANSLATE("Test number: %d.", eip14.eep_error.test_num);
TRANSLATE("Battery assembly: 1.");
TRANSLATE("Duplicate error count: %d.", eip14.eep_error.count);
TRANSLATE("Error code: %08X", eip14.eep_error.error_code);
TRANSLATE("Address of error: %08X", eip14.eep_error.address);
TRANSLATE("Expected data: %08X", eip14.eep_error.expected);
TRANSLATE("Actual data: %08X", eip14.eep_error.actual);
TRANSLATE(
"Controller uptime of failure: %y.",
eip14.eep_error.uptime
);
ENDTRANSLATIONBLOCK
EC BLOCK: 83032314 SCID$DOG_FAILURE_BATTB
TRANSLATIONBLOCK
TRANSLATE("Test Element: %d.", eip14.eep_error.TE_num);
TRANSLATE("(Cache Battery test)");
TRANSLATE("Test number: %d.", eip14.eep_error.test_num);
TRANSLATE("Battery assembly: 2.");
TRANSLATE("Duplicate error count: %d.", eip14.eep_error.count);
TRANSLATE("Error code: %08X", eip14.eep_error.error_code);
TRANSLATE("Address of error: %08X", eip14.eep_error.address);
TRANSLATE("Expected data: %08X", eip14.eep_error.expected);
TRANSLATE("Actual data: %08X", eip14.eep_error.actual);
TRANSLATE(
"Controller uptime of failure: %y.",
eip14.eep_error.uptime
);
ENDTRANSLATIONBLOCK
EC BLOCK: 83043114 SCID$DOG_FAILURE_BATTA_IIC
TRANSLATIONBLOCK
CONDITIONAL(
eip14.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("Test Element: %d.", eip14.eep_error.TE_num);
TRANSLATE("(Cache Battery test)");
TRANSLATE("Test number: %d.", eip14.eep_error.test_num);
TRANSLATE("Battery assembly: 1.");
TRANSLATE("Duplicate error count: %d.", eip14.eep_error.count);
TRANSLATE("Error code: %08X", eip14.eep_error.error_code);
TRANSLATE("Address of error: %08X", eip14.eep_error.address);
TRANSLATE("Expected data: %08X", eip14.eep_error.expected);
TRANSLATE("Actual data: %08X", eip14.eep_error.actual);
TRANSLATE(
"Controller uptime of failure: %y.",
eip14.eep_error.uptime
);
TRANSLATE("DIMM size: %d MB", eip14.dimm_size );
ENDTRANSLATIONBLOCK
EC BLOCK: 83053214 SCID$DOG_FAILURE_BATTB_IIC
TRANSLATIONBLOCK
CONDITIONAL(
eip14.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("Test Element: %d.", eip14.eep_error.TE_num);
TRANSLATE("(Cache Battery test)");
TRANSLATE("Test number: %d.", eip14.eep_error.test_num);
TRANSLATE("Battery assembly: 2.");
TRANSLATE("Duplicate error count: %d.", eip14.eep_error.count);
TRANSLATE("Error code: %08X", eip14.eep_error.error_code);
TRANSLATE("Address of error: %08X", eip14.eep_error.address);
TRANSLATE("Expected data: %08X", eip14.eep_error.expected);
TRANSLATE("Actual data: %08X", eip14.eep_error.actual);
TRANSLATE(
"Controller uptime of failure: %y.",
eip14.eep_error.uptime
);
TRANSLATE("DIMM size: %d MB", eip14.dimm_size );
ENDTRANSLATIONBLOCK
EC BLOCK: 83063314 SCID$DOG_FAILURE_BATT_DDC
TRANSLATIONBLOCK
CONDITIONAL(
eip14.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("Test Element: %d.", eip14.eep_error.TE_num);
CONDITIONAL(eip14.eep_error.test_num == 12,
TRANSLATE("(Cache Memory test)")
);
CONDITIONAL(eip14.eep_error.test_num == 13,
TRANSLATE("(Cache Battery test)")
);
TRANSLATE("Test number: %d.", eip14.eep_error.test_num);
TRANSLATE("Duplicate error count: %d.", eip14.eep_error.count);
TRANSLATE("Error code: %08X", eip14.eep_error.error_code);
TRANSLATE("Address of error: %08X", eip14.eep_error.address);
TRANSLATE("Expected data: %08X", eip14.eep_error.expected);
TRANSLATE("Actual data: %08X", eip14.eep_error.actual);
TRANSLATE(
"Controller uptime of failure: %y.",
eip14.eep_error.uptime
);
TRANSLATE("DIMM size: %d MB", eip14.dimm_size );
ENDTRANSLATIONBLOCK
TERMINATION CODE TRANSLATION BLOCKS:
TC BLOCK: 01000102 SCID$EXEC_UNKNOWN_INTERRUPT
TRANSLATIONBLOCK
TRANSLATE("Clear interrupt mask: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("Interrupt bit number: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
ENDTRANSLATIONBLOCK
TC BLOCK: 0101011f SCID$EXEC_FLT_UNKNOWN
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0102011f SCID$EXEC_FLT_DLQ_ENTRY_CHECK
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0103011f SCID$EXEC_FLT_TIMER_NOT_EXPIRED
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0104011f SCID$EXEC_FLT_NOT_A_TIMER
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0105011f SCID$EXEC_FLT_DLQ_LINKS_NOT_ZERO
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0106011f SCID$EXEC_FLT_DLQ_HEAD_CHECK
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0107011f SCID$EXEC_FLT_SQ_LINK_NOT_ZERO
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0108011f SCID$EXEC_FLT_NOT_A_BQUE
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0109011f SCID$EXEC_FLT_NOT_A_SEM
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 010a011f SCID$EXEC_FLT_NYI
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 010b011f SCID$EXEC_FLT_NOT_TWI_AS_EXPECTD
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 010c011f SCID$EXEC_FLT_TOO_MANY_LOG_CALLS
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 010d011f SCID$EXEC_FLT_UNKNOWN_LOG_CALL
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 010e011f SCID$EXEC_FLT_NOT_A_AQUE
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 010f011f SCID$EXEC_FLT_WAITERS_INVALID
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0110011f SCID$EXEC_FLT_NOT_A_GATE
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0111011f SCID$EXEC_FLT_RECEIVERS_INVALID
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0112011f SCID$EXEC_FLT_BQUE_HAS_ITEMS
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0113011f SCID$EXEC_FLT_NOT_A_ASEM
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0114011f SCID$EXEC_FLT_UNKNOWNSYSTEM_TRAP
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0115011f SCID$EXEC_FLT_ACTIVE_DMA_UNDRFLW
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0116011f SCID$EXEC_FLT_UNEXPECTED_CDB
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0117011f SCID$EXEC_FLT_BUFFER_IN_USE
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0118011f SCID$EXEC_FLT_BUFFER_IS_FREE
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0119011f SCID$EXEC_FLT_INTS_DISABLED
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 011a011f SCID$EXEC_FLT_ZERO_PAGE_CORRUPT
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 011b011f SCID$EXEC_FLT_DCBZNOTCLALND
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 011c0140 SCID$EXEC_FLT_CTRL_K_NOCC
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 011d01c0 SCID$EXEC_FLT_CTRL_K_CC
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 011e0120 SCID$EXEC_FLT_CTRL_R_NOCC
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 011f01a0 SCID$EXEC_FLT_CTRL_R_CC
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 01200120 SCID$EXEC_FLT_NO_GPTS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 01210120 SCID$EXEC_FLT_GPTS_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 01400100 SCID$EXEC_TIMER_NOT_BQUE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 015a0100 SCID$EXEC_SHEDULER_SUBP_QUE_EMPTY
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 02000100 SCID$CA_INSUFF_MEM
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 02010100 SCID$CA_BAD_GET_DATA
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 02020100 SCID$CA_DEFINE_BQ_NO_MEM
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 02030100 SCID$CA_DUPLICATE_DIRTY
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 02040100 SCID$CA_BAD_MOP_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 02050100 SCID$CA_BAD_UNIT_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 02070100 SCID$CA_BROKEN_TWICE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 02080100 SCID$CA_MIRROR_UUID_CHANGED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 02090100 SCID$CA_INVALID_LOCK_META
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 020a0100 SCID$CA_INVALID_PARITY
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 020b0100 SCID$CA_BAD_POP_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 020c0100 SCID$CA_BAD_GCOP_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 020d0100 SCID$CA_NCA_CORRUPTED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 020e0100 SCID$CA_FREE_DIAG_BUF
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 020f0100 SCID$CA_IMPROPER_MWB_RECO
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 02100100 SCID$CA_DIFF_MNODE_MFC_NCAE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 02110100 SCID$CA_IMPROPER_MWBF_RECO
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 02120100 SCID$CA_WRITE_HOLE_COLL
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 02150100 SCID$CA_CNODE_LEAK
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 02160100 SCID$CA_VBUFF_LEAK
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 03010104 SCID$SCS_INTERNAL_ERROR_SINGLE
TRANSLATIONBLOCK
TRANSLATE("PC of termination call: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("PC-specific parameter 1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("PC-specific parameter 2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("PC-specific parameter 3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
ENDTRANSLATIONBLOCK
TC BLOCK: 03020184 SCID$SCS_INTERNAL_ERROR_DUAL
TRANSLATIONBLOCK
TRANSLATE("PC of termination call: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("PC-specific parameter 1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("PC-specific parameter 2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("PC-specific parameter 3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
ENDTRANSLATIONBLOCK
TC BLOCK: 03030102 SCID$SCS_BAD_SWITCH_VALUE
TRANSLATIONBLOCK
TRANSLATE("PC of termination call: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("Switch value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
ENDTRANSLATIONBLOCK
TC BLOCK: 03040102 SCID$SCS_QUORUM_ACCESS_FAILURE
TRANSLATIONBLOCK
TRANSLATE("PC of termination call: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("QW block address where access failed: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
ENDTRANSLATIONBLOCK
TC BLOCK: 030501a4 SCID$SCS_COMPOUND_ERROR_RECOVERY
TRANSLATIONBLOCK
TRANSLATE("PC of termination call: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("PC-specific parameter 1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("PC-specific parameter 2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("PC-specific parameter 3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
ENDTRANSLATIONBLOCK
TC BLOCK: 03060184 SCID$SCS_UNRECOVERABLE_ERROR
TRANSLATIONBLOCK
TRANSLATE("PC of termination call: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("PC-specific parameter 1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("PC-specific parameter 2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("PC-specific parameter 3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
ENDTRANSLATIONBLOCK
TC BLOCK: 03070184 SCID$SCS_NOT_SUPPORTED
TRANSLATIONBLOCK
TRANSLATE("PC of termination call: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("PC-specific parameter 1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("PC-specific parameter 2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("PC-specific parameter 3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
ENDTRANSLATIONBLOCK
TC BLOCK: 030a0102 SCID$SCS_BAD_SCSDB_INDEX
TRANSLATIONBLOCK
TRANSLATE("area_offset: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("ds_index: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
ENDTRANSLATIONBLOCK
TC BLOCK: 030b0101 SCID$SCS_BAD_SCSDB_AREA_OFF
TRANSLATIONBLOCK
TRANSLATE("area_offset: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
ENDTRANSLATIONBLOCK
TC BLOCK: 030c0100 SCID$SCS_SCSDB_CACHE_FULL
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 030d0101 SCID$SCS_SCSDB_CACHE_FREE
TRANSLATIONBLOCK
TRANSLATE("cache page index: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
ENDTRANSLATIONBLOCK
TC BLOCK: 030e0102 SCID$SCS_SCSDB_CACHE_FLUSH
TRANSLATIONBLOCK
TRANSLATE("cache page index: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("page offset: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
ENDTRANSLATIONBLOCK
TC BLOCK: 030f0101 SCID$SCS_SCSDB_CACHE_COMMIT
TRANSLATIONBLOCK
TRANSLATE("cache page index: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
ENDTRANSLATIONBLOCK
TC BLOCK: 03100102 SCID$SCS_BAD_CVMDB_INDEX
TRANSLATIONBLOCK
TRANSLATE("area_offset: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("ds_index: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
ENDTRANSLATIONBLOCK
TC BLOCK: 03110101 SCID$SCS_BAD_CVMDB_AREA_OFF
TRANSLATIONBLOCK
TRANSLATE("area_offset: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
ENDTRANSLATIONBLOCK
TC BLOCK: 03120100 SCID$SCS_CVMDB_CACHE_FULL
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 03130101 SCID$SCS_CVMDB_CACHE_FREE
TRANSLATIONBLOCK
TRANSLATE("Cache page index: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
ENDTRANSLATIONBLOCK
TC BLOCK: 03140102 SCID$SCS_CVMDB_CACHE_FLUSH
TRANSLATIONBLOCK
TRANSLATE("Cache page index: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("Page offset: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
ENDTRANSLATIONBLOCK
TC BLOCK: 03150101 SCID$SCS_CVMDB_CACHE_COMMIT
TRANSLATIONBLOCK
TRANSLATE("Cache page index: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
ENDTRANSLATIONBLOCK
TC BLOCK: 03160100 SCID$SCS_PB_BUFFER_ALLOC_FAIL
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 031f0100 SCID$SCS_FC_OP_DESCS_ALLOC_FAIL
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 032a0020 SCID$SCS_MASTER_CONFLICT
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 033c0106 SCID$SCS_BAD_RP_LOGIN_STATE
TRANSLATIONBLOCK
TRANSLATE("Invocation instance: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("Port login state: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("Local port: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("Port id value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("Port name (low): 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("Port name (high): 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
ENDTRANSLATIONBLOCK
TC BLOCK: 033d0105 SCID$SCS_BAD_RP_LOGGEDIN_TMR_EXP
TRANSLATIONBLOCK
TRANSLATE("Port login state: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("Local port: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("Port id value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("Port name (low): 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("Port name (high): 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
ENDTRANSLATIONBLOCK
TC BLOCK: 03500020 SCID$SCS_DEBUG_CRASH
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 03510141 SCID$SCS_KILLED_BY_OTHER
TRANSLATIONBLOCK
TRANSLATE("Reason code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
ENDTRANSLATIONBLOCK
TC BLOCK: 03520140 SCID$SCS_KILL_OTHER
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 03640020 SCID$SCS_SHUTDOWN_RESTART
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 03650060 SCID$SCS_SHUTDOWN_NORESTART
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 03660060 SCID$SCS_SHUTDOWN_POWEROFF
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 03670000 SCID$SCS_CRASH_RESTART
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 03680040 SCID$SCS_CRASH_NORESTART
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 03690080 SCID$SCS_CRASH_RESTART_COUPLED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 036a00c0 SCID$SCS_CRASH_NORESTART_COUPLED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 036b0001 SCID$SCS_CANT_FAILOVER_FREEZING_UNIT
TRANSLATIONBLOCK
TRANSLATE("Unit noid: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
ENDTRANSLATIONBLOCK
TC BLOCK: 036d0020 SCID$SCS_BATTERY_SUICIDE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 036e0020 SCID$SCS_LCD_RESTART
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 03780121 SCID$SCS_CANT_REALIZE_XXXDB
TRANSLATIONBLOCK
TRANSLATE("Status: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
ENDTRANSLATIONBLOCK
TC BLOCK: 03790020 SCID$SCS_CODE_LOAD_RESTART
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0400011f SCID$FM_DEF_EXCEPTION
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0401011f SCID$FM_MACHINE_CHECK
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0402011f SCID$FM_DEBUG
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0403047f SCID$FM_RECURSIVE_TE
TRANSLATIONBLOCK
TRANSLATE("Recursive event termination location: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("Recursive event termination code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("Recursive event termination parameter 0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("Recursive event termination parameter 1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("Recursive event termination parameter 2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4]);
TRANSLATE("Recursive event termination parameter 3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5]);
TRANSLATE("Recursive event termination parameter 4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6]);
TRANSLATE("Recursive event termination parameter 5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7]);
TRANSLATE("Recursive event termination parameter 6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8]);
TRANSLATE("Recursive event termination parameter 7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9]);
TRANSLATE("Recursive event termination parameter 8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("Recursive event termination parameter 9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("Recursive event termination parameter 10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("Recursive event termination parameter 11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("Recursive event termination parameter 12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("Recursive event termination parameter 13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("Recursive event termination parameter 14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("Recursive event termination parameter 15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("Recursive event termination parameter 16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("Recursive event termination parameter 17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("Recursive event termination parameter 18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("Recursive event termination parameter 19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("Recursive event termination parameter 20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("Recursive event termination parameter 21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Recursive event termination parameter 22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Recursive event termination parameter 23: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Recursive event termination parameter 24: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Recursive event termination parameter 25: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("Recursive event termination parameter 26: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("Recursive event termination parameter 27: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("Recursive event termination parameter 28: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04040100 SCID$FM_NOMEM
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 04050101 SCID$FM_UPDSCELABAE_EDBN_BAD
TRANSLATIONBLOCK
TRANSLATE("Event data block index: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0406017f SCID$FM_LTE_RESET
TRANSLATIONBLOCK
TRANSLATE("In progress event termination location: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("In progress event termination code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("In progress event termination parameter 0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("In progress event termination parameter 1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
TRANSLATE("In progress event termination parameter 2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4]);
TRANSLATE("In progress event termination parameter 3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5]);
TRANSLATE("In progress event termination parameter 4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6]);
TRANSLATE("In progress event termination parameter 5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7]);
TRANSLATE("In progress event termination parameter 6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8]);
TRANSLATE("In progress event termination parameter 7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9]);
TRANSLATE("In progress event termination parameter 8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("In progress event termination parameter 9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("In progress event termination parameter 10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("In progress event termination parameter 11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("In progress event termination parameter 12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("In progress event termination parameter 13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("In progress event termination parameter 14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("In progress event termination parameter 15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("In progress event termination parameter 16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("In progress event termination parameter 17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("In progress event termination parameter 18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("In progress event termination parameter 19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("In progress event termination parameter 20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("In progress event termination parameter 21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("In progress event termination parameter 22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("In progress event termination parameter 23: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("In progress event termination parameter 24: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("In progress event termination parameter 25: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("In progress event termination parameter 26: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("In progress event termination parameter 27: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("In progress event termination parameter 28: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0407016a SCID$FM_PREMATURE_TERM
TRANSLATIONBLOCK
TRANSLATE("Trap type: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("TC [llisttcc]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4]);
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5]);
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6]);
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7]);
TRANSLATE("Exception code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8]);
TRANSLATE("Exception count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04080582 SCID$FM_COUPLED_CRASH_DR
TRANSLATIONBLOCK
TRANSLATE("Other controller termination location: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Other controller termination code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
ENDTRANSLATIONBLOCK
TC BLOCK: 040905a2 SCID$FM_COUPLED_CRASH_NDR
TRANSLATIONBLOCK
TRANSLATE("Other controller termination location: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Other controller termination code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
ENDTRANSLATIONBLOCK
TC BLOCK: 040a05c2 SCID$FM_COUPLED_CRASH_DNR
TRANSLATIONBLOCK
TRANSLATE("Other controller termination location: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Other controller termination code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
ENDTRANSLATIONBLOCK
TC BLOCK: 040b05e2 SCID$FM_COUPLED_CRASH_NDNR
TRANSLATIONBLOCK
TRANSLATE("Other controller termination location: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Other controller termination code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
ENDTRANSLATIONBLOCK
TC BLOCK: 040c0582 SCID$FM_COUPLED_CRASH_BADDRCC
TRANSLATIONBLOCK
TRANSLATE("Other controller termination location: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Other controller termination code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
ENDTRANSLATIONBLOCK
TC BLOCK: 040d0101 SCID$FM_UNRECOG_UPDSCELABAE_OP
TRANSLATIONBLOCK
TRANSLATE("Unrecognized value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
ENDTRANSLATIONBLOCK
TC BLOCK: 040e0100 SCID$FM_NOT_MASTER
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 040f0100 SCID$FM_IS_MASTER
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 04100182 SCID$FM_SCEL_NOT_ACTIVE
TRANSLATIONBLOCK
TRANSLATE("Local control flags: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Master control flags: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04110180 SCID$FM_CSLD_SCXEL_INACC
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 04130106 SCID$FM_INVALID_STRUCT_TYPE
TRANSLATIONBLOCK
TRANSLATE("Unexpected value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Allowed value 1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("Allowed value 2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("Allowed value 3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
TRANSLATE("Allowed value 4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4]);
TRANSLATE("Allowed value 5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04140104 SCID$FM_EIP_OUT_OF_RANGE
TRANSLATIONBLOCK
TRANSLATE("Event code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Out-of-range EIP type: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("Minimum allowed EIP type: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("Maximum allowed EIP type: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04150104 SCID$FM_EIP_TOO_BIG
TRANSLATIONBLOCK
TRANSLATE("Event code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("EIP type: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("EIP size: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("Maximum allowed EIP size: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04160103 SCID$FM_EIP_NOT_MULTLW
TRANSLATIONBLOCK
TRANSLATE("Event code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("EIP type: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("EIP size: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04170107 SCID$FM_CSIO_REQUEST_INVALID
TRANSLATIONBLOCK
TRANSLATE("Status: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("I/O operation: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("NOID: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("Block address: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
TRANSLATE("Number of blocks: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4]);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[5] == 0,
TRANSLATE("Buffer address supplied to CS: 0x00000000 (erase)"),
TRANSLATE("Buffer address supplied to CS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5])
);
TRANSLATE("PC of call to Container Services: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04180107 SCID$FM_CSIO_UNRECOG_STATUS
TRANSLATIONBLOCK
TRANSLATE("Status: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("I/O operation: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("NOID: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("Block address: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
TRANSLATE("Number of blocks: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4]);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[5] == 0,
TRANSLATE("Buffer address supplied to CS: 0x00000000 (erase)"),
TRANSLATE("Buffer address supplied to CS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5])
);
TRANSLATE("PC of call to Container Services: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04190100 SCID$FM_RESTARTDEBUG
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 041a0100 SCID$FM_UNEXP_ACTIVEQ_EMPTY
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 041d0100 SCID$FM_NOT_SCMI
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 041e0102 SCID$FM_TEISP_BAD
TRANSLATIONBLOCK
TRANSLATE("Unexpected value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Expected value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
ENDTRANSLATIONBLOCK
TC BLOCK: 041f0a1f SCID$FM_LOW_MEM_ACC_V
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0420011f SCID$FM_WATCHDOG_TIMEOUT
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04220102 SCID$FM_EC_ILLEGAL_SCID
TRANSLATIONBLOCK
TRANSLATE("Event code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Illegal software component: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04240960 SCID$FM_POWER_LOSS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 04252014 SCID$FM_PPC_DETECTED_DPE
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04262014 SCID$FM_PPC_DETECTED_APE
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04273914 SCID$FM_L2_CACHE_PARITY_ERROR
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04282014 SCID$FM_QUASAR_DETECTED_DPE
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04292014 SCID$FM_QUASAR_DETECTED_APE
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
ENDTRANSLATIONBLOCK
TC BLOCK: 042a2014 SCID$FM_QUASAR_PPC_XFER_ERR
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
ENDTRANSLATIONBLOCK
TC BLOCK: 042b0113 SCID$FM_QUASAR_MEM_SEL_ERR
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
ENDTRANSLATIONBLOCK
TC BLOCK: 042c2014 SCID$FM_POLICY_MEM_ECC_ERROR
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
ENDTRANSLATIONBLOCK
TC BLOCK: 042d2014 SCID$FM_PPC_TIMEOUT
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
ENDTRANSLATIONBLOCK
TC BLOCK: 042e201d SCID$FM_NPCI_QUASAR_UNSUP_XFER
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("NPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("NPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Quasar PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Surge secondary PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Tachyon port 4 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Tachyon port 5 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("Tachyon port 6 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
ENDTRANSLATIONBLOCK
TC BLOCK: 042f011c SCID$FM_NPCI_BAD_ADDRESS
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("NPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("NPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("Quasar PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Surge secondary PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Tachyon port 4 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Tachyon port 5 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Tachyon port 6 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0430201d SCID$FM_NPCI_PARITY_ERROR
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("NPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("NPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Quasar PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Surge secondary PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Tachyon port 4 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Tachyon port 5 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("Tachyon port 6 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0431201d SCID$FM_NPCI_TIMEOUT
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("NPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("NPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Quasar PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Surge secondary PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Tachyon port 4 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Tachyon port 5 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("Tachyon port 6 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0432201d SCID$FM_NPCI_PROTOCOL_VIOLATION
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("NPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("NPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Quasar PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Surge secondary PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Tachyon port 4 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Tachyon port 5 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("Tachyon port 6 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0433201d SCID$FM_NPCI_SYSTEM_ERROR
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("NPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("NPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Quasar PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Surge secondary PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Tachyon port 4 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Tachyon port 5 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("Tachyon port 6 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0434201d SCID$FM_NPCI_SIG_TARG_ABORT
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("NPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("NPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Quasar PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Surge secondary PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Tachyon port 4 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Tachyon port 5 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("Tachyon port 6 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0435201d SCID$FM_NPCI_RCVD_TARG_ABORT
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("NPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("NPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Quasar PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Surge secondary PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Tachyon port 4 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Tachyon port 5 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("Tachyon port 6 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04362010 SCID$FM_CACHE_MEM_ECC_ERROR
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("IOPISTAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("IOPMASK: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("DMA0_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("DMA1_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("ECC_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("ECC_AER_CS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("ECC_SP_CEC: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04372012 SCID$FM_SURGE_DMA_ENGINE_HALTED
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("IOPISTAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("IOPMASK: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("DMA0_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("DMA1_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("ECC_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("ECC_AER_CS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("ECC_SP_CEC: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("DMA0's CDB pointer: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("DMA1's CDB pointer: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0438011c SCID$FM_FPCI_BAD_ADDRESS
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("FPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("FPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("Surge Primary PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Tachyon port 0 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Tachyon port 1 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Tachyon port 2 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Tachyon port 3 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0439201d SCID$FM_FPCI_PARITY_ERROR
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("FPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("FPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Surge Primary PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Tachyon port 0 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Tachyon port 1 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Tachyon port 2 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("Tachyon port 3 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
ENDTRANSLATIONBLOCK
TC BLOCK: 043a201d SCID$FM_FPCI_TIMEOUT
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("FPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("FPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Surge Primary PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Tachyon port 0 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Tachyon port 1 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Tachyon port 2 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("Tachyon port 3 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
ENDTRANSLATIONBLOCK
TC BLOCK: 043b201d SCID$FM_FPCI_PROTOCOL_VIOLATION
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("FPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("FPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Surge Primary PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Tachyon port 0 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Tachyon port 1 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Tachyon port 2 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("Tachyon port 3 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
ENDTRANSLATIONBLOCK
TC BLOCK: 043c201d SCID$FM_FPCI_SYSTEM_ERROR
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("FPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("FPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Surge Primary PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Tachyon port 0 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Tachyon port 1 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Tachyon port 2 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("Tachyon port 3 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
ENDTRANSLATIONBLOCK
TC BLOCK: 043d201d SCID$FM_FPCI_SIG_TARG_ABORT
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("FPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("FPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Surge Primary PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Tachyon port 0 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Tachyon port 1 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Tachyon port 2 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("Tachyon port 3 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
ENDTRANSLATIONBLOCK
TC BLOCK: 043e201d SCID$FM_FPCI_RCVD_TARG_ABORT
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("PRIFOPT1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECCERR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CPUERAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CPUERAD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("BESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("BEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("SESR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("SEAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("ERROR_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("FPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("FPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("Surge Primary PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("Tachyon port 0 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("Tachyon port 1 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("Tachyon port 2 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("Tachyon port 3 PCI_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
ENDTRANSLATIONBLOCK
TC BLOCK: 043f011f SCID$FM_PPC_EXCEPTION_0000
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0440011f SCID$FM_PPC_EXCEPTION_0100
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0441011f SCID$FM_PPC_EXCEPTION_0200
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0442011f SCID$FM_PPC_EXCEPTION_0300
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("DSISR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("DAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("DABR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0443011f SCID$FM_PPC_EXCEPTION_0400
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0444011f SCID$FM_PPC_EXCEPTION_0500
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0445011f SCID$FM_PPC_EXCEPTION_0600
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("DSISR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("DAR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0446011f SCID$FM_PPC_EXCEPTION_0700
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0447011f SCID$FM_PPC_EXCEPTION_0800
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0448011f SCID$FM_PPC_EXCEPTION_0900
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0449011f SCID$FM_PPC_EXCEPTION_0A00
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 044a011f SCID$FM_PPC_EXCEPTION_0B00
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 044b011f SCID$FM_PPC_EXCEPTION_0C00
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 044c011f SCID$FM_PPC_EXCEPTION_0D00
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 044d011f SCID$FM_PPC_EXCEPTION_0E00
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 044e011f SCID$FM_PPC_EXCEPTION_0F00
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 044f011f SCID$FM_PPC_EXCEPTION_1000
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0450011f SCID$FM_PPC_EXCEPTION_1100
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0451011f SCID$FM_PPC_EXCEPTION_1200
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0452011f SCID$FM_PPC_EXCEPTION_1300
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0453011f SCID$FM_PPC_EXCEPTION_1400
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04540101 SCID$FM_BAD_EDBN_COUNT
TRANSLATIONBLOCK
TRANSLATE("Event data block count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
ENDTRANSLATIONBLOCK
TC BLOCK: 04550101 SCID$FM_BAD_REI_STATUS
TRANSLATIONBLOCK
TRANSLATE("Unexpected status: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
ENDTRANSLATIONBLOCK
TC BLOCK: 04560102 SCID$FM_ACTIVEQ_EVENT_NA
TRANSLATIONBLOCK
TRANSLATE("Sequence number requested: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("Number events reported valid for retrieval: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
ENDTRANSLATIONBLOCK
TC BLOCK: 04570105 SCID$FM_DIRECT_TERM_CALL
TRANSLATIONBLOCK
TRANSLATE("PC of direct call: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("Stack pointer: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("Trap type parameter: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("TC parameter: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("Save area parameter: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
ENDTRANSLATIONBLOCK
TC BLOCK: 0476013f SCID$FM_LTE_RESET_CMPLT
TRANSLATIONBLOCK
TRANSLATE("In progress event termination location: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("In progress event termination code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("In progress event termination parameter 0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("In progress event termination parameter 1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
TRANSLATE("In progress event termination parameter 2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4]);
TRANSLATE("In progress event termination parameter 3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5]);
TRANSLATE("In progress event termination parameter 4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6]);
TRANSLATE("In progress event termination parameter 5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7]);
TRANSLATE("In progress event termination parameter 6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8]);
TRANSLATE("In progress event termination parameter 7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9]);
TRANSLATE("In progress event termination parameter 8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("In progress event termination parameter 9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("In progress event termination parameter 10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("In progress event termination parameter 11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("In progress event termination parameter 12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("In progress event termination parameter 13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("In progress event termination parameter 14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("In progress event termination parameter 15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("In progress event termination parameter 16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("In progress event termination parameter 17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("In progress event termination parameter 18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("In progress event termination parameter 19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("In progress event termination parameter 20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("In progress event termination parameter 21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("In progress event termination parameter 22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("In progress event termination parameter 23: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("In progress event termination parameter 24: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("In progress event termination parameter 25: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("In progress event termination parameter 26: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("In progress event termination parameter 27: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("In progress event termination parameter 28: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0477013f SCID$FM_LTE_RESET_INTD
TRANSLATIONBLOCK
TRANSLATE("In progress event termination location: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("In progress event termination code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("In progress event termination parameter 0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("In progress event termination parameter 1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
TRANSLATE("In progress event termination parameter 2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4]);
TRANSLATE("In progress event termination parameter 3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5]);
TRANSLATE("In progress event termination parameter 4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6]);
TRANSLATE("In progress event termination parameter 5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7]);
TRANSLATE("In progress event termination parameter 6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8]);
TRANSLATE("In progress event termination parameter 7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9]);
TRANSLATE("In progress event termination parameter 8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("In progress event termination parameter 9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("In progress event termination parameter 10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("In progress event termination parameter 11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("In progress event termination parameter 12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("In progress event termination parameter 13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("In progress event termination parameter 14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("In progress event termination parameter 15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("In progress event termination parameter 16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("In progress event termination parameter 17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("In progress event termination parameter 18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("In progress event termination parameter 19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("In progress event termination parameter 20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("In progress event termination parameter 21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("In progress event termination parameter 22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("In progress event termination parameter 23: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("In progress event termination parameter 24: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("In progress event termination parameter 25: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("In progress event termination parameter 26: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("In progress event termination parameter 27: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("In progress event termination parameter 28: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 0478203f SCID$FM_LTE_RESET_SPPC_RESET
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Reserved: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("Reserved: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[3]
!= 0,
TRANSLATE(
"Previous termination event code[-1]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[4]
!= 0,
TRANSLATE(
"Previous termination event code[-2]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[5]
!= 0,
TRANSLATE(
"Previous termination event code[-3]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[6]
!= 0,
TRANSLATE(
"Previous termination event code[-4]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[7]
!= 0,
TRANSLATE(
"Previous termination event code[-5]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[8]
!= 0,
TRANSLATE(
"Previous termination event code[-6]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[9]
!= 0,
TRANSLATE(
"Previous termination event code[-7]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[10]
!= 0,
TRANSLATE(
"Previous termination event code[-9]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[11]
!= 0,
TRANSLATE(
"Previous termination event code[-10]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[12]
!= 0,
TRANSLATE(
"Previous termination event code[-11]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[13]
!= 0,
TRANSLATE(
"Previous termination event code[-12]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[14]
!= 0,
TRANSLATE(
"Previous termination event code[-13]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[15]
!= 0,
TRANSLATE(
"Previous termination event code[-14]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[16]
!= 0,
TRANSLATE(
"Previous termination event code[-15]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[17]
!= 0,
TRANSLATE(
"Previous termination event code[-16]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[18]
!= 0,
TRANSLATE(
"Previous termination event code[-17]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[19]
!= 0,
TRANSLATE(
"Previous termination event code[-18]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[20]
!= 0,
TRANSLATE(
"Previous termination event code[-19]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[21]
!= 0,
TRANSLATE(
"Previous termination event code[-20]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[22]
!= 0,
TRANSLATE(
"Previous termination event code[-21]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[23]
!= 0,
TRANSLATE(
"Previous termination event code[-22]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[25]
!= 0,
TRANSLATE(
"Previous termination event code[-23]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[26]
!= 0,
TRANSLATE(
"Previous termination event code[-24]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[27]
!= 0,
TRANSLATE(
"Previous termination event code[-25]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[28]
!= 0,
TRANSLATE(
"Previous termination event code[-26]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[29]
!= 0,
TRANSLATE(
"Previous termination event code[-27]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]
)
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[30]
!= 0,
TRANSLATE(
"Previous termination event code[-28]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]
)
);
ENDTRANSLATIONBLOCK
TC BLOCK: 04790020 SCID$FM_LTE_RESET_MMTSTEXECD
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 047a013f SCID$FM_LTE_RESET_UNEXP
TRANSLATIONBLOCK
TRANSLATE("Termination processing state value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Reserved: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("In progress event termination location: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("In progress event termination code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
TRANSLATE("In progress event termination parameter 0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4]);
TRANSLATE("In progress event termination parameter 1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5]);
TRANSLATE("In progress event termination parameter 2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6]);
TRANSLATE("In progress event termination parameter 3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7]);
TRANSLATE("In progress event termination parameter 4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8]);
TRANSLATE("In progress event termination parameter 5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9]);
TRANSLATE("In progress event termination parameter 6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("In progress event termination parameter 7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("In progress event termination parameter 8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("In progress event termination parameter 9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("In progress event termination parameter 10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("In progress event termination parameter 11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("In progress event termination parameter 12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("In progress event termination parameter 13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("In progress event termination parameter 14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("In progress event termination parameter 15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("In progress event termination parameter 16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("In progress event termination parameter 17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("In progress event termination parameter 18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("In progress event termination parameter 19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("In progress event termination parameter 20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("In progress event termination parameter 21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("In progress event termination parameter 22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("In progress event termination parameter 23: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("In progress event termination parameter 24: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("In progress event termination parameter 25: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("In progress event termination parameter 26: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 047b0021 SCID$FM_SCRUB_REQUESTED
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[0] == 0,
TRANSLATE("Scrub was issued via SCMI")
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[0] == 1,
TRANSLATE("Scrub was issued via OCP")
);
CONDITIONAL(
teb.u.data.ltei.lter.termination_event.params.param[0] == 2,
TRANSLATE("Scrub was issued via FAULT MENU")
);
ENDTRANSLATIONBLOCK
TC BLOCK: 04f6013f SCID$FM_USERAPNDR_TEST
TRANSLATIONBLOCK
TRANSLATE("TP[0]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("TP[1]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("TP[2]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("TP[3]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
TRANSLATE("TP[4]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4]);
TRANSLATE("TP[5]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5]);
TRANSLATE("TP[6]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6]);
TRANSLATE("TP[7]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7]);
TRANSLATE("TP[8]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8]);
TRANSLATE("TP[9]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9]);
TRANSLATE("TP[10]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("TP[11]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("TP[12]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("TP[13]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("TP[14]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("TP[15]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("TP[16]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("TP[17]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("TP[18]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("TP[19]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("TP[20]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("TP[21]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("TP[22]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("TP[23]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("TP[24]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("TP[25]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("TP[26]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("TP[27]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("TP[28]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("TP[29]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("TP[30]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04f70000 SCID$FM_CTRL_Z_NOCC
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 04f9017f SCID$FM_POFF_TEST
TRANSLATIONBLOCK
TRANSLATE("TP[0]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("TP[1]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("TP[2]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("TP[3]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
TRANSLATE("TP[4]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4]);
TRANSLATE("TP[5]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5]);
TRANSLATE("TP[6]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6]);
TRANSLATE("TP[7]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7]);
TRANSLATE("TP[8]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8]);
TRANSLATE("TP[9]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9]);
TRANSLATE("TP[10]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("TP[11]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("TP[12]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("TP[13]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("TP[14]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("TP[15]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("TP[16]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("TP[17]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("TP[18]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("TP[19]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("TP[20]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("TP[21]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("TP[22]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("TP[23]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("TP[24]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("TP[25]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("TP[26]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("TP[27]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("TP[28]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("TP[29]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("TP[30]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04fa0100 SCID$FM_USERNP_TEST
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 04fb011f SCID$FM_USERAP_TEST
TRANSLATIONBLOCK
TRANSLATE("TP[0]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("TP[1]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("TP[2]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("TP[3]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
TRANSLATE("TP[4]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4]);
TRANSLATE("TP[5]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5]);
TRANSLATE("TP[6]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6]);
TRANSLATE("TP[7]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7]);
TRANSLATE("TP[8]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8]);
TRANSLATE("TP[9]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9]);
TRANSLATE("TP[10]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("TP[11]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("TP[12]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("TP[13]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("TP[14]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("TP[15]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("TP[16]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("TP[17]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("TP[18]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("TP[19]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("TP[20]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("TP[21]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("TP[22]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("TP[23]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("TP[24]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("TP[25]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("TP[26]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("TP[27]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("TP[28]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("TP[29]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("TP[30]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04fc0100 SCID$FM_ISRNP_TEST
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 04fd011f SCID$FM_ISRAP_TEST
TRANSLATIONBLOCK
TRANSLATE("TP[0]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("TP[1]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("TP[2]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("TP[3]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
TRANSLATE("TP[4]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4]);
TRANSLATE("TP[5]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5]);
TRANSLATE("TP[6]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6]);
TRANSLATE("TP[7]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7]);
TRANSLATE("TP[8]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8]);
TRANSLATE("TP[9]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9]);
TRANSLATE("TP[10]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("TP[11]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("TP[12]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("TP[13]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("TP[14]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("TP[15]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("TP[16]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("TP[17]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("TP[18]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("TP[19]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("TP[20]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("TP[21]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("TP[22]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("TP[23]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("TP[24]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("TP[25]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("TP[26]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("TP[27]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("TP[28]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("TP[29]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("TP[30]: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 04fe0100 SCID$FM_NYI
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 04ff011f SCID$FM_OLD_STYLE_BUGCHECK
TRANSLATIONBLOCK
TRANSLATE("SRR0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("SRR1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("XER: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CTR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception code value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Exception count value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("R0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("R1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("R2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("R3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("R4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("R5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("R6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("R7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("R8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("R9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("R10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("R11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("R12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("R13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("R14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("R15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("R16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("R17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("R18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("R19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("R20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("R21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("R22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 06040100 SCID$FCS_INIT_MEM_SFQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 06150100 SCID$FCS_INIT_FCS_DUMP
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 06160100 SCID$FCS_INIT_MEM_MFC_OUT_BUF
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 06170100 SCID$FCS_INIT_MEM_MFC_IN_BUF
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 061c0100 SCID$FCS_INIT_MEM_IBQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 061d0100 SCID$FCS_INIT_MEM_MFC_COP_BUF
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 06200100 SCID$FCS_INVAL_COMPL_MSG
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 06230100 SCID$FCS_CLASS2_OUTB_FAILURE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0624011f SCID$FCS_HOST_PROGRAMMING_ERROR
TRANSLATIONBLOCK
TRANSLATE("Callback: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("Byte Count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("SEST Byte Count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("CDB10B Opcode: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("Loc: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("SGL ptr: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("SGL Byte Count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("SGL ptr: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("SGL Byte Count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("SGL ptr: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("SGL Byte Count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10] );
TRANSLATE("SGL ptr: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11] );
TRANSLATE("SGL Byte Count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12] );
TRANSLATE("SGL ptr: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13] );
TRANSLATE("SGL Byte Count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14] );
TRANSLATE("SGL ptr: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15] );
TRANSLATE("SGL Byte Count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16] );
TRANSLATE("SGL ptr: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17] );
TRANSLATE("SGL Byte Count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18] );
TRANSLATE("SGL ptr: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19] );
TRANSLATE("SGL Byte Count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20] );
TRANSLATE("SGL ptr: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21] );
TRANSLATE("SGL Byte Count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22] );
TRANSLATE("SGL ptr: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23] );
TRANSLATE("SGL Byte Count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24] );
TRANSLATE("SGL ptr: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25] );
TRANSLATE("SGL Byte Count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26] );
TRANSLATE("SGL ptr: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27] );
TRANSLATE("SGL Byte Count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28] );
TRANSLATE("SGL ptr: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29] );
TRANSLATE("SGL Byte Count: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30] );
ENDTRANSLATIONBLOCK
TC BLOCK: 06280100 SCID$FCS_INVAL_PORT_EVENT_TYPE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 06290100 SCID$FCS_UNKNOWN_FED_TYPE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 062a0100 SCID$FCS_UNKNOWN_LDN_FED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 062b0100 SCID$FCS_START_TIMER_FAIL
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 062c0100 SCID$FCS_UNKNOWN_TIMER_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 062e0100 SCID$FCS_SEST_PROGM_ERROR
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 062f0100 SCID$FCS_UNKNOWN_EXCH_TYPE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 06320100 SCID$FCS_PORT_OFFLINE_FAIL
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 06330100 SCID$FCS_OUT_RESERVED_FEDS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 06340100 SCID$FCS_UNSUPPORTED_ELS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 06360100 SCID$FCS_UNSUPPORTED_DRIVE_INIT
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 06380100 SCID$FCS_UNSUPPORTED_TDS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 063c0100 SCID$FCS_LBA_RANGE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 06410100 SCID$FCS_UNKNOWN_STATUS_BYTE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 06460100 SCID$FCS_UNSUPPORTED_SES_PAGE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 06470100 SCID$FCS_BAD_STRING_IN_PAGE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07000100 SCID$CS_INSUFF_MEM
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07010100 SCID$CS_LMAP_ALLOC_FAIL
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07020100 SCID$CS_LMAP_ALLOC_FAIL_2
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07030100 SCID$CS_INVALID_RAID_TYPE_INIT
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07070100 SCID$CS_QS_READ_FAIL_1
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 070a0100 SCID$CS_RSD_ALLOC_FAIL
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 070b0100 SCID$CS_BAD_REF_COUNT
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 070c0100 SCID$CS_INVALID_OBJECT_FOR_IO
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 070d0100 SCID$CS_INVALID_IO_RANGE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07110100 SCID$CS_RAIDTYPE_NOTSUPPORTED_1
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07130100 SCID$CS_INVALID_RS_RAID_TYPE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07140100 SCID$CS_INVALID_STRUCT_MAINZQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07150100 SCID$CS_INVALID_STRUCT_LDSBZQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07160100 SCID$CS_INVALID_STRUCT_ODWORKQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07170100 SCID$CS_PBUFF_LEAK
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07180100 SCID$CS_XBUFF_LEAK
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07190100 SCID$CS_NOT_IMPLEMENTED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 071a0100 SCID$CS_WRONG_LDSB
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 071b0100 SCID$CS_WRONG_LDAD_LABORT
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 071c0100 SCID$CS_INVALID_RM_MAP_TYPE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 071d0100 SCID$CS_RM_CACHE_HIT
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 071e0100 SCID$CS_INVALID_PSEG_USAGE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 071f0100 SCID$CS_BAD_OBJ_CLASS_REG_REP
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07200100 SCID$CS_NO_CMAPS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07220100 SCID$CS_INVALID_CS_REQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07230100 SCID$CS_INVALID_PSAR_RAID_TYPE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07240100 SCID$CS_NO_REQS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07260100 SCID$CS_BAD_VOLNOID
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07290100 SCID$CS_MULTIPLE_TRANS_DETECTED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 072a0100 SCID$CS_TRANS_RECOV_FAIL
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 072b0100 SCID$CS_RECOV_INVALID_TRANS_TYPE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 072d0100 SCID$CS_NO_TRANS_DETECTED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 072f0100 SCID$CS_ZERO_BAD_MEM_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07340100 SCID$CS_BAD_OBJ_HANDLE_REQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07350100 SCID$CS_INVALID_OP_REQ_HANDLER1
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07370100 SCID$CS_BAD_VOLNOID_SPARING
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07380100 SCID$CS_NO_XDS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07390100 SCID$CS_INVALID_RTYPE_REGREASS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 073b0100 SCID$CS_UNKNOWN_TRANS_TYPE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 073c0100 SCID$CS_TRANS_INCONSISTENCY
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 073d0100 SCID$CS_INVALID_TRANS_TYPE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 073e0100 SCID$CS_INVALID_STRUCT_LEVELLDQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 073f0100 SCID$CS_INVALID_STRUCT_SPARERSQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07400100 SCID$CS_INVALID_STRUCT_CSREQQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07410100 SCID$CS_INVALID_STRUCT_PLDMCQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07420100 SCID$CS_NO_RLBS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07430100 SCID$CS_BAD_RLB_LIST
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07440100 SCID$CS_BAD_RLB_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07450100 SCID$CS_INVALID_STRUCT_CSLDQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07460100 SCID$CS_INVALID_STRUCT_CSEBITQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07480100 SCID$CS_NONMASTER_QSIO
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07490100 SCID$CS_NONMASTER_CSLDIO
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 074a0100 SCID$CS_INVALID_STRUCT_ACBWQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 074b0100 SCID$CS_INVALID_ACBW_OPCODE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 074c0100 SCID$CS_INVALID_STRUCT_MAINUNSHQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 074f0100 SCID$CS_INVALID_STRUCT_MIGRATE_WORKQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07500100 SCID$CS_INVALID_STRUCT_MIGRATE_RSQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07510100 SCID$CS_BAD_MEM_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07520100 SCID$CS_MELTDOWN
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07530100 SCID$CS_INVALID_STRUCT_ALB_LIST
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07540100 SCID$CS_RSTORE_NOT_UTILIZED_IN_MAP
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07550100 SCID$CS_INVALID_STRUCT_ALLOC_WQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07570100 SCID$CS_REALIZE_FAILED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07580100 SCID$CS_UNREALIZE_FAILED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07590100 SCID$CS_INIT_ALLOC_UNIT_REALIZED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 075b0100 SCID$CS_IO_FAILURE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 075d0100 SCID$CS_INVALID_STRUCT_CSCBITQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 075e0100 SCID$CS_INVALID_STRUCT_MAINODBGALOCQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 075f0100 SCID$CS_BAD_DUB_RSS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07600100 SCID$CS_INVALID_LD_TYPE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07610100 SCID$CS_BAD_DIP_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07620100 SCID$CS_DEALLOC_PSEG_FAILURE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07630100 SCID$CS_RESERVED_CAPACITY_FAILURE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07640100 SCID$CS_INVALID_STRUCT_REBUILD_PARITY
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07670100 SCID$CS_CSLD_NO_EXIST
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07680100 SCID$CS_MEMBER_REMOVED_FROM_RSS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 07690100 SCID$CS_BAD_MEMBER_MANAGER_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 076a0100 SCID$CS_NO_QUORUM_DISKS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 076b0100 SCID$CS_INVALID_PSEG_ALLOC_TYPE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 076c0100 SCID$CS_XMFC_FAILURE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 076d0100 SCID$CS_INVALID_XMFC_OPERATION
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 076e0100 SCID$CS_INVALID_TYPE_IN_RSDM
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 08010100 SCID$RS_BAD_EBIT_STATUS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 08020100 SCID$RS_BAD_MEMBER_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 08030100 SCID$RS_BAD_RAID_TYPE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 08040100 SCID$RS_REWRITE_UNSUPPORTED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 08070100 SCID$RS_CANT_ALLOCATE_MEM
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 09010100 SCID$SCMI_BQ_NO_MEM
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 09020100 SCID$SCMI_CP_NO_MEM
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 09040100 SCID$SCMI_INTERNAL_ERROR
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 09060100 SCID$SCMI_RES_BUF_NO_MEM
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0b000100 SCID$SYS_BAD_XMFC_RESPONSE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0b010100 SCID$SYS_BAD_MFC_VECTOR
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0b020100 SCID$SYS_BAD_SACB_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0b030100 SCID$SYS_INSUFF_MEM
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0b040100 SCID$SYS_BAD_UTIL_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0b052001 SCID$SYS_EEPROM_FAILURE
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
ENDTRANSLATIONBLOCK
TC BLOCK: 0b062001 SCID$SYS_UUID_RANGE_OVERFLOW
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
ENDTRANSLATIONBLOCK
TC BLOCK: 0b072001 SCID$SYS_WRONG_GLUE_CODE
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
ENDTRANSLATIONBLOCK
TC BLOCK: 0b080100 SCID$SYS_RESYNC_NOT_ALLOWED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0b092003 SCID$SYS_LCD_FAILURE
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("Failure status: %d",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("Message code: %d",
teb.u.data.ltei.lter.termination_event.params.param[2] );
ENDTRANSLATIONBLOCK
TC BLOCK: 0b0a0100 SCID$SYS_BAD_XMFC_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0b0b0020 SCID$SYS_NO_CONNECTIONS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0b0c0020 SCID$SYS_CSLD_HAS_HOLE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0b0d0020 SCID$SYS_FMCC_IO_FAILED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0b0e0100 SCID$SYS_PBUFF_LEAK
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0b0f0122 SCID$SYS_FILE_TOO_BIG
TRANSLATIONBLOCK
TRANSLATE("File size: %d.",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("Code load buffer size: %d.",
teb.u.data.ltei.lter.termination_event.params.param[1] );
ENDTRANSLATIONBLOCK
TC BLOCK: 0c010100 SCID$DRM_INVALID_DDS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c030100 SCID$DRM_INVALID_GSB_DELETE_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c040100 SCID$DRM_RECOVERY_WRITE_DUPLICATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c050100 SCID$DRM_RECOVERY_WRITE_NOT_CACHED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c060100 SCID$DRM_RECOVERY_WRITE_NOT_DIRTY
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c070100 SCID$DRM_RECOVERY_WRITE_LOST_GNODE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c080100 SCID$DRM_INVALID_SCRAG_MIRROR_RIE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c090100 SCID$DRM_INVALID_SCRAG_MIRROR_MEMBERS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c0a0100 SCID$DRM_INVALID_SCRAG_PRIMARY_RIE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c0b0100 SCID$DRM_INVALID_SCRAG_PRIMARY_MEMBERS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c0c0100 SCID$DRM_INVALID_GSB_DELETE_IO
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c0d0100 SCID$DRM_INVALID_GSB_INSERT
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c0e0100 SCID$DRM_GSN_OUT_OF_SEQUENCE_1
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c0f0100 SCID$DRM_WRITE_LONG_E_SET_FAILED
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c100100 SCID$DRM_INVALID_ACQUIRE_DRRW
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c110100 SCID$DRM_LOST_GNODE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c140100 SCID$DRM_GSN_OUT_OF_SEQUENCE_2
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c150100 SCID$DRM_GSN_OUT_OF_SEQUENCE_3
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c160100 SCID$DRM_GSN_OUT_OF_SEQUENCE_4
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c170100 SCID$DRM_GSN_OUT_OF_SEQUENCE_5
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c180100 SCID$DRM_GSN_OUT_OF_SEQUENCE_6
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c190100 SCID$DRM_GSN_OUT_OF_SEQUENCE_7
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c1a0100 SCID$DRM_GSN_OUT_OF_SEQUENCE_8
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c1b0100 SCID$DRM_GSN_OUT_OF_SEQUENCE_9
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c1c0100 SCID$DRM_GSN_OUT_OF_SEQUENCE_10
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c200100 SCID$DRM_GSN_OUT_OF_SEQUENCE_11
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c210100 SCID$DRM_GSN_OUT_OF_SEQUENCE_12
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c220100 SCID$DRM_GSN_OUT_OF_SEQUENCE_13
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c230100 SCID$DRM_UNEXPECTED_UNIT_CACHE_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 0c240100 SCID$DRM_INVALID_SIDE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42000100 SCID$HP_INIT_FAIL_MEM_ALLOC
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42050100 SCID$HP_UNEXPECTED_CACHE_LOCK
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42060100 SCID$HP_UNEXPECTED_SCSI_COMMAND
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42070120 SCID$HP_DROP_DEAD_CNDR
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 420801a0 SCID$HP_DROP_DEAD_CCNDR
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 420901c0 SCID$HP_DROP_DEAD_DC
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 420c0180 SCID$HP_UNKNOWN_RSCSI_BUILD_CONTEXT
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 420d0180 SCID$HP_UNKNOWN_RSCSI_RECEIVE_CONTEXT
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 420e0180 SCID$HP_ICOPS_OUT_OF_MEMORY
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 420f0180 SCID$HP_ICOPS_UNKNOWN_BUILD_CONTEXT
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42100180 SCID$HP_ICOPS_UNKNOWN_RECIEVE_CONTEXT
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42110180 SCID$HP_ICOPS_NO_WORK
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42120100 SCID$HP_ILLEGAL_INPROCQ
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42130100 SCID$HP_NO_CMD_HTBS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42140100 SCID$HP_INVALID_RCV_DATA_CTX
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42150100 SCID$HP_CHMOD_NO_ACB
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42160100 SCID$HP_PRESENT_LUN_NO_ACB
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42190100 SCID$HP_INVALID_CCB_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 421b0100 SCID$HP_INVALID_WORK_REQ_TYPE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 421c0100 SCID$HP_NO_WORK_REQUESTS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 421e0100 SCID$HP_CMD_HTB_IN_USE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42230100 SCID$HP_UNPLUN_NO_ACB
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42240180 SCID$HP_REMOTE_NO_ACB
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42250100 SCID$HP_BAD_ACB_DEL
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42260100 SCID$HP_NO_UA_TABLE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42270100 SCID$HP_UNKNOWN_PORT_EVENT
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42280100 SCID$HP_UNKNOWN_CM
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42290100 SCID$HP_ILLEGAL_SEST_ID
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 422a0100 SCID$HP_BAD_ALPA_ON_PTP
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 422b0100 SCID$HP_UNKNOWN_IDLE_STATUS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 422c0002 SCID$HP_TACHYON_ERROR
TRANSLATIONBLOCK
TRANSLATE("Bad port number (zero-based): 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("PCI interrupt status register: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
ENDTRANSLATIONBLOCK
TC BLOCK: 422d0100 SCID$HP_UNKNOWN_IO_ERROR
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 422e0100 SCID$HP_ILLEGAL_LUN_ACCESS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 422f0100 SCID$HP_UNKNOWN_INBOUND_STATUS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42300102 SCID$HP_ILLEGAL_SCRIPT_RSP
TRANSLATIONBLOCK
TRANSLATE("Function that returned bad response: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("Bad response: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
ENDTRANSLATIONBLOCK
TC BLOCK: 42310100 SCID$HP_BAD_SCRIPT_ERROR_STATUS
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42320100 SCID$HP_DUPLICATE_LUN
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42330100 SCID$HP_INVALID_IMMEDIATE_ERROR
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42340100 SCID$HP_INVALID_HTBX_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42350100 SCID$HP_INVALID_UNQUIESCE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42360100 SCID$HP_INVALID_CSEL_STATE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 42370180 SCID$HP_EVENT_NOTIFY_GAP
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 4238011f SCID$HP_CSM_HANG
TRANSLATIONBLOCK
TRANSLATE("CSM stack 0: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("CSM stack 1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("CSM stack 2: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("CSM stack 3: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("CSM stack 4: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("CSM stack 5: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("CSM stack 6: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("CSM stack 7: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("CSM stack 8: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("CSM stack 9: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("CSM stack 10: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("CSM stack 11: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("CSM stack 12: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("CSM stack 13: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("CSM stack 14: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("CSM stack 15: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("CSM stack 16: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("CSM stack 17: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("CSM stack 18: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("CSM stack 19: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("CSM stack 20: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("CSM stack 21: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("CSM stack 22: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("CSM stack 23: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("CSM stack 24: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
TRANSLATE("CSM stack 25: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[25]);
TRANSLATE("CSM stack 26: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[26]);
TRANSLATE("CSM stack 27: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[27]);
TRANSLATE("CSM stack 28: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[28]);
TRANSLATE("CSM stack 29: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[29]);
TRANSLATE("CSM stack 30: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[30]);
ENDTRANSLATIONBLOCK
TC BLOCK: 80000140 SCID$MDU_INSUFF_MEM
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 80010140 SCID$MDU_INVALID_WORK_ITEM
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 80fc01c1 SCID$MDU_CRASHBREAK
TRANSLATIONBLOCK
TRANSLATE("PC of crash: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
ENDTRANSLATIONBLOCK
TC BLOCK: 80fd01c0 SCID$MDU_PROCESS_RETURN
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 80fe01c0 SCID$MDU_UNSPECIFIED_ERROR
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 83002061 SCID$DOG_CANNOT_BRANCH_ERR
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
ENDTRANSLATIONBLOCK
TC BLOCK: 83012079 SCID$DOG_UNEXPECTED_VECTOR_ERR
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("Pointer to ASCII error message: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("TE number: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("Test number: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("Error code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("Address of BUD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Exception type: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("SRR0 at interrupt: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("SRR1/MSR at interrupt: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("LR: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("UIC status: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("UIC mask: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("UIC critical: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
TRANSLATE("GLUE IS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[13]);
TRANSLATE("GLUE MCPE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[14]);
TRANSLATE("GLUE NPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[15]);
TRANSLATE("GLUE NPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[16]);
TRANSLATE("GLUE ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[17]);
TRANSLATE("GLUE APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[18]);
TRANSLATE("GLUE FPIS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[19]);
TRANSLATE("GLUE FPIE: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[20]);
TRANSLATE("GLUE ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[21]);
TRANSLATE("GLUE APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[22]);
TRANSLATE("QSR ERRDET1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[23]);
TRANSLATE("QSR ERREN1: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[24]);
ENDTRANSLATIONBLOCK
TC BLOCK: 8302206b SCID$DOG_HARD_ERR
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0] );
TRANSLATE("Pointer to ASCII error message: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1] );
TRANSLATE("TE number: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2] );
TRANSLATE("Test number: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3] );
TRANSLATE("Error code: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4] );
TRANSLATE("Address of BUD: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5] );
TRANSLATE("Address of error: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6] );
TRANSLATE("Expected data (hi): 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7] );
TRANSLATE("Expected data (lo): 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8] );
TRANSLATE("Actual data (hi): 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9] );
TRANSLATE("Actual data (lo): 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
ENDTRANSLATIONBLOCK
TC BLOCK: 8400200d SCID$DRS_CM_HARD_CORR_ECC_ERR
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("ACNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("APNS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("ACFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
TRANSLATE("APFS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[4]);
TRANSLATE("CTL: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[5]);
TRANSLATE("IOPISTAT: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[6]);
TRANSLATE("IOPMASK: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[7]);
TRANSLATE("DMA0STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[8]);
TRANSLATE("DMA1STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[9]);
TRANSLATE("ECC_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[10]);
TRANSLATE("AECC_AER_CS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[11]);
TRANSLATE("ECC_SP_CEC: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[12]);
ENDTRANSLATIONBLOCK
TC BLOCK: 84012004 SCID$DRS_CM_EXCESSIVE_CORR_ECC
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Number of detected errors: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("Number of seconds over which errors occurred: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("Cache address of most recent error: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
ENDTRANSLATIONBLOCK
TC BLOCK: 84022064 SCID$DRS_CM_RUNTIME_ECC_ERR
TRANSLATIONBLOCK
CONDITIONAL(
teb.u.data.ltei.lteihd.flags.spsctrlr == 1,
TRANSLATE(
"Single Power Supply HSV110 Controller"
)
);
TRANSLATE("DIMM size: %d MB",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("ECC_STATUS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
TRANSLATE("ECC_AER_CS: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[2]);
TRANSLATE("ECC_SP_CEC: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[3]);
ENDTRANSLATIONBLOCK
TC BLOCK: 84210121 SCID$DRS_VOLTAGE_PROCESS_RETURN
TRANSLATIONBLOCK
TRANSLATE("Monitored voltage: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
ENDTRANSLATIONBLOCK
TC BLOCK: 84230120 SCID$DRS_VOLT_REG_PROCESS_RETURN
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 84240021 SCID$DRS_VOLT_REG_INVALID_STATE
TRANSLATIONBLOCK
TRANSLATE("Invalid state: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
ENDTRANSLATIONBLOCK
TC BLOCK: 84400122 SCID$DRS_CANT_CLEAR_Q_BATT_INT
TRANSLATIONBLOCK
TRANSLATE("Quasar UICTR register: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Quasar UICSR register: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
ENDTRANSLATIONBLOCK
TC BLOCK: 84410121 SCID$DRS_CHARGER_PIC_READ_FAIL
TRANSLATIONBLOCK
TRANSLATE("IIC status: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
ENDTRANSLATIONBLOCK
TC BLOCK: 84420122 SCID$DRS_CHARGER_PIC_WRITE_FAIL
TRANSLATIONBLOCK
TRANSLATE("IIC status: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Write value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
ENDTRANSLATIONBLOCK
TC BLOCK: 84440122 SCID$DRS_INVALID_BATTERY_BRICK_STATE
TRANSLATIONBLOCK
TRANSLATE("Previous number of installed battery assemblies: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Current number of installed battery assemblies: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
ENDTRANSLATIONBLOCK
TC BLOCK: 84450120 SCID$DRS_PIC_PROCESS_RETURN
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 84460120 SCID$DRS_BATTERY_PROCESS_RETURN
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 84470120 SCID$DRS_BATTERY_REPROGRAM_FAILURE
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 84480020 SCID$DRS_PIC_REPROGRAM_RESTART
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 84490020 SCID$DRS_INVALID_HOLDUP_TIME
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 844a0120 SCID$DRS_UPS_PROCESS_RETURN
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 844b0121 SCID$DRS_UPS_INVALID_STATE
TRANSLATIONBLOCK
TRANSLATE("Current state machine value: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
ENDTRANSLATIONBLOCK
TC BLOCK: 844c0120 SCID$DRS_BATT_TIMER_PROCESS_RETURN
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 84600120 SCID$DRS_BLOWER_PROCESS_RETURN
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 84800101 SCID$DRS_LCD_COM_DOWN
TRANSLATIONBLOCK
TRANSLATE("IIC status: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
ENDTRANSLATIONBLOCK
TC BLOCK: 84810100 SCID$DRS_LCD_LOGIC_ERROR
TRANSLATIONBLOCK
ENDTRANSLATIONBLOCK
TC BLOCK: 84820102 SCID$DRS_LCD_FUNCTION_CALL_ERR
TRANSLATIONBLOCK
TRANSLATE("Function status: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[0]);
TRANSLATE("Pointer to function call: 0x%08x",
teb.u.data.ltei.lter.termination_event.params.param[1]);
ENDTRANSLATIONBLOCK
DEFINITIONS:
%[scmi_nsc_battery_use_condition]
0 = Not in use
1 = In use
%[scmi_nsc_shutdown_encl_poweroff_option]
0 = Remain in the power on state
1 = Powered off
%[scmi_read_disk_cache_policy_type]
1 = Read cache on
2 = Read cache off
%[scmi_nsc_shutdown_poweroff_option]
0 = Remain in the power on state
1 = Power itself off
%[scmi_client_mode]
0 = Unknown
1 = User defined
2 = *** 2 not used ***
3 = WINNT with SecurePath
4 = VMS
5 = TRU64 UNIX
6 = Sun UNIX
7 = NetWare
8 = HP
9 = IBM
10 = LINUX
11 = SCO UNIX
%[scmi_nsc_condition]
1 = Normal
2 = *** 2 not used ***
3 = Failed
%[scmi_volume_usage]
1 = Disk Group
2 = Reserved
3 = *** 3 no longer used ***
4 = Temporarily reserved for drive code load
5 = Temporarily reserved for drive code load
6 = Temporarily reserved for drive code load
7 = Temporarily reserved for drive code load
8 = Temporarily reserved for drive code load
9 = Temporarily reserved for drive code load
10 = Temporarily reserved for drive code load
11 = Temporarily reserved for drive code load
12 = Temporarily reserved for drive code load
13 = Temporarily reserved for drive code load
14 = Temporarily reserved for drive code load
15 = Temporarily reserved for drive code load
16 = Temporarily reserved for drive code load
17 = Temporarily reserved for drive code load
18 = Temporarily reserved for drive code load
19 = Temporarily reserved for drive code load
20 = Temporarily reserved for drive code load
%[scmi_nsc_shutdown_other_option]
0 = Remain operational
1 = Coupled shutdown
%[scmi_volume_resource_availability_condition]
0 = Sufficient resources available
1 = Insufficient resources available
%[scmi_shutdown]
1 = Success
2 = Failure
3 = Not Applicable
%[scmi_scvd_quiescent_condition]
0 = Not quiescent
1 = Quiescent
%[scmi_ldad_condition]
1 = Normal
2 = Disk Group with no redundancy is inoperative
3 = Disk Group with parity redundancy is inoperative
4 = Disk Group with mirrored redundancy is inoperative
5 = Disk Group with no redundancy is inoperative, marked for re-use
6 = Disk Group with parity redundancy is inoperative, marked for re-use
7 = Disk Group with mirrored redundancy is inoperative, marked for re-use
%[scmi_object_function_code]
1001 = Derived Unit Create
1002 = Derived Unit Discard
1003 = Derived Unit Get Device Identifier
1004 = Derived Unit Get Presented Units
1005 = Derived Unit Get Presented Units Count
1006 = Derived Unit Get Storage System Virtual Disk
1007 = Derived Unit Is Write Protected
1008 = Derived Unit Set Write Protected
1009 = Derived Unit Get Settable Id
1010 = Derived Unit Set Settable Id
1011 = *** 1011 no longer used ***
2001 = Logical Disk Clear Data Lost
2002 = *** 2002 not used ***
2003 = *** 2003 not used ***
2004 = Logical Disk Create
2005 = Logical Disk Discard
2006 = Logical Disk Get Allocated Capacity
2007 = Logical Disk Get Allocated Storage
2008 = Logical Disk Get Condition
2009 = Logical Disk Get Default SCM EP Id
2010 = Logical Disk Get Disk Group
2011 = Logical Disk Get Master Controller
2012 = *** 2012 not used ***
2013 = Logical Disk Get Redundancy
2014 = Logical Disk Get Reserved Capacity
2015 = Logical Disk Is Data Lost
2016 = Logical Disk Offline
2017 = Logical Disk Online
2018 = *** 2018 not used ***
2019 = *** 2019 not used ***
2020 = *** 2020 not used ***
2021 = *** 2021 not used ***
2022 = Logical Disk Set Reserved Capacity
2023 = Logical Disk Verify
2024 = *** 2024 not used ***
2025 = *** 2025 no longer used ***
2026 = *** 2026 no longer used ***
2027 = Logical Disk Get Successor Logical Disk
2028 = Logical Disk Snapclone
2029 = Logical Disk Snapshot
2030 = Logical Disk Get Predecessor Logical Disk
2031 = Logical Disk Get Preferred Controller
2032 = Logical Disk Set Preferred Controller
2033 = Logical Disk Get Logical Disk Type
2034 = Logical Disk Get LUN WWID
2035 = Logical Disk Set LUN WWID
3001 = Disk Group Create
3002 = Disk Group Discard
3003 = Disk Group Get Capacity
3004 = Disk Group Get Max Logical Disk Size
3005 = Disk Group Get Occupancy
3006 = Disk Group Get Occupancy Highwater
3007 = Disk Group Get Volumes
3008 = Disk Group Get Volumes Count
3009 = Disk Group Set Occupancy Highwater
3010 = Disk Group Get Management Logical Disk Size
3011 = Disk Group Read Management Logical Disk
3012 = Disk Group Write Management Logical Disk
3013 = Disk Group Get Spares Current
3014 = Disk Group Get Spares Goal
3015 = Disk Group Set Spares Goal
3016 = Disk Group Get Condition
3017 = Disk Group Resolve Condition
3018 = Disk Group Locate
3019 = Disk Group Create New
3020 = Disk Group Add Volumes
3021 = Disk Group Write Management Logical Disk Blocks
3022 = Disk Group Get Leveling Info
3023 = Disk Group Get SRC
3024 = Disk Group Locate RSS
3025 = Disk Group Get Volumes Info
3026 = Not used in scorpion
3027 = Disk Group Get LDAD info
3028 = Disk Group Get drive type
4001 = Controller Crash
4002 = Controller Generate Id
4003 = *** 4003 no longer used ***
4004 = *** 4004 no longer used ***
4005 = Controller Get Cache Capacity
4006 = Controller Get Cache Condition
4007 = Controller Get Condition
4008 = Controller Get Default SCM EP Id
4009 = Controller Get Fibre Channel Context Id
4010 = Controller Get Firmware Version
4011 = *** 4011 no longer used ***
4012 = Controller Get Identity
4013 = *** 4013 no longer used ***
4014 = *** 4014 no longer used ***
4015 = *** 4015 no longer used ***
4016 = Controller Get Loop Port Node Id
4017 = Controller Get Loop Port Node Type
4018 = Controller Get Loop Port Position
4019 = *** 4019 no longer used ***
4020 = *** 4020 no longer used ***
4021 = *** 4021 no longer used ***
4022 = *** 4022 no longer used ***
4023 = Controller Get Controllers
4024 = Controller Get Controllers Count
4025 = Controller Get Participation
4026 = Controller Get Storage System
4027 = Controller Get Supported Class Versions
4028 = Controller Maintenance Invoke Routine
4029 = Controller Maintenance Read Memory
4030 = Controller Read Dump
4031 = Controller Read ILF Log
4032 = Controller Set Default SCM EP Id
4033 = Controller Set ILF Log Mask
4034 = Controller Set Participation
4035 = Controller Shutdown
4036 = Controller Get Physical Stores
4037 = Controller Get Physical Stores Count
4038 = *** 4038 no longer used ***
4039 = Controller Get Unassigned Host Ports
4040 = Controller Get Unassigned Host Ports Count
4041 = Controller Get Enclosure Status
4042 = Controller Set Enclosure Fan High Speed Mode
4043 = Controller Set Enclosure Temp Trip Point
4044 = Controller Get Hardware Info
4045 = Controller Get Fibre Channel Node Id
4046 = Controller Get Fibre Channel Port Address
4047 = Controller Get Fibre Channel Port Condition
4048 = Controller Get Fibre Channel Port Id
4049 = Controller Get Fibre Channel Port Type
4050 = Controller Get ILF Component Mask
4051 = Controller Get ILF Component Class Mask
4052 = Controller Get ILF Disk Slot
4053 = Controller Set ILF Component Mask
4054 = Controller Set ILF Component Class Mask
4055 = Controller Set ILF Disk Slot
4056 = Controller Get Battery System Capacity
4057 = Controller Get Battery System Condition
4058 = Controller Get Battery Hardware Status
4059 = Controller Get UPS Condition
4060 = Controller Login
4061 = Controller Logout
4062 = Controller Save Firmware
4063 = Controller Use Firmware
4064 = Controller Locate
4065 = Controller Login Step1
4066 = Controller Login Step2
4067 = Controller Get Disk Enclosures
4068 = Controller Get Disk Enclosures Count
4069 = Controller Get Disk Enclosures Status
4070 = Controller Get Disk Enclosure Page
4071 = Controller Locate Disk Enclosure
4072 = Controller Set Disk Enclosure Audible Alarm
4073 = Controller Get Host Port Info
4074 = Controller Get Drive Code Load Info
4075 = Controller Get Loop Port Node Info
4076 = Controller Get Fibre Channel Port Info
4077 = Controller Get Physical Stores Info
4078 = Controller Read Termination Events
4079 = Controller Read Events Activeq
4080 = Controller Open Events Activeq
4081 = Controller Close Events Activeq
4082 = Controller Get Crash Dump Info
4083 = Controller Open Crash Dump
4084 = Controller Read Crash Dump
4085 = Controller Close Crash Dump
4086 = Controller Open ILF Memory
4087 = Controller Read ILF Memory
4088 = Controller Close ILF Memory
4089 = Controller Enable Loop Port
4090 = Controller Get Loop Port Node Error
4091 = Controller Clear Loop Port Node Error
4092 = Controller Start DILX
4093 = Controller Stop DILX
4094 = Controller Get DILX Summary
4095 = Controller Get ncs info
4096 = Controller Get memory size
5001 = *** 5001 not used ***
5002 = *** 5002 not used ***
5003 = *** 5003 not used ***
5004 = *** 5004 not used ***
6001 = Physical Store Clear Failed
6002 = Physical Store Erase Volume
6003 = Physical Store Get Capacity
6004 = Physical Store Get Condition
6005 = Physical Store Get LUN
6006 = Physical Store Get Maintenance Mode
6007 = Physical Store Get Physical Device
6008 = Physical Store Get Volume
6009 = Physical Store Is Failed
6010 = Physical Store Is Failure Predicted
6011 = Physical Store Is Media Inaccessible
6012 = Physical Store Read Inquiry Strings
6013 = *** 6013 no longer used ***
6014 = Physical Store Read Volume Is Quorum Disk
6015 = Physical Store Read Volume Disk Group Id
6016 = Physical Store Read Volume Storage System Id
6017 = Physical Store Read Volume Storage System Name
6018 = Physical Store Send Command
6019 = Physical Store Set Maintenance Mode
6020 = Physical Store Read Node Id
6021 = Physical Store Locate
6022 = Physical Store Get drive type
6023 = Physical Store Get download condition
7001 = Presented Unit Create
7002 = Presented Unit Discard
7003 = Presented Unit Get Derived Unit
7004 = Presented Unit Get LUN
7005 = Presented Unit Get Storage System Client
7006 = Presented Unit Set LUN
7007 = *** 7007 no longer used ***
7008 = *** 7008 no longer used ***
7009 = Presented Unit Get Reservation Type
8001 = Storage System Create
8002 = Storage System Discard
8003 = Storage System Get Context Id
8004 = *** 8004 no longer used ***
8005 = Storage System Get Device Addition Policy
8006 = *** 8006 not used ***
8007 = Storage System Get Events
8008 = *** 8008 no longer used ***
8009 = *** 8009 no longer used ***
8010 = Storage System Get Master Controller
8011 = *** 8011 no longer used ***
8012 = Storage System Get Name
8013 = *** 8013 no longer used ***
8014 = *** 8014 no longer used ***
8015 = Storage System Get Supported Class Versions
8016 = Storage System Get Time
8017 = Storage System Get Volume Replacement Delay
8018 = Storage System Lookup Object
8019 = Storage System Lookup Object Count
8020 = Storage System Prepare Create
8021 = *** 8021 no longer used ***
8022 = Storage System Set Device Addition Policy
8023 = *** 8023 no longer used ***
8024 = Storage System Set Name
8025 = *** 8025 no longer used ***
8026 = Storage System Set Time
8027 = Storage System Set Volume Replacement Delay
8028 = Storage System Translate Id To Handle
8029 = *** 8029 no longer used ***
8030 = Storage System Free Command Lock
8031 = Storage System Get Command Lock Description
8032 = Storage System Get Command Lock Status
8033 = Storage System Set Default Lock Timeout
8034 = Storage System Set Override Lock Timeout
8035 = Storage System Take Command Lock
8036 = Storage System Get SACD Settable Id
8037 = Storage System Set SACD Settable Id
8038 = Storage System Read Controller Termination Events
8039 = Storage System Sync Reset
8040 = *** 8040 not used ***
8041 = Storage System Get Ups Mode
8042 = Storage System Set Ups Mode
8043 = Storage System Resolve Condition
8044 = Storage System Get Connection Status
8045 = Storage System Get Performance Geometry
8046 = Storage System Get Performance Data
8047 = Storage System Create New
8048 = Storage System Get Logical Disks Info
8049 =
8050 = Storage System Get Vdisk Info
9001 = *** 9001 no longer used ***
9002 = Storage System Client Create
9003 = Storage System Client Discard
9004 = Storage System Client Get Client Connections
9005 = Storage System Client Get Client Connections Count
9006 = *** 9006 no longer used ***
9007 = *** 9007 no longer used ***
9008 = *** 9008 no longer used ***
9009 = Storage System Client Add Port WWN
9010 = Storage System Client Get Port WWNs
9011 = Storage System Client Get Port WWNs Count
9012 = Storage System Client Remove Port WWN
9013 = Storage System Client Get Client Mode
9014 = Storage System Client Set Client Mode
9015 = Storage System Client Get Client Mode New
9016 = Storage System Client Set Client Mode New
10001 = Storage System Virtual Disk Create
10002 = Storage System Virtual Disk Disable
10003 = Storage System Virtual Disk Discard
10004 = Storage System Virtual Disk Enable
10005 = *** 10005 no longer used ***
10006 = Storage System Virtual Disk Get Capacity
10007 = Storage System Virtual Disk Get Derived Units
10008 = Storage System Virtual Disk Get Derived Units Count
10009 = Storage System Virtual Disk Get Logical Disk
10010 = Storage System Virtual Disk Get State
10011 = Storage System Virtual Disk Is Quiesced
10012 = *** 10012 no longer used ***
10013 = Storage System Virtual Disk Set Capacity
10014 = Storage System Virtual Disk Set Logical Disk
10015 = Storage System Virtual Disk Set Quiesced
10016 = Storage System Virtual Disk Get DRM Copy State
10017 = Storage System Virtual Disk Get Group Handle
10018 = Storage System Virtual Disk Is Log Unit
10019 = Storage System Virtual Disk Set Group
10020 = Storage System Virtual Disk Set Group None
10021 = Storage System Virtual Disk Get Disk Cache Policy
10022 = Storage System Virtual Disk Set Disk Cache Policy
10023 = Storage System Virtual Disk Get Remote Storage System Virtual Disk Count
10024 = Storage System Virtual Disk Get Remote Storage System Virtual Disks
11001 = Volume Clear Failure Predicted
11002 = Volume Create
11003 = Volume Data Security Erase
11004 = Volume Fail Missing Blocks
11005 = Volume Get Capacity
11006 = Volume Get Condition
11007 = Volume Get Disk Group
11008 = Volume Get Occupancy
11009 = Volume Get Physical Store
11010 = Volume Get Requested Usage
11011 = Volume Get Usage
11012 = Volume Is Failure Predicted
11013 = Volume Is Insufficient Resources
11014 = Volume Is Quorum Disk
11015 = Volume Set Requested Usage
11016 = Volume Get RSS Info
12001 = Group Create
12002 = Group Discard
12003 = Group Get DRM Log State
12004 = Group Get Failsafe
12005 = Group Get Failsafe Locked
12006 = Group Get Log Storage System Virtual Disk Handle
12007 = Group Get Member Count
12008 = Group Get Members
12009 = Group Get Mode
12010 = Group Get Operation
12011 = Group Get Remote Storage System Count
12012 = Group Get Remote Storage Systems
12013 = Group Get Suspend
12014 = Group Set Site Failover
12015 = Group Set Mode
12016 = Group Set Failsafe
12017 = Group Set Operation
12018 = Group Set Suspend
12019 = Group Get Generation
12020 = Group Get Group Name
12021 = Group Get Read Only
12022 = Group Set Read Only
12023 = *** 12023 not used ***
12024 = *** 12024 not used ***
12025 = Group Get Comment
12026 = Group Get User Name
12027 = Group Set Comment
12028 = Group Set User Name
12029 = Group Get Capacity For Logging
12030 = Group Get Member Condition
%[scmi_state]
1 = Disabled
2 = Enabled
%[scmi_group_operation_type]
1 = Synchronous
2 = Asynchronous
%[scmi_logical_disk_data_availability_condition]
0 = Data available
1 = Data lost
%[scmi_storagecell_device_addition_policy]
1 = Manual (Extrinsic)
2 = Automatic (Intrinsic)
%[scmi_physical_store_condition]
1 = Normal
2 = Degraded
3 = Failed
4 = Not present
5 = Single port on Fibre
%[scmi_nsc_shutdown_battass_failure_mode]
0 = No failure indicated.
1 = Failed only on this controller
2 = Failed only on the other controller of the pair.
3 = Failed on both controllers.
%[scmi_response_status_value]
0 = Success
1 = Already Exists
2 = Buffer Too Small
3 = Id Already Assigned
4 = Insufficient Data Storage Available
5 = Internal Error
6 = Invalid Storage System State Logical Disk
7 = Invalid Class
8 = Invalid Function
9 = Invalid Logical Disk Block State
10 = Invalid Loop Configuration
11 = Invalid Parameter
12 = Invalid Parameter Handle
13 = Invalid Parameter Id
14 = Invalid Quorum Configuration
15 = Invalid Target Handle
16 = Invalid Target Id
17 = Invalid Time
18 = Media Inaccessible
19 = No Fibre Channel Port
20 = No Image
21 = No Permission
22 = No Storage System
23 = Not Loop Port
24 = Not Participating
25 = Object In Use
26 = Parameter Object Does Not Exist
27 = Target Object Does Not Exist
28 = Timeout
29 = Unknown Id
30 = Unknown Parameter Handle
31 = Unrecoverable Media Error
32 = Invalid State
33 = Transport Error
34 = Volume Missing
35 = Invalid Cursor
36 = Invalid Target Logical Disk
37 = No More Events
38 = Lock Busy
39 = Time Not Set
40 = Not Supported Version
41 = No Logical Disk For Storage System Virtual Disk
42 = Logical Disk Presented
43 = Denied On Slave
44 = Not DRM Licensed
45 = Not DRM Member
46 = Invalid DRM Mode
47 = Is Copying
48 = Login Needed
49 = Login Failed
50 = Already Logged In
51 = Storage System Connection Down
52 = Group Empty
53 = Incompatible Attribute
54 = Is DRM Member
55 = Is Log Unit
56 = Not Online
57 = Not Presented
58 = Other Controller Failed
59 = Maximum Objects
60 = Maximum Size
61 = Password Mismatch
62 = Is Merging
63 = Is Logging
64 = Is Suspended
65 = Bad Image Header
66 = Bad Image
67 = Image Too Large
68 = EMU Not Available
69 = EMU Indefinite Delay
70 = Image Incompatible
71 = Bad Image Segment
72 = Image Already Loaded
73 = Image Write Error
74 = Logical Disk Sharing
75 = Bad Image Size
76 = Image Load Busy
77 = Volume Failure Predicted
78 = Invalid Object Condition
79 = Invalid Pred Logical Disk Condition
80 = Invalid Volume Usage
81 = Minimum Volumes In Disk Group
82 = Shutdown In Progress
83 = Not Ready
84 = Is Snapshot
85 = Incompatible Mirror Policy
86 = Inoperative
87 = Disk Group Inoperative
88 = Storage System Inoperative
89 = Failsafe Locked
90 = Data Flush Incomplete
91 = Redundancy Mirrored Inoperative
92 = Duplicate LUN
93 = Other Remote Controller Failed
94 = Unknown Remote Unit
95 = Unknown Remote Group
96 = PLDMC Failed
97 = Storage System Management Interface Lock Failed
98 = Remote SCS Error
99 = Storage System Connection Up
100 = Login Needed Pwd Changed
101 = Maximum Logins
102 = Invalid Cookie
103 = Login Timedout
104 = Maximum Snapshot Depth
105 = Attribute Mismatch
106 = Password Not Set
107 = Not Host Port
108 = Duplicate LUN WWID
109 = System Inoperative
110 = Snapclone Active
111 = EMU Load Busy
112 = Duplicate User Name
113 = Drive Reserved For Code Load
114 = Already Presented
115 = Invalid Remote Storage System
116 = No Storage System Management Interface Lock
117 = Maximum Members
118 = Maximum Destinations
119 = Empty User Name
120 = Storage System Exists
121 = Already Open
122 = Session Not Open
123 = Not Marked Inoperative
124 = Media Not Available
125 = Battery System Failed
126 = Member Is Cache Data Lost
127 = Internal Lock Collision
128 = OCP error
129 = Mirror temporarily offline
130 = Failsafe Mode enabled
131 = Drive FW load abort due to Vraid0 Vdisk
132 = FC Ports Unavailable
133 = Only two remote relations are allowed
134 = The requested SRC mode is not possible
135 = Src group discarded, but dest group NOT discarded
136 = Invalid DRM Group Tunnel specified
137 = Specified DRM Log size is too small
138 = Invalid DRM Log LDAD specified
139 = DRM Group is already read-only
140 = DRM Group is already active-active
141 = DILX is already running
142 = DILX is not running
143 = invalid user defined log size
144 = Invalid second handle parameter passed to scmi
145 = DRM Group already Auto Suspended.
146 = Specified option is not implemented yet
147 = DRM Group is already present_only
148 = The PU NOID is invalid
149 = SCS Internal Error
150 = Invalid SCS Function Code
151 = Unsupported SCS Function Code
152 = Init PS Failed
153 = Target BAD NOID
154 = PStore Is Volume
155 = Bad Volume Usage
156 = Bad LDAD_Usage
157 = No LDAD Handle
158 = Bad Quorum Flag
159 = SCS U_T_TAG Invalid
160 = SCS U_T_TAG Bad UUID
161 = Too Many PS Tags
162 = Bad Routine
163 = No Tag for NOID
164 = Bad Loop Num
165 = Too Many Port WWNS
166 = Port WWN Not Found
167 = No DU For PU
168 = No SCCL For PU
169 = Unsupported
170 = SCS Operation Failed
171 = Has Members
172 = Incompatible Preferred Mask
173 = Too Few Vol Tag
174 = ILF Debug Flag Not Set
175 = Invalid POID
176 = Too Few Drives
177 = Too Few PS Tags
178 = Unexpected SCS Error
179 = Unsupported Capacity
180 = One/both controllers do not have the required 512MB of memory.
181 = Insuffcient drives of required type to create LDAD
182 = LDAD contains mixed drive types.
183 = Operaiton already in on state
184 = Operation already in off state
185 = CS$LD_GET_VDISK_INFO failed.
201 = No path was found to DR destination
205 = 0xCD Is not in syncronous mode
215 = 0xD7 Recontructing or reverting is in progress in LDAD.
216 = 0xD8 Not enough quorum disks for redundancy to do drive codeload.
217 = 0xD9 The requested operation has already been done.
218 = 0xDA A drive is in maintenance mode.
%[scmi_group_drm_ld_state]
1 = Operative
2 = Inoperative
%[scmi_nsc_fan_present_condition]
0 = Not present
1 = Present
%[scmi_volume_condition]
1 = Normal - Volume is present and operating normally
2 = Migrating - Data from this volume is being moved to other storage in this Disk Group
3 = Missing - Volume is inaccessible
4 = Reconstructing - Volume is inaccessible; redundant data is being regenerated and moved to other storage in this Disk Group
5 = Completing - This previously inaccessible volume has become accessible; data migration is being completed
6 = Reverting - This previously inaccessible volume has become accessible; data is being regenerated
7 = Failed - Volume is not being used in the Disk Group; disk errors are preventing normal usage
%[scmi_nsc_battery_present_condition]
0 = Not present
1 = Present
%[scmi_du_write_protect_condition]
0 = Write protect off
1 = Write protect on
%[scmi_nsc_fc_port_condition]
1 = Normal
2 = Failed
%[scmi_nsc_shutdown_battass_option]
0 = Enabled
1 = Disabled
%[scmi_group_drm_mode]
0 = Normal Active Source
1 = Normal Active Destination
2 = Active/Active (Master)
3 = Active/Active (Slave)
%[scmi_logical_disk_condition]
1 = Normal
2 = Replacement delay in progress
3 = Redundancy lost, restore in progress
4 = Redundancy lost, restore stalled
5 = Failed
6 = Creation in progress
7 = Snapshot is inoperative due to lack of snapshot space
8 = Deletion in progress
9 = Capacity change in progress
10 = Inoperative due to data lost
11 = Capacity reservation in progress
12 = Capacity unreservation in progress
13 = Snap deletion in progress
%[scmi_write_disk_cache_policy_type]
1 = Writethrough
2 = Writeback
%[scmi_logical_disk_redundancy_type]
1 = Vraid0
2 = Vraid1
3 = Vraid5
%[scmi_group_readonly_type]
0 = Data Replication Destination Storage System Virtual Disk disabled for read access.
1 = Data Replication Destination Storage System Virtual Disk enabled for read access.
%[scmi_group_suspend_state]
1 = Connection between the Data Replication Source and Data Replication Destination is active.
2 = Connection between the Data Replication Source and Data Replication Destination is inactive.
%[scmi_mirror_disk_cache_policy_type]
1 = Mirror
2 = No mirror
%[scmi_nsc_battery_system_condition]
1 = Battery System Hold-up Time is greater than 96 hours
2 = *** 2 not used ***
3 = Battery System Hold-up Time is greater than 0 and less than 96 hours
4 = *** 4 not used ***
5 = Battery System Hold-up Time is zero hours
%[scmi_nsc_restart_option]
0 = None -- no restart
1 = Regular -- full restart, host system connectivity is lost until the controller returns to normal operation
2 = Fast -- resynchronization, restart of the controller in a manner that has little or no impact on host system connectivity
%[scmi_volume_quorum_disk_condition]
0 = Not quorum disk
1 = Quorum disk
%[scmi_nsc_fanps_present_condition]
0 = Not present
1 = Present
%[fcs_fail]
1 = Excessive exchange timeouts on loop
2 = Excessive link errors on loop
3 = Exhausted Link Down retries on loop with signal
4 = Exhausted Link Down retries on loop with loss of signal
5 = Excessive link inits on loop without completing device
%[scsi_asc_ascq]
0x0000 = No additional sense information
0x0001 = No index/sector signal
0x0002 = No seek complete
0x0003 = Peripheral device write fault
0x0004 = Logical unit not ready, cause not reportable
0x0006 = No reference position found
0x0007 = Multiple peripheral devices selected
0x0008 = Logical unit communication failure
0x0009 = Track following error
0x000A = Error log overflow
0x000C = Write error
0x0010 = Id crc or ecc error
0x0011 = Unrecovered read error
0x0012 = Address mark not found for id field
0x0013 = Address mark not found for data field
0x0014 = Recorded entity not found
0x0015 = Random positioning error
0x0016 = Data synchronization mark error
0x0017 = Recovered data with no error correction applied
0x0018 = Recovered data with error correction applied
0x0019 = Defect list error
0x001A = Parameter list length error
0x001B = Synchronous data transfer error
0x001C = Defect list not found
0x001D = Miscompare during verify operation
0x001E = Recovered id with ecc correction
0x001F = Read Defect command allocated space overflow
0x0020 = Invalid command operation code
0x0021 = Logical block address out of range
0x0022 = Illegal function
0x0024 = Invalid field in cdb
0x0025 = Logical unit not supported
0x0026 = Invalid field in parameter list
0x0027 = Write protected
0x0028 = Not ready to ready transition, medium may have changed
0x0029 = Power on, reset, or bus device reset occurred
0x002A = Parameters changed
0x002B = Copy cannot execute since host cannot disconnect
0x002C = Command sequence error
0x002D = Overwrite error on update in place
0x002F = Commands cleared by another initiator
0x0030 = Incompatible medium installed
0x0031 = Medium format corrupted
0x0032 = No defect spare location available
0x0033 = Tape length error
0x0035 = Unspecified enclosure services failure
0x0036 = Ribbon, ink, or toner failure
0x0037 = Rounded parameter
0x0039 = Saving parameters not supported
0x003A = Medium not present
0x003B = Sequential positioning error
0x003D = Invalid bits in identify message
0x003E = Logical unit has not self-configured yet
0x003F = Target operating conditions have changed
0x0040 = Ram failure
0x0041 = Data path failure
0x0042 = Power-on or self-test failure
0x0043 = Message error
0x0044 = Internal target failure
0x0045 = Select or reselect failure
0x0046 = Unsuccessful soft reset
0x0047 = SCSI parity error
0x0048 = Initiator detected error message received
0x0049 = Invalid message error
0x004A = Command phase error
0x004B = Data phase error
0x004C = Logical unit failed self-configuration
0x004E = Overlapped commands attempted
0x0050 = Write append error
0x0051 = Erase failure
0x0052 = Cartridge fault
0x0053 = Media load or eject failed
0x0054 = SCSI to host system interface failure
0x0055 = System resource failure
0x0057 = Unable to recover table-of-contents
0x0058 = Generation does not exist
0x0059 = Updated block read
0x005A = Operator request or state change input
0x005B = Log exception
0x005C = Rpl status change
0x005D = Failure prediction threshold exceeded
0x0060 = Lamp failure
0x0061 = Video acquisition error
0x0062 = Scan head positioning error
0x0063 = End of user area encountered on this track
0x0064 = Illegal mode for this track
0x0065 = Voltage fault
0x0080 = Vendor specific. ASC codes
0x0081 = Reassign power fail recovery failed
0x0100 = Filemark detected
0x0103 = No write current
0x0104 = Logical unit is in process of becoming ready
0x0108 = Logical unit communication time-out
0x0109 = Tracking servo failure
0x010B = Temperature exceeded
0x010C = Recovered data - data auto-reallocated
0x010C = Write error - recovered with auto reallocation
0x0111 = Read retries exhausted
0x0114 = Record not found
0x0115 = Mechanical positioning error
0x0117 = Recovered data with retries
0x0118 = Recovered data with error correction & retries applied
0x0119 = Defect list not available
0x011C = Primary defect list not found
0x0121 = Invalid element address
0x0126 = Parameter not supported
0x0128 = Import or export element accessed
0x0129 = Power on occurred
0x012A = Mode parameters changed
0x012C = Too many windows specified
0x0130 = Cannot read medium - unknown format
0x0131 = Format command failed
0x0132 = Defect list update failure
0x0135 = Unsupported enclosure function
0x013B = Tape position error at beginning-of-medium
0x013F = Microcode has been changed
0x0140 = DRAM parity error
0x0150 = Write append position error
0x0153 = Unload tape failure
0x0155 = XOR cache not available
0x015A = Operator medium removal request
0x015B = Threshold condition met
0x015C = Spindles synchronized
0x0161 = Unable to acquire video
0x0200 = End-of-partition/medium detected
0x0203 = Excessive write errors
0x0204 = Logical unit not ready, initializing command required
0x0208 = Logical unit communication parity error
0x0209 = Focus servo failure
0x020C = Write error - auto reallocation failed
0x0211 = Error too long to correct
0x0214 = Filemark or setmark not found
0x0215 = Positioning error detected by read of medium
0x0217 = Recovered data with positive head offset
0x0218 = Recovered data - data auto-reallocated
0x0219 = Defect list error in primary list
0x021C = Grown defect list not found
0x0226 = Parameter value invalid
0x0229 = SCSI bus reset occurred
0x022A = Log parameters changed
0x022C = Invalid combination of windows specified
0x0230 = Cannot read medium - incompatible format
0x0235 = Enclosure services unavailable
0x023B = Tape position error at end-of-medium
0x023F = Changed operating definition
0x0240 = DRAM parity error
0x0250 = Position error related to timing
0x0253 = Medium removal prevented
0x025A = Operator selected write protect
0x025B = Log counter at maximum
0x025C = Spindles not synchronized
0x0261 = Out of focus
0x0300 = Setmark detected
0x0304 = Logical unit not ready, manual intervention required
0x0309 = Spindle servo failure
0x030C = Write error - recommend reassignment
0x0311 = Multiple read errors
0x0314 = End-of-data not found
0x0315 = End of user area encountered on this track
0x0317 = Recovered data with negative head offset
0x0318 = Recovered data with circ
0x0319 = Defect list error in grown list
0x0326 = Threshold parameters not supported
0x0329 = Bus device reset occurred
0x032A = Reservations Preempted
0x0330 = Cleaning cartridge installed
0x0335 = Enclosure transfer failure
0x033B = Tape or electronic vertical forms unit not ready
0x033F = Inquiry data has changed
0x035A = Operator selected write permit
0x035B = Log list codes exhausted
0x0400 = Beginning-of-partition/medium detected
0x0404 = Logical unit not ready, format in progress
0x0409 = Head Select Fault
0x0411 = Unrecovered read error - auto reallocate failed
0x0414 = Block sequence error
0x0417 = Recovered data with retries and/or circ applied
0x0418 = Recovered data with lec
0x0426 = Invalid release of persistent reservation
0x0429 = Internal reset
0x042A = Reservations Released
0x0435 = Enclosure transfer refused
0x043B = Slew failure
0x045D = exceeded -- disk reassign DST table
0x0500 = End-of-data detected
0x0511 = L-ec uncorrectable error
0x0517 = Recovered data using previous sector id
0x0518 = Recovered data - recommend reassignment
0x052A = Registrations preempted
0x053B = Paper jam
0x053F = Device identifier changed
0x053f = Device identifier has changed
0x055D = exceeded -- disk reassign AST table
0x0600 = I/O process terminated
0x0611 = Circ unrecovered error
0x0617 = Recovered data without ecc - data auto-reallocated
0x0618 = Recovered data - recommend rewrite
0x063B = Failed to sense top-of-form
0x065D = exceeded -- disk reassign DDT table
0x0711 = Data resynchronization error
0x0717 = Recovered data without ecc - recommend reassignment
0x0718 = Recovered data - data rewritten
0x073B = Failed to sense bottom-of-form
0x0811 = Incomplete block read
0x0817 = Recovered data without ecc - recommend rewrite
0x083B = Reposition error
0x0911 = No gap found
0x093B = Read past end of medium
0x0A11 = Miscorrected error
0x0A3B = Read past beginning of medium
0x0B11 = Unrecovered read error - recommend reassignment
0x0B3B = Position past end of medium
0x0C11 = Unrecovered read error - recommend rewrite the data
0x0C3B = Position past beginning of medium
0x0D3B = Medium destination element full
0x0E19 = Defect list error -- fewer than 50% defect list copies
0x0E3B = Medium source element empty
0x1100 = Audio play operation in progress
0x1200 = Audio play operation paused
0x1300 = Audio play operation successfully completed
0x1400 = Audio play operation stopped due to error
0x1500 = No current audio status to return
0x315D = Failure prediction threshold exceeded -- head failure
0x325D = Failure prediction threshold exceeded -- recovered data error rate
0x375D = Failure prediction threshold exceeded -- recovered TA
0x385D = Failure prediction threshold exceeded -- hard TA event
0x415D = Failure prediction threshold exceeded -- SSE DPF smoothing
0x435D = Failure prediction threshold exceeded -- seek DPF smoothing
0x455D = Failure prediction threshold exceeded -- track following errors
0x5B5D = Failure prediction threshold exceeded -- spinup DFP smoothing
0x803F = Read after write buffer contents changed
0x8047 = Fibre Channel Sequence Error -- frame not received by E_D_TOV
0x8080 = FC FIFO error during read transfer
0x8180 = FC FIFO error during write transfer
0x8280 = DISC FIFO error during read transfer
0x8380 = DISC FIFO error during write transfer
0x8480 = LBA seeded LRC error on read
0x8580 = LBA seeded LRC error on write
0x8603 = Write error - recommend reassignment
0x8680 = IOEDC error on read
0x8780 = IOEDC error on write
0x903F = Invalid CAP block -- servo Flash SAP HDA serial number does not match the ETF SAP HDA serial number
0x9131 = Format corrupted World Wide Name invalid
0x913F = World Wide Name mismatch
0x9726 = Invalid field parameter -- TMS firmware tag
0x9826 = Invalid field parameter -- check sum
0x9926 = Invalid field parameter -- firmware tag
0xEE5D = Failure prediction threshold exceeded -- no control table on disk
0xFF5D = False failure prediction threshold exceeded
%[scsi_sensekey]
0x0 = NO SENSE
0x1 = RECOVERED ERROR
0x2 = NOT READY
0x3 = MEDIUM ERROR
0x4 = HARDWARE ERROR
0x5 = ILLEGAL REQUEST
0x6 = UNIT ATTENTION
0x7 = DATA PROTECT
0x8 = BLANK CHECK
0x9 = Vendor Specific
0xA = COPY ABORTED
0xB = ABORTED COMMAND
0xC = EQUAL
0xD = VOLUME OVERFLOW
0xE = MISCOMPARE
0xF = RESERVED
%[scsi_cmds]
0x00 = TEST UNIT READY
0x01 = REZERO UNIT
0x03 = REQUEST SENSE
0x04 = FORMAT UNIT
0x07 = REASSIGN BLOCKS
0x08 = READ (6 byte)
0x0A = WRITE (6 byte)
0x0B = SEEK (6 byte)
0x12 = INQUIRY
0x14 = RECOVER BUFFERED DATA
0x15 = MODE SELECT (6 byte)
0x16 = RESERVE UNIT
0x17 = RELEASE UNIT
0x18 = COPY
0x1A = MODE SENSE (6 byte)
0x1B = START STOP UNIT
0x1C = RECEIVE DIAGNOSTIC RESULTS
0x1D = SEND DIAGNOSTIC
0x1E = PREVENT-ALLOW MEDIUM REMOVAL
0x25 = READ CAPACITY
0x28 = READ (10 byte)
0x2A = WRITE (10 byte)
0x2B = SEEK (10 byte)
0x2E = WRITE AND VERIFY (10 byte)
0x2F = VERIFY (10 byte)
0x30 = SEARCH DATA HIGH (10 byte)
0x31 = SEARCH DATA EQUAL (10 byte)
0x32 = SEARCH DATA LOW (10 byte)
0x33 = SET LIMITS (10 byte)
0x34 = PRE-FETCH
0x35 = SYNCHRONIZE CACHE
0x36 = LOCK-UNLOCK CACHE
0x37 = READ DEFECT DATA (10 byte)
0x38 = MEDIUM SCAN
0x39 = COMPARE
0x3A = COPY AND VERIFY
0x3B = WRITE BUFFER
0x3C = READ BUFFER
0x3E = READ LONG
0x3F = WRITE LONG
0x40 = CHANGE DEFINITION
0x41 = WRITE SAME
0x4C = LOG SELECT
0x4D = LOG SENSE
0x50 = XDWRITE (10 bytes)
0x51 = XPWRITE (10 bytes)
0x52 = XDREAD (10 bytes)
0x55 = MODE SELECT (10 byte)
0x56 = SCSI-3 SPC p.70
0x57 = SCSI-3 SPC p.88
0x5A = MODE SENSE (10 byte)
0x5E = PERSISTENT RESERVE IN
0x5F = PERSISTENT RESERVE OUT
0x81 = REBUILD
0x82 = REGENERATE
0x9E = READ CAPACITY (Jumbo Version)
0xA0 = REPORT LUNS
0xA8 = READ (12 byte)
0xAA = WRITE (12 byte)
0xAE = WRITE AND VERIFY (12 byte)
0xAF = VERIFY (12 byte)
0xB0 = SEARCH DATA HIGH (12 byte)
0xB1 = SEARCH DATA EQUAL (12 byte)
0xB2 = SEARCH DATA LOW (12 byte)
0xB3 = SET LIMITS (12 byte)
0xEB = WRITE ID
0xEC = REPORT ID
%[els_codes]
0x01 = Link service reject
0x02 = Accept
0x03 = N_Port login
0x04 = F_port login
0x05 = Logout
0x06 = Abort exchange
0x07 = Read connection status
0x08 = Read exchange status block
0x09 = Read sequence status block
0x0A = Read sequence initiative
0x0B = Establish streaming
0x0C = Estimate credit
0x0D = Advise credit
0x0E = Read timeout value
0x0F = Read link status
0x10 = Echo
0x11 = Test
0x12 = Reinstate recovery qualifier
0x13 = Read Exchange Concise
0x20 = Process login
0x21 = Process logout
0x22 = State change notification
0x23 = Test process login state
0x24 = Third party process logout
0x25 = Login Control List Management
0x30 = Get alias id
0x31 = Fabric activate alias id
0x32 = Fabric deactivate alias id
0x33 = N_Port activate alias id
0x34 = N_Port deactivate alias id
0x40 = Quality of service request
0x41 = Read virtual circuit status
0x50 = Discover N_Port service parms
0x51 = Discover F_Port service parms
0x52 = Discover address
0x53 = Report Node Capabilites
0x56 = Read Port Status Block
0x57 = Read Port List
0x58 = Bandwidth Allocation
0x59 = Bandwidth DeAllocation
0x60 = Fabric Address Notification
0x61 = Registered State Change Notification
0x62 = State Change Registration
0x63 = Report Node FC-4 Types
0x68 = Clock Sync Request
0x69 = Clock Sync Update
0x70 = Loop Initialize
0x71 = Loop Port Control
0x72 = Loop Status
0x77 = Request Topology Information
0x78 = Request Node Identification Information
0x79 = Registered Link Incident Record
0x7A = Link Incident Record Registration
0xF0 = Vendor Unique - SCS message
%[fm_terminate_routines]
0 = FM_TERMINATE_START
1 = FM_TERMINATE_PREP1
2 = FM_TERMINATE_LOAD_LTE_G3_GLUE_REGS
3 = FM_TERMINATE_PREP2
4 = FM_TERMINATE_LOAD_LTE_INFO
5 = FM_TERMINATE_LOAD_LTE_QUASAR_REGS
6 = FM_TERMINATE_LOAD_LTE_SURGE_REGS
7 = FM_TERMINATE_LOAD_LTE_TACHYON0_REGS
8 = FM_TERMINATE_LOAD_LTE_TACHYON1_REGS
9 = FM_TERMINATE_LOAD_LTE_TACHYON2_REGS
10 = FM_TERMINATE_LOAD_LTE_TACHYON3_REGS
11 = FM_TERMINATE_LOAD_LTE_TACHYON4_REGS
12 = FM_TERMINATE_LOAD_LTE_TACHYON5_REGS
13 = FM_TERMINATE_LOAD_LTE_TACHYON6_REGS
14 = FM_TERMINATE_LOAD_LTE_TOY_REGS
15 = FM_TERMINATE_LOAD_LTE_UART1_REGS
16 = FM_TERMINATE_LOAD_LTE_UART2_REGS
17 = FM_TERMINATE_CBIC_TALK_OFF
18 = FM_TERMINATE_EXPANSION4
19 = FM_TERMINATE_EXPANSION5
20 = FM_TERMINATE_EXPANSION6
21 = FM_TERMINATE_EXPANSION7
22 = FM_TERMINATE_EXPANSION8
23 = FM_TERMINATE_DECODE_MACHINE_CHECK
24 = FM_TERMINATE_OUTPUT_EDB
25 = FM_TERMINATE_SEND_LAST_GASP
26 = FM_TERMINATE_CRASH_DUMP_PREP
27 = FM_TERMINATE_CRASH_DUMP
28 = FM_TERMINATE_COMPUTE_LTE_EDC
29 = FM_TERMINATE_RESTART_INIT
30 = FM_TERMINATE_RESTART_ACTION
31 = FM_TERMINATE_END
%[fm_ue]
0 = Unrecognized Unexpected Event code.
1 = Power failure before initialization could complete.
2 = Recursive termination before initialization could complete.
3 = Terminated during the first part post-termination preparation.
4 = Terminated during the load of the G3 Glue registers.
5 = Terminated during the second part post-termination preparation.
6 = Terminated during event report block load.
7 = Terminated during initialization of all hardware components and software data structures in preparation for restart.
8 = Terminated during execution of an unrecognized post-termination operation (premature).
9 = Power failure during execution of a post-termination operation.
10 = No good entries found in Termination Event Array. (Note that this condition is expected following the first boot of a newly manufactured HSV110 controller. In that case this event can be safely ignored; no action is necessary.)
11 = The edc of one or more Last Termination Event Array entries is bad.
12 = Last Termination Event Array entry control block revision is different.
13 = Last Termination Event Array entry information block revision is different.
14 = Last Termination Event Array entry up time value is greater than the system's up time value.
15 = Last Termination Event Array entry up time value is less than the previous entry's up time value.
16 = Last Termination Event Array entry sequence number value is less than the previous entry's sequence number value.
17 = Detected an unrecognized dump/restart control code.
18 = Failed to terminate the entity dump loop.
19 = Unexpected dump entity size.
20 = Unexpected elp processing stage code.
21 = Number of Termination Parameters supplied not equal to maximum allowed as required.
%[fm_mpvfc]
0 = Success
1 = Cookie value is not as expected.
2 = Event data overflows the buffer.
3 = Event data size is not a multiple of 4 bytes, is less than the minimum, or is greater than the maximum.
4 = Event Information Packet type is greater than the maximum.
5 = Event information size is not a multiple of 4 bytes, is less than the minimum, is greater than the maximum, doesn't match the eip type size, or when combined with the entry header size doesn't equal the entry size.
6 = Event code is zero.
7 = Event is out of sequence.
8 = Dead space area at the end of a partially packed buffer contains a nonzero value.
9 = An event data block containing a nonzero value was found after end of event data was detected.
10 = Sequence number reset flag not set as expected.
11 = The event log contains no entries.
12 = Event data block read failed during maintenance verification.
13 = Event data block read failed during maintenance completion.
14 = Event data block erase failed during maintenance completion.
15 = Control block read failed during maintenance verification.
16 = Control block write failed during maintenance verification.
17 = Event data block write failed during maintenance update.
18 = Control block write failed during maintenance completion.
19 = Storage System Termination Event Log related send was unsuccessful or the master found that the Storage System Termination Event Log is inaccessible.
20 = Control block read failed during maintenance verification by the other HSV110 controller.
21 = Control block read failed during update retrieval.
22 = Event data block read failed during retrieval request.
23 = Log has been prepared for re-initialization.
%[fm_quiesce]
0 = Make FM quiescent on both controllers.
1 = Make FM quiescent on slave controller only.
%[rcse]
0 = Requested by Storage System Management Interface use image
1 = Requested by CTRL_F
2 = Requested by Storage System Management Interface, shutdown
3 = Emergency drive firmware upgrade
4 = Emergency drive firmware upgrade done
5 = Attempt to check new device for System WWN
6 = Existing cell lost quorum
7 = Quorum disks have changed in existing cell
8 = An active cell has lost its quorum
9 = WWN has been found on new quorum
10 = ID has changed on a physical store
11 = System has been scrubbed
12 = Logged in port for ILF cannot be found
13 = The ILF disk is no longer logged in
14 = The ILF id block failed to write
15 = Scrub requested from OCP
16 = The system Disk Group changed
17 = An attempt to realize a logical disk failed
18 = The master crashed during a resync recovery window
19 = The master crashed during a resync window with no cell
20 = The slave failed before returning status of an unshare
21 = An operation to get a cmap failed
22 = A CVMDB access failed
23 = A cache metadata i/o failed
24 = An initiate logical disk expand failed
25 = An attempt to take a logical disk online failed
26 = A flush unit operation failed on the slave
27 = Recovery to handle too much frozen data
28 = An attempt to take a logical disk offline failed
29 = An attempt to unrealize a logical disk failed
30 = An attempt to update the RSSM on media failed
31 = Container Services failed to initiate a merge operation
32 = A new WWN was entered on the OCP
33 = Deadlock avoidance for drive code load
34 = A drive appeared while the system was inoperative
35 = A drive has failed a BBR check
36 = A drive has appeared which may fix a multi disk failure
37 = A failure was detected during hierarchy lookup
38 = A virtual disk could not be presented
39 = Quorum disk could not be found after a failover
40 = An attempt to realize the csld failed
41 = A storage cell went undetected during realization
42 = Quorum was lost during cell realization
43 = A drive disappeared during cell realization
44 = Cell realization failed but device discovery will not complete
45 = An attempt to realize the scscb failed
46 = A snapshot or snapclone tree was split across the master and slave
47 = A reduced quorum set was reconstructed
48 = A migration operation initiation failed
49 = An attempt to delete a logical disk failed
50 = An attempt to take a logical disk offline other failed
51 = An attempt to synch the mirror for a logical disk failed
52 = Container Services failed to initiate a split operation
53 = A virtual disk could not be unpresented
54 = An attempt to take a unit operative failed
55 = Debug flags are being committed
56 = Requested by the OCP
57 = DRM went offline
58 = DRM went offline with writes in progress
59 = A memory allocation failed
60 = A loop initiator disruptor drive was bypassed
61 = ID blocks on a drive were erased
62 = An attempt to realize the PLDMC failed
63 = A logical disk in an inoperative Disk Group was expected to be inoperative but was not
64 = An unshare operation failed
65 = An rss member failed during cell realization
66 = A Disk Group has become RAID 1 inoperative
67 = Requested by maintenance or SCS debug command
68 = A confirmation was refused on the OCP
69 = A confirmation was approved on the OCP
70 = An attempt to unmirror a logical disk failed
71 = An attempt to quiesce a unit failed
72 = Container Services failed to add a Disk Group
73 = Container Services failed to delete a Disk Group
74 = Print flags have changed
75 = Debug flags have changed
76 = The master failed while trying to get information from it
77 = An attempt to erase quorum failed
78 = An attempt to copy psars failed
79 = Container Services failed to initiate a marry operation
80 = An attempt to update or init rss meta failed so an attempt was made to fault a drive
81 = A system inoperative controller was activated by the master indicating that inoperative condition was fixed
82 = A drive has unexpectedly changed its worldwide name
83 = A drive has unexpectedly changed its worldwide name
84 = PRLI handler detected other controller reboot
85 = host port topology change detected
86 = Enter safe mode
256 = Active/Active write collision
%[drv_inop]
0x0 = Unknown
0x001 = Container Services I/O failure
0x002 = Scrubber I/O failure
0x003 = Attempt to set CBIT on normal drive
0x004 = Attempt to set CBIT on merging drive
0x100 = Target Discovery Service Descriptor retry count exceeded
0x101 = Inoperable for Bad Block Replacement
0x102 = Soft error count exceeded
0x103 = Exchange timeout count exceeded
0x104 = Drive communication failure count exceeded
0x105 = Command retries exceeded
0x106 = Medium/Hardware Errors encountered on this physical disk drive
0x107 = Directed LIP threshold exceeded
0x108 = Intermittent error count threshold exceeded
0x200 = Smart event from a physical disk drive not in Storage System
0x201 = Smart event from a physical disk drive not a Volume
0x202 = Smart event from a physical disk drive not a Redundant Storage Set
0x203 = Failure predicted from physical disk drive
0x204 = Cannot read from physical disk drive from the poll
0x205 = Failure predicted from physical disk drive while deleting Disk Group
0x206 = physical disk drive forced inoperative from maintenence command for temporary POID
0x207 = physical disk drive forced inoperative from maintenence command for POID
0x208 = Bad block recovery failed or cannot read FPAB
0x209 = Failure to remove volume from Storage System
0x20a = Failure to update metadata
%[fcs_mtl]
1 = The physical disk drive left itself bypassed
2 = The Drive Enclosure Environmental Monitoring Unit bypassed the drive bay
%[cac_mnemonic]
0x00 = CAC$NO_ACTION
0x01 = CAC$NOTIFY_FUSION_DEV
0x03 = CAC$SEE_TC
0x04 = CAC$TC_RECURSED
0x05 = CAC$SEE_OTC
0x06 = CAC$SEE_ASSOC_TEVENT
0x08 = CAC$ADVISEI_FUSION_DEV
0x09 = CAC$DETERMINE_PFC
0x0a = CAC$LOW_MEM_ACC_ADVICE
0x20 = CAC$REPLACE_CB
0x22 = CAC$REPLACE_BATTA
0x23 = CAC$REPLACE_BATTB
0x24 = CAC$REPLACE_BLOWERA
0x25 = CAC$REPLACE_BLOWERB
0x26 = CAC$REPLACE_BLOWERPSA
0x27 = CAC$REPLACE_BLOWERPSB
0x28 = CAC$REP_REMOVED_BATTA
0x29 = CAC$REP_REMOVED_BATTB
0x2a = CAC$REP_REMOVED_BLWRA
0x2b = CAC$REP_REMOVED_BLWRB
0x2c = CAC$REP_REMOVED_BLWRPSA
0x2d = CAC$REP_REMOVED_BLWRPSB
0x2e = CAC$REDUCE_AMBIENT
0x2f = CAC$CHECK_BATTS
0x30 = CAC$GBIC_CHECK_FAILURE
0x31 = CAC$BATTA_IIC_OP_FAILURE
0x32 = CAC$BATTB_IIC_OP_FAILURE
0x33 = CAC$BATT_DDC
0x36 = CAC$OVER_TEMP
0x37 = CAC$TEMP_UNDETERMINED
0x38 = CAC$REPLACE_BATTCAUTION
0x39 = CAC$RECUR_REPLACE_CB
0x40 = CAC$REPLACE_DRIVE
0x41 = CAC$REP_REMOVED_DRIVE
0x42 = CAC$REMOVE_REPLACE_DRIVE
0x43 = CAC$MOVE_DRIVE
0x46 = CAC$REPLACE_DRIVE_PORT
0x47 = CAC$FRAME_TIMEOUT
0x48 = CAC$UNEXPECTED_WORK
0x49 = CAC$BAD_ALPA
0x4a = CAC$LINK_FAILURE
0x4c = CAC$SPOF_DRIVE
0x4d = CAC$UPDATE_DRIVE_FW
0x4e = CAC$SPOF_SHELF
0x4f = CAC$REMOVE_DRIVE
0x50 = CAC$DELSCLD
0x51 = CAC$EVAL_LD
0x5f = CAC$CHECK_CONN
0x60 = CAC$CHECK_SRC_UNIT
0x61 = CAC$CHECK_DEST_UNIT
0x62 = CAC$CHECK_LOG
0x63 = CAC$CHECK_SITE_VERSIONS
0x64 = CAC$DRM_CHECK_REM_BACKEND
0x65 = CAC$DRM_RESTART_REM
0x66 = CAC$DRM_RESTART_LOCAL
0x67 = CAC$DRM_CHECK_ISL
0x80 = CAC$REMOVE_REPLACE_DEPS
0x81 = CAC$REPLACE_DEPS
0x82 = CAC$REMOVE_REPLACE_DEBLWR
0x83 = CAC$REPLACE_DEBLWR
0x84 = CAC$REPLACE_DEBLWR_IMM
0x85 = CAC$DE_CTRLR_SHUTDN
0x86 = CAC$CORRECT_TEMP
0x87 = CAC$CORRECT_TEMP_IMM
0x88 = CAC$RESET_DEEMU
0x89 = CAC$REPLACE_DEEMU
0x8a = CAC$AUTOREC_DEEMU
0x8b = CAC$RECOVER_DEEMU_COMBO
0x8c = CAC$AUTOREC_COMBO_DEEMU
0x8d = CAC$DE_INITIALIZE
0x8e = CAC$DE_JB_TROUBLE
0x8f = CAC$DEMU_DISCOPS
0x90 = CAC$DE_CHECK_XCVR
0x91 = CAC$REPLACE_DE
0x92 = CAC$AUTOREC_DE
0x93 = CAC$REPLACE_DEIOM
0x94 = CAC$AUTOREC_DEIOM
0x95 = CAC$RESET_DEIOM
0x96 = CAC$UPLOAD_DEEMU_NEW_CODE
0x97 = CAC$CABINET_BUS_CABLE
0x98 = CAC$REDUCE_DE
0x99 = CAC$CHECK_DEIOM_CABLE
0x9a = CAC$CHECK_RACK_PDU
0x9b = CAC$MONITOR_DEEMU
0x9c = CAC$CYCLE_DRIVE_EMU
0xb4 = CAC$CHANGE_OCCUPANCY
0xb5 = CAC$CHANGE_LDAD_CONFIG
0xb9 = CAC$EVAL_OTHER_NSC
0xba = CAC$EVAL_PWR_OTHER_NSC
0xbf = CAC$EVAL_VOL
0xc3 = CAC$EVAL_PORT
0xc4 = CAC$NEW_DRIVE_FW
0xc5 = CAC$CAB_BUS_CABLE
%[storage_usage]
0 = Unallocated
1 = Quorum Space
2 = CSLD Logical Data
3 = Primary Logical Disk
4 = Primary LD Metadata
5 = LD Base RSD (LDDIR)
6 = Physical Metadata
7 = DRM LOG OD storage
8 = Supported USAGE Types
%[exec_tod]
1 = TOY clock unavailable, this controller's time reset to default
2 = TOY clock time is less than previously stored time, this controller's time reset to default
3 = Bad EDC for previously stored time, this controller's time reset to default
4 = TOY clock not running, this controller's time reset to default
5 = TOY clock is accurate, this controller's time set to TOY clock time value
6 = This controller's time was set from policy memory metadata following a controller resynchronization operation
7 = This controller's time was set to the current time value
8 = Following Storage System time synchronization the primary controller requested that the secondary controller set its TOY clock to the current time value
9 = The secondary controller set its TOY clock to the current time value as requested by the primary controller
10 = This controller's TOY clock was set to the current time value
STRUCTURE REVISION LEVELS:
eip00: 2.
eip01: 2.
eip02: 2.
eip03: 3.
eip04: 4.
eip05: 3.
eip07: 1.
eip08: 3.
eip09: 3.
eip0A: 1.
eip0B: 2.
eip0C: 3.
eip0D: 1.
eip0E: 2.
eip0F: 1.
eip10: 0.
eip11: 2.
eip12: 0.
eip13: 2.
eip14: 1.
eip15: 0.
eip16: 0.
eip17: 1.
eip18: 0.
eip1B: 0.
eip1E: 1.
elp_event: 2.
lte_control_block: 1.
lte_info_block: 4.
MAPPING INFORMATION:
00040390 00000078 148a64863a10d235ba76a12355
00040408 00000240 148a64863a10d235ba76a1235537736c441f1d
00040648 00000368 148a64862214c628a162a02f4e3d74644e070a2f595f2d
000409b0 000000a8 148a64863010cc28ab66ab3a532a
00040a58 000000c0 148a64862c18cc22ba62b721
00040b18 00000094 148a64862c18cc22ba62b625433c7e7a4b110c31455d3b3c764587fc71
00040bac 0000007c 148a64862c18cc22ba61a1235d2c
00040c28 000000a4 148a64862c18cc22ba77bc2342376761450f073d544b372e605b95ea71
00040ccc 000000f0 148a64862c18cc22ba6eb539452d73724c141739
00040dbc 000000bc 148a64862c18cc22ba6eb539452d73724c141739485a313c785887
00040e78 000000ec 148a64862c18cc22ba6eb539452d73724c141739484b2b3f66498de963ea19
00040f64 00000094 148a64862c18cc22ba6eb539452d73725e0a192044513c2576458bfd6df70f
00040ff8 00000098 148a64862c18cc22ba71b1275e3c64724e111d2a
00041090 00000098 148a64862c18cc22ba71b1275e3c64724c141739484b2b3f66498de963ea19
00041128 0000010c 148a64862c18cc22ba71b13941276f7e4f
00041234 0000008c 148a64862c18cc22ba71b13941276f7e4f071e22584f
000412c0 0000008c 148a64862c18cc22ba71b13941276f7e4f071e22584f372e605b95ea71
0004134c 0000008c 148a64862c18cc22ba71b13941276f7e4f071e22584f373f7a588bfb7be90b5758
000413d8 000000a4 148a64862c18cc22ba71b13941276f7e4f070f2f5e4c
0004147c 000000a4 148a64862c18cc22ba71b13941276f7e4f070f2f5e4c372e605b95ea71
00041520 000000a4 148a64862c18cc22ba71b13941276f7e4f070f2f5e4c373f7a588bfb7be90b5758
000415c4 000000d4 148a64862e10d82eba60b529592d
00041698 00000184 148a64fd3614ce3eb570b12d
0004181c 000000d0 148a64fd173def028e7c9018781e44726c2f
000418ec 00000070 34aa44fd123ce405ba55860b780c11
0004195c 00000c24 148a64fd1620e30d817c900c660c
00042580 000000fc 148a64fd3600d82fba60b53855
0004267c 000001c0 148a64fd3600d82fba60b5385537647f4b0b1d
0004283c 000000a4 148a64fd3600d82fba60b53855377162580c112159
000428e0 0000011c 148a64fd3600d82fba60b53855377662581c
000429fc 00000088 148a64fd371dcf22ae7cb225433762624e1d072258592c
00042a84 000000c0 148a64fd371ace24ba61a12c57
00042b44 000001ec 34aa44fd0427e30f917c9112740b7e4b66393f1d
00042d30 000007c0 148a64fd371ace24ba6fbb2b55
000434f0 00000140 148a64fd371ada38ba6ab92b562d
00043630 000000e0 148a64fd371ac731a477ab22503a657a4b0a1d
00043710 00000078 148a64fd3013dd3eb073b338502c6472450c102b45
00043788 000000e8 148a64fd3018cb3ea86ca22f4e2e736247071b2f54502d
00043870 000000a0 148a64fd3018cb3ea86ca22f4e2e736247071f2143
00043910 000000e8 148a64fd3018cb3ea86ca22f4e3c6e7249191b2652
000439f8 000000a0 148a64fd3018cb3ea86ca22f4e3c6e724d170c
00043a98 000000e0 148a64fd3018cb3ebf66a6254e2b606e421d
00043b78 00000090 148a64fd3018cb3ebf66a6254e2f6e79
00043c08 00000468 34aa44fd103ad5028a4791067e0945
00044070 0000025c 148a64fd301ad525a374ab235c25646943190c2b
000442cc 00000304 148a64fd1027e317807c9705750d4d426b3c0703767106
000445d0 000002a0 148a64fd183aeb05ba478603670d
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00044ac8 000001f8 148a64fd173aee04894c950e4e0b4d486b362d1e
00044cc0 000005cc 148a64fd1027e317807c9805700c4449
0004528c 000001c0 148a64fd1138ef1382469a096837454b7d072d1e706a09085c
0004544c 0000011c 148a64fd1138ef1382469a096837454b7d072f0f7e6c
00045568 0000006c 148a64fd3214d935ba77bd27543a
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00045668 000000fc 148a64fd123ce405ba42900c660145
00045764 00000254 34aa44fd123ce405ba47921d75
000459b8 00000088 148a64fd3207cf24ba65b929523767684e
00045a40 00000134 148a64fd3310de3ea662a62e4e216c6c4d1d
00045b74 000001a8 148a64fd3310de3ea374ab235c296668
00045d1c 00000288 148a64fd3310de3eac6eb52d54
00045fa4 000000d4 148a64fd3310de3eac6eb52d543769695d070c37475d
00046078 0000008c 148a64fd3310de3eac6eb52d54376863550d0b2b
00046104 000000c4 148a64fd3310de3eac6eb52d54377768580b112159
000461c8 0000014c 148a64fd3310de3eb470a635432d72625f0a1b2b44
00046314 000000b0 148a64fd3310de3eb670b326
000463c4 00000078 148a64fd331ade3eb670b326
0004643c 00000220 148a64fd3310de3eb06db7255c387368590b1d2a4851252d7e4e
0004665c 00000168 34aa44fd173def028e7c9903761a40596f072b1e767b0d
000467c4 00000960 148a64fd183aeb05ba4a990b760d
00047124 000003d0 148a64fd3910de20a162a02b4e2b696849131d3c
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00047584 00000078 148a64fd391cd833aa71ab2b552e766948
000475fc 00000074 148a64fd391cd833aa71ab28443a6f79551a0d275b5c
00047670 00000064 148a64fd391cd833aa71ab235f2e6e7f471d1c31554d21207d
000476d4 00000074 148a64fd391cd833aa71ab3f422d6572480d112253
00047748 00000070 148a64fd391adc24ba62ba2e4e3c736447
000477b8 000000f0 148a64fd391adc24ba65a6255c37626c49101d
000478a8 000000f0 148a64fd391adc24ba77bb35522962654f
00047998 000006a8 34aa44fd1a30ef05ba479203
00048040 00000058 148a64fd3b01c224b77cb22b58246469
00048098 000002c8 148a64fd2406cb33ba70b72b5f
00048360 00000078 148a64fd2400d826a07cbd27502f6472480d112253
000483d8 00000330 148a64fd2400d826a07cbd27502f64
00048708 0000011c 148a64fd2400de3eac6eb52d54
00048824 00000160 148a64fd2610cb25ba60a72655
00048984 00000124 148a64fd2610cb25ba73a72b433b
00048aa8 000001c8 148a64fd2610cb25ba73a72b433b7e6945161d
00048c70 000000cc 148a64fd2610cb25ba72a7
00048d3c 000000e0 148a64fd2610cb25ba72a73555276f68
00048e1c 00000108 148a64fd2610cb25ba70b739552a
00048f24 000000b0 148a64fd2610cb25ba75bb26442564
00048fd4 0000007c 148a64fd2610c624a470b1355825606a4f
00049050 0000019c 148a64fd2610d938ab60
000491ec 00000098 148a64fd2610d938ab60ab2954246d724b1b13
00049284 000000c4 148a64fd2610d938ab60ab2954246d72480d112253
00049348 000004ec 148a64fd2610d938ab60ab245e3f
00049834 000000f8 148a64fd2610d938ab60ab254520647f
0004992c 0000009c 148a64fd2610d938ab60ab254520647f55191b25
000499c8 00000094 148a64fd0734ec04ba4e9b0e74
00049a5c 00000294 148a64fd2716cb2fba73a72b433b
00049cf0 0000010c 148a64fd2716cb2fba73a72b433b10
00049dfc 000000c4 148a64fd2710c425ba6ab92b562d7e6f5f11142a
00049ec0 000000c4 148a64fd2710c425ba6ab92b562d7e6c4913
00049f84 000000a8 148a64fd2710c425ba6ab92b562d
0004a02c 0000005c 148a64fd2701cb33b17cb63f43267e6f5f11142a
0004a088 00000098 148a64fd2701cb33b17cb63f43267e625e101d3c
0004a120 0000005c 148a64fd2701cb33b17cbd245727736055191b25
0004a17c 0000007c 148a64fd2701cb33b17cbd245727736055170c26524a
0004a1f8 0000005c 148a64fd2701cb33b17ca1395437637843141c
0004a254 00000098 148a64fd2701cb33b17ca13954376e79421d0a
0004a2ec 000003f0 148a64fd0125ee009146ab0b750e564968
0004a6dc 00000084 148a64fd2105ce20b166ab2d543c7e694b0c1931554d21207d
0004a760 00000074 148a64fd2105ce20b166ab2d543c7e694b0c1931565b23
0004a7d4 000001f8 148a64fd2105ce20b166ab254520647f
0004a9cc 000000c8 148a64fd2105ce20b166ab39542665724e190c2f485a3d25754f
0004aa94 0000011c 148a64fd0125ee009146ab0e62047e586e2b3a31756d01005d
0004abb0 0000011c 148a64fd0125ee009146ab0e72047e586e2b3a31756d01005d
0004accc 000005d4 148a64fd0125ee009146ab1f751b43
0004b2a0 0000031c 148a64fd2106cf3eac6eb52d54
0004b5bc 00000074 148a64fd2314c335ba61a1385f376e79421d0a
0004b630 00000060 148a64fd2314c335ba6aba2c5e3a6c72450c102b45
0004b690 00000074 148a64fd2314c335ba76a72f4e2775654f0a
0004b704 00000a5c 148a64fd073de516ba409b04770146
0004c160 0000013c 148a64fd1537e513917c9705750d4d426b3c
0004c29c 00000100 148a64fd193ced1384579135621c404166073b06727b03
0004c39c 00000034 028b72e15002cb28b17ca0235c2d65
0004c3d0 0000008c 2ab65ac1042cd5039c579119
0004c45c 00000084 2ab65ad11121d5039c579119
0004c4e0 00000038 148a64863010cc28ab66ab3a532a7e6f5f1e1e2b45
0004c518 00000010 148a64863913c93ea762b035472d6279450a
0004c528 00000078 148a64862c18cc22ba77bc2342376761450f
0004c5a0 00000078 148a64862c18cc22ba77bc2342376761450f072c4e48293f6a
0004c618 00000060 148a64862c18cc22ba77bc234237766c430c
0004c678 00000060 148a64862c18cc22ba77bc234237766c430c072c4e48293f6a
0004c6d8 00000060 148a64862c18cc22ba77bc234237766c430c073d544b372e605b95ea71
0004c738 00000060 148a64862c18cc22ba6eb539452d73725d19113a
0004c798 00000060 148a64862c18cc22ba6eb539452d73725d19113a485a313c785887
0004c7f8 00000060 148a64862c18cc22ba6eb539452d73725d19113a484b2b3f66498de963ea19
0004c858 00000064 148a64862c18cc22ba71b1275e3c64724c141739
0004c8bc 00000060 148a64862c18cc22ba71b1275e3c64724c141739485a313c785887
0004c91c 00000060 148a64862c18cc22ba71b1275e3c64725d19113a
0004c97c 00000060 148a64862c18cc22ba71b1275e3c64725d19113a485a313c785887
0004c9dc 00000060 148a64862c18cc22ba71b1275e3c64725d19113a484b2b3f66498de963ea19
0004ca3c 00000050 148a64862c18cc22ba70b124552a70
0004ca8c 0000005c 148a64fd3013dd3eb073b338502c6472480d112253
0004cae8 00000048 148a64fd3013dd3eb073b338502c64724b1b13
0004cb30 00000034 148a64fd3018cb3ea16cba2f
0004cb64 00000084 148a64fd3310de3ead62a62e46297368550c013e52
0004cbe8 00000048 148a64fd391cd833aa71ab2b552e76694807192d5c
0004cc30 00000020 148a64fd391cd833aa71ab28443a6f7955191b25
0004cc50 00000054 148a64fd391cd833aa71ab28443a6f79
0004cca4 00000030 148a64fd391cd833aa71ab235f2e6e7f471d1c31565b23
0004ccd4 00000050 148a64fd391cd833aa71ab235f2e6e7f471d1c
0004cd24 00000020 148a64fd391cd833aa71ab3f422d65724b1b13
0004cd44 00000054 148a64fd391cd833aa71ab3f422d65
0004cd98 00000048 148a64fd2417c83eb262bd3e543a7e6c4913
0004cde0 0000005c 148a64fd2701cb33b17cb63f43267e6c4913
0004ce3c 0000005c 148a64fd2701cb33b17cbd2457277360551a0d275b5c
0004ce98 0000005c 148a64fd2701cb33b17ca1395437606e41
0004cef4 0000003c 148a64fd2105ce20b166ab39542665724e190c2f48592b27
0004cf30 00000044 148a64fd2314c124ba70b82352237e7a4b110c2b45
0004cf74 00000038 148a64fd1d3bfc00894a900b650d7e4c6e3e2f
0004e068 00000144 24b247d60127ef3e8d4c871e621c4059
0004e1ac 000001a0 039567863d1bc335
0004e34c 00000214 039513e13b19c624a677bb38
0004e560 000001bc 039513e13b19c624a677
0004e71c 00000078 039513e4351ecf3ea671a6
0004e794 0000011c 039568f12014de28b677bd2942
0004e8b0 00000144 039513f83107c53ea66cb826542b75
0004e9f4 00000fb4 148a64fd391cd922ba6eb2294e387362491d0b3d
0004f9a8 000000a8 148a64ef2b16d830ba62b721
0004fa50 00000128 148a64ef2b16d830ba61a1235d2c
0004fb78 00000080 148a64ef2b16d833ba62b721
0004fbf8 00000128 148a64ef2b16d833ba61a1235d2c
0004fd20 00000114 148a64ef2b00d932ba62b721
0004fe34 00000134 148a64ef2b00d932ba61a1235d2c
0004ff68 00000114 148a64ef2b03d932ba62b721
0005007c 00000118 148a64ef2b03d932ba61a1235d2c
00050194 00000094 158413f03118c537a0
00050228 0000002c 028b72e1501cc428b17ca73b
00050254 00000030 039513f2261ac924b670
00050284 0000005c 158413e62011
000502e0 0000005c 158413e43111
0005033c 0000005c 158413ee2617
00050398 0000005c 158413ef2712c6
000503f4 0000005c 158413f12712c6
00050450 0000005c 158413fa30
000504ac 0000005c 158413ec2217
00050508 0000005c 158413f13a14da3ea66ca433
00050564 00000160 23b547
000506c4 0000093c 158413e13c10c92a
000515a0 00000128 2ab65ac1042c
000516c8 0000014c 2ab65acf1b23ef
00051814 00000150 2ab65ad11121
00051964 00000044 25a952d01b
000519a8 000000c4 24a758c3
00051a6c 00000128 24a758c34261
00051b94 0000057c 23bc68c41b27e70091
00052110 00000108 37a15ecc000afe088846871e700551
00052218 00000200 37a15ecc0033
00052418 00000204 24b068d2063ce41583
0005261c 00000108 24bc58ce2b36e50f964c980f4e1a445e7e372a0b487b1d1e4a64a6
00052724 0000008c 34a345cb1a21ec
000527b8 0000004c 37a643c11c34f8
00052804 00000238 24bc59d11b39ef3e92519d1e74
00052a3c 000000e4 24bc59d11b39ef3e92519d1e743747417f2b30
00052b20 000000b4 24bc59d11b39ef3e9656871a740645
00052bd4 00000070 24bc59d11b39ef3e8c4d9d1e
00052c44 00000010 24bc59d11b39ef3e954c9806
00052c54 00000064 24bc59d11b39ef3e9746950e
00052cb8 00000010 24bc59d11b39ef3e9746950e4e0e4d587930
00052cc8 00000068 24bc59d11b39ef3e9746871f7c0d
00052d30 00000074 34a745c11521
00052da4 000000dc 34a745cc1738fa
00052e80 000000b4 34a745cc1725f3
00052f34 000000b0 34a745d10027
00052fe4 00000194 34a745d61b20e6
00053178 00000124 34a745d61b39
0005329c 00000038 26a758cb
000532d4 00000038 26a758ce
0005330c 00000000 188c41c32b34f806
00053464 00000101 18b043db0430d5
00053568 00000044 34a745ce113b
000535ac 00000138 049274ea3171c92eab77bd24442d7e6b460d0b26
000536e4 000000fc 049274ea3171c92eab77bd24442d7e7e5e0a113e485e24396a43
000537e0 00000190 049274ea3171ce24a467b92b5f3767615f0b10
00053970 000006d4 049274ea3171cc2db070bc
00054044 00000114 049274ea3171cc2db070bc3555276f68
00054158 00000060 049274ea3171cc2db070bc35542a687959
000541b8 00000088 049274ea3171cc2db070bc35542a687959070b3a455138337d449afc
00054240 00000060 049274ea3171cc2db070bc35542a687959070b3a455138
000542a0 00000850 049274ea3171cc2db070bc355c296863
00054af0 00000244 049274ea3171cc2db070bc355f276568
00054d34 000000d0 049274ea3171cc2db070bc355f277e7a4b110c
00054e04 0000021c 049274ea310acc2db070bc35433b7562581d
00055020 000000f8 049274ea3171cc2db070bc35422a687959071c21595d
00055118 00000110 049274ea3171cc2db070bc35422a687959070b3a455138337d449afc
00055228 00000110 049274ea3171cc2db070bc354426687955190b37595b20
00055338 000000dc 049274ea3171cc2db070bc35573a6468501d
00055414 000000b8 049274ea3171cc2db070bc3544266879551e0a2b52422d
000554cc 000000b8 049274ea3171cc2db070bc3544266879
00055584 000000d4 049274ea3171cc2db070bc3544266879550b1b3d
00055658 000000a0 049274ea310acc2db070bc3544266879551a1d265e562c
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00129a7c 000001f4 35a068d0060afa138a4e9b1e74
00129c70 000001f4 35a068d0060afa138a4e9b1e743752487e07200c7e6c
00129e64 00000144 35a068d0060afa138a4e9b1e7437565f632c3d316d7d1a035c78
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0012aef8 0000019c 35a068d41127e3079c7c865f4e0c40596b073b0167710d08
0012b094 00000210 35a068d41127e3079c7c865f4e1a444c6e073c01797d
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0012b388 000000b8 35a068d01137ff088947ab09700b4948552b2b097b
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0012bb90 00000040 35a068d11627d513d0
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0012bc40 0000006c 35a068d0060afa138a4e9b1e7437565f632c3d3173770609
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0012bd00 0000012c 22ab54fd0730e405ba4185
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0012c140 000000cc 22ab54fd1b25ef0fba44951e74
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0012c264 0000006c 22ab54fd0334e315ba44951e74375544673d3c
0012c2d0 000000b8 37b645cf153bef0f917c95067d0742
0012c388 00000120 33b65ad21b27eb139c7c95067d0742
0012c4a8 000001a8 22ab54fd1539e60e8642800f4e094d446d363d0a
0012c650 000000ac 22ab54fd1539e60e8642800f
0012c6fc 000000f8 22ab54fd1539e60e8642800f4e065b726b343109797d0c
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0012cb4c 00000070 22ab54fd1539e60e867c80037c0d53
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0012cbf0 00000068 32bd5ccc1b22e43e8c5086
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0012cd74 00000078 22ab54fd0430f8088a479d094e014f447e
0012cdec 00000114 22ab54fd0430f8088a479d094e185342693d2b1d
0012cf00 00000098 028b72e12b31e312954f95134e0c444f7f3f07087b790f1f
0012cf98 00000098 028b72e12b31e312954f95134e185344642c07087b790f1f
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0012de64 00000398 048176f13c0ace28b766b73e5e3a
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0012e270 00000008 048176f13c0ace28b766b73e5e3a7e68520c1d2043
0012e278 0000000b 118c53cb1532d5098154ab1a7e1a55727e3d07006275
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0012ef58 00000000 18b64fcb00
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0012f070 00000000 18b64fc12b26ef15ba579d077437434c793d
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0012f0a4 00000000 18b758fd1330fe3e9540
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0012f264 00000000 22ab54fd0725e30fba54950365
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0012f2b4 00000000 24b25bcd1b25
0012f2e0 00000000 24b251c40630ef
0012f2e8 00000000 24b251ce1b3afa
0012f318 00000000 24b247d60127ef3e904d9d1e621c4059
0012f32c 00000000 29b64fd62b66b8
0012f340 00000000 29b64fd62b20e40891
0012f42c 00000000 32bd5ed62b3be515ba4c9a06780644
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00132260 00000348 22ab54fd0125ee009146ab1e7e117e4e66373b05
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00132e2c 00000024 24bc59d11b39ef3e8a568006780644727e2b
00133098 00000164 22ab54fd173def028e7c80037c0d53727b2d3d1b72
001331fc 00000068 22ab54fd1d3be315ba579d07741a
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00133f00 0000026c 34b643fd003ce704
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00135288 000000a8 01907bfa2b22eb08917c9504753742456f3b33317475
00135330 00000144 21b05bda2b36e2048648ab0c723745487c313b0b486b1c0d4d6e
00135474 000002ec 01907bfa2b22eb08917c9205633745487c313b0b486a1b1c
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00135e44 0000027c 21b05bda2b25e513917c9d04781c
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001362d0 00000364 21b05bda2b39ff11ba54950365
00136634 00000270 01907bfa2b23ef138c458d35770b7e417f28
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00136b84 0000025c 01907bfa2b31ef178c4091357501524e652e3d1c6e
00136de0 00000168 01907bfa2b31ef178c4091357d07464464
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00137318 0000018c 01907bfa2b26ef0f817c84067e0f48726b3b3b0b676c
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001375f8 0000015c 01907bfa2b26ef0f817c84067e0f4872783d320b746c
00137754 00000220 01907bfa2b26ef0f817c800f621c7e5864312c31657d090840
00137974 00000174 01907bfa2b26ef0f817c801f6337534879283700647d
00137ae8 0000020c 21b05bda2b31ef178c409135700c485e69
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00137e98 00000064 01907bfa2b39e50e957c980361
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00138bb4 0000015c 01907bfa2b26ef0f817c980576077e4c693b3d1e63
00138eb0 00000420 01907bfa2b23ef138c458d357d074e5d5535391e486c0d1f4d
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0013937c 000002b4 01907bfa2b23ef138c458d35650d5259552d360763471a09586fad
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0036e7f0 000000fc 34b044cd163fd5128057ab067537455f6707310048681a035e79b1ca51
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0036eef0 000007f8 34b044cd163fd5128057ab19721e45726939280f74711c15666fbbd747
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00370fcc 00000e50 34b044cd163fd5128057ab19721e45726d2a371b67470603576e
00371e1c 00000164 34b044cd163fff158c4fab09790d424655353d03757d1a1f666dbbcb7ddd2f777f35bf56
00371f80 000000f0 34b044cd163fff158c4fab09790d4246552d2b0b6547060d546e
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00372114 00000178 34b044cd163fff158c4fab09630d40596f073f1c674709005564a3dc46
0037228c 00000148 34b044cd163fff158c4fab0e781b424c783c0702736b37055754a4cb4dde38617834
003723d4 00000318 34b044cd163fff158c4fab0e741c404e62073b017a6804094d6e
003726ec 0000033c 34b044cd163fff158c4fab0e741c404e6207281c7268091e5c
00372a28 000001c4 34b044cd163fff158c4fab0c630d44726e3936097b71060b666ca7db7dd525676034
00372bec 00000194 34b044cd163fff158c4fab0c630d44726d2b3a317b770b074a
00372d80 000001a0 34b044cd163fff158c4fab0d741c7e4a78372d1e487b0702576eb7cd4bd6245b7833b15b3776
00372f20 000000fc 34b044cd163fff158c4fab0d741c7e4a78372d1e487c0d1f4d54bdd746dc32
0037301c 000007bc 34b044cd163fff158c4fab0d741c7e4a793a0702787b031f
003737d8 00000110 34b044cd163fff158c4fab0d741c7e406b200702787f371f5071b1
003738e8 000000c0 34b044cd163fff158c4fab0d741c7e406f353a0b65470603506fa7
003739a8 000006d4 34b044cd163fff158c4fab1a63074248792b071c727b071a5c79ade650dc296b7923
0037407c 00000258 34b044cd163fff158c4fab19741c7e4a78372d1e486a0d0d5d54bbd74ec0
003742d4 00000304 34b044cd163fff158c4fab19741c7e4a78372d1e486b01185c54b2d84bd525726e35
003745d8 0000010c 34b044cd163fff158c4fab19741c7e406f353a0b656b370f587bb5da4bcd33
003746e4 000001c8 34b044cd163fff158c4fab19741c7e406f353a0b656b371c4b6eb2dc50cb2f605429a34c
003748ac 000001e4 34b044cd163fff158c4fab19741c7e406f353a0b656b371f4d6aa0dc
00374a90 00000158 34b044cd163fff158c4fab19741c7e406f353a0b656b371b49
00374be8 00000368 34b044cd163fff158c4fab19741c7e5e692e3c317479180d5a62a0c07dda395b6d26b943377754
00374f50 000000b8 34b044d11726ee03ba51910b7537425e672a2a
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003750c0 00000078 34b044d7003ce63e9746950e4e05425f78
00375138 000000e8 34b044d7003ce63e92519d1e74374c4e782a
00375220 000001b8 34b044cd163fff158c4fab09700b4948553c391a764704034a7f
003753d8 00000100 34b044cd163fff158c4fab0b7f117e406f353a0b6547181e5c78b1d756dc2e
003754d8 00000178 34b044cd163fff158c4fab18740440596337363174700d0f52
00375650 00000060 34b044c10734d505974eab1b6401445e693d071c727507185c54b3cb4dcc3a
003756b0 0000005c 34b044c10734d505974eab1f7f1954446f2b3b0b486a0d01567fb1e645cb25717b
0037570c 00000070 34b044c10734d509957c8519720d7e5864312c317f771b18666fb1df47cb38616f
0037577c 00000054 34b044c10734d508884eab0e63057e5d6b2c303174700d0f52
003757d0 0000006c 34b044c10734d508884eab0e63057e5d783d280f657d3700566c8bdf4ecc396c
0037583c 00000038 34b044c10738d505974eab0d6307545d553e39077b771e094b
00375874 00000044 34b044c10738d50797469135761b437266373b05
003758b8 00000040 34b044c10738d5068057ab0d620a7e41653b33
003758f8 00000008 149064fd3007c73ea271bb3f41376e6b4c14112052
00375900 00000064 149064fd2610db34a070a035553a6c72581d083c524b2d226d5481f76bed19
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003759a0 00000020 34b044cd163fff158c4fab09700b4948553a391a637d1a156664bf
003762e0 000002e0 34b044cd163fd5029746951e74374558
003765c0 000001f8 34b044cd163fd505805080187e117e497f
003767b8 00000158 34b044cd163fd5068057ab0e643745487c07310a72761c
00376910 0000007c 34b044cd163fd5068057ab0e64374c44793b070f636c1a
0037698c 000001d0 34b044cd163fd5068057ab0e64375158
00376b5c 00000188 34b044cd163fd5068057ab0e64375158553b371b796c
00376ce4 00000084 34b044cd163fd5068057ab0e6437524e7c3c
00376d68 0000018c 34b044cd163fd5068057ab0e643752487e2c390c7b7d37055d
00376ef4 000004a4 34b044cd163fd5128057ab0e643752487e2c390c7b7d37055d
00377398 000006a8 34b044cd163fd5128057ab0e6437565f632c3d31676a07185c68a0
00377abc 000006b8 34b044cd163fd5029746951e74375158
00378174 0000029c 34b044cd163fd505805080187e117e5d7f
00378410 00000084 34b044cd163fd5068057ab1a64374558
00378494 000000b0 34b044cd163fd5068057ab1a64374d49
00378544 00000084 34b044cd163fd5068057ab1a64374c44793b070f636c1a
003785c8 00000084 34b044cd163fd5068057ab1a6437524e6934
0037864c 0000071c 34b044cd163fd5128057ab1a64374d5864
00378e0c 00000158 34b044cd163fd5029746951e7437524e7c3c
00378f64 00000150 34b044cd163fd505805080187e117e5e692e3c
003790b4 0000044c 34b044cd163fd5058c5095087d0d7e5e692e3c
00379500 000003e8 34b044cd163fd5048b4296067437524e7c3c
003798e8 000001d0 34b044cd163fd5068057ab19721e45726e2d2b
00379ab8 00000174 34b044cd163fd5068057ab19721e45726e2d2b3174771d024d
00379c2c 0000007c 34b044cd163fd5068057ab19721e4572663c
00379ca8 0000009c 34b044cd163fd5068057ab19721e457267312b0d48791c184b
00379d44 00000918 34b044cd163fd5128057ab19721e457269393b06724718035562b7c0
0037a65c 00000dc4 34b044cd163fd5128057ab19721e45726939280f74711c15
0037b420 000001d8 34b044cd163fd5128057ab19721e4572663c
0037b5f8 00000254 34b044cd163fd5128057ab19721e45727b2d310b647b0d08
0037b84c 0000023c 34b044cd163fff158c4fab19741c7e5e692e3c317479180d5a62a0c07dcf2f766221a9
0037ba88 00000034 028b72e15002cb28b17ca0235c2d65
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0037bca4 0000005c 35b644c7000afe138257
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0037bd58 00000040 2aa050fd1322e51381
0037bd98 00000024 2aa050fd1337f31580
0037bdbc 00000050 2aa050fd0439e50f82
0037be0c 00000040 2aa050fd0422e51381
0037be4c 00000034 2aa050fd0437f31580
0037be80 00000938 24be53ce1b3afa
0037c7b8 00000070 23b150fd193ae43e9657951865
0037c828 00000204 23b150fd193ae43e804d801868
0037ca2c 000000bc 2fb259c61830f83e96579b1a
0037cec4 000000a8 2ab65afd0125ee009146
0037cf6c 00000178 35be52cf
0037d0e4 000001a8 30be52cf
0037d28c 00000124 34be52cf
0037d3b0 00000234 24be52cf
0037d5e4 000000c4 34b643c0063e
0037d6a8 000000b0 24bf45c0063e
0037d800 00000118 35b656c62b26fa13
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0037d994 000000a4 35b656c62b31e913
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0037dacc 0000013c 30a15ed6110af91197
0037dc08 000000c8 30a15ed6110aee0297
0037dcd0 00000084 30a15ed6110aec1197
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0037e1bc 000003f4 30a152c5
0037e5e8 00000074 2abc59fd1926ed
0037e65c 000000cc 2abc59fd1d31e71282
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0037e928 00000024 2aa050fd1634ee1291429701
0037e9b8 000002a0 2aa368c51121
0037ec58 00000140 2aa368d5063cfe04
0037ed98 00000034 2aa050fd193bef19914a90
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0037ef84 00000088 2aa050fd0630fb14805080
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0037f350 00000010 23b150fd0134f815ba509d07610444727a373402
0037f360 00000064 23b150fd0134f815ba449702701a
0037f3c4 00000070 23b150fd0134f815ba539702701a
0037f434 00000000 24b254ca110ae6088b4687036b0d
0037f43c 00000000 2ebd5ed62b26fe0495
0037f450 00000000 24bf52c3060af9158053
0037f47c 00000000 69b64fcb000ae912
0037f480 00000000 33a150d62b38f913
0037f498 00000000 33b245c51121d5128c44
0037f49c 00000000 2ebd5ed62b21eb13824680
0037f4ec 00000000 2ebd5ed62b31e806ba50800b7203
0037f510 00000000 25b253d10034e90a
0037f51c 00000000 25a05bcd1b25
0037f528 00000000 25a05bcd1b25b8
0037f538 00000000 32a045fd1d27fb3e804d95087d0d
0037f550 00000000 34b643cf0727
0037f560 00000000 18b755c52b38e50fba4095067d
0037f594 00000000 2fb259c61830f8
0037f5cc 00000000 23b150fd1934fa3e8141951e23
0037f604 00000000 23b150fd1934fa3e8c41951e23
0037f63c 00000000 23b150fd013be700957c9d08701c13
0037f660 00000000 23b150fd013be700957c9008701c13
0037f684 00000000 34a758d22b21eb13824680
0037f6f8 00000000 34a756d0000ae70e8b4a800563
0037f744 00000000 32bf58cd04
0037f754 00000000 21bf58cd04
0037f774 00000000 29bc5ece12
0037f780 00000000 22ab52c10121ef
0037f7bc 00000000 34a453fd0334f93e8b4c8035620d55
0037f7d8 00000000 29bc68c71a34e80d80
0037f800 00000000 35b644d61b27ef3e96538619
0037f86c 00000000 24bc5acf153bee3e83429d06641a44
0037f87c 00000000 20b643fd0427e502
0037f884 00000000 20b643fd1225f90297
0037f8a0 00000000 37a643fd1225f90297
0037f8bc 00000000 20b643fd0730ed138044
0037f8c8 00000000 37a643fd0730ed138044
0037f8dc 00000000 24b254ca110aff118142800f
0037f8f4 00000000 24b254ca110aec0d90509c
0037f90c 00000000 2fb259c61830d515974284357200444e61
0037f978 00000000 2fb259c61830d5049d40911a65014e43
0037f9e4 00000000 2fb259c61830d50c86
0037fa50 0000014c 2aa050fd1620e30d81
0037fb9c 000000a0 2aa050fd173de112904e
0037fc3c 00000068 2aa050fd1a36e20a965699
0037fca4 0000008c 2aa050fd113be90e8146
0037fd30 00000098 2aa050fd1030e90e8146
0037fdc8 0000024c 2aa050fd1a3af80c
0038004c 00000098 038b13e63d19d2
003800e4 000000f4 038b13f12014d835
003801d8 00000098 038b13e53101d532b06eb92b4331
00380270 000001e4 23ab68c61b0afe049657
00380454 00000198 23ab68c61b0aec14894fab1d63015548
003805ec 000001b4 23ab68d50621d5058a4d91
003807a0 00000378 23ab68c61b0af8008b479b074e014e
00380b18 000001e8 23ab68d01134ee3e814c9a0f
00380d00 000001ac 23ab68c61b0ae90c95
00380eac 00000124 23ab68c51121d51380509b1f630b445e
00380fd0 00000108 23ab68c40630ef3e97468705641a424879
003810d8 00000104 23ab68c40630ef3e9d47ab18741b4e58783b3d1d
003811dc 00000154 23ab68c51121d5169757ab08640e4748782b
00381330 0000037c 23ab68c51121d5198150
003816ac 000000a0 23ab68c51b21d5198150
0038174c 00000068 23ab68c51b21d507804787
003817b4 00000180 23ab68d70431eb15807c9c0b630c7e48782a371c
00381934 00000130 23ab68d70431eb15807c8705771c7e48782a371c
00381a64 0000002c 028b72e1501cc428b17ca73b
00381a90 00000030 038b13f1201ada
00381ac0 00000058 23ab68c51b21d512824f
00381b18 00000044 23ab68d0153bee
00381b70 00000110 26a758c6
00381c80 000000e4 26a758ca
00381d64 000000ec 23ba44fd1130fa138a4e
00381e50 000000ac 23ba44fd033af805
00381efc 000000ac 23ba44fd1020e83e924c860e
00381fa8 000000ec 23bc68c61137ff06ba45980b761b
00382094 000001f0 23bc68cf153ce415ba4a9a1c7e0344
00382284 000000ec 23bc68d2063ce415ba45980b761b
00382370 000000b4 23bc68d51c34fe12ba5684
00382424 0000012c 23bc68c41726d5129156920c
00382550 000000dc 21ba5bce033af805
0038262c 0000014c 20b643fd033af80596
00382778 000007a4 2fb65bd21b20fe
00382f1c 000000a8 2bb653fd0030f915
00382fc4 000000d0 2bbc58c90125d5028847
00383094 00000480 2aba59c60d0afa00975091
00383514 000000dc 2abc53fd162cfe04
003835f0 0000221c 2abc53fd0630ed0896579118
0038580c 00000130 2abc53fd033af805
0038593c 000000ec 35b656c6183ce404
00385a28 00000750 35b650cb0721ef1396
00386178 000003a0 33b644d62b38ef0c8a518d
00386518 0000005c 24bf52c3060ae30f955680
00386574 00000070 24b25bce2b33ff0f86579d057f
003865e4 00000060 24b25bce2b3dfa3e8146961f76
00386644 00000060 24b25bce2b26ee3e8146961f76
003866a4 00000080 23ba44fd162cfe04
00386724 00000098 23ba44fd073de51391
003867bc 00000078 23ba44d21834f33e8146961f763747416b3f2b
00386834 0000003c 23bc68c61d26fa0d845aab1970
00386870 00000030 23bc68cb1833d5128057ab067e0f7e4e65352801797d06186666b5ca49
003868a0 00000040 23bc68cb1833d5128057ab067e0f7e4e66392b1d4875091f52
003868e0 00000070 23ba44d21834f33e95519d04653747416b3f2b
00386950 000000bc 21ba5bce162cfe04
00386a0c 00000030 20b643fd0721eb028e
00386a3c 00000060 35b644c700
00386a9c 00000010 34a45ed6173dd51780519605620d
00386aac 00000044 31b645d11d3ae4
00386af0 00000058 23ba56c52b38e30f815aab077e064859652a
00389918 0000004c 34a745c11c27
00389964 00000084 34a745d0173df8
003899e8 000002f8 37a15ecc000ae2049d7c9613650d7e596b3a340b
Download Driver Pack
After your driver has been downloaded, follow these simple steps to install it.
Expand the archive file (if the download file is in zip or rar format).
If the expanded file has an .exe extension, double click it and follow the installation instructions.
Otherwise, open Device Manager by right-clicking the Start menu and selecting Device Manager.
Find the device and model you want to update in the device list.
Double-click on it to open the Properties dialog box.
From the Properties dialog box, select the Driver tab.
Click the Update Driver button, then follow the instructions.
Very important: You must reboot your system to ensure that any driver updates have taken effect.
For more help, visit our Driver Support section for step-by-step videos on how to install drivers for every file type.