Readme.txt Driver File Contents (IntelTurboMem.zip)

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NAND Compliance Utility supporting Intel(R) Turbo Memory
Revision:  PC
Release Date:  March 2007

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PLEASE READ THE INFORMATION CONTAINED IN THIS README 
BEFORE USING THE INTEL NANDCPLY UTILITY.

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Legal Disclaimer
================

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS.
NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL
PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S 
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WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING 
TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES 
RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT
OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products
are not intended for use in medical, life saving, or life sustaining
applications.

Intel may make changes to specifications and product descriptions at any time, 
without notice. 

This ReadMe file as well as the software described in it is furnished 
under license and may only be used or copied in accordance with the 
terms of the license. The information in this manual is furnished for 
informational use only, is subject to change without notice, and 
should not be construed as a commitment by Intel Corporation. 
Intel Corporation assumes no responsibility or liability for any 
errors or inaccuracies that may appear in this document or any 
software that may be provided in association with this document. 

Except as permitted by such license, no part of this document may be 
reproduced, stored in a retrieval system, or transmitted in any form 
or by any means without the express written consent of 
Intel Corporation. 

The Intel(R) Turbo Memory may contain design defects or errors known as errata
which may cause the product to deviate from published specifications. 
Current characterized errata are available on request.Contact your local 
Intel sales office or your distributor to obtain the latest specifications
and before placing your product order.

Intel and the Intel logo are trademarks or registered trademarks 
of Intel Corporation or its subsidiaries in the United States and
other countries.

*Other names and brands may be claimed as the property of others.

Copyright © 2006 - 2007, Intel Corporation. All rights reserved.

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README Contents
===============
1.  Introduction
2.  System Requirements
3.  Explanation of Tests Run by NANDCply
4.  Usage Instructions
5.  Known Issues and Bug Reporting

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1.  Introduction
================

This README file contains release notes for the NANDCply Utility, describing
any problems or issues that were known at the time of shipment.

The NANDCply Utility is a Microsoft MS-DOS* based utility used to report and
verify the Intel(R) Turbo Memory module, the Intel(R) Flash Cache Logic Chip
Interface, the DFOROM, and the System BIOS for compliance.

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2.  System Requirements
=======================

The NANDCply Utility requires the system to be booted into the MS-DOS
operating system.

The utility also requires that the Intel(R) Turbo Memory module is 
connected to the system with the device already programmed and configured.

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3.  Explanation of Tests Run by NANDCPLY
========================================

1.  Intel SATA RAID/AHCI Controller Presence Tests
  
    1.1  Intel Chipset Detected
         Checks for the Intel Vendor ID in the MCH and ICH.
         Dev00:F0:Reg00h[15:00] = 0x8086
         Dev31:F0:Reg00h[15:00] = 0x8086
         Severity: HIGH
         
    1.2  SATA Controller Name
         Reports the name of I/O Controller at Dev31:F2
         Severity: Status Only
         
    1.3  SATA Controller Mode
         Reports the configured mode of I/O Controller at Dev31:F2
         Supported Modes are AHCI Mode, RAID Mode and Compatible Mode.
         Severity: Status Only

    1.4  SATA Controller SubClass Code at D31:F2
         Checks for the proper SubClass Code for the I/O Controller,
         according to the mode in which it has been configured.
         Dev31:F2:Reg0Ah[07:00]
          - For Ahci Mode, SubClass Code = 0x06
	  - For Raid Mode, SubClass Code = 0x04
          - For Compatible Mode, SubClass Code = 0x01
         Severity: HIGH

    1.5  SATA Controller Chipset Revision
         Checks the hardware revision of the ICH part.
         Dev31:F2:Reg08h[07:00]
         Severity: Status Only

2. Intel(R) Turbo Memory module Presence Tests
	
    2.1  PCI-Express* NAND Caching module Present
         Checks for the presence of an Intel(R) Turbo Memory module
         Compares the cards found with the known supported cards
         Supported cards are:-
	   - FRASER RIVER/BERG LAKE
		 Vendor-Id Dev:F:Reg00h[15:00] = 0x8086
        	 Device-Id Dev:F:Reg02h[15:00] = 0x444E
         Severity: HIGH
         
    2.2  Number of Intel(R) Turbo Memory modules present on the system
         Reports the number of PCI-Express Intel(R) Turbo Memory modules detected.
         Severity: Status Only
         
    2.3  Information for Intel(R) Turbo Memory module(s)
         Reports the settings for every Intel(R) Turbo Memory module found.
         Severity: HIGH

  2.3.1  Information for Intel(R) Turbo Memory module X
         Reports the settings for each Intel(R) Turbo Memory module one by one.
         Severity: HIGH

2.3.1.1  Intel(R) Turbo Memory module DevID at B:D:F
         Checks for the Intel(R) Turbo Memory module DevID and compares it with the
	 supported DevIDs.
         Severity: HIGH

2.3.1.2  Intel(R) Turbo Memory module Class Code (0x05) Present
         Checks for the proper Class Code for the Intel(R) Turbo Memory module.
       	 Dev:F:Reg09h[23:16] =  0x05
         Severity: HIGH

2.3.1.3  Intel(R) Turbo Memory module SubClass Code (0x80) Present
         Checks for the proper SubClass Code for the Intel(R) Turbo Memory module.
       	 Dev:F:Reg0Ah[07:00] =  0x80
         Severity: HIGH

2.3.1.4  Intel(R) Turbo Memory module Revision
         Checks the hardware revision of the Intel(R) Turbo Memory module.
         Dev31:F2:Reg08h[07:00]
         Severity: Status Only

2.3.1.5  Intel(R) Turbo Memory module I/O Space Enabled
         Checks that the Intel(R) Turbo Memory module IOSE bit is enabled.
         DevX:FX:Reg04h[00] = 1
         Severity: HIGH

2.3.1.6  Intel(R) Turbo Memory module Memory Space Enabled
         Checks that the Intel(R) Turbo Memory module MSE bit is enabled.
         DevX:FX:Reg04h[01] = 1
         Severity: HIGH

    2.4  Intel(R) Turbo Memory module(s) Information
         Reports the information about the Intel(R) Turbo Memory module(s) found.
         Severity: HIGH

  2.4.1  Information for Module X
         Reports the Intel(R) Turbo Memory module settings for each module one by one.
         Severity: HIGH

2.4.1.1  PCI Bus/Dev/Func
         Reports the PCI Bus/Dev/Func of the Intel(R) Turbo Memory module.
         Severity: Status Only

2.4.1.2  I/O Space Base Address
         Reports the I/O Space Base Address of the Intel(R) Turbo Memory module.
         Severity: Status Only

2.4.1.3  Memory Space Base Address
         Reports the Memory Space Base Address of the Intel(R) Turbo Memory module.
         Severity: Status Only

2.4.1.4  Intel(R) Turbo Memory module Capacity
         Reports the capacity of the Intel(R) Turbo Memory module in GigaBytes(GB) or
	 MegaBytes(MB), as the case may be.
         Severity: Status Only

2.4.1.5  Virtual Page (vPage) Size
         Reports the Virtual page size of the Intel(R) Turbo Memory module or the cacheline
	 size in layman terms.
         Severity: Status Only

2.4.1.6  Sectors Per Page
         Reports the Sectors Per Page of the Intel(R) Turbo Memory module. 
         Severity: Status Only

2.4.1.6  Sectors Per Block
         Reports the Sectors Per Block of the Intel(R) Turbo Memory module. 
         Severity: Status Only

2.4.1.6  Blocks Per Device
         Reports the Blocks Per Device of the Intel(R) Turbo Memory module.
         Severity: Status Only

3. Intel(R) Flash Cache Logic Chip Interface Register Settings Tests
 
    3.1  Intel(R) Flash Cache Logic Chip Register Information for module(s)
         Reports the Intel(R) Flash Cache Logic Chip Register Settings for every module found.
         Severity: HIGH

  3.2.1  Register Information for Module X
         Reports the Intel(R) Flash Cache Logic Chip Register Settings for all the modules one
	 by one.
         Severity: HIGH

3.2.1.1  Intel(R) Turbo Memory Module Firmware Version
         Reports the Firmware Version of the Intel(R) Turbo Memory Module
         Severity: STATUS_ONLY
  
3.2.1.2  EB0 Block Status
         Reports the read/write status of the Erase Block 0 (EB0).
	 
	 - If ENABLED, hardware enables Erase and Write accesses to EB0,
	   which contains the Defect Map, DFOROM and configuration information.
	  - If DISABLED, hardware reports an invalid command error when trying
	   to write to EB0.  This should be disabled for normal processing.
         Severity: HIGH

3.2.1.3  OROM Read Access from EB0
         Reports the read access status of the OROM in EB0.
	
	 -  If ENABLED, OROM read accesses are enabled and command processing
	    engine is disabled Hardware ignores any write to the IDR register
	    Command Ready Bit (IDR[0]). 
         -  If DISABLED, OROM read accesses are disabled and hardware returns 
            all '1' to OROM accesses. This can then be cleared only with a
	    module reset. 
            OROM read access should be disabled for normal processing.
         Severity: HIGH

3.2.1.4  Command Processing Engine
         Reports the read access status of the OROM in EB0.
	 
	 - If ENABLED, OROM read accesses are enabled and command processing
	   engine is disabled Hardware ignores any write to the IDR register
	   Command Ready Bit (IDR[0]). 
         - If DISABLED, OROM read accesses are
	   disabled and hardware returns all '1' to OROM accesses.  This can
	   then be cleared only with a module reset. OROM read access should
	   be disabled for normal processing.
         Severity: HIGH

3.2.1.5  Blank Detection Status
         Reports the global blank detection status of the Intel(R) Turbo Memory module.
	 
	 - If ENABLED, reading a blank (erased) memory vPage will return a
	   status of 'blank'.  Hardware will not halt the command list
	   processing engine and no fatal error will be generated.
         - If DISABLED, reading a blank (erased) vPage will cause a fatal ECC
	   error.  Normally global blank detection should be enabled.
         Severity: HIGH

3.2.1.6  Software Reset Asserted
	 
          - If TRUE, hardware will perform a reset and clear this bit. This will
	    restore all memory mapped registers to their reset state. PCI-Ex
	    configuration registers are not affected.  
          - If FALSE, nothing to do.
         Severity: STATUS_ONLY

3.2.1.7  Command Processing
	 
	 - If DISABLED, hardware will cease all command processing.  Hardware
	   will finish the current command activity, clear this status and
	   assert a halt interrupt.  
         - If ENABLED, normal command processing continues.  
           Normally it should be enabled.
         Severity: HIGH

3.2.1.8  BME Link Error Reported
	 
          - If TRUE, means there was a non-fatal error reported by the Bus Master
	    Engine.  Command processing is undefined after this. Software writes
	    a '1' to this bit to clear it. 
          - If FALSE, normal command processing continues.
         Severity: STATUS_ONLY

3.2.1.9  Command List Processing Status
         Reports the command list processor status. 

          - If ACTIVE, command processing is active. 
          - If DISABLED, the command list processing has
	    been halted. This could be due to uncorrectable ECC errors, NAND
	    flash program/erase errors, software requesting a halt or a 'blank'
	    was detected on a partial write and also on invalid commands.
            Normally it should be active.
         Severity: HIGH

3.2.1.10 BME Interrupt Generation Status
         Reports status of interrupt generation when BME Link Error is reported.
	 
          - If ENABLED, interrupt is generated. 
          - If DISABLED, interrupt is not generated.
         Severity: STATUS_ONLY

3.2.1.11 Interrupt on Command List Halt Events
         Reports status of interrupt generation when command list is halted.
	 
          - If ENABLED, interrupt is generated. 
          - If DISABLED, interrupt is not generated.
         Severity: STATUS_ONLY

3.2.1.12 Interrupt on Command Completion Events
         Reports status of interrupt generation for commands completion for
	 commands with 'IOC' set.
	  
	  - If ENABLED, interrupt is generated.
          - If DISABLED, interrupt is not generated.
         Severity: STATUS_ONLY

3.2.1.13 ECC Error in OROM
	 
          - If YES, there was an uncorrectable ECC Error while the OROM BAR
	    (Base Address Register) was being accessed. This indicates that any
	    code in the OROM was not run.
          - If NO, there was no ECC Error detected in the OROM.
         Severity: HIGH

3.2.1.14 ECC Error in VPage0 MODULE_CFG_DATA
	 
         - If YES, there was an uncorrectable ECC Error in EB0 (Erase Block 0), vPage0
           while retrieving this data.
         - If NO, there was no ECC Error detected while retrieving this data.
         Severity: HIGH

3.2.1.15 ECC Error in VPage0 PCI_CFG_DATA
	 
         - If YES, there was an uncorrectable ECC Error in EB0 (Erase Block 0), vPage0
           while retrieving this data.
         - If NO, there was no ECC Error detected while retrieving this data.
         Severity: HIGH

3.2.1.16 EB0 Correctable ECC Errors Found
	 
         - If YES, there were correctable ECC Errors while reading data out of
	   EB0 (Erase Block 0).
         - If NO, there was no ECC Errors detected while reading data out of
	   EB0 (Erase Block 0).
         Severity: MEDIUM

3.2.1.17 Number of Physical Devices per Virtual Device.
         Reports the number of physical devices per virtual device. 
         Value is latched from hardware strap.
         Severity: STATUS_ONLY

3.2.1.18 Number of Virtual Devices on Memory Module
         Reports the number of virtual devices on the module.
         Value is retrieved from the Module Configuration sector in EB0.
         Severity: STATUS_ONLY

3.2.1.19 Number of Erase Blocks in a Virtual Device
         Reports the number of erase blocks in a virtual device.
         Value is retrieved from the Module Configuration sector in EB0.
         Severity: STATUS_ONLY

3.2.1.20 Size of Virtual EBs
         Reports the size of virtual erase blocks in vPages.
         Severity: STATUS_ONLY

3.2.1.21 VPage Size
         Reports the vPage (virtual page) size on the memory module.
         This is the maximum data transfer size for a single command operation
         Value is latched from hardware strap.
         Severity: STATUS_ONLY

3.2.1.22 Number of cycles per NAND Address Cycle.
         Reports the number of cycles per NAND Address Cycle of the memory
	 module.  The value is latched from hardware strap.
         Severity: STATUS_ONLY

3.2.1.23 NAND Data Interface Size
         Reports the data interface size that each NAND device has, on the
	 memory module.  The value is latched from hardware strap.
         Severity: STATUS_ONLY

3.2.1.24 NAND Class Interface Timing
         Reports the NAND Class Interface Timing for the device on the
	 memory module.  The value is latched from hardware strap.
         Severity: STATUS_ONLY

3.2.1.25 Number of Chip Enables in the physical devices
         Reports the number of Chip Enables in the physical devices on the
	 memory module.  The value is retrieved from the Module Configuration
	 sector in EB0.
         Severity: STATUS_ONLY

4.  PnP Installation Tests

    4.1  $PnP Anchor String Present in 0xF000 Segment
         Searches for the "$PnP" string in the PnP header, as defined in the
         Plug and Play BIOS Specification. The Intel(R) Turbo Memory 
	 Option ROM requires PnP support to function.
         Severity: HIGH

    4.2  PnP Header Checksum Valid
         Calculates an 8-bit checksum over the PnP Header to make sure the
         reported checksum is correct.
         Severity: HIGH

5.  BBS Enabled BIOS Tests

    5.1  PCI BIOS Present (INT 1A, Func 0xB101)
         Checks for successful return from the call to Int 1Ah, Func 0xB101.
         Severity: HIGH

6.  Intel(R) Turbo Memory Disk Filtering Option ROM (DFOROM) Tests
    
    6.1  Intel(R) Turbo Memory DFOROM Found in BIOS Compatibility Segments
         Searches segments 0xC000 through 0xF000 to see if the 
         DFOROM is present.
         Severity: HIGH

    6.2  Intel(R) Turbo Memory DFOROM Build Matches Card(s)
         Compares the Device-Id of the Intel(R) Turbo Memory module and the DFOROM for a match.
         Severity: HIGH

    6.3  Intel(R) Turbo Memory DFOROM FILT Header Check
         Searches the Option ROM segment for a valid FILT Header in the DFOROM.
         Severity: HIGH

    6.4  Intel(R) Turbo Memory DFOROM FILT Header Checksum Valid
         Calculates an 8-bit checksum over the FILT Header of DFOROM to make
	 sure the reported checksum is correct.
         Severity: HIGH

    6.5  Intel(R) Turbo Memory DFOROM FILT Header Major Version
         Reports the Major Version of the FILT Header in the DFOROM.
         Severity: STATUS_ONLY

    6.6  Intel(R) Turbo Memory DFOROM FILT Header Minor Version
	 Reports the Minor Version of the FILT Header in the DFOROM.
         Severity: STATUS_ONLY

    6.7  BIOS Supports Intel(R) Turbo Memory DFOROM Interface
	 Checks if the system BIOS supports the DFOROM interface per the
	 the Intel(R) Turbo Memory BIOS Writer's Guide (BWG).
         Severity: HIGH

    6.8  Intel(R) Turbo Memory DFOROM Caching
         Checks if the Intel(R) Turbo Memory Option ROM is being cached at run time, 
         by the system BIOS in the processor cache. This helps in quick execution of 
         the OROM after a resume from S4 state or boot up and hence reduces the time 
         needed for the same.
         Severity: Medium

    6.9  Main Memory Size < 639kB
         Checks that the Intel(R) Turbo Memory DFOROM has consumed the portion of conventional
         memory that it needs.
         Severity: HIGH

7.  System BIOS Tests

    7.1  BIOS Updating INT 15h E820 Memory Map
         Checks that the E820 Memory Map is consistent with the EBDA
	 pointer located at 40:0E. Failing this test has the potential to
	 cause software compatibility issues.
         Severity: LOW

    7.2  BIOS Reporting Correct Base Memory Size in 40:13
         Checks that the conventional memory size reported at 40:13 is
         consistent with the EBDA pointer located at 40:0E.
         Failing this test has the potential to cause software compatibility
	 issues.
         Severity: HIGH

    7.3  BIOS is in AHCI Mode
         Checks if the system BIOS or a AHCI/RAID OROM has enabled AHCI in the I/O Controller.
         Severity: HIGH

8.  Intel(R) Turbo Memory module Interrupt Settings Tests

     8.1 Intel(R) Turbo Memory module IRQ
         Reports the IRQ number assigned to the Intel(R) Turbo Memory module on the system.
         Severity: Status Only

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4.  Usage Instructions
======================

1.  Enable the Intel(R) Turbo Memory DFOROM support in the System BIOS.

2.  Populate the Intel(R) Turbo Memory Hardware into the system.

3.  There is no need for the card to be programmed for this test.
    It reports the settings that it finds at the time of running.

4.  From a DOS prompt, enter the following
	
    c:\Nandcply.exe

    You may have the utility redirect the results to a text file by using the
    following command:
	
    c:\Nandcply > NandCply.log

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5.  Known Issues and Bug Reporting
==================================
      
To report a bug on this utility, please submit the bug report to
your Intel Field Representative.

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